Wed, 29 Mar 2017 09:41:51 +0800
#4662 TieredCompilation is turned off.
TieredCompilation is not supported yet.
1 /*
2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #ifndef CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP
27 #define CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP
29 #ifdef USE_PRAGMA_IDENT_HDR
30 #pragma ident "@(#)disassembler_mips.hpp 1.16 03/12/23 16:36:15 JVM"
31 #endif
33 // The disassembler prints out mips32 code annotated
34 // with Java specific information.
36 class Disassembler {
37 private:
38 // decodes one instruction and return the start of the next instruction.
39 static address decode_instruction(address start, DisassemblerEnv* env);
40 public:
41 static bool can_decode() {
42 //return (_decode_instructions != NULL) || load_library();
43 return true;
44 }
45 static void decode(CodeBlob *cb, outputStream* st = NULL);
46 static void decode(nmethod* nm, outputStream* st = NULL);
47 static void decode(u_char* begin, u_char* end, outputStream* st = NULL);
48 };
50 #endif // CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP