Mercurial > jdk8-mips64-public > hotspot / annotate
src/cpu/mips/vm/disassembler_mips.hpp@4bfb40d1e17a (annotated)
src/cpu/mips/vm/disassembler_mips.hpp
Wed, 29 Mar 2017 09:41:51 +0800
- author
- aoqi
- date
- Wed, 29 Mar 2017 09:41:51 +0800
- changeset 392
- 4bfb40d1e17a
- parent 130
- b4f2008f15f8
- child 433
- bd82ffa08941
- permissions
- -rw-r--r--
#4662 TieredCompilation is turned off.
TieredCompilation is not supported yet.
| aoqi@1 | 1 | /* |
| aoqi@1 | 2 | * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
| aoqi@1 | 3 | * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. |
| aoqi@1 | 4 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| aoqi@1 | 5 | * |
| aoqi@1 | 6 | * This code is free software; you can redistribute it and/or modify it |
| aoqi@1 | 7 | * under the terms of the GNU General Public License version 2 only, as |
| aoqi@1 | 8 | * published by the Free Software Foundation. |
| aoqi@1 | 9 | * |
| aoqi@1 | 10 | * This code is distributed in the hope that it will be useful, but WITHOUT |
| aoqi@1 | 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| aoqi@1 | 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| aoqi@1 | 13 | * version 2 for more details (a copy is included in the LICENSE file that |
| aoqi@1 | 14 | * accompanied this code). |
| aoqi@1 | 15 | * |
| aoqi@1 | 16 | * You should have received a copy of the GNU General Public License version |
| aoqi@1 | 17 | * 2 along with this work; if not, write to the Free Software Foundation, |
| aoqi@1 | 18 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
| aoqi@1 | 19 | * |
| aoqi@1 | 20 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
| aoqi@1 | 21 | * or visit www.oracle.com if you need additional information or have any |
| aoqi@1 | 22 | * questions. |
| aoqi@1 | 23 | * |
| aoqi@1 | 24 | */ |
| aoqi@1 | 25 | |
| aoqi@1 | 26 | #ifndef CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP |
| aoqi@1 | 27 | #define CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP |
| aoqi@1 | 28 | |
| aoqi@1 | 29 | #ifdef USE_PRAGMA_IDENT_HDR |
| aoqi@1 | 30 | #pragma ident "@(#)disassembler_mips.hpp 1.16 03/12/23 16:36:15 JVM" |
| aoqi@1 | 31 | #endif |
| aoqi@1 | 32 | |
| aoqi@1 | 33 | // The disassembler prints out mips32 code annotated |
| aoqi@1 | 34 | // with Java specific information. |
| aoqi@1 | 35 | |
| aoqi@1 | 36 | class Disassembler { |
| aoqi@1 | 37 | private: |
| aoqi@1 | 38 | // decodes one instruction and return the start of the next instruction. |
| aoqi@1 | 39 | static address decode_instruction(address start, DisassemblerEnv* env); |
| aoqi@1 | 40 | public: |
| aoqi@1 | 41 | static bool can_decode() { |
| aoqi@1 | 42 | //return (_decode_instructions != NULL) || load_library(); |
| aoqi@1 | 43 | return true; |
| aoqi@1 | 44 | } |
| aoqi@130 | 45 | static void decode(CodeBlob *cb, outputStream* st = NULL); |
| aoqi@130 | 46 | static void decode(nmethod* nm, outputStream* st = NULL); |
| aoqi@130 | 47 | static void decode(u_char* begin, u_char* end, outputStream* st = NULL); |
| aoqi@1 | 48 | }; |
| aoqi@1 | 49 | |
| aoqi@1 | 50 | #endif // CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP |
| aoqi@1 | 51 |
