Mon, 13 Feb 2012 02:29:22 -0800
7141329: Strange values of stack_size in -XX:+TraceMethodHandles output
Reviewed-by: kvn, never
1 /*
2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
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16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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23 */
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "assembler_x86.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolderOop.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_x86.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
44 #define __ masm->
46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
48 class RegisterSaver {
49 enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ };
50 // Capture info about frame layout
51 enum layout {
52 fpu_state_off = 0,
53 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1,
54 st0_off, st0H_off,
55 st1_off, st1H_off,
56 st2_off, st2H_off,
57 st3_off, st3H_off,
58 st4_off, st4H_off,
59 st5_off, st5H_off,
60 st6_off, st6H_off,
61 st7_off, st7H_off,
63 xmm0_off, xmm0H_off,
64 xmm1_off, xmm1H_off,
65 xmm2_off, xmm2H_off,
66 xmm3_off, xmm3H_off,
67 xmm4_off, xmm4H_off,
68 xmm5_off, xmm5H_off,
69 xmm6_off, xmm6H_off,
70 xmm7_off, xmm7H_off,
71 flags_off,
72 rdi_off,
73 rsi_off,
74 ignore_off, // extra copy of rbp,
75 rsp_off,
76 rbx_off,
77 rdx_off,
78 rcx_off,
79 rax_off,
80 // The frame sender code expects that rbp will be in the "natural" place and
81 // will override any oopMap setting for it. We must therefore force the layout
82 // so that it agrees with the frame sender code.
83 rbp_off,
84 return_off, // slot for return address
85 reg_save_size };
88 public:
90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
91 int* total_frame_words, bool verify_fpu = true);
92 static void restore_live_registers(MacroAssembler* masm);
94 static int rax_offset() { return rax_off; }
95 static int rbx_offset() { return rbx_off; }
97 // Offsets into the register save area
98 // Used by deoptimization when it is managing result register
99 // values on its own
101 static int raxOffset(void) { return rax_off; }
102 static int rdxOffset(void) { return rdx_off; }
103 static int rbxOffset(void) { return rbx_off; }
104 static int xmm0Offset(void) { return xmm0_off; }
105 // This really returns a slot in the fp save area, which one is not important
106 static int fpResultOffset(void) { return st0_off; }
108 // During deoptimization only the result register need to be restored
109 // all the other values have already been extracted.
111 static void restore_result_registers(MacroAssembler* masm);
113 };
115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
116 int* total_frame_words, bool verify_fpu) {
118 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
119 int frame_words = frame_size_in_bytes / wordSize;
120 *total_frame_words = frame_words;
122 assert(FPUStateSizeInWords == 27, "update stack layout");
124 // save registers, fpu state, and flags
125 // We assume caller has already has return address slot on the stack
126 // We push epb twice in this sequence because we want the real rbp,
127 // to be under the return like a normal enter and we want to use pusha
128 // We push by hand instead of pusing push
129 __ enter();
130 __ pusha();
131 __ pushf();
132 __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space
133 __ push_FPU_state(); // Save FPU state & init
135 if (verify_fpu) {
136 // Some stubs may have non standard FPU control word settings so
137 // only check and reset the value when it required to be the
138 // standard value. The safepoint blob in particular can be used
139 // in methods which are using the 24 bit control word for
140 // optimized float math.
142 #ifdef ASSERT
143 // Make sure the control word has the expected value
144 Label ok;
145 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
146 __ jccb(Assembler::equal, ok);
147 __ stop("corrupted control word detected");
148 __ bind(ok);
149 #endif
151 // Reset the control word to guard against exceptions being unmasked
152 // since fstp_d can cause FPU stack underflow exceptions. Write it
153 // into the on stack copy and then reload that to make sure that the
154 // current and future values are correct.
155 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
156 }
158 __ frstor(Address(rsp, 0));
159 if (!verify_fpu) {
160 // Set the control word so that exceptions are masked for the
161 // following code.
162 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
163 }
165 // Save the FPU registers in de-opt-able form
167 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0)
168 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1)
169 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2)
170 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3)
171 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4)
172 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5)
173 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6)
174 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7)
176 if( UseSSE == 1 ) { // Save the XMM state
177 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0);
178 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1);
179 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2);
180 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3);
181 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4);
182 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5);
183 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6);
184 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7);
185 } else if( UseSSE >= 2 ) {
186 __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0);
187 __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1);
188 __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2);
189 __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3);
190 __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4);
191 __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5);
192 __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6);
193 __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7);
194 }
196 // Set an oopmap for the call site. This oopmap will map all
197 // oop-registers and debug-info registers as callee-saved. This
198 // will allow deoptimization at this safepoint to find all possible
199 // debug-info recordings, as well as let GC find all oops.
201 OopMapSet *oop_maps = new OopMapSet();
202 OopMap* map = new OopMap( frame_words, 0 );
204 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
206 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg());
207 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg());
208 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg());
209 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg());
210 // rbp, location is known implicitly, no oopMap
211 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg());
212 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg());
213 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg());
214 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg());
215 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg());
216 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg());
217 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg());
218 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg());
219 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg());
220 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg());
221 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg());
222 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg());
223 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg());
224 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg());
225 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg());
226 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg());
227 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg());
228 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg());
229 // %%% This is really a waste but we'll keep things as they were for now
230 if (true) {
231 #define NEXTREG(x) (x)->as_VMReg()->next()
232 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0)));
233 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1)));
234 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2)));
235 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3)));
236 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4)));
237 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5)));
238 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6)));
239 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7)));
240 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0));
241 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1));
242 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2));
243 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3));
244 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4));
245 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5));
246 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6));
247 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7));
248 #undef NEXTREG
249 #undef STACK_OFFSET
250 }
252 return map;
254 }
256 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
258 // Recover XMM & FPU state
259 if( UseSSE == 1 ) {
260 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize));
261 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize));
262 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize));
263 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize));
264 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize));
265 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize));
266 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize));
267 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize));
268 } else if( UseSSE >= 2 ) {
269 __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize));
270 __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize));
271 __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize));
272 __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize));
273 __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize));
274 __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize));
275 __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize));
276 __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize));
277 }
278 __ pop_FPU_state();
279 __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers
281 __ popf();
282 __ popa();
283 // Get the rbp, described implicitly by the frame sender code (no oopMap)
284 __ pop(rbp);
286 }
288 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
290 // Just restore result register. Only used by deoptimization. By
291 // now any callee save register that needs to be restore to a c2
292 // caller of the deoptee has been extracted into the vframeArray
293 // and will be stuffed into the c2i adapter we create for later
294 // restoration so only result registers need to be restored here.
295 //
297 __ frstor(Address(rsp, 0)); // Restore fpu state
299 // Recover XMM & FPU state
300 if( UseSSE == 1 ) {
301 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
302 } else if( UseSSE >= 2 ) {
303 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
304 }
305 __ movptr(rax, Address(rsp, rax_off*wordSize));
306 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
307 // Pop all of the register save are off the stack except the return address
308 __ addptr(rsp, return_off * wordSize);
309 }
311 // The java_calling_convention describes stack locations as ideal slots on
312 // a frame with no abi restrictions. Since we must observe abi restrictions
313 // (like the placement of the register window) the slots must be biased by
314 // the following value.
315 static int reg2offset_in(VMReg r) {
316 // Account for saved rbp, and return address
317 // This should really be in_preserve_stack_slots
318 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
319 }
321 static int reg2offset_out(VMReg r) {
322 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
323 }
325 // ---------------------------------------------------------------------------
326 // Read the array of BasicTypes from a signature, and compute where the
327 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
328 // quantities. Values less than SharedInfo::stack0 are registers, those above
329 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
330 // as framesizes are fixed.
331 // VMRegImpl::stack0 refers to the first slot 0(sp).
332 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
333 // up to RegisterImpl::number_of_registers) are the 32-bit
334 // integer registers.
336 // Pass first two oop/int args in registers ECX and EDX.
337 // Pass first two float/double args in registers XMM0 and XMM1.
338 // Doubles have precedence, so if you pass a mix of floats and doubles
339 // the doubles will grab the registers before the floats will.
341 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
342 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
343 // units regardless of build. Of course for i486 there is no 64 bit build
346 // ---------------------------------------------------------------------------
347 // The compiled Java calling convention.
348 // Pass first two oop/int args in registers ECX and EDX.
349 // Pass first two float/double args in registers XMM0 and XMM1.
350 // Doubles have precedence, so if you pass a mix of floats and doubles
351 // the doubles will grab the registers before the floats will.
352 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
353 VMRegPair *regs,
354 int total_args_passed,
355 int is_outgoing) {
356 uint stack = 0; // Starting stack position for args on stack
359 // Pass first two oop/int args in registers ECX and EDX.
360 uint reg_arg0 = 9999;
361 uint reg_arg1 = 9999;
363 // Pass first two float/double args in registers XMM0 and XMM1.
364 // Doubles have precedence, so if you pass a mix of floats and doubles
365 // the doubles will grab the registers before the floats will.
366 // CNC - TURNED OFF FOR non-SSE.
367 // On Intel we have to round all doubles (and most floats) at
368 // call sites by storing to the stack in any case.
369 // UseSSE=0 ==> Don't Use ==> 9999+0
370 // UseSSE=1 ==> Floats only ==> 9999+1
371 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
372 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
373 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
374 uint freg_arg0 = 9999+fargs;
375 uint freg_arg1 = 9999+fargs;
377 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
378 int i;
379 for( i = 0; i < total_args_passed; i++) {
380 if( sig_bt[i] == T_DOUBLE ) {
381 // first 2 doubles go in registers
382 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
383 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
384 else // Else double is passed low on the stack to be aligned.
385 stack += 2;
386 } else if( sig_bt[i] == T_LONG ) {
387 stack += 2;
388 }
389 }
390 int dstack = 0; // Separate counter for placing doubles
392 // Now pick where all else goes.
393 for( i = 0; i < total_args_passed; i++) {
394 // From the type and the argument number (count) compute the location
395 switch( sig_bt[i] ) {
396 case T_SHORT:
397 case T_CHAR:
398 case T_BYTE:
399 case T_BOOLEAN:
400 case T_INT:
401 case T_ARRAY:
402 case T_OBJECT:
403 case T_ADDRESS:
404 if( reg_arg0 == 9999 ) {
405 reg_arg0 = i;
406 regs[i].set1(rcx->as_VMReg());
407 } else if( reg_arg1 == 9999 ) {
408 reg_arg1 = i;
409 regs[i].set1(rdx->as_VMReg());
410 } else {
411 regs[i].set1(VMRegImpl::stack2reg(stack++));
412 }
413 break;
414 case T_FLOAT:
415 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
416 freg_arg0 = i;
417 regs[i].set1(xmm0->as_VMReg());
418 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
419 freg_arg1 = i;
420 regs[i].set1(xmm1->as_VMReg());
421 } else {
422 regs[i].set1(VMRegImpl::stack2reg(stack++));
423 }
424 break;
425 case T_LONG:
426 assert(sig_bt[i+1] == T_VOID, "missing Half" );
427 regs[i].set2(VMRegImpl::stack2reg(dstack));
428 dstack += 2;
429 break;
430 case T_DOUBLE:
431 assert(sig_bt[i+1] == T_VOID, "missing Half" );
432 if( freg_arg0 == (uint)i ) {
433 regs[i].set2(xmm0->as_VMReg());
434 } else if( freg_arg1 == (uint)i ) {
435 regs[i].set2(xmm1->as_VMReg());
436 } else {
437 regs[i].set2(VMRegImpl::stack2reg(dstack));
438 dstack += 2;
439 }
440 break;
441 case T_VOID: regs[i].set_bad(); break;
442 break;
443 default:
444 ShouldNotReachHere();
445 break;
446 }
447 }
449 // return value can be odd number of VMRegImpl stack slots make multiple of 2
450 return round_to(stack, 2);
451 }
453 // Patch the callers callsite with entry to compiled code if it exists.
454 static void patch_callers_callsite(MacroAssembler *masm) {
455 Label L;
456 __ verify_oop(rbx);
457 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
458 __ jcc(Assembler::equal, L);
459 // Schedule the branch target address early.
460 // Call into the VM to patch the caller, then jump to compiled callee
461 // rax, isn't live so capture return address while we easily can
462 __ movptr(rax, Address(rsp, 0));
463 __ pusha();
464 __ pushf();
466 if (UseSSE == 1) {
467 __ subptr(rsp, 2*wordSize);
468 __ movflt(Address(rsp, 0), xmm0);
469 __ movflt(Address(rsp, wordSize), xmm1);
470 }
471 if (UseSSE >= 2) {
472 __ subptr(rsp, 4*wordSize);
473 __ movdbl(Address(rsp, 0), xmm0);
474 __ movdbl(Address(rsp, 2*wordSize), xmm1);
475 }
476 #ifdef COMPILER2
477 // C2 may leave the stack dirty if not in SSE2+ mode
478 if (UseSSE >= 2) {
479 __ verify_FPU(0, "c2i transition should have clean FPU stack");
480 } else {
481 __ empty_FPU_stack();
482 }
483 #endif /* COMPILER2 */
485 // VM needs caller's callsite
486 __ push(rax);
487 // VM needs target method
488 __ push(rbx);
489 __ verify_oop(rbx);
490 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
491 __ addptr(rsp, 2*wordSize);
493 if (UseSSE == 1) {
494 __ movflt(xmm0, Address(rsp, 0));
495 __ movflt(xmm1, Address(rsp, wordSize));
496 __ addptr(rsp, 2*wordSize);
497 }
498 if (UseSSE >= 2) {
499 __ movdbl(xmm0, Address(rsp, 0));
500 __ movdbl(xmm1, Address(rsp, 2*wordSize));
501 __ addptr(rsp, 4*wordSize);
502 }
504 __ popf();
505 __ popa();
506 __ bind(L);
507 }
510 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
511 int next_off = st_off - Interpreter::stackElementSize;
512 __ movdbl(Address(rsp, next_off), r);
513 }
515 static void gen_c2i_adapter(MacroAssembler *masm,
516 int total_args_passed,
517 int comp_args_on_stack,
518 const BasicType *sig_bt,
519 const VMRegPair *regs,
520 Label& skip_fixup) {
521 // Before we get into the guts of the C2I adapter, see if we should be here
522 // at all. We've come from compiled code and are attempting to jump to the
523 // interpreter, which means the caller made a static call to get here
524 // (vcalls always get a compiled target if there is one). Check for a
525 // compiled target. If there is one, we need to patch the caller's call.
526 patch_callers_callsite(masm);
528 __ bind(skip_fixup);
530 #ifdef COMPILER2
531 // C2 may leave the stack dirty if not in SSE2+ mode
532 if (UseSSE >= 2) {
533 __ verify_FPU(0, "c2i transition should have clean FPU stack");
534 } else {
535 __ empty_FPU_stack();
536 }
537 #endif /* COMPILER2 */
539 // Since all args are passed on the stack, total_args_passed * interpreter_
540 // stack_element_size is the
541 // space we need.
542 int extraspace = total_args_passed * Interpreter::stackElementSize;
544 // Get return address
545 __ pop(rax);
547 // set senderSP value
548 __ movptr(rsi, rsp);
550 __ subptr(rsp, extraspace);
552 // Now write the args into the outgoing interpreter space
553 for (int i = 0; i < total_args_passed; i++) {
554 if (sig_bt[i] == T_VOID) {
555 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
556 continue;
557 }
559 // st_off points to lowest address on stack.
560 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
561 int next_off = st_off - Interpreter::stackElementSize;
563 // Say 4 args:
564 // i st_off
565 // 0 12 T_LONG
566 // 1 8 T_VOID
567 // 2 4 T_OBJECT
568 // 3 0 T_BOOL
569 VMReg r_1 = regs[i].first();
570 VMReg r_2 = regs[i].second();
571 if (!r_1->is_valid()) {
572 assert(!r_2->is_valid(), "");
573 continue;
574 }
576 if (r_1->is_stack()) {
577 // memory to memory use fpu stack top
578 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
580 if (!r_2->is_valid()) {
581 __ movl(rdi, Address(rsp, ld_off));
582 __ movptr(Address(rsp, st_off), rdi);
583 } else {
585 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
586 // st_off == MSW, st_off-wordSize == LSW
588 __ movptr(rdi, Address(rsp, ld_off));
589 __ movptr(Address(rsp, next_off), rdi);
590 #ifndef _LP64
591 __ movptr(rdi, Address(rsp, ld_off + wordSize));
592 __ movptr(Address(rsp, st_off), rdi);
593 #else
594 #ifdef ASSERT
595 // Overwrite the unused slot with known junk
596 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
597 __ movptr(Address(rsp, st_off), rax);
598 #endif /* ASSERT */
599 #endif // _LP64
600 }
601 } else if (r_1->is_Register()) {
602 Register r = r_1->as_Register();
603 if (!r_2->is_valid()) {
604 __ movl(Address(rsp, st_off), r);
605 } else {
606 // long/double in gpr
607 NOT_LP64(ShouldNotReachHere());
608 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
609 // T_DOUBLE and T_LONG use two slots in the interpreter
610 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
611 // long/double in gpr
612 #ifdef ASSERT
613 // Overwrite the unused slot with known junk
614 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
615 __ movptr(Address(rsp, st_off), rax);
616 #endif /* ASSERT */
617 __ movptr(Address(rsp, next_off), r);
618 } else {
619 __ movptr(Address(rsp, st_off), r);
620 }
621 }
622 } else {
623 assert(r_1->is_XMMRegister(), "");
624 if (!r_2->is_valid()) {
625 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
626 } else {
627 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
628 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
629 }
630 }
631 }
633 // Schedule the branch target address early.
634 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
635 // And repush original return address
636 __ push(rax);
637 __ jmp(rcx);
638 }
641 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
642 int next_val_off = ld_off - Interpreter::stackElementSize;
643 __ movdbl(r, Address(saved_sp, next_val_off));
644 }
646 static void gen_i2c_adapter(MacroAssembler *masm,
647 int total_args_passed,
648 int comp_args_on_stack,
649 const BasicType *sig_bt,
650 const VMRegPair *regs) {
652 // Note: rsi contains the senderSP on entry. We must preserve it since
653 // we may do a i2c -> c2i transition if we lose a race where compiled
654 // code goes non-entrant while we get args ready.
656 // Pick up the return address
657 __ movptr(rax, Address(rsp, 0));
659 // Must preserve original SP for loading incoming arguments because
660 // we need to align the outgoing SP for compiled code.
661 __ movptr(rdi, rsp);
663 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
664 // in registers, we will occasionally have no stack args.
665 int comp_words_on_stack = 0;
666 if (comp_args_on_stack) {
667 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
668 // registers are below. By subtracting stack0, we either get a negative
669 // number (all values in registers) or the maximum stack slot accessed.
670 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
671 // Convert 4-byte stack slots to words.
672 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
673 // Round up to miminum stack alignment, in wordSize
674 comp_words_on_stack = round_to(comp_words_on_stack, 2);
675 __ subptr(rsp, comp_words_on_stack * wordSize);
676 }
678 // Align the outgoing SP
679 __ andptr(rsp, -(StackAlignmentInBytes));
681 // push the return address on the stack (note that pushing, rather
682 // than storing it, yields the correct frame alignment for the callee)
683 __ push(rax);
685 // Put saved SP in another register
686 const Register saved_sp = rax;
687 __ movptr(saved_sp, rdi);
690 // Will jump to the compiled code just as if compiled code was doing it.
691 // Pre-load the register-jump target early, to schedule it better.
692 __ movptr(rdi, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
694 // Now generate the shuffle code. Pick up all register args and move the
695 // rest through the floating point stack top.
696 for (int i = 0; i < total_args_passed; i++) {
697 if (sig_bt[i] == T_VOID) {
698 // Longs and doubles are passed in native word order, but misaligned
699 // in the 32-bit build.
700 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
701 continue;
702 }
704 // Pick up 0, 1 or 2 words from SP+offset.
706 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
707 "scrambled load targets?");
708 // Load in argument order going down.
709 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
710 // Point to interpreter value (vs. tag)
711 int next_off = ld_off - Interpreter::stackElementSize;
712 //
713 //
714 //
715 VMReg r_1 = regs[i].first();
716 VMReg r_2 = regs[i].second();
717 if (!r_1->is_valid()) {
718 assert(!r_2->is_valid(), "");
719 continue;
720 }
721 if (r_1->is_stack()) {
722 // Convert stack slot to an SP offset (+ wordSize to account for return address )
723 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
725 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
726 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
727 // we be generated.
728 if (!r_2->is_valid()) {
729 // __ fld_s(Address(saved_sp, ld_off));
730 // __ fstp_s(Address(rsp, st_off));
731 __ movl(rsi, Address(saved_sp, ld_off));
732 __ movptr(Address(rsp, st_off), rsi);
733 } else {
734 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
735 // are accessed as negative so LSW is at LOW address
737 // ld_off is MSW so get LSW
738 // st_off is LSW (i.e. reg.first())
739 // __ fld_d(Address(saved_sp, next_off));
740 // __ fstp_d(Address(rsp, st_off));
741 //
742 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
743 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
744 // So we must adjust where to pick up the data to match the interpreter.
745 //
746 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
747 // are accessed as negative so LSW is at LOW address
749 // ld_off is MSW so get LSW
750 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
751 next_off : ld_off;
752 __ movptr(rsi, Address(saved_sp, offset));
753 __ movptr(Address(rsp, st_off), rsi);
754 #ifndef _LP64
755 __ movptr(rsi, Address(saved_sp, ld_off));
756 __ movptr(Address(rsp, st_off + wordSize), rsi);
757 #endif // _LP64
758 }
759 } else if (r_1->is_Register()) { // Register argument
760 Register r = r_1->as_Register();
761 assert(r != rax, "must be different");
762 if (r_2->is_valid()) {
763 //
764 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
765 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
766 // So we must adjust where to pick up the data to match the interpreter.
768 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
769 next_off : ld_off;
771 // this can be a misaligned move
772 __ movptr(r, Address(saved_sp, offset));
773 #ifndef _LP64
774 assert(r_2->as_Register() != rax, "need another temporary register");
775 // Remember r_1 is low address (and LSB on x86)
776 // So r_2 gets loaded from high address regardless of the platform
777 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
778 #endif // _LP64
779 } else {
780 __ movl(r, Address(saved_sp, ld_off));
781 }
782 } else {
783 assert(r_1->is_XMMRegister(), "");
784 if (!r_2->is_valid()) {
785 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
786 } else {
787 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
788 }
789 }
790 }
792 // 6243940 We might end up in handle_wrong_method if
793 // the callee is deoptimized as we race thru here. If that
794 // happens we don't want to take a safepoint because the
795 // caller frame will look interpreted and arguments are now
796 // "compiled" so it is much better to make this transition
797 // invisible to the stack walking code. Unfortunately if
798 // we try and find the callee by normal means a safepoint
799 // is possible. So we stash the desired callee in the thread
800 // and the vm will find there should this case occur.
802 __ get_thread(rax);
803 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
805 // move methodOop to rax, in case we end up in an c2i adapter.
806 // the c2i adapters expect methodOop in rax, (c2) because c2's
807 // resolve stubs return the result (the method) in rax,.
808 // I'd love to fix this.
809 __ mov(rax, rbx);
811 __ jmp(rdi);
812 }
814 // ---------------------------------------------------------------
815 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
816 int total_args_passed,
817 int comp_args_on_stack,
818 const BasicType *sig_bt,
819 const VMRegPair *regs,
820 AdapterFingerPrint* fingerprint) {
821 address i2c_entry = __ pc();
823 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
825 // -------------------------------------------------------------------------
826 // Generate a C2I adapter. On entry we know rbx, holds the methodOop during calls
827 // to the interpreter. The args start out packed in the compiled layout. They
828 // need to be unpacked into the interpreter layout. This will almost always
829 // require some stack space. We grow the current (compiled) stack, then repack
830 // the args. We finally end in a jump to the generic interpreter entry point.
831 // On exit from the interpreter, the interpreter will restore our SP (lest the
832 // compiled code, which relys solely on SP and not EBP, get sick).
834 address c2i_unverified_entry = __ pc();
835 Label skip_fixup;
837 Register holder = rax;
838 Register receiver = rcx;
839 Register temp = rbx;
841 {
843 Label missed;
845 __ verify_oop(holder);
846 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
847 __ verify_oop(temp);
849 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
850 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
851 __ jcc(Assembler::notEqual, missed);
852 // Method might have been compiled since the call site was patched to
853 // interpreted if that is the case treat it as a miss so we can get
854 // the call site corrected.
855 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
856 __ jcc(Assembler::equal, skip_fixup);
858 __ bind(missed);
859 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
860 }
862 address c2i_entry = __ pc();
864 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
866 __ flush();
867 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
868 }
870 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
871 VMRegPair *regs,
872 int total_args_passed) {
873 // We return the amount of VMRegImpl stack slots we need to reserve for all
874 // the arguments NOT counting out_preserve_stack_slots.
876 uint stack = 0; // All arguments on stack
878 for( int i = 0; i < total_args_passed; i++) {
879 // From the type and the argument number (count) compute the location
880 switch( sig_bt[i] ) {
881 case T_BOOLEAN:
882 case T_CHAR:
883 case T_FLOAT:
884 case T_BYTE:
885 case T_SHORT:
886 case T_INT:
887 case T_OBJECT:
888 case T_ARRAY:
889 case T_ADDRESS:
890 regs[i].set1(VMRegImpl::stack2reg(stack++));
891 break;
892 case T_LONG:
893 case T_DOUBLE: // The stack numbering is reversed from Java
894 // Since C arguments do not get reversed, the ordering for
895 // doubles on the stack must be opposite the Java convention
896 assert(sig_bt[i+1] == T_VOID, "missing Half" );
897 regs[i].set2(VMRegImpl::stack2reg(stack));
898 stack += 2;
899 break;
900 case T_VOID: regs[i].set_bad(); break;
901 default:
902 ShouldNotReachHere();
903 break;
904 }
905 }
906 return stack;
907 }
909 // A simple move of integer like type
910 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
911 if (src.first()->is_stack()) {
912 if (dst.first()->is_stack()) {
913 // stack to stack
914 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
915 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
916 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
917 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
918 } else {
919 // stack to reg
920 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
921 }
922 } else if (dst.first()->is_stack()) {
923 // reg to stack
924 // no need to sign extend on 64bit
925 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
926 } else {
927 if (dst.first() != src.first()) {
928 __ mov(dst.first()->as_Register(), src.first()->as_Register());
929 }
930 }
931 }
933 // An oop arg. Must pass a handle not the oop itself
934 static void object_move(MacroAssembler* masm,
935 OopMap* map,
936 int oop_handle_offset,
937 int framesize_in_slots,
938 VMRegPair src,
939 VMRegPair dst,
940 bool is_receiver,
941 int* receiver_offset) {
943 // Because of the calling conventions we know that src can be a
944 // register or a stack location. dst can only be a stack location.
946 assert(dst.first()->is_stack(), "must be stack");
947 // must pass a handle. First figure out the location we use as a handle
949 if (src.first()->is_stack()) {
950 // Oop is already on the stack as an argument
951 Register rHandle = rax;
952 Label nil;
953 __ xorptr(rHandle, rHandle);
954 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
955 __ jcc(Assembler::equal, nil);
956 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
957 __ bind(nil);
958 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
960 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
961 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
962 if (is_receiver) {
963 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
964 }
965 } else {
966 // Oop is in an a register we must store it to the space we reserve
967 // on the stack for oop_handles
968 const Register rOop = src.first()->as_Register();
969 const Register rHandle = rax;
970 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
971 int offset = oop_slot*VMRegImpl::stack_slot_size;
972 Label skip;
973 __ movptr(Address(rsp, offset), rOop);
974 map->set_oop(VMRegImpl::stack2reg(oop_slot));
975 __ xorptr(rHandle, rHandle);
976 __ cmpptr(rOop, (int32_t)NULL_WORD);
977 __ jcc(Assembler::equal, skip);
978 __ lea(rHandle, Address(rsp, offset));
979 __ bind(skip);
980 // Store the handle parameter
981 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
982 if (is_receiver) {
983 *receiver_offset = offset;
984 }
985 }
986 }
988 // A float arg may have to do float reg int reg conversion
989 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
990 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
992 // Because of the calling convention we know that src is either a stack location
993 // or an xmm register. dst can only be a stack location.
995 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
997 if (src.first()->is_stack()) {
998 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
999 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1000 } else {
1001 // reg to stack
1002 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1003 }
1004 }
1006 // A long move
1007 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1009 // The only legal possibility for a long_move VMRegPair is:
1010 // 1: two stack slots (possibly unaligned)
1011 // as neither the java or C calling convention will use registers
1012 // for longs.
1014 if (src.first()->is_stack() && dst.first()->is_stack()) {
1015 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1016 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1017 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1018 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1019 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1020 } else {
1021 ShouldNotReachHere();
1022 }
1023 }
1025 // A double move
1026 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1028 // The only legal possibilities for a double_move VMRegPair are:
1029 // The painful thing here is that like long_move a VMRegPair might be
1031 // Because of the calling convention we know that src is either
1032 // 1: a single physical register (xmm registers only)
1033 // 2: two stack slots (possibly unaligned)
1034 // dst can only be a pair of stack slots.
1036 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1038 if (src.first()->is_stack()) {
1039 // source is all stack
1040 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1041 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1042 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1043 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1044 } else {
1045 // reg to stack
1046 // No worries about stack alignment
1047 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1048 }
1049 }
1052 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1053 // We always ignore the frame_slots arg and just use the space just below frame pointer
1054 // which by this time is free to use
1055 switch (ret_type) {
1056 case T_FLOAT:
1057 __ fstp_s(Address(rbp, -wordSize));
1058 break;
1059 case T_DOUBLE:
1060 __ fstp_d(Address(rbp, -2*wordSize));
1061 break;
1062 case T_VOID: break;
1063 case T_LONG:
1064 __ movptr(Address(rbp, -wordSize), rax);
1065 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1066 break;
1067 default: {
1068 __ movptr(Address(rbp, -wordSize), rax);
1069 }
1070 }
1071 }
1073 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1074 // We always ignore the frame_slots arg and just use the space just below frame pointer
1075 // which by this time is free to use
1076 switch (ret_type) {
1077 case T_FLOAT:
1078 __ fld_s(Address(rbp, -wordSize));
1079 break;
1080 case T_DOUBLE:
1081 __ fld_d(Address(rbp, -2*wordSize));
1082 break;
1083 case T_LONG:
1084 __ movptr(rax, Address(rbp, -wordSize));
1085 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1086 break;
1087 case T_VOID: break;
1088 default: {
1089 __ movptr(rax, Address(rbp, -wordSize));
1090 }
1091 }
1092 }
1095 static void save_or_restore_arguments(MacroAssembler* masm,
1096 const int stack_slots,
1097 const int total_in_args,
1098 const int arg_save_area,
1099 OopMap* map,
1100 VMRegPair* in_regs,
1101 BasicType* in_sig_bt) {
1102 // if map is non-NULL then the code should store the values,
1103 // otherwise it should load them.
1104 int handle_index = 0;
1105 // Save down double word first
1106 for ( int i = 0; i < total_in_args; i++) {
1107 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1108 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1109 int offset = slot * VMRegImpl::stack_slot_size;
1110 handle_index += 2;
1111 assert(handle_index <= stack_slots, "overflow");
1112 if (map != NULL) {
1113 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1114 } else {
1115 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1116 }
1117 }
1118 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1119 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1120 int offset = slot * VMRegImpl::stack_slot_size;
1121 handle_index += 2;
1122 assert(handle_index <= stack_slots, "overflow");
1123 if (map != NULL) {
1124 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1125 if (in_regs[i].second()->is_Register()) {
1126 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1127 }
1128 } else {
1129 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1130 if (in_regs[i].second()->is_Register()) {
1131 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1132 }
1133 }
1134 }
1135 }
1136 // Save or restore single word registers
1137 for ( int i = 0; i < total_in_args; i++) {
1138 if (in_regs[i].first()->is_Register()) {
1139 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1140 int offset = slot * VMRegImpl::stack_slot_size;
1141 assert(handle_index <= stack_slots, "overflow");
1142 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1143 map->set_oop(VMRegImpl::stack2reg(slot));;
1144 }
1146 // Value is in an input register pass we must flush it to the stack
1147 const Register reg = in_regs[i].first()->as_Register();
1148 switch (in_sig_bt[i]) {
1149 case T_ARRAY:
1150 if (map != NULL) {
1151 __ movptr(Address(rsp, offset), reg);
1152 } else {
1153 __ movptr(reg, Address(rsp, offset));
1154 }
1155 break;
1156 case T_BOOLEAN:
1157 case T_CHAR:
1158 case T_BYTE:
1159 case T_SHORT:
1160 case T_INT:
1161 if (map != NULL) {
1162 __ movl(Address(rsp, offset), reg);
1163 } else {
1164 __ movl(reg, Address(rsp, offset));
1165 }
1166 break;
1167 case T_OBJECT:
1168 default: ShouldNotReachHere();
1169 }
1170 } else if (in_regs[i].first()->is_XMMRegister()) {
1171 if (in_sig_bt[i] == T_FLOAT) {
1172 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1173 int offset = slot * VMRegImpl::stack_slot_size;
1174 assert(handle_index <= stack_slots, "overflow");
1175 if (map != NULL) {
1176 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1177 } else {
1178 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1179 }
1180 }
1181 } else if (in_regs[i].first()->is_stack()) {
1182 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1183 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1184 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1185 }
1186 }
1187 }
1188 }
1190 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1191 // keeps a new JNI critical region from starting until a GC has been
1192 // forced. Save down any oops in registers and describe them in an
1193 // OopMap.
1194 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1195 Register thread,
1196 int stack_slots,
1197 int total_c_args,
1198 int total_in_args,
1199 int arg_save_area,
1200 OopMapSet* oop_maps,
1201 VMRegPair* in_regs,
1202 BasicType* in_sig_bt) {
1203 __ block_comment("check GC_locker::needs_gc");
1204 Label cont;
1205 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false);
1206 __ jcc(Assembler::equal, cont);
1208 // Save down any incoming oops and call into the runtime to halt for a GC
1210 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1212 save_or_restore_arguments(masm, stack_slots, total_in_args,
1213 arg_save_area, map, in_regs, in_sig_bt);
1215 address the_pc = __ pc();
1216 oop_maps->add_gc_map( __ offset(), map);
1217 __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1219 __ block_comment("block_for_jni_critical");
1220 __ push(thread);
1221 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1222 __ increment(rsp, wordSize);
1224 __ get_thread(thread);
1225 __ reset_last_Java_frame(thread, false, true);
1227 save_or_restore_arguments(masm, stack_slots, total_in_args,
1228 arg_save_area, NULL, in_regs, in_sig_bt);
1230 __ bind(cont);
1231 #ifdef ASSERT
1232 if (StressCriticalJNINatives) {
1233 // Stress register saving
1234 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1235 save_or_restore_arguments(masm, stack_slots, total_in_args,
1236 arg_save_area, map, in_regs, in_sig_bt);
1237 // Destroy argument registers
1238 for (int i = 0; i < total_in_args - 1; i++) {
1239 if (in_regs[i].first()->is_Register()) {
1240 const Register reg = in_regs[i].first()->as_Register();
1241 __ xorptr(reg, reg);
1242 } else if (in_regs[i].first()->is_XMMRegister()) {
1243 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1244 } else if (in_regs[i].first()->is_FloatRegister()) {
1245 ShouldNotReachHere();
1246 } else if (in_regs[i].first()->is_stack()) {
1247 // Nothing to do
1248 } else {
1249 ShouldNotReachHere();
1250 }
1251 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1252 i++;
1253 }
1254 }
1256 save_or_restore_arguments(masm, stack_slots, total_in_args,
1257 arg_save_area, NULL, in_regs, in_sig_bt);
1258 }
1259 #endif
1260 }
1262 // Unpack an array argument into a pointer to the body and the length
1263 // if the array is non-null, otherwise pass 0 for both.
1264 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1265 Register tmp_reg = rax;
1266 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1267 "possible collision");
1268 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1269 "possible collision");
1271 // Pass the length, ptr pair
1272 Label is_null, done;
1273 VMRegPair tmp(tmp_reg->as_VMReg());
1274 if (reg.first()->is_stack()) {
1275 // Load the arg up from the stack
1276 simple_move32(masm, reg, tmp);
1277 reg = tmp;
1278 }
1279 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1280 __ jccb(Assembler::equal, is_null);
1281 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1282 simple_move32(masm, tmp, body_arg);
1283 // load the length relative to the body.
1284 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1285 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1286 simple_move32(masm, tmp, length_arg);
1287 __ jmpb(done);
1288 __ bind(is_null);
1289 // Pass zeros
1290 __ xorptr(tmp_reg, tmp_reg);
1291 simple_move32(masm, tmp, body_arg);
1292 simple_move32(masm, tmp, length_arg);
1293 __ bind(done);
1294 }
1297 // ---------------------------------------------------------------------------
1298 // Generate a native wrapper for a given method. The method takes arguments
1299 // in the Java compiled code convention, marshals them to the native
1300 // convention (handlizes oops, etc), transitions to native, makes the call,
1301 // returns to java state (possibly blocking), unhandlizes any result and
1302 // returns.
1303 //
1304 // Critical native functions are a shorthand for the use of
1305 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1306 // functions. The wrapper is expected to unpack the arguments before
1307 // passing them to the callee and perform checks before and after the
1308 // native call to ensure that they GC_locker
1309 // lock_critical/unlock_critical semantics are followed. Some other
1310 // parts of JNI setup are skipped like the tear down of the JNI handle
1311 // block and the check for pending exceptions it's impossible for them
1312 // to be thrown.
1313 //
1314 // They are roughly structured like this:
1315 // if (GC_locker::needs_gc())
1316 // SharedRuntime::block_for_jni_critical();
1317 // tranistion to thread_in_native
1318 // unpack arrray arguments and call native entry point
1319 // check for safepoint in progress
1320 // check if any thread suspend flags are set
1321 // call into JVM and possible unlock the JNI critical
1322 // if a GC was suppressed while in the critical native.
1323 // transition back to thread_in_Java
1324 // return to caller
1325 //
1326 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1327 methodHandle method,
1328 int compile_id,
1329 int total_in_args,
1330 int comp_args_on_stack,
1331 BasicType *in_sig_bt,
1332 VMRegPair *in_regs,
1333 BasicType ret_type) {
1334 bool is_critical_native = true;
1335 address native_func = method->critical_native_function();
1336 if (native_func == NULL) {
1337 native_func = method->native_function();
1338 is_critical_native = false;
1339 }
1340 assert(native_func != NULL, "must have function");
1342 // An OopMap for lock (and class if static)
1343 OopMapSet *oop_maps = new OopMapSet();
1345 // We have received a description of where all the java arg are located
1346 // on entry to the wrapper. We need to convert these args to where
1347 // the jni function will expect them. To figure out where they go
1348 // we convert the java signature to a C signature by inserting
1349 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1351 int total_c_args = total_in_args;
1352 if (!is_critical_native) {
1353 total_c_args += 1;
1354 if (method->is_static()) {
1355 total_c_args++;
1356 }
1357 } else {
1358 for (int i = 0; i < total_in_args; i++) {
1359 if (in_sig_bt[i] == T_ARRAY) {
1360 total_c_args++;
1361 }
1362 }
1363 }
1365 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1366 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1367 BasicType* in_elem_bt = NULL;
1369 int argc = 0;
1370 if (!is_critical_native) {
1371 out_sig_bt[argc++] = T_ADDRESS;
1372 if (method->is_static()) {
1373 out_sig_bt[argc++] = T_OBJECT;
1374 }
1376 for (int i = 0; i < total_in_args ; i++ ) {
1377 out_sig_bt[argc++] = in_sig_bt[i];
1378 }
1379 } else {
1380 Thread* THREAD = Thread::current();
1381 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1382 SignatureStream ss(method->signature());
1383 for (int i = 0; i < total_in_args ; i++ ) {
1384 if (in_sig_bt[i] == T_ARRAY) {
1385 // Arrays are passed as int, elem* pair
1386 out_sig_bt[argc++] = T_INT;
1387 out_sig_bt[argc++] = T_ADDRESS;
1388 Symbol* atype = ss.as_symbol(CHECK_NULL);
1389 const char* at = atype->as_C_string();
1390 if (strlen(at) == 2) {
1391 assert(at[0] == '[', "must be");
1392 switch (at[1]) {
1393 case 'B': in_elem_bt[i] = T_BYTE; break;
1394 case 'C': in_elem_bt[i] = T_CHAR; break;
1395 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1396 case 'F': in_elem_bt[i] = T_FLOAT; break;
1397 case 'I': in_elem_bt[i] = T_INT; break;
1398 case 'J': in_elem_bt[i] = T_LONG; break;
1399 case 'S': in_elem_bt[i] = T_SHORT; break;
1400 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1401 default: ShouldNotReachHere();
1402 }
1403 }
1404 } else {
1405 out_sig_bt[argc++] = in_sig_bt[i];
1406 in_elem_bt[i] = T_VOID;
1407 }
1408 if (in_sig_bt[i] != T_VOID) {
1409 assert(in_sig_bt[i] == ss.type(), "must match");
1410 ss.next();
1411 }
1412 }
1413 }
1415 // Now figure out where the args must be stored and how much stack space
1416 // they require.
1417 int out_arg_slots;
1418 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1420 // Compute framesize for the wrapper. We need to handlize all oops in
1421 // registers a max of 2 on x86.
1423 // Calculate the total number of stack slots we will need.
1425 // First count the abi requirement plus all of the outgoing args
1426 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1428 // Now the space for the inbound oop handle area
1429 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1430 if (is_critical_native) {
1431 // Critical natives may have to call out so they need a save area
1432 // for register arguments.
1433 int double_slots = 0;
1434 int single_slots = 0;
1435 for ( int i = 0; i < total_in_args; i++) {
1436 if (in_regs[i].first()->is_Register()) {
1437 const Register reg = in_regs[i].first()->as_Register();
1438 switch (in_sig_bt[i]) {
1439 case T_ARRAY:
1440 case T_BOOLEAN:
1441 case T_BYTE:
1442 case T_SHORT:
1443 case T_CHAR:
1444 case T_INT: single_slots++; break;
1445 case T_LONG: double_slots++; break;
1446 default: ShouldNotReachHere();
1447 }
1448 } else if (in_regs[i].first()->is_XMMRegister()) {
1449 switch (in_sig_bt[i]) {
1450 case T_FLOAT: single_slots++; break;
1451 case T_DOUBLE: double_slots++; break;
1452 default: ShouldNotReachHere();
1453 }
1454 } else if (in_regs[i].first()->is_FloatRegister()) {
1455 ShouldNotReachHere();
1456 }
1457 }
1458 total_save_slots = double_slots * 2 + single_slots;
1459 // align the save area
1460 if (double_slots != 0) {
1461 stack_slots = round_to(stack_slots, 2);
1462 }
1463 }
1465 int oop_handle_offset = stack_slots;
1466 stack_slots += total_save_slots;
1468 // Now any space we need for handlizing a klass if static method
1470 int klass_slot_offset = 0;
1471 int klass_offset = -1;
1472 int lock_slot_offset = 0;
1473 bool is_static = false;
1475 if (method->is_static()) {
1476 klass_slot_offset = stack_slots;
1477 stack_slots += VMRegImpl::slots_per_word;
1478 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1479 is_static = true;
1480 }
1482 // Plus a lock if needed
1484 if (method->is_synchronized()) {
1485 lock_slot_offset = stack_slots;
1486 stack_slots += VMRegImpl::slots_per_word;
1487 }
1489 // Now a place (+2) to save return values or temp during shuffling
1490 // + 2 for return address (which we own) and saved rbp,
1491 stack_slots += 4;
1493 // Ok The space we have allocated will look like:
1494 //
1495 //
1496 // FP-> | |
1497 // |---------------------|
1498 // | 2 slots for moves |
1499 // |---------------------|
1500 // | lock box (if sync) |
1501 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1502 // | klass (if static) |
1503 // |---------------------| <- klass_slot_offset
1504 // | oopHandle area |
1505 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1506 // | outbound memory |
1507 // | based arguments |
1508 // | |
1509 // |---------------------|
1510 // | |
1511 // SP-> | out_preserved_slots |
1512 //
1513 //
1514 // ****************************************************************************
1515 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1516 // arguments off of the stack after the jni call. Before the call we can use
1517 // instructions that are SP relative. After the jni call we switch to FP
1518 // relative instructions instead of re-adjusting the stack on windows.
1519 // ****************************************************************************
1522 // Now compute actual number of stack words we need rounding to make
1523 // stack properly aligned.
1524 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1526 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1528 intptr_t start = (intptr_t)__ pc();
1530 // First thing make an ic check to see if we should even be here
1532 // We are free to use all registers as temps without saving them and
1533 // restoring them except rbp. rbp is the only callee save register
1534 // as far as the interpreter and the compiler(s) are concerned.
1537 const Register ic_reg = rax;
1538 const Register receiver = rcx;
1539 Label hit;
1540 Label exception_pending;
1542 __ verify_oop(receiver);
1543 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1544 __ jcc(Assembler::equal, hit);
1546 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1548 // verified entry must be aligned for code patching.
1549 // and the first 5 bytes must be in the same cache line
1550 // if we align at 8 then we will be sure 5 bytes are in the same line
1551 __ align(8);
1553 __ bind(hit);
1555 int vep_offset = ((intptr_t)__ pc()) - start;
1557 #ifdef COMPILER1
1558 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1559 // Object.hashCode can pull the hashCode from the header word
1560 // instead of doing a full VM transition once it's been computed.
1561 // Since hashCode is usually polymorphic at call sites we can't do
1562 // this optimization at the call site without a lot of work.
1563 Label slowCase;
1564 Register receiver = rcx;
1565 Register result = rax;
1566 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1568 // check if locked
1569 __ testptr(result, markOopDesc::unlocked_value);
1570 __ jcc (Assembler::zero, slowCase);
1572 if (UseBiasedLocking) {
1573 // Check if biased and fall through to runtime if so
1574 __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1575 __ jcc (Assembler::notZero, slowCase);
1576 }
1578 // get hash
1579 __ andptr(result, markOopDesc::hash_mask_in_place);
1580 // test if hashCode exists
1581 __ jcc (Assembler::zero, slowCase);
1582 __ shrptr(result, markOopDesc::hash_shift);
1583 __ ret(0);
1584 __ bind (slowCase);
1585 }
1586 #endif // COMPILER1
1588 // The instruction at the verified entry point must be 5 bytes or longer
1589 // because it can be patched on the fly by make_non_entrant. The stack bang
1590 // instruction fits that requirement.
1592 // Generate stack overflow check
1594 if (UseStackBanging) {
1595 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1596 } else {
1597 // need a 5 byte instruction to allow MT safe patching to non-entrant
1598 __ fat_nop();
1599 }
1601 // Generate a new frame for the wrapper.
1602 __ enter();
1603 // -2 because return address is already present and so is saved rbp
1604 __ subptr(rsp, stack_size - 2*wordSize);
1606 // Frame is now completed as far as size and linkage.
1607 int frame_complete = ((intptr_t)__ pc()) - start;
1609 // Calculate the difference between rsp and rbp,. We need to know it
1610 // after the native call because on windows Java Natives will pop
1611 // the arguments and it is painful to do rsp relative addressing
1612 // in a platform independent way. So after the call we switch to
1613 // rbp, relative addressing.
1615 int fp_adjustment = stack_size - 2*wordSize;
1617 #ifdef COMPILER2
1618 // C2 may leave the stack dirty if not in SSE2+ mode
1619 if (UseSSE >= 2) {
1620 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1621 } else {
1622 __ empty_FPU_stack();
1623 }
1624 #endif /* COMPILER2 */
1626 // Compute the rbp, offset for any slots used after the jni call
1628 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1630 // We use rdi as a thread pointer because it is callee save and
1631 // if we load it once it is usable thru the entire wrapper
1632 const Register thread = rdi;
1634 // We use rsi as the oop handle for the receiver/klass
1635 // It is callee save so it survives the call to native
1637 const Register oop_handle_reg = rsi;
1639 __ get_thread(thread);
1641 if (is_critical_native) {
1642 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1643 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1644 }
1646 //
1647 // We immediately shuffle the arguments so that any vm call we have to
1648 // make from here on out (sync slow path, jvmti, etc.) we will have
1649 // captured the oops from our caller and have a valid oopMap for
1650 // them.
1652 // -----------------
1653 // The Grand Shuffle
1654 //
1655 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1656 // and, if static, the class mirror instead of a receiver. This pretty much
1657 // guarantees that register layout will not match (and x86 doesn't use reg
1658 // parms though amd does). Since the native abi doesn't use register args
1659 // and the java conventions does we don't have to worry about collisions.
1660 // All of our moved are reg->stack or stack->stack.
1661 // We ignore the extra arguments during the shuffle and handle them at the
1662 // last moment. The shuffle is described by the two calling convention
1663 // vectors we have in our possession. We simply walk the java vector to
1664 // get the source locations and the c vector to get the destinations.
1666 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1668 // Record rsp-based slot for receiver on stack for non-static methods
1669 int receiver_offset = -1;
1671 // This is a trick. We double the stack slots so we can claim
1672 // the oops in the caller's frame. Since we are sure to have
1673 // more args than the caller doubling is enough to make
1674 // sure we can capture all the incoming oop args from the
1675 // caller.
1676 //
1677 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1679 // Mark location of rbp,
1680 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1682 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1683 // Are free to temporaries if we have to do stack to steck moves.
1684 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1686 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1687 switch (in_sig_bt[i]) {
1688 case T_ARRAY:
1689 if (is_critical_native) {
1690 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1691 c_arg++;
1692 break;
1693 }
1694 case T_OBJECT:
1695 assert(!is_critical_native, "no oop arguments");
1696 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1697 ((i == 0) && (!is_static)),
1698 &receiver_offset);
1699 break;
1700 case T_VOID:
1701 break;
1703 case T_FLOAT:
1704 float_move(masm, in_regs[i], out_regs[c_arg]);
1705 break;
1707 case T_DOUBLE:
1708 assert( i + 1 < total_in_args &&
1709 in_sig_bt[i + 1] == T_VOID &&
1710 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1711 double_move(masm, in_regs[i], out_regs[c_arg]);
1712 break;
1714 case T_LONG :
1715 long_move(masm, in_regs[i], out_regs[c_arg]);
1716 break;
1718 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1720 default:
1721 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1722 }
1723 }
1725 // Pre-load a static method's oop into rsi. Used both by locking code and
1726 // the normal JNI call code.
1727 if (method->is_static() && !is_critical_native) {
1729 // load opp into a register
1730 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1732 // Now handlize the static class mirror it's known not-null.
1733 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1734 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1736 // Now get the handle
1737 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1738 // store the klass handle as second argument
1739 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1740 }
1742 // Change state to native (we save the return address in the thread, since it might not
1743 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1744 // points into the right code segment. It does not have to be the correct return pc.
1745 // We use the same pc/oopMap repeatedly when we call out
1747 intptr_t the_pc = (intptr_t) __ pc();
1748 oop_maps->add_gc_map(the_pc - start, map);
1750 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1753 // We have all of the arguments setup at this point. We must not touch any register
1754 // argument registers at this point (what if we save/restore them there are no oop?
1756 {
1757 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1758 __ movoop(rax, JNIHandles::make_local(method()));
1759 __ call_VM_leaf(
1760 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1761 thread, rax);
1762 }
1764 // RedefineClasses() tracing support for obsolete method entry
1765 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1766 __ movoop(rax, JNIHandles::make_local(method()));
1767 __ call_VM_leaf(
1768 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1769 thread, rax);
1770 }
1772 // These are register definitions we need for locking/unlocking
1773 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1774 const Register obj_reg = rcx; // Will contain the oop
1775 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1777 Label slow_path_lock;
1778 Label lock_done;
1780 // Lock a synchronized method
1781 if (method->is_synchronized()) {
1782 assert(!is_critical_native, "unhandled");
1785 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1787 // Get the handle (the 2nd argument)
1788 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1790 // Get address of the box
1792 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1794 // Load the oop from the handle
1795 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1797 if (UseBiasedLocking) {
1798 // Note that oop_handle_reg is trashed during this call
1799 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
1800 }
1802 // Load immediate 1 into swap_reg %rax,
1803 __ movptr(swap_reg, 1);
1805 // Load (object->mark() | 1) into swap_reg %rax,
1806 __ orptr(swap_reg, Address(obj_reg, 0));
1808 // Save (object->mark() | 1) into BasicLock's displaced header
1809 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1811 if (os::is_MP()) {
1812 __ lock();
1813 }
1815 // src -> dest iff dest == rax, else rax, <- dest
1816 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1817 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1818 __ jcc(Assembler::equal, lock_done);
1820 // Test if the oopMark is an obvious stack pointer, i.e.,
1821 // 1) (mark & 3) == 0, and
1822 // 2) rsp <= mark < mark + os::pagesize()
1823 // These 3 tests can be done by evaluating the following
1824 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1825 // assuming both stack pointer and pagesize have their
1826 // least significant 2 bits clear.
1827 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1829 __ subptr(swap_reg, rsp);
1830 __ andptr(swap_reg, 3 - os::vm_page_size());
1832 // Save the test result, for recursive case, the result is zero
1833 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1834 __ jcc(Assembler::notEqual, slow_path_lock);
1835 // Slow path will re-enter here
1836 __ bind(lock_done);
1838 if (UseBiasedLocking) {
1839 // Re-fetch oop_handle_reg as we trashed it above
1840 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1841 }
1842 }
1845 // Finally just about ready to make the JNI call
1848 // get JNIEnv* which is first argument to native
1849 if (!is_critical_native) {
1850 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1851 __ movptr(Address(rsp, 0), rdx);
1852 }
1854 // Now set thread in native
1855 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1857 __ call(RuntimeAddress(native_func));
1859 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1860 // arguments off of the stack. We could just re-adjust the stack pointer here
1861 // and continue to do SP relative addressing but we instead switch to FP
1862 // relative addressing.
1864 // Unpack native results.
1865 switch (ret_type) {
1866 case T_BOOLEAN: __ c2bool(rax); break;
1867 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1868 case T_BYTE : __ sign_extend_byte (rax); break;
1869 case T_SHORT : __ sign_extend_short(rax); break;
1870 case T_INT : /* nothing to do */ break;
1871 case T_DOUBLE :
1872 case T_FLOAT :
1873 // Result is in st0 we'll save as needed
1874 break;
1875 case T_ARRAY: // Really a handle
1876 case T_OBJECT: // Really a handle
1877 break; // can't de-handlize until after safepoint check
1878 case T_VOID: break;
1879 case T_LONG: break;
1880 default : ShouldNotReachHere();
1881 }
1883 // Switch thread to "native transition" state before reading the synchronization state.
1884 // This additional state is necessary because reading and testing the synchronization
1885 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1886 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1887 // VM thread changes sync state to synchronizing and suspends threads for GC.
1888 // Thread A is resumed to finish this native method, but doesn't block here since it
1889 // didn't see any synchronization is progress, and escapes.
1890 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1892 if(os::is_MP()) {
1893 if (UseMembar) {
1894 // Force this write out before the read below
1895 __ membar(Assembler::Membar_mask_bits(
1896 Assembler::LoadLoad | Assembler::LoadStore |
1897 Assembler::StoreLoad | Assembler::StoreStore));
1898 } else {
1899 // Write serialization page so VM thread can do a pseudo remote membar.
1900 // We use the current thread pointer to calculate a thread specific
1901 // offset to write to within the page. This minimizes bus traffic
1902 // due to cache line collision.
1903 __ serialize_memory(thread, rcx);
1904 }
1905 }
1907 if (AlwaysRestoreFPU) {
1908 // Make sure the control word is correct.
1909 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
1910 }
1912 Label after_transition;
1914 // check for safepoint operation in progress and/or pending suspend requests
1915 { Label Continue;
1917 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
1918 SafepointSynchronize::_not_synchronized);
1920 Label L;
1921 __ jcc(Assembler::notEqual, L);
1922 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1923 __ jcc(Assembler::equal, Continue);
1924 __ bind(L);
1926 // Don't use call_VM as it will see a possible pending exception and forward it
1927 // and never return here preventing us from clearing _last_native_pc down below.
1928 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1929 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1930 // by hand.
1931 //
1932 save_native_result(masm, ret_type, stack_slots);
1933 __ push(thread);
1934 if (!is_critical_native) {
1935 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1936 JavaThread::check_special_condition_for_native_trans)));
1937 } else {
1938 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1939 JavaThread::check_special_condition_for_native_trans_and_transition)));
1940 }
1941 __ increment(rsp, wordSize);
1942 // Restore any method result value
1943 restore_native_result(masm, ret_type, stack_slots);
1945 if (is_critical_native) {
1946 // The call above performed the transition to thread_in_Java so
1947 // skip the transition logic below.
1948 __ jmpb(after_transition);
1949 }
1951 __ bind(Continue);
1952 }
1954 // change thread state
1955 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1956 __ bind(after_transition);
1958 Label reguard;
1959 Label reguard_done;
1960 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
1961 __ jcc(Assembler::equal, reguard);
1963 // slow path reguard re-enters here
1964 __ bind(reguard_done);
1966 // Handle possible exception (will unlock if necessary)
1968 // native result if any is live
1970 // Unlock
1971 Label slow_path_unlock;
1972 Label unlock_done;
1973 if (method->is_synchronized()) {
1975 Label done;
1977 // Get locked oop from the handle we passed to jni
1978 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1980 if (UseBiasedLocking) {
1981 __ biased_locking_exit(obj_reg, rbx, done);
1982 }
1984 // Simple recursive lock?
1986 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
1987 __ jcc(Assembler::equal, done);
1989 // Must save rax, if if it is live now because cmpxchg must use it
1990 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1991 save_native_result(masm, ret_type, stack_slots);
1992 }
1994 // get old displaced header
1995 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1997 // get address of the stack lock
1998 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2000 // Atomic swap old header if oop still contains the stack lock
2001 if (os::is_MP()) {
2002 __ lock();
2003 }
2005 // src -> dest iff dest == rax, else rax, <- dest
2006 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2007 __ cmpxchgptr(rbx, Address(obj_reg, 0));
2008 __ jcc(Assembler::notEqual, slow_path_unlock);
2010 // slow path re-enters here
2011 __ bind(unlock_done);
2012 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2013 restore_native_result(masm, ret_type, stack_slots);
2014 }
2016 __ bind(done);
2018 }
2020 {
2021 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2022 // Tell dtrace about this method exit
2023 save_native_result(masm, ret_type, stack_slots);
2024 __ movoop(rax, JNIHandles::make_local(method()));
2025 __ call_VM_leaf(
2026 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2027 thread, rax);
2028 restore_native_result(masm, ret_type, stack_slots);
2029 }
2031 // We can finally stop using that last_Java_frame we setup ages ago
2033 __ reset_last_Java_frame(thread, false, true);
2035 // Unpack oop result
2036 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2037 Label L;
2038 __ cmpptr(rax, (int32_t)NULL_WORD);
2039 __ jcc(Assembler::equal, L);
2040 __ movptr(rax, Address(rax, 0));
2041 __ bind(L);
2042 __ verify_oop(rax);
2043 }
2045 if (!is_critical_native) {
2046 // reset handle block
2047 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2048 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2050 // Any exception pending?
2051 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2052 __ jcc(Assembler::notEqual, exception_pending);
2053 }
2055 // no exception, we're almost done
2057 // check that only result value is on FPU stack
2058 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2060 // Fixup floating pointer results so that result looks like a return from a compiled method
2061 if (ret_type == T_FLOAT) {
2062 if (UseSSE >= 1) {
2063 // Pop st0 and store as float and reload into xmm register
2064 __ fstp_s(Address(rbp, -4));
2065 __ movflt(xmm0, Address(rbp, -4));
2066 }
2067 } else if (ret_type == T_DOUBLE) {
2068 if (UseSSE >= 2) {
2069 // Pop st0 and store as double and reload into xmm register
2070 __ fstp_d(Address(rbp, -8));
2071 __ movdbl(xmm0, Address(rbp, -8));
2072 }
2073 }
2075 // Return
2077 __ leave();
2078 __ ret(0);
2080 // Unexpected paths are out of line and go here
2082 // Slow path locking & unlocking
2083 if (method->is_synchronized()) {
2085 // BEGIN Slow path lock
2087 __ bind(slow_path_lock);
2089 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2090 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2091 __ push(thread);
2092 __ push(lock_reg);
2093 __ push(obj_reg);
2094 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2095 __ addptr(rsp, 3*wordSize);
2097 #ifdef ASSERT
2098 { Label L;
2099 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2100 __ jcc(Assembler::equal, L);
2101 __ stop("no pending exception allowed on exit from monitorenter");
2102 __ bind(L);
2103 }
2104 #endif
2105 __ jmp(lock_done);
2107 // END Slow path lock
2109 // BEGIN Slow path unlock
2110 __ bind(slow_path_unlock);
2112 // Slow path unlock
2114 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2115 save_native_result(masm, ret_type, stack_slots);
2116 }
2117 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2119 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2120 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2123 // should be a peal
2124 // +wordSize because of the push above
2125 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2126 __ push(rax);
2128 __ push(obj_reg);
2129 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2130 __ addptr(rsp, 2*wordSize);
2131 #ifdef ASSERT
2132 {
2133 Label L;
2134 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2135 __ jcc(Assembler::equal, L);
2136 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2137 __ bind(L);
2138 }
2139 #endif /* ASSERT */
2141 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2143 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2144 restore_native_result(masm, ret_type, stack_slots);
2145 }
2146 __ jmp(unlock_done);
2147 // END Slow path unlock
2149 }
2151 // SLOW PATH Reguard the stack if needed
2153 __ bind(reguard);
2154 save_native_result(masm, ret_type, stack_slots);
2155 {
2156 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2157 }
2158 restore_native_result(masm, ret_type, stack_slots);
2159 __ jmp(reguard_done);
2162 // BEGIN EXCEPTION PROCESSING
2164 if (!is_critical_native) {
2165 // Forward the exception
2166 __ bind(exception_pending);
2168 // remove possible return value from FPU register stack
2169 __ empty_FPU_stack();
2171 // pop our frame
2172 __ leave();
2173 // and forward the exception
2174 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2175 }
2177 __ flush();
2179 nmethod *nm = nmethod::new_native_nmethod(method,
2180 compile_id,
2181 masm->code(),
2182 vep_offset,
2183 frame_complete,
2184 stack_slots / VMRegImpl::slots_per_word,
2185 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2186 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2187 oop_maps);
2189 if (is_critical_native) {
2190 nm->set_lazy_critical_native(true);
2191 }
2193 return nm;
2195 }
2197 #ifdef HAVE_DTRACE_H
2198 // ---------------------------------------------------------------------------
2199 // Generate a dtrace nmethod for a given signature. The method takes arguments
2200 // in the Java compiled code convention, marshals them to the native
2201 // abi and then leaves nops at the position you would expect to call a native
2202 // function. When the probe is enabled the nops are replaced with a trap
2203 // instruction that dtrace inserts and the trace will cause a notification
2204 // to dtrace.
2205 //
2206 // The probes are only able to take primitive types and java/lang/String as
2207 // arguments. No other java types are allowed. Strings are converted to utf8
2208 // strings so that from dtrace point of view java strings are converted to C
2209 // strings. There is an arbitrary fixed limit on the total space that a method
2210 // can use for converting the strings. (256 chars per string in the signature).
2211 // So any java string larger then this is truncated.
2213 nmethod *SharedRuntime::generate_dtrace_nmethod(
2214 MacroAssembler *masm, methodHandle method) {
2216 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
2217 // be single threaded in this method.
2218 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
2220 // Fill in the signature array, for the calling-convention call.
2221 int total_args_passed = method->size_of_parameters();
2223 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
2224 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
2226 // The signature we are going to use for the trap that dtrace will see
2227 // java/lang/String is converted. We drop "this" and any other object
2228 // is converted to NULL. (A one-slot java/lang/Long object reference
2229 // is converted to a two-slot long, which is why we double the allocation).
2230 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
2231 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
2233 int i=0;
2234 int total_strings = 0;
2235 int first_arg_to_pass = 0;
2236 int total_c_args = 0;
2238 if( !method->is_static() ) { // Pass in receiver first
2239 in_sig_bt[i++] = T_OBJECT;
2240 first_arg_to_pass = 1;
2241 }
2243 // We need to convert the java args to where a native (non-jni) function
2244 // would expect them. To figure out where they go we convert the java
2245 // signature to a C signature.
2247 SignatureStream ss(method->signature());
2248 for ( ; !ss.at_return_type(); ss.next()) {
2249 BasicType bt = ss.type();
2250 in_sig_bt[i++] = bt; // Collect remaining bits of signature
2251 out_sig_bt[total_c_args++] = bt;
2252 if( bt == T_OBJECT) {
2253 Symbol* s = ss.as_symbol_or_null(); // symbol is created
2254 if (s == vmSymbols::java_lang_String()) {
2255 total_strings++;
2256 out_sig_bt[total_c_args-1] = T_ADDRESS;
2257 } else if (s == vmSymbols::java_lang_Boolean() ||
2258 s == vmSymbols::java_lang_Character() ||
2259 s == vmSymbols::java_lang_Byte() ||
2260 s == vmSymbols::java_lang_Short() ||
2261 s == vmSymbols::java_lang_Integer() ||
2262 s == vmSymbols::java_lang_Float()) {
2263 out_sig_bt[total_c_args-1] = T_INT;
2264 } else if (s == vmSymbols::java_lang_Long() ||
2265 s == vmSymbols::java_lang_Double()) {
2266 out_sig_bt[total_c_args-1] = T_LONG;
2267 out_sig_bt[total_c_args++] = T_VOID;
2268 }
2269 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
2270 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
2271 out_sig_bt[total_c_args++] = T_VOID;
2272 }
2273 }
2275 assert(i==total_args_passed, "validly parsed signature");
2277 // Now get the compiled-Java layout as input arguments
2278 int comp_args_on_stack;
2279 comp_args_on_stack = SharedRuntime::java_calling_convention(
2280 in_sig_bt, in_regs, total_args_passed, false);
2282 // Now figure out where the args must be stored and how much stack space
2283 // they require (neglecting out_preserve_stack_slots).
2285 int out_arg_slots;
2286 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
2288 // Calculate the total number of stack slots we will need.
2290 // First count the abi requirement plus all of the outgoing args
2291 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2293 // Now space for the string(s) we must convert
2295 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2296 for (i = 0; i < total_strings ; i++) {
2297 string_locs[i] = stack_slots;
2298 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2299 }
2301 // + 2 for return address (which we own) and saved rbp,
2303 stack_slots += 2;
2305 // Ok The space we have allocated will look like:
2306 //
2307 //
2308 // FP-> | |
2309 // |---------------------|
2310 // | string[n] |
2311 // |---------------------| <- string_locs[n]
2312 // | string[n-1] |
2313 // |---------------------| <- string_locs[n-1]
2314 // | ... |
2315 // | ... |
2316 // |---------------------| <- string_locs[1]
2317 // | string[0] |
2318 // |---------------------| <- string_locs[0]
2319 // | outbound memory |
2320 // | based arguments |
2321 // | |
2322 // |---------------------|
2323 // | |
2324 // SP-> | out_preserved_slots |
2325 //
2326 //
2328 // Now compute actual number of stack words we need rounding to make
2329 // stack properly aligned.
2330 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word);
2332 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2334 intptr_t start = (intptr_t)__ pc();
2336 // First thing make an ic check to see if we should even be here
2338 // We are free to use all registers as temps without saving them and
2339 // restoring them except rbp. rbp, is the only callee save register
2340 // as far as the interpreter and the compiler(s) are concerned.
2342 const Register ic_reg = rax;
2343 const Register receiver = rcx;
2344 Label hit;
2345 Label exception_pending;
2348 __ verify_oop(receiver);
2349 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2350 __ jcc(Assembler::equal, hit);
2352 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2354 // verified entry must be aligned for code patching.
2355 // and the first 5 bytes must be in the same cache line
2356 // if we align at 8 then we will be sure 5 bytes are in the same line
2357 __ align(8);
2359 __ bind(hit);
2361 int vep_offset = ((intptr_t)__ pc()) - start;
2364 // The instruction at the verified entry point must be 5 bytes or longer
2365 // because it can be patched on the fly by make_non_entrant. The stack bang
2366 // instruction fits that requirement.
2368 // Generate stack overflow check
2371 if (UseStackBanging) {
2372 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2373 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2374 } else {
2375 __ movl(rax, stack_size);
2376 __ bang_stack_size(rax, rbx);
2377 }
2378 } else {
2379 // need a 5 byte instruction to allow MT safe patching to non-entrant
2380 __ fat_nop();
2381 }
2383 assert(((int)__ pc() - start - vep_offset) >= 5,
2384 "valid size for make_non_entrant");
2386 // Generate a new frame for the wrapper.
2387 __ enter();
2389 // -2 because return address is already present and so is saved rbp,
2390 if (stack_size - 2*wordSize != 0) {
2391 __ subl(rsp, stack_size - 2*wordSize);
2392 }
2394 // Frame is now completed as far a size and linkage.
2396 int frame_complete = ((intptr_t)__ pc()) - start;
2398 // First thing we do store all the args as if we are doing the call.
2399 // Since the C calling convention is stack based that ensures that
2400 // all the Java register args are stored before we need to convert any
2401 // string we might have.
2403 int sid = 0;
2404 int c_arg, j_arg;
2405 int string_reg = 0;
2407 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2408 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2410 VMRegPair src = in_regs[j_arg];
2411 VMRegPair dst = out_regs[c_arg];
2412 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID,
2413 "stack based abi assumed");
2415 switch (in_sig_bt[j_arg]) {
2417 case T_ARRAY:
2418 case T_OBJECT:
2419 if (out_sig_bt[c_arg] == T_ADDRESS) {
2420 // Any register based arg for a java string after the first
2421 // will be destroyed by the call to get_utf so we store
2422 // the original value in the location the utf string address
2423 // will eventually be stored.
2424 if (src.first()->is_reg()) {
2425 if (string_reg++ != 0) {
2426 simple_move32(masm, src, dst);
2427 }
2428 }
2429 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2430 // need to unbox a one-word value
2431 Register in_reg = rax;
2432 if ( src.first()->is_reg() ) {
2433 in_reg = src.first()->as_Register();
2434 } else {
2435 simple_move32(masm, src, in_reg->as_VMReg());
2436 }
2437 Label skipUnbox;
2438 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2439 if ( out_sig_bt[c_arg] == T_LONG ) {
2440 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD);
2441 }
2442 __ testl(in_reg, in_reg);
2443 __ jcc(Assembler::zero, skipUnbox);
2444 assert(dst.first()->is_stack() &&
2445 (!dst.second()->is_valid() || dst.second()->is_stack()),
2446 "value(s) must go into stack slots");
2448 BasicType bt = out_sig_bt[c_arg];
2449 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2450 if ( bt == T_LONG ) {
2451 __ movl(rbx, Address(in_reg,
2452 box_offset + VMRegImpl::stack_slot_size));
2453 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
2454 }
2455 __ movl(in_reg, Address(in_reg, box_offset));
2456 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg);
2457 __ bind(skipUnbox);
2458 } else {
2459 // Convert the arg to NULL
2460 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2461 }
2462 if (out_sig_bt[c_arg] == T_LONG) {
2463 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2464 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2465 }
2466 break;
2468 case T_VOID:
2469 break;
2471 case T_FLOAT:
2472 float_move(masm, src, dst);
2473 break;
2475 case T_DOUBLE:
2476 assert( j_arg + 1 < total_args_passed &&
2477 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list");
2478 double_move(masm, src, dst);
2479 break;
2481 case T_LONG :
2482 long_move(masm, src, dst);
2483 break;
2485 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2487 default:
2488 simple_move32(masm, src, dst);
2489 }
2490 }
2492 // Now we must convert any string we have to utf8
2493 //
2495 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ;
2496 sid < total_strings ; j_arg++, c_arg++ ) {
2498 if (out_sig_bt[c_arg] == T_ADDRESS) {
2500 Address utf8_addr = Address(
2501 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2502 __ leal(rax, utf8_addr);
2504 // The first string we find might still be in the original java arg
2505 // register
2506 VMReg orig_loc = in_regs[j_arg].first();
2507 Register string_oop;
2509 // This is where the argument will eventually reside
2510 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first()));
2512 if (sid == 1 && orig_loc->is_reg()) {
2513 string_oop = orig_loc->as_Register();
2514 assert(string_oop != rax, "smashed arg");
2515 } else {
2517 if (orig_loc->is_reg()) {
2518 // Get the copy of the jls object
2519 __ movl(rcx, dest);
2520 } else {
2521 // arg is still in the original location
2522 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc)));
2523 }
2524 string_oop = rcx;
2526 }
2527 Label nullString;
2528 __ movl(dest, NULL_WORD);
2529 __ testl(string_oop, string_oop);
2530 __ jcc(Assembler::zero, nullString);
2532 // Now we can store the address of the utf string as the argument
2533 __ movl(dest, rax);
2535 // And do the conversion
2536 __ call_VM_leaf(CAST_FROM_FN_PTR(
2537 address, SharedRuntime::get_utf), string_oop, rax);
2538 __ bind(nullString);
2539 }
2541 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2542 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2543 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2544 }
2545 }
2548 // Ok now we are done. Need to place the nop that dtrace wants in order to
2549 // patch in the trap
2551 int patch_offset = ((intptr_t)__ pc()) - start;
2553 __ nop();
2556 // Return
2558 __ leave();
2559 __ ret(0);
2561 __ flush();
2563 nmethod *nm = nmethod::new_dtrace_nmethod(
2564 method, masm->code(), vep_offset, patch_offset, frame_complete,
2565 stack_slots / VMRegImpl::slots_per_word);
2566 return nm;
2568 }
2570 #endif // HAVE_DTRACE_H
2572 // this function returns the adjust size (in number of words) to a c2i adapter
2573 // activation for use during deoptimization
2574 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2575 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2576 }
2579 uint SharedRuntime::out_preserve_stack_slots() {
2580 return 0;
2581 }
2584 //------------------------------generate_deopt_blob----------------------------
2585 void SharedRuntime::generate_deopt_blob() {
2586 // allocate space for the code
2587 ResourceMark rm;
2588 // setup code generation tools
2589 CodeBuffer buffer("deopt_blob", 1024, 1024);
2590 MacroAssembler* masm = new MacroAssembler(&buffer);
2591 int frame_size_in_words;
2592 OopMap* map = NULL;
2593 // Account for the extra args we place on the stack
2594 // by the time we call fetch_unroll_info
2595 const int additional_words = 2; // deopt kind, thread
2597 OopMapSet *oop_maps = new OopMapSet();
2599 // -------------
2600 // This code enters when returning to a de-optimized nmethod. A return
2601 // address has been pushed on the the stack, and return values are in
2602 // registers.
2603 // If we are doing a normal deopt then we were called from the patched
2604 // nmethod from the point we returned to the nmethod. So the return
2605 // address on the stack is wrong by NativeCall::instruction_size
2606 // We will adjust the value to it looks like we have the original return
2607 // address on the stack (like when we eagerly deoptimized).
2608 // In the case of an exception pending with deoptimized then we enter
2609 // with a return address on the stack that points after the call we patched
2610 // into the exception handler. We have the following register state:
2611 // rax,: exception
2612 // rbx,: exception handler
2613 // rdx: throwing pc
2614 // So in this case we simply jam rdx into the useless return address and
2615 // the stack looks just like we want.
2616 //
2617 // At this point we need to de-opt. We save the argument return
2618 // registers. We call the first C routine, fetch_unroll_info(). This
2619 // routine captures the return values and returns a structure which
2620 // describes the current frame size and the sizes of all replacement frames.
2621 // The current frame is compiled code and may contain many inlined
2622 // functions, each with their own JVM state. We pop the current frame, then
2623 // push all the new frames. Then we call the C routine unpack_frames() to
2624 // populate these frames. Finally unpack_frames() returns us the new target
2625 // address. Notice that callee-save registers are BLOWN here; they have
2626 // already been captured in the vframeArray at the time the return PC was
2627 // patched.
2628 address start = __ pc();
2629 Label cont;
2631 // Prolog for non exception case!
2633 // Save everything in sight.
2635 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2636 // Normal deoptimization
2637 __ push(Deoptimization::Unpack_deopt);
2638 __ jmp(cont);
2640 int reexecute_offset = __ pc() - start;
2642 // Reexecute case
2643 // return address is the pc describes what bci to do re-execute at
2645 // No need to update map as each call to save_live_registers will produce identical oopmap
2646 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2648 __ push(Deoptimization::Unpack_reexecute);
2649 __ jmp(cont);
2651 int exception_offset = __ pc() - start;
2653 // Prolog for exception case
2655 // all registers are dead at this entry point, except for rax, and
2656 // rdx which contain the exception oop and exception pc
2657 // respectively. Set them in TLS and fall thru to the
2658 // unpack_with_exception_in_tls entry point.
2660 __ get_thread(rdi);
2661 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2662 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2664 int exception_in_tls_offset = __ pc() - start;
2666 // new implementation because exception oop is now passed in JavaThread
2668 // Prolog for exception case
2669 // All registers must be preserved because they might be used by LinearScan
2670 // Exceptiop oop and throwing PC are passed in JavaThread
2671 // tos: stack at point of call to method that threw the exception (i.e. only
2672 // args are on the stack, no return address)
2674 // make room on stack for the return address
2675 // It will be patched later with the throwing pc. The correct value is not
2676 // available now because loading it from memory would destroy registers.
2677 __ push(0);
2679 // Save everything in sight.
2681 // No need to update map as each call to save_live_registers will produce identical oopmap
2682 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2684 // Now it is safe to overwrite any register
2686 // store the correct deoptimization type
2687 __ push(Deoptimization::Unpack_exception);
2689 // load throwing pc from JavaThread and patch it as the return address
2690 // of the current frame. Then clear the field in JavaThread
2691 __ get_thread(rdi);
2692 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2693 __ movptr(Address(rbp, wordSize), rdx);
2694 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2696 #ifdef ASSERT
2697 // verify that there is really an exception oop in JavaThread
2698 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2699 __ verify_oop(rax);
2701 // verify that there is no pending exception
2702 Label no_pending_exception;
2703 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2704 __ testptr(rax, rax);
2705 __ jcc(Assembler::zero, no_pending_exception);
2706 __ stop("must not have pending exception here");
2707 __ bind(no_pending_exception);
2708 #endif
2710 __ bind(cont);
2712 // Compiled code leaves the floating point stack dirty, empty it.
2713 __ empty_FPU_stack();
2716 // Call C code. Need thread and this frame, but NOT official VM entry
2717 // crud. We cannot block on this call, no GC can happen.
2718 __ get_thread(rcx);
2719 __ push(rcx);
2720 // fetch_unroll_info needs to call last_java_frame()
2721 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2723 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2725 // Need to have an oopmap that tells fetch_unroll_info where to
2726 // find any register it might need.
2728 oop_maps->add_gc_map( __ pc()-start, map);
2730 // Discard arg to fetch_unroll_info
2731 __ pop(rcx);
2733 __ get_thread(rcx);
2734 __ reset_last_Java_frame(rcx, false, false);
2736 // Load UnrollBlock into EDI
2737 __ mov(rdi, rax);
2739 // Move the unpack kind to a safe place in the UnrollBlock because
2740 // we are very short of registers
2742 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2743 // retrieve the deopt kind from where we left it.
2744 __ pop(rax);
2745 __ movl(unpack_kind, rax); // save the unpack_kind value
2747 Label noException;
2748 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2749 __ jcc(Assembler::notEqual, noException);
2750 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2751 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2752 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2753 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2755 __ verify_oop(rax);
2757 // Overwrite the result registers with the exception results.
2758 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2759 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2761 __ bind(noException);
2763 // Stack is back to only having register save data on the stack.
2764 // Now restore the result registers. Everything else is either dead or captured
2765 // in the vframeArray.
2767 RegisterSaver::restore_result_registers(masm);
2769 // Non standard control word may be leaked out through a safepoint blob, and we can
2770 // deopt at a poll point with the non standard control word. However, we should make
2771 // sure the control word is correct after restore_result_registers.
2772 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2774 // All of the register save area has been popped of the stack. Only the
2775 // return address remains.
2777 // Pop all the frames we must move/replace.
2778 //
2779 // Frame picture (youngest to oldest)
2780 // 1: self-frame (no frame link)
2781 // 2: deopting frame (no frame link)
2782 // 3: caller of deopting frame (could be compiled/interpreted).
2783 //
2784 // Note: by leaving the return address of self-frame on the stack
2785 // and using the size of frame 2 to adjust the stack
2786 // when we are done the return to frame 3 will still be on the stack.
2788 // Pop deoptimized frame
2789 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2791 // sp should be pointing at the return address to the caller (3)
2793 // Stack bang to make sure there's enough room for these interpreter frames.
2794 if (UseStackBanging) {
2795 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2796 __ bang_stack_size(rbx, rcx);
2797 }
2799 // Load array of frame pcs into ECX
2800 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2802 __ pop(rsi); // trash the old pc
2804 // Load array of frame sizes into ESI
2805 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2807 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2809 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2810 __ movl(counter, rbx);
2812 // Pick up the initial fp we should save
2813 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2815 // Now adjust the caller's stack to make up for the extra locals
2816 // but record the original sp so that we can save it in the skeletal interpreter
2817 // frame and the stack walking of interpreter_sender will get the unextended sp
2818 // value and not the "real" sp value.
2820 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2821 __ movptr(sp_temp, rsp);
2822 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2823 __ subptr(rsp, rbx);
2825 // Push interpreter frames in a loop
2826 Label loop;
2827 __ bind(loop);
2828 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2829 #ifdef CC_INTERP
2830 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2831 #ifdef ASSERT
2832 __ push(0xDEADDEAD); // Make a recognizable pattern
2833 __ push(0xDEADDEAD);
2834 #else /* ASSERT */
2835 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2836 #endif /* ASSERT */
2837 #else /* CC_INTERP */
2838 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2839 #endif /* CC_INTERP */
2840 __ pushptr(Address(rcx, 0)); // save return address
2841 __ enter(); // save old & set new rbp,
2842 __ subptr(rsp, rbx); // Prolog!
2843 __ movptr(rbx, sp_temp); // sender's sp
2844 #ifdef CC_INTERP
2845 __ movptr(Address(rbp,
2846 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2847 rbx); // Make it walkable
2848 #else /* CC_INTERP */
2849 // This value is corrected by layout_activation_impl
2850 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2851 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2852 #endif /* CC_INTERP */
2853 __ movptr(sp_temp, rsp); // pass to next frame
2854 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2855 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2856 __ decrementl(counter); // decrement counter
2857 __ jcc(Assembler::notZero, loop);
2858 __ pushptr(Address(rcx, 0)); // save final return address
2860 // Re-push self-frame
2861 __ enter(); // save old & set new rbp,
2863 // Return address and rbp, are in place
2864 // We'll push additional args later. Just allocate a full sized
2865 // register save area
2866 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2868 // Restore frame locals after moving the frame
2869 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2870 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2871 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2872 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2873 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2875 // Set up the args to unpack_frame
2877 __ pushl(unpack_kind); // get the unpack_kind value
2878 __ get_thread(rcx);
2879 __ push(rcx);
2881 // set last_Java_sp, last_Java_fp
2882 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2884 // Call C code. Need thread but NOT official VM entry
2885 // crud. We cannot block on this call, no GC can happen. Call should
2886 // restore return values to their stack-slots with the new SP.
2887 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2888 // Set an oopmap for the call site
2889 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2891 // rax, contains the return result type
2892 __ push(rax);
2894 __ get_thread(rcx);
2895 __ reset_last_Java_frame(rcx, false, false);
2897 // Collect return values
2898 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2899 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2901 // Clear floating point stack before returning to interpreter
2902 __ empty_FPU_stack();
2904 // Check if we should push the float or double return value.
2905 Label results_done, yes_double_value;
2906 __ cmpl(Address(rsp, 0), T_DOUBLE);
2907 __ jcc (Assembler::zero, yes_double_value);
2908 __ cmpl(Address(rsp, 0), T_FLOAT);
2909 __ jcc (Assembler::notZero, results_done);
2911 // return float value as expected by interpreter
2912 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2913 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2914 __ jmp(results_done);
2916 // return double value as expected by interpreter
2917 __ bind(yes_double_value);
2918 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2919 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2921 __ bind(results_done);
2923 // Pop self-frame.
2924 __ leave(); // Epilog!
2926 // Jump to interpreter
2927 __ ret(0);
2929 // -------------
2930 // make sure all code is generated
2931 masm->flush();
2933 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2934 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2935 }
2938 #ifdef COMPILER2
2939 //------------------------------generate_uncommon_trap_blob--------------------
2940 void SharedRuntime::generate_uncommon_trap_blob() {
2941 // allocate space for the code
2942 ResourceMark rm;
2943 // setup code generation tools
2944 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2945 MacroAssembler* masm = new MacroAssembler(&buffer);
2947 enum frame_layout {
2948 arg0_off, // thread sp + 0 // Arg location for
2949 arg1_off, // unloaded_class_index sp + 1 // calling C
2950 // The frame sender code expects that rbp will be in the "natural" place and
2951 // will override any oopMap setting for it. We must therefore force the layout
2952 // so that it agrees with the frame sender code.
2953 rbp_off, // callee saved register sp + 2
2954 return_off, // slot for return address sp + 3
2955 framesize
2956 };
2958 address start = __ pc();
2959 // Push self-frame.
2960 __ subptr(rsp, return_off*wordSize); // Epilog!
2962 // rbp, is an implicitly saved callee saved register (i.e. the calling
2963 // convention will save restore it in prolog/epilog) Other than that
2964 // there are no callee save registers no that adapter frames are gone.
2965 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2967 // Clear the floating point exception stack
2968 __ empty_FPU_stack();
2970 // set last_Java_sp
2971 __ get_thread(rdx);
2972 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2974 // Call C code. Need thread but NOT official VM entry
2975 // crud. We cannot block on this call, no GC can happen. Call should
2976 // capture callee-saved registers as well as return values.
2977 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2978 // argument already in ECX
2979 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2980 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2982 // Set an oopmap for the call site
2983 OopMapSet *oop_maps = new OopMapSet();
2984 OopMap* map = new OopMap( framesize, 0 );
2985 // No oopMap for rbp, it is known implicitly
2987 oop_maps->add_gc_map( __ pc()-start, map);
2989 __ get_thread(rcx);
2991 __ reset_last_Java_frame(rcx, false, false);
2993 // Load UnrollBlock into EDI
2994 __ movptr(rdi, rax);
2996 // Pop all the frames we must move/replace.
2997 //
2998 // Frame picture (youngest to oldest)
2999 // 1: self-frame (no frame link)
3000 // 2: deopting frame (no frame link)
3001 // 3: caller of deopting frame (could be compiled/interpreted).
3003 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
3004 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
3006 // Pop deoptimized frame
3007 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3008 __ addptr(rsp, rcx);
3010 // sp should be pointing at the return address to the caller (3)
3012 // Stack bang to make sure there's enough room for these interpreter frames.
3013 if (UseStackBanging) {
3014 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3015 __ bang_stack_size(rbx, rcx);
3016 }
3019 // Load array of frame pcs into ECX
3020 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3022 __ pop(rsi); // trash the pc
3024 // Load array of frame sizes into ESI
3025 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3027 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3029 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3030 __ movl(counter, rbx);
3032 // Pick up the initial fp we should save
3033 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3035 // Now adjust the caller's stack to make up for the extra locals
3036 // but record the original sp so that we can save it in the skeletal interpreter
3037 // frame and the stack walking of interpreter_sender will get the unextended sp
3038 // value and not the "real" sp value.
3040 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3041 __ movptr(sp_temp, rsp);
3042 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3043 __ subptr(rsp, rbx);
3045 // Push interpreter frames in a loop
3046 Label loop;
3047 __ bind(loop);
3048 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3049 #ifdef CC_INTERP
3050 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
3051 #ifdef ASSERT
3052 __ push(0xDEADDEAD); // Make a recognizable pattern
3053 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...)
3054 #else /* ASSERT */
3055 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
3056 #endif /* ASSERT */
3057 #else /* CC_INTERP */
3058 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
3059 #endif /* CC_INTERP */
3060 __ pushptr(Address(rcx, 0)); // save return address
3061 __ enter(); // save old & set new rbp,
3062 __ subptr(rsp, rbx); // Prolog!
3063 __ movptr(rbx, sp_temp); // sender's sp
3064 #ifdef CC_INTERP
3065 __ movptr(Address(rbp,
3066 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3067 rbx); // Make it walkable
3068 #else /* CC_INTERP */
3069 // This value is corrected by layout_activation_impl
3070 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
3071 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3072 #endif /* CC_INTERP */
3073 __ movptr(sp_temp, rsp); // pass to next frame
3074 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3075 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3076 __ decrementl(counter); // decrement counter
3077 __ jcc(Assembler::notZero, loop);
3078 __ pushptr(Address(rcx, 0)); // save final return address
3080 // Re-push self-frame
3081 __ enter(); // save old & set new rbp,
3082 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
3085 // set last_Java_sp, last_Java_fp
3086 __ get_thread(rdi);
3087 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
3089 // Call C code. Need thread but NOT official VM entry
3090 // crud. We cannot block on this call, no GC can happen. Call should
3091 // restore return values to their stack-slots with the new SP.
3092 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
3093 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
3094 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3095 // Set an oopmap for the call site
3096 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
3098 __ get_thread(rdi);
3099 __ reset_last_Java_frame(rdi, true, false);
3101 // Pop self-frame.
3102 __ leave(); // Epilog!
3104 // Jump to interpreter
3105 __ ret(0);
3107 // -------------
3108 // make sure all code is generated
3109 masm->flush();
3111 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
3112 }
3113 #endif // COMPILER2
3115 //------------------------------generate_handler_blob------
3116 //
3117 // Generate a special Compile2Runtime blob that saves all registers,
3118 // setup oopmap, and calls safepoint code to stop the compiled code for
3119 // a safepoint.
3120 //
3121 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) {
3123 // Account for thread arg in our frame
3124 const int additional_words = 1;
3125 int frame_size_in_words;
3127 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3129 ResourceMark rm;
3130 OopMapSet *oop_maps = new OopMapSet();
3131 OopMap* map;
3133 // allocate space for the code
3134 // setup code generation tools
3135 CodeBuffer buffer("handler_blob", 1024, 512);
3136 MacroAssembler* masm = new MacroAssembler(&buffer);
3138 const Register java_thread = rdi; // callee-saved for VC++
3139 address start = __ pc();
3140 address call_pc = NULL;
3142 // If cause_return is true we are at a poll_return and there is
3143 // the return address on the stack to the caller on the nmethod
3144 // that is safepoint. We can leave this return on the stack and
3145 // effectively complete the return and safepoint in the caller.
3146 // Otherwise we push space for a return address that the safepoint
3147 // handler will install later to make the stack walking sensible.
3148 if( !cause_return )
3149 __ push(rbx); // Make room for return address (or push it again)
3151 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
3153 // The following is basically a call_VM. However, we need the precise
3154 // address of the call in order to generate an oopmap. Hence, we do all the
3155 // work ourselves.
3157 // Push thread argument and setup last_Java_sp
3158 __ get_thread(java_thread);
3159 __ push(java_thread);
3160 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3162 // if this was not a poll_return then we need to correct the return address now.
3163 if( !cause_return ) {
3164 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3165 __ movptr(Address(rbp, wordSize), rax);
3166 }
3168 // do the call
3169 __ call(RuntimeAddress(call_ptr));
3171 // Set an oopmap for the call site. This oopmap will map all
3172 // oop-registers and debug-info registers as callee-saved. This
3173 // will allow deoptimization at this safepoint to find all possible
3174 // debug-info recordings, as well as let GC find all oops.
3176 oop_maps->add_gc_map( __ pc() - start, map);
3178 // Discard arg
3179 __ pop(rcx);
3181 Label noException;
3183 // Clear last_Java_sp again
3184 __ get_thread(java_thread);
3185 __ reset_last_Java_frame(java_thread, false, false);
3187 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3188 __ jcc(Assembler::equal, noException);
3190 // Exception pending
3192 RegisterSaver::restore_live_registers(masm);
3194 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3196 __ bind(noException);
3198 // Normal exit, register restoring and exit
3199 RegisterSaver::restore_live_registers(masm);
3201 __ ret(0);
3203 // make sure all code is generated
3204 masm->flush();
3206 // Fill-out other meta info
3207 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3208 }
3210 //
3211 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3212 //
3213 // Generate a stub that calls into vm to find out the proper destination
3214 // of a java call. All the argument registers are live at this point
3215 // but since this is generic code we don't know what they are and the caller
3216 // must do any gc of the args.
3217 //
3218 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3219 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3221 // allocate space for the code
3222 ResourceMark rm;
3224 CodeBuffer buffer(name, 1000, 512);
3225 MacroAssembler* masm = new MacroAssembler(&buffer);
3227 int frame_size_words;
3228 enum frame_layout {
3229 thread_off,
3230 extra_words };
3232 OopMapSet *oop_maps = new OopMapSet();
3233 OopMap* map = NULL;
3235 int start = __ offset();
3237 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3239 int frame_complete = __ offset();
3241 const Register thread = rdi;
3242 __ get_thread(rdi);
3244 __ push(thread);
3245 __ set_last_Java_frame(thread, noreg, rbp, NULL);
3247 __ call(RuntimeAddress(destination));
3250 // Set an oopmap for the call site.
3251 // We need this not only for callee-saved registers, but also for volatile
3252 // registers that the compiler might be keeping live across a safepoint.
3254 oop_maps->add_gc_map( __ offset() - start, map);
3256 // rax, contains the address we are going to jump to assuming no exception got installed
3258 __ addptr(rsp, wordSize);
3260 // clear last_Java_sp
3261 __ reset_last_Java_frame(thread, true, false);
3262 // check for pending exceptions
3263 Label pending;
3264 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3265 __ jcc(Assembler::notEqual, pending);
3267 // get the returned methodOop
3268 __ movptr(rbx, Address(thread, JavaThread::vm_result_offset()));
3269 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3271 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3273 RegisterSaver::restore_live_registers(masm);
3275 // We are back the the original state on entry and ready to go.
3277 __ jmp(rax);
3279 // Pending exception after the safepoint
3281 __ bind(pending);
3283 RegisterSaver::restore_live_registers(masm);
3285 // exception pending => remove activation and forward to exception handler
3287 __ get_thread(thread);
3288 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3289 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3290 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3292 // -------------
3293 // make sure all code is generated
3294 masm->flush();
3296 // return the blob
3297 // frame_size_words or bytes??
3298 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3299 }