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src/share/vm/c1/c1_LIR.hpp@239e32ede77d
src/share/vm/c1/c1_LIR.hpp
Mon, 11 Jun 2018 17:42:16 +0800
- author
- fujie
- date
- Mon, 11 Jun 2018 17:42:16 +0800
- changeset 9143
- 239e32ede77d
- parent 9142
- 87ee44a01d68
- child 9157
- 2966b0be4027
- permissions
- -rw-r--r--
#7166 [C1] EdgeMoveOptimizer must consider branch operands for MIPS
1 /*
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 /*
26 * This file has been modified by Loongson Technology in 2018. These
27 * modifications are Copyright (c) 2018 Loongson Technology, and are made
28 * available on the same license terms set forth above.
29 */
31 #ifndef SHARE_VM_C1_C1_LIR_HPP
32 #define SHARE_VM_C1_C1_LIR_HPP
34 #include "c1/c1_Defs.hpp"
35 #include "c1/c1_ValueType.hpp"
36 #include "oops/method.hpp"
38 class BlockBegin;
39 class BlockList;
40 class LIR_Assembler;
41 class CodeEmitInfo;
42 class CodeStub;
43 class CodeStubList;
44 class ArrayCopyStub;
45 class LIR_Op;
46 class ciType;
47 class ValueType;
48 class LIR_OpVisitState;
49 class FpuStackSim;
51 //---------------------------------------------------------------------
52 // LIR Operands
53 // LIR_OprDesc
54 // LIR_OprPtr
55 // LIR_Const
56 // LIR_Address
57 //---------------------------------------------------------------------
58 class LIR_OprDesc;
59 class LIR_OprPtr;
60 class LIR_Const;
61 class LIR_Address;
62 class LIR_OprVisitor;
65 typedef LIR_OprDesc* LIR_Opr;
66 typedef int RegNr;
68 define_array(LIR_OprArray, LIR_Opr)
69 define_stack(LIR_OprList, LIR_OprArray)
71 define_array(LIR_OprRefArray, LIR_Opr*)
72 define_stack(LIR_OprRefList, LIR_OprRefArray)
74 define_array(CodeEmitInfoArray, CodeEmitInfo*)
75 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
77 define_array(LIR_OpArray, LIR_Op*)
78 define_stack(LIR_OpList, LIR_OpArray)
80 // define LIR_OprPtr early so LIR_OprDesc can refer to it
81 class LIR_OprPtr: public CompilationResourceObj {
82 public:
83 bool is_oop_pointer() const { return (type() == T_OBJECT); }
84 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
86 virtual LIR_Const* as_constant() { return NULL; }
87 virtual LIR_Address* as_address() { return NULL; }
88 virtual BasicType type() const = 0;
89 virtual void print_value_on(outputStream* out) const = 0;
90 };
94 // LIR constants
95 class LIR_Const: public LIR_OprPtr {
96 private:
97 JavaValue _value;
99 void type_check(BasicType t) const { assert(type() == t, "type check"); }
100 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
101 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
103 public:
104 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
105 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
106 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
107 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
108 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
109 LIR_Const(void* p) {
110 #ifdef _LP64
111 assert(sizeof(jlong) >= sizeof(p), "too small");;
112 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
113 #else
114 assert(sizeof(jint) >= sizeof(p), "too small");;
115 _value.set_type(T_INT); _value.set_jint((jint)p);
116 #endif
117 }
118 LIR_Const(Metadata* m) {
119 _value.set_type(T_METADATA);
120 #ifdef _LP64
121 _value.set_jlong((jlong)m);
122 #else
123 _value.set_jint((jint)m);
124 #endif // _LP64
125 }
127 virtual BasicType type() const { return _value.get_type(); }
128 virtual LIR_Const* as_constant() { return this; }
130 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
131 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
132 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
133 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
134 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
135 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
136 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
138 #ifdef _LP64
139 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
140 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
141 #else
142 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
143 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
144 #endif
147 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
148 jint as_jint_lo_bits() const {
149 if (type() == T_DOUBLE) {
150 return low(jlong_cast(_value.get_jdouble()));
151 } else {
152 return as_jint_lo();
153 }
154 }
155 jint as_jint_hi_bits() const {
156 if (type() == T_DOUBLE) {
157 return high(jlong_cast(_value.get_jdouble()));
158 } else {
159 return as_jint_hi();
160 }
161 }
162 jlong as_jlong_bits() const {
163 if (type() == T_DOUBLE) {
164 return jlong_cast(_value.get_jdouble());
165 } else {
166 return as_jlong();
167 }
168 }
170 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
173 bool is_zero_float() {
174 jfloat f = as_jfloat();
175 jfloat ok = 0.0f;
176 return jint_cast(f) == jint_cast(ok);
177 }
179 bool is_one_float() {
180 jfloat f = as_jfloat();
181 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
182 }
184 bool is_zero_double() {
185 jdouble d = as_jdouble();
186 jdouble ok = 0.0;
187 return jlong_cast(d) == jlong_cast(ok);
188 }
190 bool is_one_double() {
191 jdouble d = as_jdouble();
192 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
193 }
194 };
197 //---------------------LIR Operand descriptor------------------------------------
198 //
199 // The class LIR_OprDesc represents a LIR instruction operand;
200 // it can be a register (ALU/FPU), stack location or a constant;
201 // Constants and addresses are represented as resource area allocated
202 // structures (see above).
203 // Registers and stack locations are inlined into the this pointer
204 // (see value function).
206 class LIR_OprDesc: public CompilationResourceObj {
207 public:
208 // value structure:
209 // data opr-type opr-kind
210 // +--------------+-------+-------+
211 // [max...........|7 6 5 4|3 2 1 0]
212 // ^
213 // is_pointer bit
214 //
215 // lowest bit cleared, means it is a structure pointer
216 // we need 4 bits to represent types
218 private:
219 friend class LIR_OprFact;
221 // Conversion
222 intptr_t value() const { return (intptr_t) this; }
224 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
225 return (value() & mask) == masked_value;
226 }
228 enum OprKind {
229 pointer_value = 0
230 , stack_value = 1
231 , cpu_register = 3
232 , fpu_register = 5
233 , illegal_value = 7
234 };
236 enum OprBits {
237 pointer_bits = 1
238 , kind_bits = 3
239 , type_bits = 4
240 , size_bits = 2
241 , destroys_bits = 1
242 , virtual_bits = 1
243 , is_xmm_bits = 1
244 , last_use_bits = 1
245 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
246 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
247 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
248 , data_bits = BitsPerInt - non_data_bits
249 , reg_bits = data_bits / 2 // for two registers in one value encoding
250 };
252 enum OprShift {
253 kind_shift = 0
254 , type_shift = kind_shift + kind_bits
255 , size_shift = type_shift + type_bits
256 , destroys_shift = size_shift + size_bits
257 , last_use_shift = destroys_shift + destroys_bits
258 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
259 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
260 , is_xmm_shift = virtual_shift + virtual_bits
261 , data_shift = is_xmm_shift + is_xmm_bits
262 , reg1_shift = data_shift
263 , reg2_shift = data_shift + reg_bits
265 };
267 enum OprSize {
268 single_size = 0 << size_shift
269 , double_size = 1 << size_shift
270 };
272 enum OprMask {
273 kind_mask = right_n_bits(kind_bits)
274 , type_mask = right_n_bits(type_bits) << type_shift
275 , size_mask = right_n_bits(size_bits) << size_shift
276 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
277 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
278 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
279 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
280 , pointer_mask = right_n_bits(pointer_bits)
281 , lower_reg_mask = right_n_bits(reg_bits)
282 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
283 };
285 uintptr_t data() const { return value() >> data_shift; }
286 int lo_reg_half() const { return data() & lower_reg_mask; }
287 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
288 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
289 OprSize size_field() const { return (OprSize)(value() & size_mask); }
291 static char type_char(BasicType t);
293 public:
294 enum {
295 vreg_base = ConcreteRegisterImpl::number_of_registers,
296 vreg_max = (1 << data_bits) - 1
297 };
299 static inline LIR_Opr illegalOpr();
301 enum OprType {
302 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
303 , int_type = 1 << type_shift
304 , long_type = 2 << type_shift
305 , object_type = 3 << type_shift
306 , address_type = 4 << type_shift
307 , float_type = 5 << type_shift
308 , double_type = 6 << type_shift
309 , metadata_type = 7 << type_shift
310 };
311 friend OprType as_OprType(BasicType t);
312 friend BasicType as_BasicType(OprType t);
314 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
315 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
317 static OprSize size_for(BasicType t) {
318 switch (t) {
319 case T_LONG:
320 case T_DOUBLE:
321 return double_size;
322 break;
324 case T_FLOAT:
325 case T_BOOLEAN:
326 case T_CHAR:
327 case T_BYTE:
328 case T_SHORT:
329 case T_INT:
330 case T_ADDRESS:
331 case T_OBJECT:
332 case T_ARRAY:
333 case T_METADATA:
334 return single_size;
335 break;
337 default:
338 ShouldNotReachHere();
339 return single_size;
340 }
341 }
344 void validate_type() const PRODUCT_RETURN;
346 BasicType type() const {
347 if (is_pointer()) {
348 return pointer()->type();
349 }
350 return as_BasicType(type_field());
351 }
354 ValueType* value_type() const { return as_ValueType(type()); }
356 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
358 bool is_equal(LIR_Opr opr) const { return this == opr; }
359 // checks whether types are same
360 bool is_same_type(LIR_Opr opr) const {
361 assert(type_field() != unknown_type &&
362 opr->type_field() != unknown_type, "shouldn't see unknown_type");
363 return type_field() == opr->type_field();
364 }
365 #ifdef MIPS
366 bool is_same_register(LIR_Opr opr) const {
367 #else
368 bool is_same_register(LIR_Opr opr) {
369 #endif
370 return (is_register() && opr->is_register() &&
371 kind_field() == opr->kind_field() &&
372 (value() & no_type_mask) == (opr->value() & no_type_mask));
373 }
375 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
376 bool is_illegal() const { return kind_field() == illegal_value; }
377 bool is_valid() const { return kind_field() != illegal_value; }
379 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
380 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
382 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
383 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
385 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
386 bool is_oop() const;
388 #ifdef MIPS
389 bool has_common_register(LIR_Opr opr) const;
390 #endif
392 // semantic for fpu- and xmm-registers:
393 // * is_float and is_double return true for xmm_registers
394 // (so is_single_fpu and is_single_xmm are true)
395 // * So you must always check for is_???_xmm prior to is_???_fpu to
396 // distinguish between fpu- and xmm-registers
398 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
399 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
400 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
402 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
403 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
404 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
405 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
406 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
408 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
409 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
410 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
411 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
412 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
414 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
415 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
416 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
418 // fast accessor functions for special bits that do not work for pointers
419 // (in this functions, the check for is_pointer() is omitted)
420 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
421 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
422 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
423 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
424 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
426 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
427 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
428 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
429 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
432 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
433 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
434 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
435 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
436 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
437 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
438 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
439 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
440 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
441 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
442 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
443 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
445 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
446 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
447 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
449 Register as_register() const;
450 Register as_register_lo() const;
451 Register as_register_hi() const;
453 Register as_pointer_register() {
454 #ifdef _LP64
455 if (is_double_cpu()) {
456 assert(as_register_lo() == as_register_hi(), "should be a single register");
457 return as_register_lo();
458 }
459 #endif
460 return as_register();
461 }
463 #ifdef X86
464 XMMRegister as_xmm_float_reg() const;
465 XMMRegister as_xmm_double_reg() const;
466 // for compatibility with RInfo
467 int fpu () const { return lo_reg_half(); }
468 #endif // X86
469 #if defined(SPARC) || defined(ARM) || defined(PPC) || defined(MIPS)
470 FloatRegister as_float_reg () const;
471 FloatRegister as_double_reg () const;
472 #endif
474 jint as_jint() const { return as_constant_ptr()->as_jint(); }
475 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
476 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
477 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
478 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
480 void print() const PRODUCT_RETURN;
481 void print(outputStream* out) const PRODUCT_RETURN;
482 };
485 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
486 switch (type) {
487 case T_INT: return LIR_OprDesc::int_type;
488 case T_LONG: return LIR_OprDesc::long_type;
489 case T_FLOAT: return LIR_OprDesc::float_type;
490 case T_DOUBLE: return LIR_OprDesc::double_type;
491 case T_OBJECT:
492 case T_ARRAY: return LIR_OprDesc::object_type;
493 case T_ADDRESS: return LIR_OprDesc::address_type;
494 case T_METADATA: return LIR_OprDesc::metadata_type;
495 case T_ILLEGAL: // fall through
496 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
497 }
498 }
500 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
501 switch (t) {
502 case LIR_OprDesc::int_type: return T_INT;
503 case LIR_OprDesc::long_type: return T_LONG;
504 case LIR_OprDesc::float_type: return T_FLOAT;
505 case LIR_OprDesc::double_type: return T_DOUBLE;
506 case LIR_OprDesc::object_type: return T_OBJECT;
507 case LIR_OprDesc::address_type: return T_ADDRESS;
508 case LIR_OprDesc::metadata_type:return T_METADATA;
509 case LIR_OprDesc::unknown_type: // fall through
510 default: ShouldNotReachHere(); return T_ILLEGAL;
511 }
512 }
515 // LIR_Address
516 class LIR_Address: public LIR_OprPtr {
517 friend class LIR_OpVisitState;
519 public:
520 // NOTE: currently these must be the log2 of the scale factor (and
521 // must also be equivalent to the ScaleFactor enum in
522 // assembler_i486.hpp)
523 enum Scale {
524 times_1 = 0,
525 times_2 = 1,
526 times_4 = 2,
527 times_8 = 3
528 };
530 private:
531 LIR_Opr _base;
532 LIR_Opr _index;
533 Scale _scale;
534 intx _disp;
535 BasicType _type;
537 public:
538 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
539 _base(base)
540 , _index(index)
541 , _scale(times_1)
542 , _type(type)
543 , _disp(0) { verify(); }
545 #ifndef MIPS
546 LIR_Address(LIR_Opr base, intx disp, BasicType type):
547 #else
548 LIR_Address(LIR_Opr base, int disp, BasicType type):
549 #endif
550 _base(base)
551 , _index(LIR_OprDesc::illegalOpr())
552 , _scale(times_1)
553 , _type(type)
554 , _disp(disp) { verify(); }
556 LIR_Address(LIR_Opr base, BasicType type):
557 _base(base)
558 , _index(LIR_OprDesc::illegalOpr())
559 , _scale(times_1)
560 , _type(type)
561 , _disp(0) { verify(); }
563 #if defined(X86) || defined(ARM)
564 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
565 _base(base)
566 , _index(index)
567 , _scale(scale)
568 , _type(type)
569 , _disp(disp) { verify(); }
570 #endif // X86 || ARM
572 LIR_Opr base() const { return _base; }
573 LIR_Opr index() const { return _index; }
574 Scale scale() const { return _scale; }
575 intx disp() const { return _disp; }
577 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
579 virtual LIR_Address* as_address() { return this; }
580 virtual BasicType type() const { return _type; }
581 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
583 void verify0() const PRODUCT_RETURN;
584 #if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
585 void pd_verify() const;
586 void verify() const { pd_verify(); }
587 #else
588 void verify() const { verify0(); }
589 #endif
591 static Scale scale(BasicType type);
592 };
595 // operand factory
596 class LIR_OprFact: public AllStatic {
597 public:
599 static LIR_Opr illegalOpr;
601 static LIR_Opr single_cpu(int reg) {
602 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
603 LIR_OprDesc::int_type |
604 LIR_OprDesc::cpu_register |
605 LIR_OprDesc::single_size);
606 }
607 static LIR_Opr single_cpu_oop(int reg) {
608 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
609 LIR_OprDesc::object_type |
610 LIR_OprDesc::cpu_register |
611 LIR_OprDesc::single_size);
612 }
613 static LIR_Opr single_cpu_address(int reg) {
614 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
615 LIR_OprDesc::address_type |
616 LIR_OprDesc::cpu_register |
617 LIR_OprDesc::single_size);
618 }
619 static LIR_Opr single_cpu_metadata(int reg) {
620 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
621 LIR_OprDesc::metadata_type |
622 LIR_OprDesc::cpu_register |
623 LIR_OprDesc::single_size);
624 }
625 static LIR_Opr double_cpu(int reg1, int reg2) {
626 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
627 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
628 (reg2 << LIR_OprDesc::reg2_shift) |
629 LIR_OprDesc::long_type |
630 LIR_OprDesc::cpu_register |
631 LIR_OprDesc::double_size);
632 }
634 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
635 LIR_OprDesc::float_type |
636 LIR_OprDesc::fpu_register |
637 LIR_OprDesc::single_size); }
638 #if defined(C1_LIR_MD_HPP)
639 # include C1_LIR_MD_HPP
640 #elif defined(SPARC)
641 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
642 (reg2 << LIR_OprDesc::reg2_shift) |
643 LIR_OprDesc::double_type |
644 LIR_OprDesc::fpu_register |
645 LIR_OprDesc::double_size); }
646 #elif defined(X86)
647 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
648 (reg << LIR_OprDesc::reg2_shift) |
649 LIR_OprDesc::double_type |
650 LIR_OprDesc::fpu_register |
651 LIR_OprDesc::double_size); }
653 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
654 LIR_OprDesc::float_type |
655 LIR_OprDesc::fpu_register |
656 LIR_OprDesc::single_size |
657 LIR_OprDesc::is_xmm_mask); }
658 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
659 (reg << LIR_OprDesc::reg2_shift) |
660 LIR_OprDesc::double_type |
661 LIR_OprDesc::fpu_register |
662 LIR_OprDesc::double_size |
663 LIR_OprDesc::is_xmm_mask); }
664 #elif defined(PPC)
665 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
666 (reg << LIR_OprDesc::reg2_shift) |
667 LIR_OprDesc::double_type |
668 LIR_OprDesc::fpu_register |
669 LIR_OprDesc::double_size); }
670 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
671 LIR_OprDesc::float_type |
672 LIR_OprDesc::cpu_register |
673 LIR_OprDesc::single_size); }
674 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
675 (reg1 << LIR_OprDesc::reg2_shift) |
676 LIR_OprDesc::double_type |
677 LIR_OprDesc::cpu_register |
678 LIR_OprDesc::double_size); }
679 #endif // PPC
680 #ifdef MIPS
681 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
682 (reg << LIR_OprDesc::reg2_shift) |
683 LIR_OprDesc::double_type |
684 LIR_OprDesc::fpu_register |
685 LIR_OprDesc::double_size); }
686 #endif
688 static LIR_Opr virtual_register(int index, BasicType type) {
689 LIR_Opr res;
690 switch (type) {
691 case T_OBJECT: // fall through
692 case T_ARRAY:
693 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
694 LIR_OprDesc::object_type |
695 LIR_OprDesc::cpu_register |
696 LIR_OprDesc::single_size |
697 LIR_OprDesc::virtual_mask);
698 break;
700 case T_METADATA:
701 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
702 LIR_OprDesc::metadata_type|
703 LIR_OprDesc::cpu_register |
704 LIR_OprDesc::single_size |
705 LIR_OprDesc::virtual_mask);
706 break;
708 case T_INT:
709 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
710 LIR_OprDesc::int_type |
711 LIR_OprDesc::cpu_register |
712 LIR_OprDesc::single_size |
713 LIR_OprDesc::virtual_mask);
714 break;
716 case T_ADDRESS:
717 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
718 LIR_OprDesc::address_type |
719 LIR_OprDesc::cpu_register |
720 LIR_OprDesc::single_size |
721 LIR_OprDesc::virtual_mask);
722 break;
724 case T_LONG:
725 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
726 LIR_OprDesc::long_type |
727 LIR_OprDesc::cpu_register |
728 LIR_OprDesc::double_size |
729 LIR_OprDesc::virtual_mask);
730 break;
732 #ifdef __SOFTFP__
733 case T_FLOAT:
734 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
735 LIR_OprDesc::float_type |
736 LIR_OprDesc::cpu_register |
737 LIR_OprDesc::single_size |
738 LIR_OprDesc::virtual_mask);
739 break;
740 case T_DOUBLE:
741 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
742 LIR_OprDesc::double_type |
743 LIR_OprDesc::cpu_register |
744 LIR_OprDesc::double_size |
745 LIR_OprDesc::virtual_mask);
746 break;
747 #else // __SOFTFP__
748 case T_FLOAT:
749 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
750 LIR_OprDesc::float_type |
751 LIR_OprDesc::fpu_register |
752 LIR_OprDesc::single_size |
753 LIR_OprDesc::virtual_mask);
754 break;
756 case
757 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
758 LIR_OprDesc::double_type |
759 LIR_OprDesc::fpu_register |
760 LIR_OprDesc::double_size |
761 LIR_OprDesc::virtual_mask);
762 break;
763 #endif // __SOFTFP__
764 default: ShouldNotReachHere(); res = illegalOpr;
765 }
767 #ifdef ASSERT
768 res->validate_type();
769 assert(res->vreg_number() == index, "conversion check");
770 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
771 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
773 // old-style calculation; check if old and new method are equal
774 LIR_OprDesc::OprType t = as_OprType(type);
775 #ifdef __SOFTFP__
776 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
777 t |
778 LIR_OprDesc::cpu_register |
779 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
780 #else // __SOFTFP__
781 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
782 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
783 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
784 assert(res == old_res, "old and new method not equal");
785 #endif // __SOFTFP__
786 #endif // ASSERT
788 return res;
789 }
791 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
792 // the index is platform independent; a double stack useing indeces 2 and 3 has always
793 // index 2.
794 static LIR_Opr stack(int index, BasicType type) {
795 LIR_Opr res;
796 switch (type) {
797 case T_OBJECT: // fall through
798 case T_ARRAY:
799 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
800 LIR_OprDesc::object_type |
801 LIR_OprDesc::stack_value |
802 LIR_OprDesc::single_size);
803 break;
805 case T_METADATA:
806 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
807 LIR_OprDesc::metadata_type |
808 LIR_OprDesc::stack_value |
809 LIR_OprDesc::single_size);
810 break;
811 case T_INT:
812 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
813 LIR_OprDesc::int_type |
814 LIR_OprDesc::stack_value |
815 LIR_OprDesc::single_size);
816 break;
818 case T_ADDRESS:
819 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
820 LIR_OprDesc::address_type |
821 LIR_OprDesc::stack_value |
822 LIR_OprDesc::single_size);
823 break;
825 case T_LONG:
826 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
827 LIR_OprDesc::long_type |
828 LIR_OprDesc::stack_value |
829 LIR_OprDesc::double_size);
830 break;
832 case T_FLOAT:
833 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
834 LIR_OprDesc::float_type |
835 LIR_OprDesc::stack_value |
836 LIR_OprDesc::single_size);
837 break;
838 case T_DOUBLE:
839 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
840 LIR_OprDesc::double_type |
841 LIR_OprDesc::stack_value |
842 LIR_OprDesc::double_size);
843 break;
845 default: ShouldNotReachHere(); res = illegalOpr;
846 }
848 #ifdef ASSERT
849 assert(index >= 0, "index must be positive");
850 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
852 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
853 LIR_OprDesc::stack_value |
854 as_OprType(type) |
855 LIR_OprDesc::size_for(type));
856 assert(res == old_res, "old and new method not equal");
857 #endif
859 return res;
860 }
862 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
863 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
864 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
865 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
866 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
867 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
868 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
869 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
870 static LIR_Opr illegal() { return (LIR_Opr)-1; }
871 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
872 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
874 static LIR_Opr value_type(ValueType* type);
875 static LIR_Opr dummy_value_type(ValueType* type);
876 };
879 //-------------------------------------------------------------------------------
880 // LIR Instructions
881 //-------------------------------------------------------------------------------
882 //
883 // Note:
884 // - every instruction has a result operand
885 // - every instruction has an CodeEmitInfo operand (can be revisited later)
886 // - every instruction has a LIR_OpCode operand
887 // - LIR_OpN, means an instruction that has N input operands
888 //
889 // class hierarchy:
890 //
891 class LIR_Op;
892 class LIR_Op0;
893 class LIR_OpLabel;
894 class LIR_Op1;
895 class LIR_OpBranch;
896 class LIR_OpConvert;
897 class LIR_OpAllocObj;
898 class LIR_OpRoundFP;
899 class LIR_Op2;
900 class LIR_OpDelay;
901 class LIR_Op3;
902 class LIR_OpAllocArray;
903 class LIR_OpCall;
904 class LIR_OpJavaCall;
905 class LIR_OpRTCall;
906 class LIR_OpArrayCopy;
907 class LIR_OpUpdateCRC32;
908 class LIR_OpLock;
909 class LIR_OpTypeCheck;
910 class LIR_OpCompareAndSwap;
911 class LIR_OpProfileCall;
912 class LIR_OpProfileType;
913 #ifdef ASSERT
914 class LIR_OpAssert;
915 #endif
917 // LIR operation codes
918 enum LIR_Code {
919 lir_none
920 , begin_op0
921 , lir_word_align
922 , lir_label
923 , lir_nop
924 , lir_backwardbranch_target
925 , lir_std_entry
926 , lir_osr_entry
927 , lir_build_frame
928 , lir_fpop_raw
929 , lir_24bit_FPU
930 , lir_reset_FPU
931 , lir_breakpoint
932 , lir_rtcall
933 , lir_membar
934 , lir_membar_acquire
935 , lir_membar_release
936 , lir_membar_loadload
937 , lir_membar_storestore
938 , lir_membar_loadstore
939 , lir_membar_storeload
940 , lir_get_thread
941 , end_op0
942 , begin_op1
943 , lir_fxch
944 , lir_fld
945 , lir_ffree
946 , lir_push
947 , lir_pop
948 , lir_null_check
949 , lir_return
950 , lir_leal
951 , lir_neg
952 #ifndef MIPS
953 , lir_branch
954 , lir_cond_float_branch
955 #endif
956 , lir_move
957 , lir_prefetchr
958 , lir_prefetchw
959 , lir_convert
960 , lir_alloc_object
961 , lir_monaddr
962 , lir_roundfp
963 , lir_safepoint
964 , lir_pack64
965 , lir_unpack64
966 , lir_unwind
967 , end_op1
968 , begin_op2
969 #ifdef MIPS
970 , lir_branch
971 , lir_cond_float_branch
972 , lir_null_check_for_branch
973 #else
974 , lir_cmp
975 #endif
976 , lir_cmp_l2i
977 , lir_ucmp_fd2i
978 , lir_cmp_fd2i
979 , lir_cmove
980 , lir_add
981 , lir_sub
982 , lir_mul
983 , lir_mul_strictfp
984 , lir_div
985 , lir_div_strictfp
986 , lir_rem
987 , lir_sqrt
988 , lir_abs
989 , lir_sin
990 , lir_cos
991 , lir_tan
992 , lir_log
993 , lir_log10
994 , lir_exp
995 , lir_pow
996 , lir_logic_and
997 , lir_logic_or
998 , lir_logic_xor
999 , lir_shl
1000 , lir_shr
1001 , lir_ushr
1002 , lir_alloc_array
1003 , lir_throw
1004 , lir_compare_to
1005 , lir_xadd
1006 , lir_xchg
1007 , end_op2
1008 , begin_op3
1009 #ifdef MIPS
1010 , lir_frem
1011 #endif
1012 , lir_idiv
1013 , lir_irem
1014 , end_op3
1015 , begin_opJavaCall
1016 , lir_static_call
1017 , lir_optvirtual_call
1018 , lir_icvirtual_call
1019 , lir_virtual_call
1020 , lir_dynamic_call
1021 , end_opJavaCall
1022 , begin_opArrayCopy
1023 , lir_arraycopy
1024 , end_opArrayCopy
1025 , begin_opUpdateCRC32
1026 , lir_updatecrc32
1027 , end_opUpdateCRC32
1028 , begin_opLock
1029 , lir_lock
1030 , lir_unlock
1031 , end_opLock
1032 , begin_delay_slot
1033 , lir_delay_slot
1034 , end_delay_slot
1035 , begin_opTypeCheck
1036 , lir_instanceof
1037 , lir_checkcast
1038 , lir_store_check
1039 , end_opTypeCheck
1040 , begin_opCompareAndSwap
1041 , lir_cas_long
1042 , lir_cas_obj
1043 , lir_cas_int
1044 , end_opCompareAndSwap
1045 , begin_opMDOProfile
1046 , lir_profile_call
1047 , lir_profile_type
1048 , end_opMDOProfile
1049 , begin_opAssert
1050 , lir_assert
1051 , end_opAssert
1052 };
1055 enum LIR_Condition {
1056 lir_cond_equal
1057 , lir_cond_notEqual
1058 , lir_cond_less
1059 , lir_cond_lessEqual
1060 , lir_cond_greaterEqual
1061 , lir_cond_greater
1062 , lir_cond_belowEqual
1063 , lir_cond_aboveEqual
1064 , lir_cond_always
1065 , lir_cond_unknown = -1
1066 };
1069 enum LIR_PatchCode {
1070 lir_patch_none,
1071 lir_patch_low,
1072 lir_patch_high,
1073 lir_patch_normal
1074 };
1077 enum LIR_MoveKind {
1078 lir_move_normal,
1079 lir_move_volatile,
1080 lir_move_unaligned,
1081 lir_move_wide,
1082 lir_move_max_flag
1083 };
1086 // --------------------------------------------------
1087 // LIR_Op
1088 // --------------------------------------------------
1089 class LIR_Op: public CompilationResourceObj {
1090 friend class LIR_OpVisitState;
1092 #ifdef ASSERT
1093 private:
1094 const char * _file;
1095 int _line;
1096 #endif
1098 protected:
1099 LIR_Opr _result;
1100 unsigned short _code;
1101 unsigned short _flags;
1102 CodeEmitInfo* _info;
1103 int _id; // value id for register allocation
1104 int _fpu_pop_count;
1105 Instruction* _source; // for debugging
1107 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1109 protected:
1110 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1112 public:
1113 LIR_Op()
1114 : _result(LIR_OprFact::illegalOpr)
1115 , _code(lir_none)
1116 , _flags(0)
1117 , _info(NULL)
1118 #ifdef ASSERT
1119 , _file(NULL)
1120 , _line(0)
1121 #endif
1122 , _fpu_pop_count(0)
1123 , _source(NULL)
1124 , _id(-1) {}
1126 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1127 : _result(result)
1128 , _code(code)
1129 , _flags(0)
1130 , _info(info)
1131 #ifdef ASSERT
1132 , _file(NULL)
1133 , _line(0)
1134 #endif
1135 , _fpu_pop_count(0)
1136 , _source(NULL)
1137 , _id(-1) {}
1139 CodeEmitInfo* info() const { return _info; }
1140 LIR_Code code() const { return (LIR_Code)_code; }
1141 LIR_Opr result_opr() const { return _result; }
1142 void set_result_opr(LIR_Opr opr) { _result = opr; }
1144 #ifdef ASSERT
1145 void set_file_and_line(const char * file, int line) {
1146 _file = file;
1147 _line = line;
1148 }
1149 #endif
1151 virtual const char * name() const PRODUCT_RETURN0;
1153 int id() const { return _id; }
1154 void set_id(int id) { _id = id; }
1156 // FPU stack simulation helpers -- only used on Intel
1157 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1158 int fpu_pop_count() const { return _fpu_pop_count; }
1159 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1161 Instruction* source() const { return _source; }
1162 void set_source(Instruction* ins) { _source = ins; }
1164 virtual void emit_code(LIR_Assembler* masm) = 0;
1165 virtual void print_instr(outputStream* out) const = 0;
1166 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1168 virtual bool is_patching() { return false; }
1169 virtual LIR_OpCall* as_OpCall() { return NULL; }
1170 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1171 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1172 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1173 virtual LIR_OpLock* as_OpLock() { return NULL; }
1174 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1175 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1176 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1177 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1178 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1179 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1180 virtual LIR_Op0* as_Op0() { return NULL; }
1181 virtual LIR_Op1* as_Op1() { return NULL; }
1182 virtual LIR_Op2* as_Op2() { return NULL; }
1183 virtual LIR_Op3* as_Op3() { return NULL; }
1184 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1185 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1186 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1187 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1188 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1189 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1190 #ifdef ASSERT
1191 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1192 #endif
1194 virtual void verify() const {}
1195 };
1197 // for calls
1198 class LIR_OpCall: public LIR_Op {
1199 friend class LIR_OpVisitState;
1201 protected:
1202 address _addr;
1203 LIR_OprList* _arguments;
1204 protected:
1205 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1206 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1207 : LIR_Op(code, result, info)
1208 , _arguments(arguments)
1209 , _addr(addr) {}
1211 public:
1212 address addr() const { return _addr; }
1213 const LIR_OprList* arguments() const { return _arguments; }
1214 virtual LIR_OpCall* as_OpCall() { return this; }
1215 };
1218 // --------------------------------------------------
1219 // LIR_OpJavaCall
1220 // --------------------------------------------------
1221 class LIR_OpJavaCall: public LIR_OpCall {
1222 friend class LIR_OpVisitState;
1224 private:
1225 ciMethod* _method;
1226 LIR_Opr _receiver;
1227 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1229 public:
1230 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1231 LIR_Opr receiver, LIR_Opr result,
1232 address addr, LIR_OprList* arguments,
1233 CodeEmitInfo* info)
1234 : LIR_OpCall(code, addr, result, arguments, info)
1235 , _receiver(receiver)
1236 , _method(method)
1237 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1238 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1240 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1241 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1242 LIR_OprList* arguments, CodeEmitInfo* info)
1243 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1244 , _receiver(receiver)
1245 , _method(method)
1246 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1247 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1249 LIR_Opr receiver() const { return _receiver; }
1250 ciMethod* method() const { return _method; }
1252 // JSR 292 support.
1253 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1254 bool is_method_handle_invoke() const {
1255 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1256 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1257 }
1259 intptr_t vtable_offset() const {
1260 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1261 return (intptr_t) addr();
1262 }
1264 virtual void emit_code(LIR_Assembler* masm);
1265 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1266 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1267 };
1269 // --------------------------------------------------
1270 // LIR_OpLabel
1271 // --------------------------------------------------
1272 // Location where a branch can continue
1273 class LIR_OpLabel: public LIR_Op {
1274 friend class LIR_OpVisitState;
1276 private:
1277 Label* _label;
1278 public:
1279 LIR_OpLabel(Label* lbl)
1280 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1281 , _label(lbl) {}
1282 Label* label() const { return _label; }
1284 virtual void emit_code(LIR_Assembler* masm);
1285 virtual LIR_OpLabel* as_OpLabel() { return this; }
1286 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1287 };
1289 // LIR_OpArrayCopy
1290 class LIR_OpArrayCopy: public LIR_Op {
1291 friend class LIR_OpVisitState;
1293 private:
1294 ArrayCopyStub* _stub;
1295 LIR_Opr _src;
1296 LIR_Opr _src_pos;
1297 LIR_Opr _dst;
1298 LIR_Opr _dst_pos;
1299 LIR_Opr _length;
1300 LIR_Opr _tmp;
1301 ciArrayKlass* _expected_type;
1302 int _flags;
1304 public:
1305 enum Flags {
1306 src_null_check = 1 << 0,
1307 dst_null_check = 1 << 1,
1308 src_pos_positive_check = 1 << 2,
1309 dst_pos_positive_check = 1 << 3,
1310 length_positive_check = 1 << 4,
1311 src_range_check = 1 << 5,
1312 dst_range_check = 1 << 6,
1313 type_check = 1 << 7,
1314 overlapping = 1 << 8,
1315 unaligned = 1 << 9,
1316 src_objarray = 1 << 10,
1317 dst_objarray = 1 << 11,
1318 all_flags = (1 << 12) - 1
1319 };
1321 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1322 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1324 LIR_Opr src() const { return _src; }
1325 LIR_Opr src_pos() const { return _src_pos; }
1326 LIR_Opr dst() const { return _dst; }
1327 LIR_Opr dst_pos() const { return _dst_pos; }
1328 LIR_Opr length() const { return _length; }
1329 LIR_Opr tmp() const { return _tmp; }
1330 int flags() const { return _flags; }
1331 ciArrayKlass* expected_type() const { return _expected_type; }
1332 ArrayCopyStub* stub() const { return _stub; }
1334 virtual void emit_code(LIR_Assembler* masm);
1335 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1336 void print_instr(outputStream* out) const PRODUCT_RETURN;
1337 };
1339 // LIR_OpUpdateCRC32
1340 class LIR_OpUpdateCRC32: public LIR_Op {
1341 friend class LIR_OpVisitState;
1343 private:
1344 LIR_Opr _crc;
1345 LIR_Opr _val;
1347 public:
1349 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1351 LIR_Opr crc() const { return _crc; }
1352 LIR_Opr val() const { return _val; }
1354 virtual void emit_code(LIR_Assembler* masm);
1355 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1356 void print_instr(outputStream* out) const PRODUCT_RETURN;
1357 };
1359 // --------------------------------------------------
1360 // LIR_Op0
1361 // --------------------------------------------------
1362 class LIR_Op0: public LIR_Op {
1363 friend class LIR_OpVisitState;
1365 public:
1366 LIR_Op0(LIR_Code code)
1367 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1368 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1369 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1371 virtual void emit_code(LIR_Assembler* masm);
1372 virtual LIR_Op0* as_Op0() { return this; }
1373 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1374 };
1377 // --------------------------------------------------
1378 // LIR_Op1
1379 // --------------------------------------------------
1381 class LIR_Op1: public LIR_Op {
1382 friend class LIR_OpVisitState;
1384 protected:
1385 LIR_Opr _opr; // input operand
1386 BasicType _type; // Operand types
1387 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1389 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1391 void set_kind(LIR_MoveKind kind) {
1392 assert(code() == lir_move, "must be");
1393 _flags = kind;
1394 }
1396 public:
1397 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1398 : LIR_Op(code, result, info)
1399 , _opr(opr)
1400 , _patch(patch)
1401 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1403 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1404 : LIR_Op(code, result, info)
1405 , _opr(opr)
1406 , _patch(patch)
1407 , _type(type) {
1408 assert(code == lir_move, "must be");
1409 set_kind(kind);
1410 }
1412 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1413 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1414 , _opr(opr)
1415 , _patch(lir_patch_none)
1416 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1418 LIR_Opr in_opr() const { return _opr; }
1419 LIR_PatchCode patch_code() const { return _patch; }
1420 BasicType type() const { return _type; }
1422 LIR_MoveKind move_kind() const {
1423 assert(code() == lir_move, "must be");
1424 return (LIR_MoveKind)_flags;
1425 }
1427 virtual bool is_patching() { return _patch != lir_patch_none; }
1428 virtual void emit_code(LIR_Assembler* masm);
1429 virtual LIR_Op1* as_Op1() { return this; }
1430 virtual const char * name() const PRODUCT_RETURN0;
1432 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1434 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1435 virtual void verify() const;
1436 };
1439 // for runtime calls
1440 class LIR_OpRTCall: public LIR_OpCall {
1441 friend class LIR_OpVisitState;
1443 private:
1444 LIR_Opr _tmp;
1445 public:
1446 LIR_OpRTCall(address addr, LIR_Opr tmp,
1447 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1448 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1449 , _tmp(tmp) {}
1451 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1452 virtual void emit_code(LIR_Assembler* masm);
1453 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1455 LIR_Opr tmp() const { return _tmp; }
1457 virtual void verify() const;
1458 };
1461 #ifndef MIPS
1462 class LIR_OpBranch: public LIR_Op {
1463 friend class LIR_OpVisitState;
1465 private:
1466 LIR_Condition _cond;
1467 BasicType _type;
1468 Label* _label;
1469 BlockBegin* _block; // if this is a branch to a block, this is the block
1470 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1471 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1473 public:
1474 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1475 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1476 , _cond(cond)
1477 , _type(type)
1478 , _label(lbl)
1479 , _block(NULL)
1480 , _ublock(NULL)
1481 , _stub(NULL) { }
1483 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1484 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1486 // for unordered comparisons
1487 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1489 LIR_Condition cond() const { return _cond; }
1490 BasicType type() const { return _type; }
1491 Label* label() const { return _label; }
1492 BlockBegin* block() const { return _block; }
1493 BlockBegin* ublock() const { return _ublock; }
1494 CodeStub* stub() const { return _stub; }
1496 void change_block(BlockBegin* b);
1497 void change_ublock(BlockBegin* b);
1498 void negate_cond();
1500 virtual void emit_code(LIR_Assembler* masm);
1501 virtual LIR_OpBranch* as_OpBranch() { return this; }
1502 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1503 };
1504 #endif
1507 class ConversionStub;
1509 class LIR_OpConvert: public LIR_Op1 {
1510 friend class LIR_OpVisitState;
1512 private:
1513 Bytecodes::Code _bytecode;
1514 ConversionStub* _stub;
1515 #ifdef PPC
1516 LIR_Opr _tmp1;
1517 LIR_Opr _tmp2;
1518 #endif
1520 public:
1521 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1522 : LIR_Op1(lir_convert, opr, result)
1523 , _stub(stub)
1524 #ifdef PPC
1525 , _tmp1(LIR_OprDesc::illegalOpr())
1526 , _tmp2(LIR_OprDesc::illegalOpr())
1527 #endif
1528 , _bytecode(code) {}
1530 #ifdef PPC
1531 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1532 ,LIR_Opr tmp1, LIR_Opr tmp2)
1533 : LIR_Op1(lir_convert, opr, result)
1534 , _stub(stub)
1535 , _tmp1(tmp1)
1536 , _tmp2(tmp2)
1537 , _bytecode(code) {}
1538 #endif
1540 Bytecodes::Code bytecode() const { return _bytecode; }
1541 ConversionStub* stub() const { return _stub; }
1542 #ifdef PPC
1543 LIR_Opr tmp1() const { return _tmp1; }
1544 LIR_Opr tmp2() const { return _tmp2; }
1545 #endif
1547 virtual void emit_code(LIR_Assembler* masm);
1548 virtual LIR_OpConvert* as_OpConvert() { return this; }
1549 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1551 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1552 };
1555 #ifndef MIPS
1556 // LIR_OpAllocObj
1557 class LIR_OpAllocObj : public LIR_Op1 {
1558 friend class LIR_OpVisitState;
1560 private:
1561 LIR_Opr _tmp1;
1562 LIR_Opr _tmp2;
1563 LIR_Opr _tmp3;
1564 LIR_Opr _tmp4;
1565 int _hdr_size;
1566 int _obj_size;
1567 CodeStub* _stub;
1568 bool _init_check;
1570 public:
1571 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1572 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1573 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1574 : LIR_Op1(lir_alloc_object, klass, result)
1575 , _tmp1(t1)
1576 , _tmp2(t2)
1577 , _tmp3(t3)
1578 , _tmp4(t4)
1579 , _hdr_size(hdr_size)
1580 , _obj_size(obj_size)
1581 , _init_check(init_check)
1582 , _stub(stub) { }
1584 LIR_Opr klass() const { return in_opr(); }
1585 LIR_Opr obj() const { return result_opr(); }
1586 LIR_Opr tmp1() const { return _tmp1; }
1587 LIR_Opr tmp2() const { return _tmp2; }
1588 LIR_Opr tmp3() const { return _tmp3; }
1589 LIR_Opr tmp4() const { return _tmp4; }
1590 int header_size() const { return _hdr_size; }
1591 int object_size() const { return _obj_size; }
1592 bool init_check() const { return _init_check; }
1593 CodeStub* stub() const { return _stub; }
1595 virtual void emit_code(LIR_Assembler* masm);
1596 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1597 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1598 };
1599 #else
1600 class LIR_OpAllocObj : public LIR_Op1 {
1601 friend class LIR_OpVisitState;
1603 private:
1604 LIR_Opr _tmp1;
1605 LIR_Opr _tmp2;
1606 LIR_Opr _tmp3;
1607 LIR_Opr _tmp4;
1608 LIR_Opr _tmp5;
1609 LIR_Opr _tmp6;
1610 int _hdr_size;
1611 int _obj_size;
1612 CodeStub* _stub;
1613 bool _init_check;
1615 public:
1616 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1617 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,LIR_Opr t5, LIR_Opr t6,
1618 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1619 : LIR_Op1(lir_alloc_object, klass, result)
1620 , _tmp1(t1)
1621 , _tmp2(t2)
1622 , _tmp3(t3)
1623 , _tmp4(t4)
1624 , _tmp5(t5)
1625 , _tmp6(t6)
1626 , _hdr_size(hdr_size)
1627 , _obj_size(obj_size)
1628 , _init_check(init_check)
1629 , _stub(stub) { }
1631 LIR_Opr klass() const { return in_opr(); }
1632 LIR_Opr obj() const { return result_opr(); }
1633 LIR_Opr tmp1() const { return _tmp1; }
1634 LIR_Opr tmp2() const { return _tmp2; }
1635 LIR_Opr tmp3() const { return _tmp3; }
1636 LIR_Opr tmp4() const { return _tmp4; }
1637 LIR_Opr tmp5() const { return _tmp5; }
1638 LIR_Opr tmp6() const { return _tmp6; }
1639 int header_size() const { return _hdr_size; }
1640 int object_size() const { return _obj_size; }
1641 bool init_check() const { return _init_check; }
1642 CodeStub* stub() const { return _stub; }
1644 virtual void emit_code(LIR_Assembler* masm);
1645 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1646 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1647 };
1648 #endif
1651 // LIR_OpRoundFP
1652 class LIR_OpRoundFP : public LIR_Op1 {
1653 friend class LIR_OpVisitState;
1655 private:
1656 LIR_Opr _tmp;
1658 public:
1659 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1660 : LIR_Op1(lir_roundfp, reg, result)
1661 , _tmp(stack_loc_temp) {}
1663 LIR_Opr tmp() const { return _tmp; }
1664 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1665 void print_instr(outputStream* out) const PRODUCT_RETURN;
1666 };
1668 // LIR_OpTypeCheck
1669 class LIR_OpTypeCheck: public LIR_Op {
1670 friend class LIR_OpVisitState;
1672 private:
1673 LIR_Opr _object;
1674 LIR_Opr _array;
1675 ciKlass* _klass;
1676 LIR_Opr _tmp1;
1677 LIR_Opr _tmp2;
1678 LIR_Opr _tmp3;
1679 bool _fast_check;
1680 CodeEmitInfo* _info_for_patch;
1681 CodeEmitInfo* _info_for_exception;
1682 CodeStub* _stub;
1683 ciMethod* _profiled_method;
1684 int _profiled_bci;
1685 bool _should_profile;
1687 public:
1688 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1689 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1690 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1691 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1692 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1694 LIR_Opr object() const { return _object; }
1695 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1696 LIR_Opr tmp1() const { return _tmp1; }
1697 LIR_Opr tmp2() const { return _tmp2; }
1698 LIR_Opr tmp3() const { return _tmp3; }
1699 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1700 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1701 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1702 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1703 CodeStub* stub() const { return _stub; }
1705 // MethodData* profiling
1706 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1707 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1708 void set_should_profile(bool b) { _should_profile = b; }
1709 ciMethod* profiled_method() const { return _profiled_method; }
1710 int profiled_bci() const { return _profiled_bci; }
1711 bool should_profile() const { return _should_profile; }
1713 virtual bool is_patching() { return _info_for_patch != NULL; }
1714 virtual void emit_code(LIR_Assembler* masm);
1715 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1716 void print_instr(outputStream* out) const PRODUCT_RETURN;
1717 };
1719 #ifndef MIPS
1720 // LIR_Op2
1721 class LIR_Op2: public LIR_Op {
1722 friend class LIR_OpVisitState;
1724 int _fpu_stack_size; // for sin/cos implementation on Intel
1726 protected:
1727 LIR_Opr _opr1;
1728 LIR_Opr _opr2;
1729 BasicType _type;
1730 LIR_Opr _tmp1;
1731 LIR_Opr _tmp2;
1732 LIR_Opr _tmp3;
1733 LIR_Opr _tmp4;
1734 LIR_Opr _tmp5;
1735 LIR_Condition _condition;
1737 void verify() const;
1739 public:
1740 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1741 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1742 , _opr1(opr1)
1743 , _opr2(opr2)
1744 , _type(T_ILLEGAL)
1745 , _condition(condition)
1746 , _fpu_stack_size(0)
1747 , _tmp1(LIR_OprFact::illegalOpr)
1748 , _tmp2(LIR_OprFact::illegalOpr)
1749 , _tmp3(LIR_OprFact::illegalOpr)
1750 , _tmp4(LIR_OprFact::illegalOpr)
1751 , _tmp5(LIR_OprFact::illegalOpr) {
1752 assert(code == lir_cmp || code == lir_assert, "code check");
1753 }
1755 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1756 : LIR_Op(code, result, NULL)
1757 , _opr1(opr1)
1758 , _opr2(opr2)
1759 , _type(type)
1760 , _condition(condition)
1761 , _fpu_stack_size(0)
1762 , _tmp1(LIR_OprFact::illegalOpr)
1763 , _tmp2(LIR_OprFact::illegalOpr)
1764 , _tmp3(LIR_OprFact::illegalOpr)
1765 , _tmp4(LIR_OprFact::illegalOpr)
1766 , _tmp5(LIR_OprFact::illegalOpr) {
1767 assert(code == lir_cmove, "code check");
1768 assert(type != T_ILLEGAL, "cmove should have type");
1769 }
1771 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1772 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1773 : LIR_Op(code, result, info)
1774 , _opr1(opr1)
1775 , _opr2(opr2)
1776 , _type(type)
1777 , _condition(lir_cond_unknown)
1778 , _fpu_stack_size(0)
1779 , _tmp1(LIR_OprFact::illegalOpr)
1780 , _tmp2(LIR_OprFact::illegalOpr)
1781 , _tmp3(LIR_OprFact::illegalOpr)
1782 , _tmp4(LIR_OprFact::illegalOpr)
1783 , _tmp5(LIR_OprFact::illegalOpr) {
1784 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1785 }
1787 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1788 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1789 : LIR_Op(code, result, NULL)
1790 , _opr1(opr1)
1791 , _opr2(opr2)
1792 , _type(T_ILLEGAL)
1793 , _condition(lir_cond_unknown)
1794 , _fpu_stack_size(0)
1795 , _tmp1(tmp1)
1796 , _tmp2(tmp2)
1797 , _tmp3(tmp3)
1798 , _tmp4(tmp4)
1799 , _tmp5(tmp5) {
1800 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1801 }
1803 LIR_Opr in_opr1() const { return _opr1; }
1804 LIR_Opr in_opr2() const { return _opr2; }
1805 BasicType type() const { return _type; }
1806 LIR_Opr tmp1_opr() const { return _tmp1; }
1807 LIR_Opr tmp2_opr() const { return _tmp2; }
1808 LIR_Opr tmp3_opr() const { return _tmp3; }
1809 LIR_Opr tmp4_opr() const { return _tmp4; }
1810 LIR_Opr tmp5_opr() const { return _tmp5; }
1811 LIR_Condition condition() const {
1812 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1813 }
1814 void set_condition(LIR_Condition condition) {
1815 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1816 }
1818 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1819 int fpu_stack_size() const { return _fpu_stack_size; }
1821 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1822 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1824 virtual void emit_code(LIR_Assembler* masm);
1825 virtual LIR_Op2* as_Op2() { return this; }
1826 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1827 };
1828 #else
1829 class LIR_Op2: public LIR_Op {
1830 //friend class LIR_Optimizer;
1831 friend class LIR_OpVisitState;
1832 protected:
1833 LIR_Opr _opr1;
1834 LIR_Opr _opr2;
1835 BasicType _type;
1836 LIR_Opr _tmp1;
1837 LIR_Opr _tmp2;
1838 LIR_Opr _tmp3;
1839 LIR_Opr _tmp4;
1840 LIR_Opr _tmp5;
1842 virtual void verify() const;
1843 public:
1844 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
1845 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1846 : LIR_Op(code, LIR_OprFact::illegalOpr, info),
1847 _opr1(opr1), _opr2(opr2),
1848 _type(type),
1849 _tmp1(LIR_OprFact::illegalOpr),
1850 _tmp2(LIR_OprFact::illegalOpr),
1851 _tmp3(LIR_OprFact::illegalOpr),
1852 _tmp4(LIR_OprFact::illegalOpr),
1853 _tmp5(LIR_OprFact::illegalOpr) {
1854 }
1856 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1857 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1858 : LIR_Op(code, result, info),
1859 _opr1(opr1), _opr2(opr2),
1860 _type(type),
1861 _tmp1(LIR_OprFact::illegalOpr),
1862 _tmp2(LIR_OprFact::illegalOpr),
1863 _tmp3(LIR_OprFact::illegalOpr),
1864 _tmp4(LIR_OprFact::illegalOpr),
1865 _tmp5(LIR_OprFact::illegalOpr) {
1867 assert(is_in_range(code, begin_op2, end_op2), "code check");
1868 }
1871 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1872 : LIR_Op(code, result, NULL),
1873 _opr1(opr1), _opr2(opr2),
1874 _type(T_ILLEGAL),
1875 _tmp1(tmp1),
1876 _tmp2(tmp2),
1877 _tmp3(tmp3),
1878 _tmp4(tmp4),
1879 _tmp5(tmp5) {
1880 assert(is_in_range(code, begin_op2, end_op2), "code check");
1881 }
1883 LIR_Opr in_opr1() const { return _opr1; }
1884 LIR_Opr in_opr2() const { return _opr2; }
1885 BasicType type() const { return _type; }
1886 LIR_Opr tmp1_opr() const { return _tmp1; }
1887 LIR_Opr tmp2_opr() const { return _tmp2; }
1888 LIR_Opr tmp3_opr() const { return _tmp3; }
1889 LIR_Opr tmp4_opr() const { return _tmp4; }
1890 LIR_Opr tmp5_opr() const { return _tmp5; }
1893 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1894 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1895 // where is the defination of LIR_AbstractAssembler?, 12/21,2006, jerome
1896 //virtual void emit_code(LIR_AbstractAssembler* masm);
1897 virtual void emit_code(LIR_Assembler* masm);
1898 virtual LIR_Op2* as_Op2() { return this; }
1900 // virtual void print_instr() const PRODUCT_RETURN;
1901 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1902 };
1905 class LIR_OpBranch: public LIR_Op2 {
1906 friend class LIR_OpVisitState;
1907 public:
1909 private:
1910 LIR_Condition _cond;
1911 BasicType _type;
1912 Label* _label;
1913 BlockBegin* _block; // if this is a branch to a block, this is the block
1914 BlockBegin* _ublock; // if this is a float branch , this is the unorder block
1915 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1917 public:
1918 // these are temporary constructors until we start using the conditional register
1919 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl)
1920 : LIR_Op2(lir_branch, left, right, LIR_OprFact::illegalOpr, (CodeEmitInfo*)(NULL)),
1921 _cond(cond), _label(lbl), _block(NULL), _ublock(NULL),_stub(NULL)
1922 {
1923 }
1925 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block);
1927 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub);
1929 //LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1931 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
1932 BlockBegin *block,BlockBegin *ublock);
1934 LIR_Condition cond() const { return _cond; }
1935 BasicType type() const { return _type; }
1936 LIR_Opr left() const { return in_opr1(); }
1937 LIR_Opr right() const { return in_opr2(); }
1938 Label* label() const { return _label; }
1939 BlockBegin* block() const { return _block; }
1940 BlockBegin* ublock() const { return _ublock; }
1941 CodeStub* stub() const { return _stub; }
1944 void change_block(BlockBegin* b);
1945 void change_ublock(BlockBegin* b);
1946 void negate_cond();
1949 // 12/21,06,jerome
1950 //virtual void emit_code(LIR_AbstractAssembler* masm);
1951 virtual void emit_code(LIR_Assembler* masm);
1952 virtual LIR_OpBranch* as_OpBranch() { return this; }
1953 //virtual void print_instr() const PRODUCT_RETURN;
1954 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1956 };
1957 #endif
1959 #ifndef MIPS
1960 class LIR_OpAllocArray : public LIR_Op {
1961 friend class LIR_OpVisitState;
1963 private:
1964 LIR_Opr _klass;
1965 LIR_Opr _len;
1966 LIR_Opr _tmp1;
1967 LIR_Opr _tmp2;
1968 LIR_Opr _tmp3;
1969 LIR_Opr _tmp4;
1970 BasicType _type;
1971 CodeStub* _stub;
1973 public:
1974 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1975 : LIR_Op(lir_alloc_array, result, NULL)
1976 , _klass(klass)
1977 , _len(len)
1978 , _tmp1(t1)
1979 , _tmp2(t2)
1980 , _tmp3(t3)
1981 , _tmp4(t4)
1982 , _type(type)
1983 , _stub(stub) {}
1985 LIR_Opr klass() const { return _klass; }
1986 LIR_Opr len() const { return _len; }
1987 LIR_Opr obj() const { return result_opr(); }
1988 LIR_Opr tmp1() const { return _tmp1; }
1989 LIR_Opr tmp2() const { return _tmp2; }
1990 LIR_Opr tmp3() const { return _tmp3; }
1991 LIR_Opr tmp4() const { return _tmp4; }
1992 BasicType type() const { return _type; }
1993 CodeStub* stub() const { return _stub; }
1995 virtual void emit_code(LIR_Assembler* masm);
1996 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1997 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1998 };
1999 #else
2000 class LIR_OpAllocArray : public LIR_Op {
2001 friend class LIR_OpVisitState;
2003 private:
2004 LIR_Opr _klass;
2005 LIR_Opr _len;
2006 LIR_Opr _tmp1;
2007 LIR_Opr _tmp2;
2008 LIR_Opr _tmp3;
2009 LIR_Opr _tmp4;
2010 LIR_Opr _tmp5;
2011 BasicType _type;
2012 CodeStub* _stub;
2014 public:
2015 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, BasicType type, CodeStub* stub)
2016 : LIR_Op(lir_alloc_array, result, NULL)
2017 , _klass(klass)
2018 , _len(len)
2019 , _tmp1(t1)
2020 , _tmp2(t2)
2021 , _tmp3(t3)
2022 , _tmp4(t4)
2023 , _tmp5(t5)
2024 , _type(type)
2025 , _stub(stub) {}
2027 LIR_Opr klass() const { return _klass; }
2028 LIR_Opr len() const { return _len; }
2029 LIR_Opr obj() const { return result_opr(); }
2030 LIR_Opr tmp1() const { return _tmp1; }
2031 LIR_Opr tmp2() const { return _tmp2; }
2032 LIR_Opr tmp3() const { return _tmp3; }
2033 LIR_Opr tmp4() const { return _tmp4; }
2034 LIR_Opr tmp5() const { return _tmp5; }
2035 BasicType type() const { return _type; }
2036 CodeStub* stub() const { return _stub; }
2038 virtual void emit_code(LIR_Assembler* masm);
2039 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2040 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2041 };
2042 #endif
2045 class LIR_Op3: public LIR_Op {
2046 friend class LIR_OpVisitState;
2048 private:
2049 LIR_Opr _opr1;
2050 LIR_Opr _opr2;
2051 LIR_Opr _opr3;
2052 public:
2053 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
2054 : LIR_Op(code, result, info)
2055 , _opr1(opr1)
2056 , _opr2(opr2)
2057 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
2058 LIR_Opr in_opr1() const { return _opr1; }
2059 LIR_Opr in_opr2() const { return _opr2; }
2060 LIR_Opr in_opr3() const { return _opr3; }
2062 virtual void emit_code(LIR_Assembler* masm);
2063 virtual LIR_Op3* as_Op3() { return this; }
2064 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2065 };
2068 //--------------------------------
2069 class LabelObj: public CompilationResourceObj {
2070 private:
2071 Label _label;
2072 public:
2073 LabelObj() {}
2074 Label* label() { return &_label; }
2075 };
2078 class LIR_OpLock: public LIR_Op {
2079 friend class LIR_OpVisitState;
2081 private:
2082 LIR_Opr _hdr;
2083 LIR_Opr _obj;
2084 LIR_Opr _lock;
2085 LIR_Opr _scratch;
2086 CodeStub* _stub;
2087 public:
2088 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
2089 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
2090 , _hdr(hdr)
2091 , _obj(obj)
2092 , _lock(lock)
2093 , _scratch(scratch)
2094 , _stub(stub) {}
2096 LIR_Opr hdr_opr() const { return _hdr; }
2097 LIR_Opr obj_opr() const { return _obj; }
2098 LIR_Opr lock_opr() const { return _lock; }
2099 LIR_Opr scratch_opr() const { return _scratch; }
2100 CodeStub* stub() const { return _stub; }
2102 virtual void emit_code(LIR_Assembler* masm);
2103 virtual LIR_OpLock* as_OpLock() { return this; }
2104 void print_instr(outputStream* out) const PRODUCT_RETURN;
2105 };
2108 class LIR_OpDelay: public LIR_Op {
2109 friend class LIR_OpVisitState;
2111 private:
2112 LIR_Op* _op;
2114 public:
2115 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
2116 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
2117 _op(op) {
2118 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
2119 }
2120 virtual void emit_code(LIR_Assembler* masm);
2121 virtual LIR_OpDelay* as_OpDelay() { return this; }
2122 void print_instr(outputStream* out) const PRODUCT_RETURN;
2123 LIR_Op* delay_op() const { return _op; }
2124 CodeEmitInfo* call_info() const { return info(); }
2125 };
2127 #ifdef ASSERT
2128 // LIR_OpAssert
2129 class LIR_OpAssert : public LIR_Op2 {
2130 friend class LIR_OpVisitState;
2132 private:
2133 const char* _msg;
2134 bool _halt;
2136 public:
2137 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
2138 : LIR_Op2(lir_assert, condition, opr1, opr2)
2139 , _halt(halt)
2140 , _msg(msg) {
2141 }
2143 const char* msg() const { return _msg; }
2144 bool halt() const { return _halt; }
2146 virtual void emit_code(LIR_Assembler* masm);
2147 virtual LIR_OpAssert* as_OpAssert() { return this; }
2148 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2149 };
2150 #endif
2152 // LIR_OpCompareAndSwap
2153 class LIR_OpCompareAndSwap : public LIR_Op {
2154 friend class LIR_OpVisitState;
2156 private:
2157 LIR_Opr _addr;
2158 LIR_Opr _cmp_value;
2159 LIR_Opr _new_value;
2160 LIR_Opr _tmp1;
2161 LIR_Opr _tmp2;
2163 public:
2164 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2165 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
2166 : LIR_Op(code, result, NULL) // no result, no info
2167 , _addr(addr)
2168 , _cmp_value(cmp_value)
2169 , _new_value(new_value)
2170 , _tmp1(t1)
2171 , _tmp2(t2) { }
2173 LIR_Opr addr() const { return _addr; }
2174 LIR_Opr cmp_value() const { return _cmp_value; }
2175 LIR_Opr new_value() const { return _new_value; }
2176 LIR_Opr tmp1() const { return _tmp1; }
2177 LIR_Opr tmp2() const { return _tmp2; }
2179 virtual void emit_code(LIR_Assembler* masm);
2180 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
2181 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2182 };
2184 // LIR_OpProfileCall
2185 class LIR_OpProfileCall : public LIR_Op {
2186 friend class LIR_OpVisitState;
2188 private:
2189 ciMethod* _profiled_method;
2190 int _profiled_bci;
2191 ciMethod* _profiled_callee;
2192 LIR_Opr _mdo;
2193 LIR_Opr _recv;
2194 LIR_Opr _tmp1;
2195 ciKlass* _known_holder;
2197 public:
2198 // Destroys recv
2199 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
2200 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
2201 , _profiled_method(profiled_method)
2202 , _profiled_bci(profiled_bci)
2203 , _profiled_callee(profiled_callee)
2204 , _mdo(mdo)
2205 , _recv(recv)
2206 , _tmp1(t1)
2207 , _known_holder(known_holder) { }
2209 ciMethod* profiled_method() const { return _profiled_method; }
2210 int profiled_bci() const { return _profiled_bci; }
2211 ciMethod* profiled_callee() const { return _profiled_callee; }
2212 LIR_Opr mdo() const { return _mdo; }
2213 LIR_Opr recv() const { return _recv; }
2214 LIR_Opr tmp1() const { return _tmp1; }
2215 ciKlass* known_holder() const { return _known_holder; }
2217 virtual void emit_code(LIR_Assembler* masm);
2218 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
2219 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2220 };
2222 // LIR_OpProfileType
2223 class LIR_OpProfileType : public LIR_Op {
2224 friend class LIR_OpVisitState;
2226 private:
2227 LIR_Opr _mdp;
2228 LIR_Opr _obj;
2229 LIR_Opr _tmp;
2230 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
2231 intptr_t _current_klass; // what the profiling currently reports
2232 bool _not_null; // true if we know statically that _obj cannot be null
2233 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
2234 // _exact_klass it the only possible type for this parameter in any context.
2236 public:
2237 // Destroys recv
2238 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
2239 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
2240 , _mdp(mdp)
2241 , _obj(obj)
2242 , _exact_klass(exact_klass)
2243 , _current_klass(current_klass)
2244 , _tmp(tmp)
2245 , _not_null(not_null)
2246 , _no_conflict(no_conflict) { }
2248 LIR_Opr mdp() const { return _mdp; }
2249 LIR_Opr obj() const { return _obj; }
2250 LIR_Opr tmp() const { return _tmp; }
2251 ciKlass* exact_klass() const { return _exact_klass; }
2252 intptr_t current_klass() const { return _current_klass; }
2253 bool not_null() const { return _not_null; }
2254 bool no_conflict() const { return _no_conflict; }
2256 virtual void emit_code(LIR_Assembler* masm);
2257 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
2258 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2259 };
2261 class LIR_InsertionBuffer;
2263 //--------------------------------LIR_List---------------------------------------------------
2264 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2265 // The LIR instructions are appended by the LIR_List class itself;
2266 //
2267 // Notes:
2268 // - all offsets are(should be) in bytes
2269 // - local positions are specified with an offset, with offset 0 being local 0
2271 class LIR_List: public CompilationResourceObj {
2272 private:
2273 LIR_OpList _operations;
2275 Compilation* _compilation;
2276 #ifndef PRODUCT
2277 BlockBegin* _block;
2278 #endif
2279 #ifdef ASSERT
2280 const char * _file;
2281 int _line;
2282 #endif
2284 void append(LIR_Op* op) {
2285 if (op->source() == NULL)
2286 op->set_source(_compilation->current_instruction());
2287 #ifndef PRODUCT
2288 if (PrintIRWithLIR) {
2289 _compilation->maybe_print_current_instruction();
2290 op->print(); tty->cr();
2291 }
2292 #endif // PRODUCT
2294 _operations.append(op);
2296 #ifdef ASSERT
2297 op->verify();
2298 op->set_file_and_line(_file, _line);
2299 _file = NULL;
2300 _line = 0;
2301 #endif
2302 }
2304 public:
2305 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2307 #ifdef ASSERT
2308 void set_file_and_line(const char * file, int line);
2309 #endif
2311 //---------- accessors ---------------
2312 LIR_OpList* instructions_list() { return &_operations; }
2313 int length() const { return _operations.length(); }
2314 LIR_Op* at(int i) const { return _operations.at(i); }
2316 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2318 // insert LIR_Ops in buffer to right places in LIR_List
2319 void append(LIR_InsertionBuffer* buffer);
2321 //---------- mutators ---------------
2322 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2323 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2324 void remove_at(int i) { _operations.remove_at(i); }
2326 //---------- printing -------------
2327 void print_instructions() PRODUCT_RETURN;
2330 //---------- instructions -------------
2331 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2332 address dest, LIR_OprList* arguments,
2333 CodeEmitInfo* info) {
2334 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2335 }
2336 void call_static(ciMethod* method, LIR_Opr result,
2337 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2338 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2339 }
2340 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2341 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2342 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2343 }
2344 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2345 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2346 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2347 }
2348 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2349 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2350 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2351 }
2353 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
2354 void word_align() { append(new LIR_Op0(lir_word_align)); }
2355 void membar() { append(new LIR_Op0(lir_membar)); }
2356 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
2357 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
2358 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
2359 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
2360 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
2361 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2363 void nop() { append(new LIR_Op0(lir_nop)); }
2364 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2366 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
2367 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2369 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2371 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
2372 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
2374 // result is a stack location for old backend and vreg for UseLinearScan
2375 // stack_loc_temp is an illegal register for old backend
2376 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2377 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2378 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2379 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2380 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2381 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2382 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2383 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2384 if (UseCompressedOops) {
2385 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2386 } else {
2387 move(src, dst, info);
2388 }
2389 }
2390 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2391 if (UseCompressedOops) {
2392 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2393 } else {
2394 move(src, dst, info);
2395 }
2396 }
2397 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2399 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2400 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2402 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2403 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2405 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2407 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2409 #ifdef PPC
2410 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2411 #endif
2412 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2414 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
2415 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
2416 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2418 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2419 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2421 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
2422 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2423 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2424 }
2425 void unwind_exception(LIR_Opr exceptionOop) {
2426 append(new LIR_Op1(lir_unwind, exceptionOop));
2427 }
2429 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2430 append(new LIR_Op2(lir_compare_to, left, right, dst));
2431 }
2433 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2434 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2436 #ifndef MIPS
2437 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2438 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2439 }
2440 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2441 cmp(condition, left, LIR_OprFact::intConst(right), info);
2442 }
2444 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2445 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2447 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2448 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2449 }
2451 #else
2452 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right,
2453 CodeEmitInfo* info = NULL) {
2454 append(new LIR_Op2(lir_null_check_for_branch, condition, left, right, info));
2455 }
2457 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, int right,
2458 CodeEmitInfo* info = NULL) {
2459 append(new LIR_Op2(lir_null_check_for_branch, condition, left, LIR_OprFact::intConst(right), info));
2460 }
2462 void null_check_for_branch(LIR_Condition condition, LIR_Opr base, int disp, int c,
2463 CodeEmitInfo* info) {
2464 append(new LIR_Op2(lir_null_check_for_branch, condition,
2465 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
2466 LIR_OprFact::intConst(c),
2467 info, T_INT));
2468 }
2470 void null_check_branch(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr,
2471 CodeEmitInfo* info) {
2472 append(new LIR_Op2(lir_null_check_for_branch, condition,
2473 reg,
2474 LIR_OprFact::address(addr),
2475 info));
2476 }
2478 #endif
2479 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2480 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2481 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2482 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2483 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2484 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2486 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2487 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2488 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2489 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2490 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2491 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2492 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2493 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); }
2494 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); }
2496 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2497 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2498 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2499 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2500 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2501 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2502 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2504 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2505 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2507 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2509 void prefetch(LIR_Address* addr, bool is_store);
2511 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2512 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2513 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2514 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2515 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2517 #ifdef MIPS
2518 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL);
2519 #endif
2521 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2522 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2523 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2524 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2526 #ifndef MIPS
2527 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2528 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2529 #else
2530 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6,int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2531 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, LIR_Opr t5,BasicType type, LIR_Opr klass, CodeStub* stub);
2532 #endif
2534 // jump is an unconditional branch
2535 void jump(BlockBegin* block) {
2536 #ifndef MIPS
2537 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2538 #else
2539 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr,LIR_OprFact::illegalOpr,T_ILLEGAL, block));
2540 #endif
2541 }
2542 void jump(CodeStub* stub) {
2543 #ifndef MIPS
2544 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2545 #else
2546 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr,T_ILLEGAL, stub));
2547 #endif
2548 }
2549 #ifndef MIPS
2550 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2551 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2552 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2553 append(new LIR_OpBranch(cond, type, block));
2554 }
2555 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
2556 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2557 append(new LIR_OpBranch(cond, type, stub));
2558 }
2559 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2560 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2561 append(new LIR_OpBranch(cond, type, block, unordered));
2562 }
2563 #else
2564 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) {
2565 append(new LIR_OpBranch(cond, left, right, lbl));
2566 }
2568 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block) {
2569 append(new LIR_OpBranch(cond, left, right, type, block));
2570 }
2572 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub) {
2573 append(new LIR_OpBranch(cond, left, right, type, stub));
2574 }
2576 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
2577 BlockBegin* block, BlockBegin* unordered) {
2578 append(new LIR_OpBranch(cond, left, right, type, block, unordered));
2579 }
2581 #endif
2583 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2584 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2585 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2587 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2588 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2589 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2591 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2592 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2594 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2595 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2596 }
2598 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2599 LIR_OprList* arguments, CodeEmitInfo* info) {
2600 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2601 }
2603 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2604 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2605 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2607 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
2608 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
2609 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2611 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2613 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2615 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
2617 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2618 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2620 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2621 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2622 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2623 ciMethod* profiled_method, int profiled_bci);
2624 // MethodData* profiling
2625 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2626 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2627 }
2628 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2629 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2630 }
2632 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2633 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2634 #ifdef ASSERT
2635 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2636 #endif
2637 };
2639 void print_LIR(BlockList* blocks);
2641 class LIR_InsertionBuffer : public CompilationResourceObj {
2642 private:
2643 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2645 // list of insertion points. index and count are stored alternately:
2646 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2647 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2648 intStack _index_and_count;
2650 // the LIR_Ops to be inserted
2651 LIR_OpList _ops;
2653 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2654 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2655 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2657 #ifdef ASSERT
2658 void verify();
2659 #endif
2660 public:
2661 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2663 // must be called before using the insertion buffer
2664 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2665 bool initialized() const { return _lir != NULL; }
2666 // called automatically when the buffer is appended to the LIR_List
2667 void finish() { _lir = NULL; }
2669 // accessors
2670 LIR_List* lir_list() const { return _lir; }
2671 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2672 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2673 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2675 int number_of_ops() const { return _ops.length(); }
2676 LIR_Op* op_at(int i) const { return _ops.at(i); }
2678 // append an instruction to the buffer
2679 void append(int index, LIR_Op* op);
2681 // instruction
2682 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2683 };
2686 //
2687 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2688 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2689 // information about the input, output and temporaries used by the
2690 // op to be recorded. It also records whether the op has call semantics
2691 // and also records all the CodeEmitInfos used by this op.
2692 //
2695 class LIR_OpVisitState: public StackObj {
2696 public:
2697 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2699 enum {
2700 maxNumberOfOperands = 20,
2701 maxNumberOfInfos = 4
2702 };
2704 private:
2705 LIR_Op* _op;
2707 // optimization: the operands and infos are not stored in a variable-length
2708 // list, but in a fixed-size array to save time of size checks and resizing
2709 int _oprs_len[numModes];
2710 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2711 int _info_len;
2712 CodeEmitInfo* _info_new[maxNumberOfInfos];
2714 bool _has_call;
2715 bool _has_slow_case;
2718 // only include register operands
2719 // addresses are decomposed to the base and index registers
2720 // constants and stack operands are ignored
2721 void append(LIR_Opr& opr, OprMode mode) {
2722 assert(opr->is_valid(), "should not call this otherwise");
2723 assert(mode >= 0 && mode < numModes, "bad mode");
2725 if (opr->is_register()) {
2726 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2727 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2729 } else if (opr->is_pointer()) {
2730 LIR_Address* address = opr->as_address_ptr();
2731 if (address != NULL) {
2732 // special handling for addresses: add base and index register of the address
2733 // both are always input operands or temp if we want to extend
2734 // their liveness!
2735 if (mode == outputMode) {
2736 mode = inputMode;
2737 }
2738 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2739 if (address->_base->is_valid()) {
2740 assert(address->_base->is_register(), "must be");
2741 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2742 _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2743 }
2744 if (address->_index->is_valid()) {
2745 assert(address->_index->is_register(), "must be");
2746 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2747 _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2748 }
2750 } else {
2751 assert(opr->is_constant(), "constant operands are not processed");
2752 }
2753 } else {
2754 assert(opr->is_stack(), "stack operands are not processed");
2755 }
2756 }
2758 void append(CodeEmitInfo* info) {
2759 assert(info != NULL, "should not call this otherwise");
2760 assert(_info_len < maxNumberOfInfos, "array overflow");
2761 _info_new[_info_len++] = info;
2762 }
2764 public:
2765 LIR_OpVisitState() { reset(); }
2767 LIR_Op* op() const { return _op; }
2768 void set_op(LIR_Op* op) { reset(); _op = op; }
2770 bool has_call() const { return _has_call; }
2771 bool has_slow_case() const { return _has_slow_case; }
2773 void reset() {
2774 _op = NULL;
2775 _has_call = false;
2776 _has_slow_case = false;
2778 _oprs_len[inputMode] = 0;
2779 _oprs_len[tempMode] = 0;
2780 _oprs_len[outputMode] = 0;
2781 _info_len = 0;
2782 }
2785 int opr_count(OprMode mode) const {
2786 assert(mode >= 0 && mode < numModes, "bad mode");
2787 return _oprs_len[mode];
2788 }
2790 LIR_Opr opr_at(OprMode mode, int index) const {
2791 assert(mode >= 0 && mode < numModes, "bad mode");
2792 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2793 return *_oprs_new[mode][index];
2794 }
2796 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2797 assert(mode >= 0 && mode < numModes, "bad mode");
2798 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2799 *_oprs_new[mode][index] = opr;
2800 }
2802 int info_count() const {
2803 return _info_len;
2804 }
2806 CodeEmitInfo* info_at(int index) const {
2807 assert(index < _info_len, "index out of bounds");
2808 return _info_new[index];
2809 }
2811 XHandlers* all_xhandler();
2813 // collects all register operands of the instruction
2814 void visit(LIR_Op* op);
2816 #ifdef ASSERT
2817 // check that an operation has no operands
2818 bool no_operands(LIR_Op* op);
2819 #endif
2821 // LIR_Op visitor functions use these to fill in the state
2822 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2823 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2824 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2825 void do_info(CodeEmitInfo* info) { append(info); }
2827 void do_stub(CodeStub* stub);
2828 void do_call() { _has_call = true; }
2829 void do_slow_case() { _has_slow_case = true; }
2830 void do_slow_case(CodeEmitInfo* info) {
2831 _has_slow_case = true;
2832 append(info);
2833 }
2834 };
2837 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2839 #endif // SHARE_VM_C1_C1_LIR_HPP
