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src/share/vm/c1/c1_LIR.hpp@87ee44a01d68
src/share/vm/c1/c1_LIR.hpp
Mon, 11 Jun 2018 16:44:16 +0800
- author
- fujie
- date
- Mon, 11 Jun 2018 16:44:16 +0800
- changeset 9142
- 87ee44a01d68
- parent 9138
- b56ab8e56604
- child 9143
- 239e32ede77d
- permissions
- -rw-r--r--
#7180 Remove duplicated cas_* lir for MIPS only.
1 /*
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 /*
26 * This file has been modified by Loongson Technology in 2018. These
27 * modifications are Copyright (c) 2018 Loongson Technology, and are made
28 * available on the same license terms set forth above.
29 */
31 #ifndef SHARE_VM_C1_C1_LIR_HPP
32 #define SHARE_VM_C1_C1_LIR_HPP
34 #include "c1/c1_Defs.hpp"
35 #include "c1/c1_ValueType.hpp"
36 #include "oops/method.hpp"
38 class BlockBegin;
39 class BlockList;
40 class LIR_Assembler;
41 class CodeEmitInfo;
42 class CodeStub;
43 class CodeStubList;
44 class ArrayCopyStub;
45 class LIR_Op;
46 class ciType;
47 class ValueType;
48 class LIR_OpVisitState;
49 class FpuStackSim;
51 //---------------------------------------------------------------------
52 // LIR Operands
53 // LIR_OprDesc
54 // LIR_OprPtr
55 // LIR_Const
56 // LIR_Address
57 //---------------------------------------------------------------------
58 class LIR_OprDesc;
59 class LIR_OprPtr;
60 class LIR_Const;
61 class LIR_Address;
62 class LIR_OprVisitor;
65 typedef LIR_OprDesc* LIR_Opr;
66 typedef int RegNr;
68 define_array(LIR_OprArray, LIR_Opr)
69 define_stack(LIR_OprList, LIR_OprArray)
71 define_array(LIR_OprRefArray, LIR_Opr*)
72 define_stack(LIR_OprRefList, LIR_OprRefArray)
74 define_array(CodeEmitInfoArray, CodeEmitInfo*)
75 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
77 define_array(LIR_OpArray, LIR_Op*)
78 define_stack(LIR_OpList, LIR_OpArray)
80 // define LIR_OprPtr early so LIR_OprDesc can refer to it
81 class LIR_OprPtr: public CompilationResourceObj {
82 public:
83 bool is_oop_pointer() const { return (type() == T_OBJECT); }
84 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
86 virtual LIR_Const* as_constant() { return NULL; }
87 virtual LIR_Address* as_address() { return NULL; }
88 virtual BasicType type() const = 0;
89 virtual void print_value_on(outputStream* out) const = 0;
90 };
94 // LIR constants
95 class LIR_Const: public LIR_OprPtr {
96 private:
97 JavaValue _value;
99 void type_check(BasicType t) const { assert(type() == t, "type check"); }
100 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
101 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
103 public:
104 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
105 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
106 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
107 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
108 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
109 LIR_Const(void* p) {
110 #ifdef _LP64
111 assert(sizeof(jlong) >= sizeof(p), "too small");;
112 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
113 #else
114 assert(sizeof(jint) >= sizeof(p), "too small");;
115 _value.set_type(T_INT); _value.set_jint((jint)p);
116 #endif
117 }
118 LIR_Const(Metadata* m) {
119 _value.set_type(T_METADATA);
120 #ifdef _LP64
121 _value.set_jlong((jlong)m);
122 #else
123 _value.set_jint((jint)m);
124 #endif // _LP64
125 }
127 virtual BasicType type() const { return _value.get_type(); }
128 virtual LIR_Const* as_constant() { return this; }
130 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
131 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
132 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
133 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
134 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
135 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
136 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
138 #ifdef _LP64
139 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
140 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
141 #else
142 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
143 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
144 #endif
147 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
148 jint as_jint_lo_bits() const {
149 if (type() == T_DOUBLE) {
150 return low(jlong_cast(_value.get_jdouble()));
151 } else {
152 return as_jint_lo();
153 }
154 }
155 jint as_jint_hi_bits() const {
156 if (type() == T_DOUBLE) {
157 return high(jlong_cast(_value.get_jdouble()));
158 } else {
159 return as_jint_hi();
160 }
161 }
162 jlong as_jlong_bits() const {
163 if (type() == T_DOUBLE) {
164 return jlong_cast(_value.get_jdouble());
165 } else {
166 return as_jlong();
167 }
168 }
170 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
173 bool is_zero_float() {
174 jfloat f = as_jfloat();
175 jfloat ok = 0.0f;
176 return jint_cast(f) == jint_cast(ok);
177 }
179 bool is_one_float() {
180 jfloat f = as_jfloat();
181 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
182 }
184 bool is_zero_double() {
185 jdouble d = as_jdouble();
186 jdouble ok = 0.0;
187 return jlong_cast(d) == jlong_cast(ok);
188 }
190 bool is_one_double() {
191 jdouble d = as_jdouble();
192 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
193 }
194 };
197 //---------------------LIR Operand descriptor------------------------------------
198 //
199 // The class LIR_OprDesc represents a LIR instruction operand;
200 // it can be a register (ALU/FPU), stack location or a constant;
201 // Constants and addresses are represented as resource area allocated
202 // structures (see above).
203 // Registers and stack locations are inlined into the this pointer
204 // (see value function).
206 class LIR_OprDesc: public CompilationResourceObj {
207 public:
208 // value structure:
209 // data opr-type opr-kind
210 // +--------------+-------+-------+
211 // [max...........|7 6 5 4|3 2 1 0]
212 // ^
213 // is_pointer bit
214 //
215 // lowest bit cleared, means it is a structure pointer
216 // we need 4 bits to represent types
218 private:
219 friend class LIR_OprFact;
221 // Conversion
222 intptr_t value() const { return (intptr_t) this; }
224 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
225 return (value() & mask) == masked_value;
226 }
228 enum OprKind {
229 pointer_value = 0
230 , stack_value = 1
231 , cpu_register = 3
232 , fpu_register = 5
233 , illegal_value = 7
234 };
236 enum OprBits {
237 pointer_bits = 1
238 , kind_bits = 3
239 , type_bits = 4
240 , size_bits = 2
241 , destroys_bits = 1
242 , virtual_bits = 1
243 , is_xmm_bits = 1
244 , last_use_bits = 1
245 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
246 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
247 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
248 , data_bits = BitsPerInt - non_data_bits
249 , reg_bits = data_bits / 2 // for two registers in one value encoding
250 };
252 enum OprShift {
253 kind_shift = 0
254 , type_shift = kind_shift + kind_bits
255 , size_shift = type_shift + type_bits
256 , destroys_shift = size_shift + size_bits
257 , last_use_shift = destroys_shift + destroys_bits
258 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
259 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
260 , is_xmm_shift = virtual_shift + virtual_bits
261 , data_shift = is_xmm_shift + is_xmm_bits
262 , reg1_shift = data_shift
263 , reg2_shift = data_shift + reg_bits
265 };
267 enum OprSize {
268 single_size = 0 << size_shift
269 , double_size = 1 << size_shift
270 };
272 enum OprMask {
273 kind_mask = right_n_bits(kind_bits)
274 , type_mask = right_n_bits(type_bits) << type_shift
275 , size_mask = right_n_bits(size_bits) << size_shift
276 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
277 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
278 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
279 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
280 , pointer_mask = right_n_bits(pointer_bits)
281 , lower_reg_mask = right_n_bits(reg_bits)
282 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
283 };
285 uintptr_t data() const { return value() >> data_shift; }
286 int lo_reg_half() const { return data() & lower_reg_mask; }
287 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
288 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
289 OprSize size_field() const { return (OprSize)(value() & size_mask); }
291 static char type_char(BasicType t);
293 public:
294 enum {
295 vreg_base = ConcreteRegisterImpl::number_of_registers,
296 vreg_max = (1 << data_bits) - 1
297 };
299 static inline LIR_Opr illegalOpr();
301 enum OprType {
302 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
303 , int_type = 1 << type_shift
304 , long_type = 2 << type_shift
305 , object_type = 3 << type_shift
306 , address_type = 4 << type_shift
307 , float_type = 5 << type_shift
308 , double_type = 6 << type_shift
309 , metadata_type = 7 << type_shift
310 };
311 friend OprType as_OprType(BasicType t);
312 friend BasicType as_BasicType(OprType t);
314 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
315 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
317 static OprSize size_for(BasicType t) {
318 switch (t) {
319 case T_LONG:
320 case T_DOUBLE:
321 return double_size;
322 break;
324 case T_FLOAT:
325 case T_BOOLEAN:
326 case T_CHAR:
327 case T_BYTE:
328 case T_SHORT:
329 case T_INT:
330 case T_ADDRESS:
331 case T_OBJECT:
332 case T_ARRAY:
333 case T_METADATA:
334 return single_size;
335 break;
337 default:
338 ShouldNotReachHere();
339 return single_size;
340 }
341 }
344 void validate_type() const PRODUCT_RETURN;
346 BasicType type() const {
347 if (is_pointer()) {
348 return pointer()->type();
349 }
350 return as_BasicType(type_field());
351 }
354 ValueType* value_type() const { return as_ValueType(type()); }
356 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
358 bool is_equal(LIR_Opr opr) const { return this == opr; }
359 // checks whether types are same
360 bool is_same_type(LIR_Opr opr) const {
361 assert(type_field() != unknown_type &&
362 opr->type_field() != unknown_type, "shouldn't see unknown_type");
363 return type_field() == opr->type_field();
364 }
365 bool is_same_register(LIR_Opr opr) {
366 return (is_register() && opr->is_register() &&
367 kind_field() == opr->kind_field() &&
368 (value() & no_type_mask) == (opr->value() & no_type_mask));
369 }
371 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
372 bool is_illegal() const { return kind_field() == illegal_value; }
373 bool is_valid() const { return kind_field() != illegal_value; }
375 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
376 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
378 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
379 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
381 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
382 bool is_oop() const;
384 // semantic for fpu- and xmm-registers:
385 // * is_float and is_double return true for xmm_registers
386 // (so is_single_fpu and is_single_xmm are true)
387 // * So you must always check for is_???_xmm prior to is_???_fpu to
388 // distinguish between fpu- and xmm-registers
390 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
391 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
392 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
394 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
395 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
396 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
397 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
398 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
400 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
401 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
402 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
403 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
404 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
406 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
407 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
408 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
410 // fast accessor functions for special bits that do not work for pointers
411 // (in this functions, the check for is_pointer() is omitted)
412 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
413 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
414 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
415 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
416 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
418 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
419 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
420 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
421 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
424 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
425 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
426 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
427 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
428 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
429 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
430 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
431 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
432 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
433 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
434 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
435 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
437 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
438 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
439 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
441 Register as_register() const;
442 Register as_register_lo() const;
443 Register as_register_hi() const;
445 Register as_pointer_register() {
446 #ifdef _LP64
447 if (is_double_cpu()) {
448 assert(as_register_lo() == as_register_hi(), "should be a single register");
449 return as_register_lo();
450 }
451 #endif
452 return as_register();
453 }
455 #ifdef X86
456 XMMRegister as_xmm_float_reg() const;
457 XMMRegister as_xmm_double_reg() const;
458 // for compatibility with RInfo
459 int fpu () const { return lo_reg_half(); }
460 #endif // X86
461 #if defined(SPARC) || defined(ARM) || defined(PPC) || defined(MIPS)
462 FloatRegister as_float_reg () const;
463 FloatRegister as_double_reg () const;
464 #endif
466 jint as_jint() const { return as_constant_ptr()->as_jint(); }
467 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
468 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
469 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
470 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
472 void print() const PRODUCT_RETURN;
473 void print(outputStream* out) const PRODUCT_RETURN;
474 };
477 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
478 switch (type) {
479 case T_INT: return LIR_OprDesc::int_type;
480 case T_LONG: return LIR_OprDesc::long_type;
481 case T_FLOAT: return LIR_OprDesc::float_type;
482 case T_DOUBLE: return LIR_OprDesc::double_type;
483 case T_OBJECT:
484 case T_ARRAY: return LIR_OprDesc::object_type;
485 case T_ADDRESS: return LIR_OprDesc::address_type;
486 case T_METADATA: return LIR_OprDesc::metadata_type;
487 case T_ILLEGAL: // fall through
488 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
489 }
490 }
492 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
493 switch (t) {
494 case LIR_OprDesc::int_type: return T_INT;
495 case LIR_OprDesc::long_type: return T_LONG;
496 case LIR_OprDesc::float_type: return T_FLOAT;
497 case LIR_OprDesc::double_type: return T_DOUBLE;
498 case LIR_OprDesc::object_type: return T_OBJECT;
499 case LIR_OprDesc::address_type: return T_ADDRESS;
500 case LIR_OprDesc::metadata_type:return T_METADATA;
501 case LIR_OprDesc::unknown_type: // fall through
502 default: ShouldNotReachHere(); return T_ILLEGAL;
503 }
504 }
507 // LIR_Address
508 class LIR_Address: public LIR_OprPtr {
509 friend class LIR_OpVisitState;
511 public:
512 // NOTE: currently these must be the log2 of the scale factor (and
513 // must also be equivalent to the ScaleFactor enum in
514 // assembler_i486.hpp)
515 enum Scale {
516 times_1 = 0,
517 times_2 = 1,
518 times_4 = 2,
519 times_8 = 3
520 };
522 private:
523 LIR_Opr _base;
524 LIR_Opr _index;
525 Scale _scale;
526 intx _disp;
527 BasicType _type;
529 public:
530 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
531 _base(base)
532 , _index(index)
533 , _scale(times_1)
534 , _type(type)
535 , _disp(0) { verify(); }
537 #ifndef MIPS
538 LIR_Address(LIR_Opr base, intx disp, BasicType type):
539 #else
540 LIR_Address(LIR_Opr base, int disp, BasicType type):
541 #endif
542 _base(base)
543 , _index(LIR_OprDesc::illegalOpr())
544 , _scale(times_1)
545 , _type(type)
546 , _disp(disp) { verify(); }
548 LIR_Address(LIR_Opr base, BasicType type):
549 _base(base)
550 , _index(LIR_OprDesc::illegalOpr())
551 , _scale(times_1)
552 , _type(type)
553 , _disp(0) { verify(); }
555 #if defined(X86) || defined(ARM)
556 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
557 _base(base)
558 , _index(index)
559 , _scale(scale)
560 , _type(type)
561 , _disp(disp) { verify(); }
562 #endif // X86 || ARM
564 LIR_Opr base() const { return _base; }
565 LIR_Opr index() const { return _index; }
566 Scale scale() const { return _scale; }
567 intx disp() const { return _disp; }
569 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
571 virtual LIR_Address* as_address() { return this; }
572 virtual BasicType type() const { return _type; }
573 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
575 void verify0() const PRODUCT_RETURN;
576 #if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
577 void pd_verify() const;
578 void verify() const { pd_verify(); }
579 #else
580 void verify() const { verify0(); }
581 #endif
583 static Scale scale(BasicType type);
584 };
587 // operand factory
588 class LIR_OprFact: public AllStatic {
589 public:
591 static LIR_Opr illegalOpr;
593 static LIR_Opr single_cpu(int reg) {
594 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
595 LIR_OprDesc::int_type |
596 LIR_OprDesc::cpu_register |
597 LIR_OprDesc::single_size);
598 }
599 static LIR_Opr single_cpu_oop(int reg) {
600 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
601 LIR_OprDesc::object_type |
602 LIR_OprDesc::cpu_register |
603 LIR_OprDesc::single_size);
604 }
605 static LIR_Opr single_cpu_address(int reg) {
606 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
607 LIR_OprDesc::address_type |
608 LIR_OprDesc::cpu_register |
609 LIR_OprDesc::single_size);
610 }
611 static LIR_Opr single_cpu_metadata(int reg) {
612 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
613 LIR_OprDesc::metadata_type |
614 LIR_OprDesc::cpu_register |
615 LIR_OprDesc::single_size);
616 }
617 static LIR_Opr double_cpu(int reg1, int reg2) {
618 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
619 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
620 (reg2 << LIR_OprDesc::reg2_shift) |
621 LIR_OprDesc::long_type |
622 LIR_OprDesc::cpu_register |
623 LIR_OprDesc::double_size);
624 }
626 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
627 LIR_OprDesc::float_type |
628 LIR_OprDesc::fpu_register |
629 LIR_OprDesc::single_size); }
630 #if defined(C1_LIR_MD_HPP)
631 # include C1_LIR_MD_HPP
632 #elif defined(SPARC)
633 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
634 (reg2 << LIR_OprDesc::reg2_shift) |
635 LIR_OprDesc::double_type |
636 LIR_OprDesc::fpu_register |
637 LIR_OprDesc::double_size); }
638 #elif defined(X86)
639 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
640 (reg << LIR_OprDesc::reg2_shift) |
641 LIR_OprDesc::double_type |
642 LIR_OprDesc::fpu_register |
643 LIR_OprDesc::double_size); }
645 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
646 LIR_OprDesc::float_type |
647 LIR_OprDesc::fpu_register |
648 LIR_OprDesc::single_size |
649 LIR_OprDesc::is_xmm_mask); }
650 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
651 (reg << LIR_OprDesc::reg2_shift) |
652 LIR_OprDesc::double_type |
653 LIR_OprDesc::fpu_register |
654 LIR_OprDesc::double_size |
655 LIR_OprDesc::is_xmm_mask); }
656 #elif defined(PPC)
657 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
658 (reg << LIR_OprDesc::reg2_shift) |
659 LIR_OprDesc::double_type |
660 LIR_OprDesc::fpu_register |
661 LIR_OprDesc::double_size); }
662 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
663 LIR_OprDesc::float_type |
664 LIR_OprDesc::cpu_register |
665 LIR_OprDesc::single_size); }
666 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
667 (reg1 << LIR_OprDesc::reg2_shift) |
668 LIR_OprDesc::double_type |
669 LIR_OprDesc::cpu_register |
670 LIR_OprDesc::double_size); }
671 #endif // PPC
672 #ifdef MIPS
673 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
674 (reg << LIR_OprDesc::reg2_shift) |
675 LIR_OprDesc::double_type |
676 LIR_OprDesc::fpu_register |
677 LIR_OprDesc::double_size); }
678 #endif
680 static LIR_Opr virtual_register(int index, BasicType type) {
681 LIR_Opr res;
682 switch (type) {
683 case T_OBJECT: // fall through
684 case T_ARRAY:
685 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
686 LIR_OprDesc::object_type |
687 LIR_OprDesc::cpu_register |
688 LIR_OprDesc::single_size |
689 LIR_OprDesc::virtual_mask);
690 break;
692 case T_METADATA:
693 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
694 LIR_OprDesc::metadata_type|
695 LIR_OprDesc::cpu_register |
696 LIR_OprDesc::single_size |
697 LIR_OprDesc::virtual_mask);
698 break;
700 case T_INT:
701 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
702 LIR_OprDesc::int_type |
703 LIR_OprDesc::cpu_register |
704 LIR_OprDesc::single_size |
705 LIR_OprDesc::virtual_mask);
706 break;
708 case T_ADDRESS:
709 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
710 LIR_OprDesc::address_type |
711 LIR_OprDesc::cpu_register |
712 LIR_OprDesc::single_size |
713 LIR_OprDesc::virtual_mask);
714 break;
716 case T_LONG:
717 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
718 LIR_OprDesc::long_type |
719 LIR_OprDesc::cpu_register |
720 LIR_OprDesc::double_size |
721 LIR_OprDesc::virtual_mask);
722 break;
724 #ifdef __SOFTFP__
725 case T_FLOAT:
726 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
727 LIR_OprDesc::float_type |
728 LIR_OprDesc::cpu_register |
729 LIR_OprDesc::single_size |
730 LIR_OprDesc::virtual_mask);
731 break;
732 case T_DOUBLE:
733 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
734 LIR_OprDesc::double_type |
735 LIR_OprDesc::cpu_register |
736 LIR_OprDesc::double_size |
737 LIR_OprDesc::virtual_mask);
738 break;
739 #else // __SOFTFP__
740 case T_FLOAT:
741 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
742 LIR_OprDesc::float_type |
743 LIR_OprDesc::fpu_register |
744 LIR_OprDesc::single_size |
745 LIR_OprDesc::virtual_mask);
746 break;
748 case
749 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
750 LIR_OprDesc::double_type |
751 LIR_OprDesc::fpu_register |
752 LIR_OprDesc::double_size |
753 LIR_OprDesc::virtual_mask);
754 break;
755 #endif // __SOFTFP__
756 default: ShouldNotReachHere(); res = illegalOpr;
757 }
759 #ifdef ASSERT
760 res->validate_type();
761 assert(res->vreg_number() == index, "conversion check");
762 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
763 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
765 // old-style calculation; check if old and new method are equal
766 LIR_OprDesc::OprType t = as_OprType(type);
767 #ifdef __SOFTFP__
768 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
769 t |
770 LIR_OprDesc::cpu_register |
771 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
772 #else // __SOFTFP__
773 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
774 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
775 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
776 assert(res == old_res, "old and new method not equal");
777 #endif // __SOFTFP__
778 #endif // ASSERT
780 return res;
781 }
783 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
784 // the index is platform independent; a double stack useing indeces 2 and 3 has always
785 // index 2.
786 static LIR_Opr stack(int index, BasicType type) {
787 LIR_Opr res;
788 switch (type) {
789 case T_OBJECT: // fall through
790 case T_ARRAY:
791 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
792 LIR_OprDesc::object_type |
793 LIR_OprDesc::stack_value |
794 LIR_OprDesc::single_size);
795 break;
797 case T_METADATA:
798 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
799 LIR_OprDesc::metadata_type |
800 LIR_OprDesc::stack_value |
801 LIR_OprDesc::single_size);
802 break;
803 case T_INT:
804 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
805 LIR_OprDesc::int_type |
806 LIR_OprDesc::stack_value |
807 LIR_OprDesc::single_size);
808 break;
810 case T_ADDRESS:
811 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
812 LIR_OprDesc::address_type |
813 LIR_OprDesc::stack_value |
814 LIR_OprDesc::single_size);
815 break;
817 case T_LONG:
818 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
819 LIR_OprDesc::long_type |
820 LIR_OprDesc::stack_value |
821 LIR_OprDesc::double_size);
822 break;
824 case T_FLOAT:
825 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
826 LIR_OprDesc::float_type |
827 LIR_OprDesc::stack_value |
828 LIR_OprDesc::single_size);
829 break;
830 case T_DOUBLE:
831 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
832 LIR_OprDesc::double_type |
833 LIR_OprDesc::stack_value |
834 LIR_OprDesc::double_size);
835 break;
837 default: ShouldNotReachHere(); res = illegalOpr;
838 }
840 #ifdef ASSERT
841 assert(index >= 0, "index must be positive");
842 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
844 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
845 LIR_OprDesc::stack_value |
846 as_OprType(type) |
847 LIR_OprDesc::size_for(type));
848 assert(res == old_res, "old and new method not equal");
849 #endif
851 return res;
852 }
854 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
855 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
856 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
857 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
858 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
859 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
860 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
861 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
862 static LIR_Opr illegal() { return (LIR_Opr)-1; }
863 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
864 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
866 static LIR_Opr value_type(ValueType* type);
867 static LIR_Opr dummy_value_type(ValueType* type);
868 };
871 //-------------------------------------------------------------------------------
872 // LIR Instructions
873 //-------------------------------------------------------------------------------
874 //
875 // Note:
876 // - every instruction has a result operand
877 // - every instruction has an CodeEmitInfo operand (can be revisited later)
878 // - every instruction has a LIR_OpCode operand
879 // - LIR_OpN, means an instruction that has N input operands
880 //
881 // class hierarchy:
882 //
883 class LIR_Op;
884 class LIR_Op0;
885 class LIR_OpLabel;
886 class LIR_Op1;
887 class LIR_OpBranch;
888 class LIR_OpConvert;
889 class LIR_OpAllocObj;
890 class LIR_OpRoundFP;
891 class LIR_Op2;
892 class LIR_OpDelay;
893 class LIR_Op3;
894 class LIR_OpAllocArray;
895 class LIR_OpCall;
896 class LIR_OpJavaCall;
897 class LIR_OpRTCall;
898 class LIR_OpArrayCopy;
899 class LIR_OpUpdateCRC32;
900 class LIR_OpLock;
901 class LIR_OpTypeCheck;
902 class LIR_OpCompareAndSwap;
903 class LIR_OpProfileCall;
904 class LIR_OpProfileType;
905 #ifdef ASSERT
906 class LIR_OpAssert;
907 #endif
909 // LIR operation codes
910 enum LIR_Code {
911 lir_none
912 , begin_op0
913 , lir_word_align
914 , lir_label
915 , lir_nop
916 , lir_backwardbranch_target
917 , lir_std_entry
918 , lir_osr_entry
919 , lir_build_frame
920 , lir_fpop_raw
921 , lir_24bit_FPU
922 , lir_reset_FPU
923 , lir_breakpoint
924 , lir_rtcall
925 , lir_membar
926 , lir_membar_acquire
927 , lir_membar_release
928 , lir_membar_loadload
929 , lir_membar_storestore
930 , lir_membar_loadstore
931 , lir_membar_storeload
932 , lir_get_thread
933 , end_op0
934 , begin_op1
935 , lir_fxch
936 , lir_fld
937 , lir_ffree
938 , lir_push
939 , lir_pop
940 , lir_null_check
941 , lir_return
942 , lir_leal
943 , lir_neg
944 #ifndef MIPS
945 , lir_branch
946 , lir_cond_float_branch
947 #endif
948 , lir_move
949 , lir_prefetchr
950 , lir_prefetchw
951 , lir_convert
952 , lir_alloc_object
953 , lir_monaddr
954 , lir_roundfp
955 , lir_safepoint
956 , lir_pack64
957 , lir_unpack64
958 , lir_unwind
959 , end_op1
960 , begin_op2
961 #ifdef MIPS
962 , lir_branch
963 , lir_cond_float_branch
964 , lir_null_check_for_branch
965 #else
966 , lir_cmp
967 #endif
968 , lir_cmp_l2i
969 , lir_ucmp_fd2i
970 , lir_cmp_fd2i
971 , lir_cmove
972 , lir_add
973 , lir_sub
974 , lir_mul
975 , lir_mul_strictfp
976 , lir_div
977 , lir_div_strictfp
978 , lir_rem
979 , lir_sqrt
980 , lir_abs
981 , lir_sin
982 , lir_cos
983 , lir_tan
984 , lir_log
985 , lir_log10
986 , lir_exp
987 , lir_pow
988 , lir_logic_and
989 , lir_logic_or
990 , lir_logic_xor
991 , lir_shl
992 , lir_shr
993 , lir_ushr
994 , lir_alloc_array
995 , lir_throw
996 , lir_compare_to
997 , lir_xadd
998 , lir_xchg
999 , end_op2
1000 , begin_op3
1001 #ifdef MIPS
1002 , lir_frem
1003 #endif
1004 , lir_idiv
1005 , lir_irem
1006 , end_op3
1007 , begin_opJavaCall
1008 , lir_static_call
1009 , lir_optvirtual_call
1010 , lir_icvirtual_call
1011 , lir_virtual_call
1012 , lir_dynamic_call
1013 , end_opJavaCall
1014 , begin_opArrayCopy
1015 , lir_arraycopy
1016 , end_opArrayCopy
1017 , begin_opUpdateCRC32
1018 , lir_updatecrc32
1019 , end_opUpdateCRC32
1020 , begin_opLock
1021 , lir_lock
1022 , lir_unlock
1023 , end_opLock
1024 , begin_delay_slot
1025 , lir_delay_slot
1026 , end_delay_slot
1027 , begin_opTypeCheck
1028 , lir_instanceof
1029 , lir_checkcast
1030 , lir_store_check
1031 , end_opTypeCheck
1032 , begin_opCompareAndSwap
1033 , lir_cas_long
1034 , lir_cas_obj
1035 , lir_cas_int
1036 , end_opCompareAndSwap
1037 , begin_opMDOProfile
1038 , lir_profile_call
1039 , lir_profile_type
1040 , end_opMDOProfile
1041 , begin_opAssert
1042 , lir_assert
1043 , end_opAssert
1044 };
1047 enum LIR_Condition {
1048 lir_cond_equal
1049 , lir_cond_notEqual
1050 , lir_cond_less
1051 , lir_cond_lessEqual
1052 , lir_cond_greaterEqual
1053 , lir_cond_greater
1054 , lir_cond_belowEqual
1055 , lir_cond_aboveEqual
1056 , lir_cond_always
1057 , lir_cond_unknown = -1
1058 };
1061 enum LIR_PatchCode {
1062 lir_patch_none,
1063 lir_patch_low,
1064 lir_patch_high,
1065 lir_patch_normal
1066 };
1069 enum LIR_MoveKind {
1070 lir_move_normal,
1071 lir_move_volatile,
1072 lir_move_unaligned,
1073 lir_move_wide,
1074 lir_move_max_flag
1075 };
1078 // --------------------------------------------------
1079 // LIR_Op
1080 // --------------------------------------------------
1081 class LIR_Op: public CompilationResourceObj {
1082 friend class LIR_OpVisitState;
1084 #ifdef ASSERT
1085 private:
1086 const char * _file;
1087 int _line;
1088 #endif
1090 protected:
1091 LIR_Opr _result;
1092 unsigned short _code;
1093 unsigned short _flags;
1094 CodeEmitInfo* _info;
1095 int _id; // value id for register allocation
1096 int _fpu_pop_count;
1097 Instruction* _source; // for debugging
1099 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1101 protected:
1102 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1104 public:
1105 LIR_Op()
1106 : _result(LIR_OprFact::illegalOpr)
1107 , _code(lir_none)
1108 , _flags(0)
1109 , _info(NULL)
1110 #ifdef ASSERT
1111 , _file(NULL)
1112 , _line(0)
1113 #endif
1114 , _fpu_pop_count(0)
1115 , _source(NULL)
1116 , _id(-1) {}
1118 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1119 : _result(result)
1120 , _code(code)
1121 , _flags(0)
1122 , _info(info)
1123 #ifdef ASSERT
1124 , _file(NULL)
1125 , _line(0)
1126 #endif
1127 , _fpu_pop_count(0)
1128 , _source(NULL)
1129 , _id(-1) {}
1131 CodeEmitInfo* info() const { return _info; }
1132 LIR_Code code() const { return (LIR_Code)_code; }
1133 LIR_Opr result_opr() const { return _result; }
1134 void set_result_opr(LIR_Opr opr) { _result = opr; }
1136 #ifdef ASSERT
1137 void set_file_and_line(const char * file, int line) {
1138 _file = file;
1139 _line = line;
1140 }
1141 #endif
1143 virtual const char * name() const PRODUCT_RETURN0;
1145 int id() const { return _id; }
1146 void set_id(int id) { _id = id; }
1148 // FPU stack simulation helpers -- only used on Intel
1149 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1150 int fpu_pop_count() const { return _fpu_pop_count; }
1151 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1153 Instruction* source() const { return _source; }
1154 void set_source(Instruction* ins) { _source = ins; }
1156 virtual void emit_code(LIR_Assembler* masm) = 0;
1157 virtual void print_instr(outputStream* out) const = 0;
1158 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1160 virtual bool is_patching() { return false; }
1161 virtual LIR_OpCall* as_OpCall() { return NULL; }
1162 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1163 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1164 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1165 virtual LIR_OpLock* as_OpLock() { return NULL; }
1166 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1167 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1168 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1169 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1170 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1171 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1172 virtual LIR_Op0* as_Op0() { return NULL; }
1173 virtual LIR_Op1* as_Op1() { return NULL; }
1174 virtual LIR_Op2* as_Op2() { return NULL; }
1175 virtual LIR_Op3* as_Op3() { return NULL; }
1176 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1177 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1178 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1179 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1180 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1181 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1182 #ifdef ASSERT
1183 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1184 #endif
1186 virtual void verify() const {}
1187 };
1189 // for calls
1190 class LIR_OpCall: public LIR_Op {
1191 friend class LIR_OpVisitState;
1193 protected:
1194 address _addr;
1195 LIR_OprList* _arguments;
1196 protected:
1197 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1198 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1199 : LIR_Op(code, result, info)
1200 , _arguments(arguments)
1201 , _addr(addr) {}
1203 public:
1204 address addr() const { return _addr; }
1205 const LIR_OprList* arguments() const { return _arguments; }
1206 virtual LIR_OpCall* as_OpCall() { return this; }
1207 };
1210 // --------------------------------------------------
1211 // LIR_OpJavaCall
1212 // --------------------------------------------------
1213 class LIR_OpJavaCall: public LIR_OpCall {
1214 friend class LIR_OpVisitState;
1216 private:
1217 ciMethod* _method;
1218 LIR_Opr _receiver;
1219 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1221 public:
1222 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1223 LIR_Opr receiver, LIR_Opr result,
1224 address addr, LIR_OprList* arguments,
1225 CodeEmitInfo* info)
1226 : LIR_OpCall(code, addr, result, arguments, info)
1227 , _receiver(receiver)
1228 , _method(method)
1229 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1230 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1232 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1233 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1234 LIR_OprList* arguments, CodeEmitInfo* info)
1235 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1236 , _receiver(receiver)
1237 , _method(method)
1238 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1239 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1241 LIR_Opr receiver() const { return _receiver; }
1242 ciMethod* method() const { return _method; }
1244 // JSR 292 support.
1245 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1246 bool is_method_handle_invoke() const {
1247 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1248 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1249 }
1251 intptr_t vtable_offset() const {
1252 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1253 return (intptr_t) addr();
1254 }
1256 virtual void emit_code(LIR_Assembler* masm);
1257 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1258 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1259 };
1261 // --------------------------------------------------
1262 // LIR_OpLabel
1263 // --------------------------------------------------
1264 // Location where a branch can continue
1265 class LIR_OpLabel: public LIR_Op {
1266 friend class LIR_OpVisitState;
1268 private:
1269 Label* _label;
1270 public:
1271 LIR_OpLabel(Label* lbl)
1272 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1273 , _label(lbl) {}
1274 Label* label() const { return _label; }
1276 virtual void emit_code(LIR_Assembler* masm);
1277 virtual LIR_OpLabel* as_OpLabel() { return this; }
1278 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1279 };
1281 // LIR_OpArrayCopy
1282 class LIR_OpArrayCopy: public LIR_Op {
1283 friend class LIR_OpVisitState;
1285 private:
1286 ArrayCopyStub* _stub;
1287 LIR_Opr _src;
1288 LIR_Opr _src_pos;
1289 LIR_Opr _dst;
1290 LIR_Opr _dst_pos;
1291 LIR_Opr _length;
1292 LIR_Opr _tmp;
1293 ciArrayKlass* _expected_type;
1294 int _flags;
1296 public:
1297 enum Flags {
1298 src_null_check = 1 << 0,
1299 dst_null_check = 1 << 1,
1300 src_pos_positive_check = 1 << 2,
1301 dst_pos_positive_check = 1 << 3,
1302 length_positive_check = 1 << 4,
1303 src_range_check = 1 << 5,
1304 dst_range_check = 1 << 6,
1305 type_check = 1 << 7,
1306 overlapping = 1 << 8,
1307 unaligned = 1 << 9,
1308 src_objarray = 1 << 10,
1309 dst_objarray = 1 << 11,
1310 all_flags = (1 << 12) - 1
1311 };
1313 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1314 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1316 LIR_Opr src() const { return _src; }
1317 LIR_Opr src_pos() const { return _src_pos; }
1318 LIR_Opr dst() const { return _dst; }
1319 LIR_Opr dst_pos() const { return _dst_pos; }
1320 LIR_Opr length() const { return _length; }
1321 LIR_Opr tmp() const { return _tmp; }
1322 int flags() const { return _flags; }
1323 ciArrayKlass* expected_type() const { return _expected_type; }
1324 ArrayCopyStub* stub() const { return _stub; }
1326 virtual void emit_code(LIR_Assembler* masm);
1327 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1328 void print_instr(outputStream* out) const PRODUCT_RETURN;
1329 };
1331 // LIR_OpUpdateCRC32
1332 class LIR_OpUpdateCRC32: public LIR_Op {
1333 friend class LIR_OpVisitState;
1335 private:
1336 LIR_Opr _crc;
1337 LIR_Opr _val;
1339 public:
1341 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1343 LIR_Opr crc() const { return _crc; }
1344 LIR_Opr val() const { return _val; }
1346 virtual void emit_code(LIR_Assembler* masm);
1347 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1348 void print_instr(outputStream* out) const PRODUCT_RETURN;
1349 };
1351 // --------------------------------------------------
1352 // LIR_Op0
1353 // --------------------------------------------------
1354 class LIR_Op0: public LIR_Op {
1355 friend class LIR_OpVisitState;
1357 public:
1358 LIR_Op0(LIR_Code code)
1359 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1360 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1361 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1363 virtual void emit_code(LIR_Assembler* masm);
1364 virtual LIR_Op0* as_Op0() { return this; }
1365 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1366 };
1369 // --------------------------------------------------
1370 // LIR_Op1
1371 // --------------------------------------------------
1373 class LIR_Op1: public LIR_Op {
1374 friend class LIR_OpVisitState;
1376 protected:
1377 LIR_Opr _opr; // input operand
1378 BasicType _type; // Operand types
1379 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1381 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1383 void set_kind(LIR_MoveKind kind) {
1384 assert(code() == lir_move, "must be");
1385 _flags = kind;
1386 }
1388 public:
1389 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1390 : LIR_Op(code, result, info)
1391 , _opr(opr)
1392 , _patch(patch)
1393 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1395 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1396 : LIR_Op(code, result, info)
1397 , _opr(opr)
1398 , _patch(patch)
1399 , _type(type) {
1400 assert(code == lir_move, "must be");
1401 set_kind(kind);
1402 }
1404 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1405 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1406 , _opr(opr)
1407 , _patch(lir_patch_none)
1408 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1410 LIR_Opr in_opr() const { return _opr; }
1411 LIR_PatchCode patch_code() const { return _patch; }
1412 BasicType type() const { return _type; }
1414 LIR_MoveKind move_kind() const {
1415 assert(code() == lir_move, "must be");
1416 return (LIR_MoveKind)_flags;
1417 }
1419 virtual bool is_patching() { return _patch != lir_patch_none; }
1420 virtual void emit_code(LIR_Assembler* masm);
1421 virtual LIR_Op1* as_Op1() { return this; }
1422 virtual const char * name() const PRODUCT_RETURN0;
1424 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1426 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1427 virtual void verify() const;
1428 };
1431 // for runtime calls
1432 class LIR_OpRTCall: public LIR_OpCall {
1433 friend class LIR_OpVisitState;
1435 private:
1436 LIR_Opr _tmp;
1437 public:
1438 LIR_OpRTCall(address addr, LIR_Opr tmp,
1439 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1440 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1441 , _tmp(tmp) {}
1443 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1444 virtual void emit_code(LIR_Assembler* masm);
1445 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1447 LIR_Opr tmp() const { return _tmp; }
1449 virtual void verify() const;
1450 };
1453 #ifndef MIPS
1454 class LIR_OpBranch: public LIR_Op {
1455 friend class LIR_OpVisitState;
1457 private:
1458 LIR_Condition _cond;
1459 BasicType _type;
1460 Label* _label;
1461 BlockBegin* _block; // if this is a branch to a block, this is the block
1462 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1463 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1465 public:
1466 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1467 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1468 , _cond(cond)
1469 , _type(type)
1470 , _label(lbl)
1471 , _block(NULL)
1472 , _ublock(NULL)
1473 , _stub(NULL) { }
1475 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1476 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1478 // for unordered comparisons
1479 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1481 LIR_Condition cond() const { return _cond; }
1482 BasicType type() const { return _type; }
1483 Label* label() const { return _label; }
1484 BlockBegin* block() const { return _block; }
1485 BlockBegin* ublock() const { return _ublock; }
1486 CodeStub* stub() const { return _stub; }
1488 void change_block(BlockBegin* b);
1489 void change_ublock(BlockBegin* b);
1490 void negate_cond();
1492 virtual void emit_code(LIR_Assembler* masm);
1493 virtual LIR_OpBranch* as_OpBranch() { return this; }
1494 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1495 };
1496 #endif
1499 class ConversionStub;
1501 class LIR_OpConvert: public LIR_Op1 {
1502 friend class LIR_OpVisitState;
1504 private:
1505 Bytecodes::Code _bytecode;
1506 ConversionStub* _stub;
1507 #ifdef PPC
1508 LIR_Opr _tmp1;
1509 LIR_Opr _tmp2;
1510 #endif
1512 public:
1513 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1514 : LIR_Op1(lir_convert, opr, result)
1515 , _stub(stub)
1516 #ifdef PPC
1517 , _tmp1(LIR_OprDesc::illegalOpr())
1518 , _tmp2(LIR_OprDesc::illegalOpr())
1519 #endif
1520 , _bytecode(code) {}
1522 #ifdef PPC
1523 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1524 ,LIR_Opr tmp1, LIR_Opr tmp2)
1525 : LIR_Op1(lir_convert, opr, result)
1526 , _stub(stub)
1527 , _tmp1(tmp1)
1528 , _tmp2(tmp2)
1529 , _bytecode(code) {}
1530 #endif
1532 Bytecodes::Code bytecode() const { return _bytecode; }
1533 ConversionStub* stub() const { return _stub; }
1534 #ifdef PPC
1535 LIR_Opr tmp1() const { return _tmp1; }
1536 LIR_Opr tmp2() const { return _tmp2; }
1537 #endif
1539 virtual void emit_code(LIR_Assembler* masm);
1540 virtual LIR_OpConvert* as_OpConvert() { return this; }
1541 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1543 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1544 };
1547 #ifndef MIPS
1548 // LIR_OpAllocObj
1549 class LIR_OpAllocObj : public LIR_Op1 {
1550 friend class LIR_OpVisitState;
1552 private:
1553 LIR_Opr _tmp1;
1554 LIR_Opr _tmp2;
1555 LIR_Opr _tmp3;
1556 LIR_Opr _tmp4;
1557 int _hdr_size;
1558 int _obj_size;
1559 CodeStub* _stub;
1560 bool _init_check;
1562 public:
1563 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1564 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1565 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1566 : LIR_Op1(lir_alloc_object, klass, result)
1567 , _tmp1(t1)
1568 , _tmp2(t2)
1569 , _tmp3(t3)
1570 , _tmp4(t4)
1571 , _hdr_size(hdr_size)
1572 , _obj_size(obj_size)
1573 , _init_check(init_check)
1574 , _stub(stub) { }
1576 LIR_Opr klass() const { return in_opr(); }
1577 LIR_Opr obj() const { return result_opr(); }
1578 LIR_Opr tmp1() const { return _tmp1; }
1579 LIR_Opr tmp2() const { return _tmp2; }
1580 LIR_Opr tmp3() const { return _tmp3; }
1581 LIR_Opr tmp4() const { return _tmp4; }
1582 int header_size() const { return _hdr_size; }
1583 int object_size() const { return _obj_size; }
1584 bool init_check() const { return _init_check; }
1585 CodeStub* stub() const { return _stub; }
1587 virtual void emit_code(LIR_Assembler* masm);
1588 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1589 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1590 };
1591 #else
1592 class LIR_OpAllocObj : public LIR_Op1 {
1593 friend class LIR_OpVisitState;
1595 private:
1596 LIR_Opr _tmp1;
1597 LIR_Opr _tmp2;
1598 LIR_Opr _tmp3;
1599 LIR_Opr _tmp4;
1600 LIR_Opr _tmp5;
1601 LIR_Opr _tmp6;
1602 int _hdr_size;
1603 int _obj_size;
1604 CodeStub* _stub;
1605 bool _init_check;
1607 public:
1608 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1609 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,LIR_Opr t5, LIR_Opr t6,
1610 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1611 : LIR_Op1(lir_alloc_object, klass, result)
1612 , _tmp1(t1)
1613 , _tmp2(t2)
1614 , _tmp3(t3)
1615 , _tmp4(t4)
1616 , _tmp5(t5)
1617 , _tmp6(t6)
1618 , _hdr_size(hdr_size)
1619 , _obj_size(obj_size)
1620 , _init_check(init_check)
1621 , _stub(stub) { }
1623 LIR_Opr klass() const { return in_opr(); }
1624 LIR_Opr obj() const { return result_opr(); }
1625 LIR_Opr tmp1() const { return _tmp1; }
1626 LIR_Opr tmp2() const { return _tmp2; }
1627 LIR_Opr tmp3() const { return _tmp3; }
1628 LIR_Opr tmp4() const { return _tmp4; }
1629 LIR_Opr tmp5() const { return _tmp5; }
1630 LIR_Opr tmp6() const { return _tmp6; }
1631 int header_size() const { return _hdr_size; }
1632 int object_size() const { return _obj_size; }
1633 bool init_check() const { return _init_check; }
1634 CodeStub* stub() const { return _stub; }
1636 virtual void emit_code(LIR_Assembler* masm);
1637 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1638 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1639 };
1640 #endif
1643 // LIR_OpRoundFP
1644 class LIR_OpRoundFP : public LIR_Op1 {
1645 friend class LIR_OpVisitState;
1647 private:
1648 LIR_Opr _tmp;
1650 public:
1651 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1652 : LIR_Op1(lir_roundfp, reg, result)
1653 , _tmp(stack_loc_temp) {}
1655 LIR_Opr tmp() const { return _tmp; }
1656 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1657 void print_instr(outputStream* out) const PRODUCT_RETURN;
1658 };
1660 // LIR_OpTypeCheck
1661 class LIR_OpTypeCheck: public LIR_Op {
1662 friend class LIR_OpVisitState;
1664 private:
1665 LIR_Opr _object;
1666 LIR_Opr _array;
1667 ciKlass* _klass;
1668 LIR_Opr _tmp1;
1669 LIR_Opr _tmp2;
1670 LIR_Opr _tmp3;
1671 bool _fast_check;
1672 CodeEmitInfo* _info_for_patch;
1673 CodeEmitInfo* _info_for_exception;
1674 CodeStub* _stub;
1675 ciMethod* _profiled_method;
1676 int _profiled_bci;
1677 bool _should_profile;
1679 public:
1680 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1681 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1682 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1683 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1684 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1686 LIR_Opr object() const { return _object; }
1687 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1688 LIR_Opr tmp1() const { return _tmp1; }
1689 LIR_Opr tmp2() const { return _tmp2; }
1690 LIR_Opr tmp3() const { return _tmp3; }
1691 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1692 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1693 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1694 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1695 CodeStub* stub() const { return _stub; }
1697 // MethodData* profiling
1698 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1699 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1700 void set_should_profile(bool b) { _should_profile = b; }
1701 ciMethod* profiled_method() const { return _profiled_method; }
1702 int profiled_bci() const { return _profiled_bci; }
1703 bool should_profile() const { return _should_profile; }
1705 virtual bool is_patching() { return _info_for_patch != NULL; }
1706 virtual void emit_code(LIR_Assembler* masm);
1707 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1708 void print_instr(outputStream* out) const PRODUCT_RETURN;
1709 };
1711 #ifndef MIPS
1712 // LIR_Op2
1713 class LIR_Op2: public LIR_Op {
1714 friend class LIR_OpVisitState;
1716 int _fpu_stack_size; // for sin/cos implementation on Intel
1718 protected:
1719 LIR_Opr _opr1;
1720 LIR_Opr _opr2;
1721 BasicType _type;
1722 LIR_Opr _tmp1;
1723 LIR_Opr _tmp2;
1724 LIR_Opr _tmp3;
1725 LIR_Opr _tmp4;
1726 LIR_Opr _tmp5;
1727 LIR_Condition _condition;
1729 void verify() const;
1731 public:
1732 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1733 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1734 , _opr1(opr1)
1735 , _opr2(opr2)
1736 , _type(T_ILLEGAL)
1737 , _condition(condition)
1738 , _fpu_stack_size(0)
1739 , _tmp1(LIR_OprFact::illegalOpr)
1740 , _tmp2(LIR_OprFact::illegalOpr)
1741 , _tmp3(LIR_OprFact::illegalOpr)
1742 , _tmp4(LIR_OprFact::illegalOpr)
1743 , _tmp5(LIR_OprFact::illegalOpr) {
1744 assert(code == lir_cmp || code == lir_assert, "code check");
1745 }
1747 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1748 : LIR_Op(code, result, NULL)
1749 , _opr1(opr1)
1750 , _opr2(opr2)
1751 , _type(type)
1752 , _condition(condition)
1753 , _fpu_stack_size(0)
1754 , _tmp1(LIR_OprFact::illegalOpr)
1755 , _tmp2(LIR_OprFact::illegalOpr)
1756 , _tmp3(LIR_OprFact::illegalOpr)
1757 , _tmp4(LIR_OprFact::illegalOpr)
1758 , _tmp5(LIR_OprFact::illegalOpr) {
1759 assert(code == lir_cmove, "code check");
1760 assert(type != T_ILLEGAL, "cmove should have type");
1761 }
1763 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1764 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1765 : LIR_Op(code, result, info)
1766 , _opr1(opr1)
1767 , _opr2(opr2)
1768 , _type(type)
1769 , _condition(lir_cond_unknown)
1770 , _fpu_stack_size(0)
1771 , _tmp1(LIR_OprFact::illegalOpr)
1772 , _tmp2(LIR_OprFact::illegalOpr)
1773 , _tmp3(LIR_OprFact::illegalOpr)
1774 , _tmp4(LIR_OprFact::illegalOpr)
1775 , _tmp5(LIR_OprFact::illegalOpr) {
1776 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1777 }
1779 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1780 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1781 : LIR_Op(code, result, NULL)
1782 , _opr1(opr1)
1783 , _opr2(opr2)
1784 , _type(T_ILLEGAL)
1785 , _condition(lir_cond_unknown)
1786 , _fpu_stack_size(0)
1787 , _tmp1(tmp1)
1788 , _tmp2(tmp2)
1789 , _tmp3(tmp3)
1790 , _tmp4(tmp4)
1791 , _tmp5(tmp5) {
1792 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1793 }
1795 LIR_Opr in_opr1() const { return _opr1; }
1796 LIR_Opr in_opr2() const { return _opr2; }
1797 BasicType type() const { return _type; }
1798 LIR_Opr tmp1_opr() const { return _tmp1; }
1799 LIR_Opr tmp2_opr() const { return _tmp2; }
1800 LIR_Opr tmp3_opr() const { return _tmp3; }
1801 LIR_Opr tmp4_opr() const { return _tmp4; }
1802 LIR_Opr tmp5_opr() const { return _tmp5; }
1803 LIR_Condition condition() const {
1804 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1805 }
1806 void set_condition(LIR_Condition condition) {
1807 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1808 }
1810 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1811 int fpu_stack_size() const { return _fpu_stack_size; }
1813 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1814 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1816 virtual void emit_code(LIR_Assembler* masm);
1817 virtual LIR_Op2* as_Op2() { return this; }
1818 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1819 };
1820 #else
1821 class LIR_Op2: public LIR_Op {
1822 //friend class LIR_Optimizer;
1823 friend class LIR_OpVisitState;
1824 protected:
1825 LIR_Opr _opr1;
1826 LIR_Opr _opr2;
1827 BasicType _type;
1828 LIR_Opr _tmp1;
1829 LIR_Opr _tmp2;
1830 LIR_Opr _tmp3;
1831 LIR_Opr _tmp4;
1832 LIR_Opr _tmp5;
1834 virtual void verify() const;
1835 public:
1836 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
1837 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1838 : LIR_Op(code, LIR_OprFact::illegalOpr, info),
1839 _opr1(opr1), _opr2(opr2),
1840 _type(type),
1841 _tmp1(LIR_OprFact::illegalOpr),
1842 _tmp2(LIR_OprFact::illegalOpr),
1843 _tmp3(LIR_OprFact::illegalOpr),
1844 _tmp4(LIR_OprFact::illegalOpr),
1845 _tmp5(LIR_OprFact::illegalOpr) {
1846 }
1848 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1849 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1850 : LIR_Op(code, result, info),
1851 _opr1(opr1), _opr2(opr2),
1852 _type(type),
1853 _tmp1(LIR_OprFact::illegalOpr),
1854 _tmp2(LIR_OprFact::illegalOpr),
1855 _tmp3(LIR_OprFact::illegalOpr),
1856 _tmp4(LIR_OprFact::illegalOpr),
1857 _tmp5(LIR_OprFact::illegalOpr) {
1859 assert(is_in_range(code, begin_op2, end_op2), "code check");
1860 }
1863 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1864 : LIR_Op(code, result, NULL),
1865 _opr1(opr1), _opr2(opr2),
1866 _type(T_ILLEGAL),
1867 _tmp1(tmp1),
1868 _tmp2(tmp2),
1869 _tmp3(tmp3),
1870 _tmp4(tmp4),
1871 _tmp5(tmp5) {
1872 assert(is_in_range(code, begin_op2, end_op2), "code check");
1873 }
1875 LIR_Opr in_opr1() const { return _opr1; }
1876 LIR_Opr in_opr2() const { return _opr2; }
1877 BasicType type() const { return _type; }
1878 LIR_Opr tmp1_opr() const { return _tmp1; }
1879 LIR_Opr tmp2_opr() const { return _tmp2; }
1880 LIR_Opr tmp3_opr() const { return _tmp3; }
1881 LIR_Opr tmp4_opr() const { return _tmp4; }
1882 LIR_Opr tmp5_opr() const { return _tmp5; }
1885 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1886 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1887 // where is the defination of LIR_AbstractAssembler?, 12/21,2006, jerome
1888 //virtual void emit_code(LIR_AbstractAssembler* masm);
1889 virtual void emit_code(LIR_Assembler* masm);
1890 virtual LIR_Op2* as_Op2() { return this; }
1892 // virtual void print_instr() const PRODUCT_RETURN;
1893 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1894 };
1897 class LIR_OpBranch: public LIR_Op2 {
1898 friend class LIR_OpVisitState;
1899 public:
1901 private:
1902 LIR_Condition _cond;
1903 BasicType _type;
1904 Label* _label;
1905 BlockBegin* _block; // if this is a branch to a block, this is the block
1906 BlockBegin* _ublock; // if this is a float branch , this is the unorder block
1907 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1909 public:
1910 // these are temporary constructors until we start using the conditional register
1911 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl)
1912 : LIR_Op2(lir_branch, left, right, LIR_OprFact::illegalOpr, (CodeEmitInfo*)(NULL)),
1913 _cond(cond), _label(lbl), _block(NULL), _ublock(NULL),_stub(NULL)
1914 {
1915 }
1917 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block);
1919 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub);
1921 //LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1923 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
1924 BlockBegin *block,BlockBegin *ublock);
1926 LIR_Condition cond() const { return _cond; }
1927 BasicType type() const { return _type; }
1928 LIR_Opr left() const { return in_opr1(); }
1929 LIR_Opr right() const { return in_opr2(); }
1930 Label* label() const { return _label; }
1931 BlockBegin* block() const { return _block; }
1932 BlockBegin* ublock() const { return _ublock; }
1933 CodeStub* stub() const { return _stub; }
1936 void change_block(BlockBegin* b);
1937 void change_ublock(BlockBegin* b);
1938 void negate_cond();
1941 // 12/21,06,jerome
1942 //virtual void emit_code(LIR_AbstractAssembler* masm);
1943 virtual void emit_code(LIR_Assembler* masm);
1944 virtual LIR_OpBranch* as_OpBranch() { return this; }
1945 //virtual void print_instr() const PRODUCT_RETURN;
1946 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1948 };
1949 #endif
1951 #ifndef MIPS
1952 class LIR_OpAllocArray : public LIR_Op {
1953 friend class LIR_OpVisitState;
1955 private:
1956 LIR_Opr _klass;
1957 LIR_Opr _len;
1958 LIR_Opr _tmp1;
1959 LIR_Opr _tmp2;
1960 LIR_Opr _tmp3;
1961 LIR_Opr _tmp4;
1962 BasicType _type;
1963 CodeStub* _stub;
1965 public:
1966 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1967 : LIR_Op(lir_alloc_array, result, NULL)
1968 , _klass(klass)
1969 , _len(len)
1970 , _tmp1(t1)
1971 , _tmp2(t2)
1972 , _tmp3(t3)
1973 , _tmp4(t4)
1974 , _type(type)
1975 , _stub(stub) {}
1977 LIR_Opr klass() const { return _klass; }
1978 LIR_Opr len() const { return _len; }
1979 LIR_Opr obj() const { return result_opr(); }
1980 LIR_Opr tmp1() const { return _tmp1; }
1981 LIR_Opr tmp2() const { return _tmp2; }
1982 LIR_Opr tmp3() const { return _tmp3; }
1983 LIR_Opr tmp4() const { return _tmp4; }
1984 BasicType type() const { return _type; }
1985 CodeStub* stub() const { return _stub; }
1987 virtual void emit_code(LIR_Assembler* masm);
1988 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1989 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1990 };
1991 #else
1992 class LIR_OpAllocArray : public LIR_Op {
1993 friend class LIR_OpVisitState;
1995 private:
1996 LIR_Opr _klass;
1997 LIR_Opr _len;
1998 LIR_Opr _tmp1;
1999 LIR_Opr _tmp2;
2000 LIR_Opr _tmp3;
2001 LIR_Opr _tmp4;
2002 LIR_Opr _tmp5;
2003 BasicType _type;
2004 CodeStub* _stub;
2006 public:
2007 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, BasicType type, CodeStub* stub)
2008 : LIR_Op(lir_alloc_array, result, NULL)
2009 , _klass(klass)
2010 , _len(len)
2011 , _tmp1(t1)
2012 , _tmp2(t2)
2013 , _tmp3(t3)
2014 , _tmp4(t4)
2015 , _tmp5(t5)
2016 , _type(type)
2017 , _stub(stub) {}
2019 LIR_Opr klass() const { return _klass; }
2020 LIR_Opr len() const { return _len; }
2021 LIR_Opr obj() const { return result_opr(); }
2022 LIR_Opr tmp1() const { return _tmp1; }
2023 LIR_Opr tmp2() const { return _tmp2; }
2024 LIR_Opr tmp3() const { return _tmp3; }
2025 LIR_Opr tmp4() const { return _tmp4; }
2026 LIR_Opr tmp5() const { return _tmp5; }
2027 BasicType type() const { return _type; }
2028 CodeStub* stub() const { return _stub; }
2030 virtual void emit_code(LIR_Assembler* masm);
2031 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2032 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2033 };
2034 #endif
2037 class LIR_Op3: public LIR_Op {
2038 friend class LIR_OpVisitState;
2040 private:
2041 LIR_Opr _opr1;
2042 LIR_Opr _opr2;
2043 LIR_Opr _opr3;
2044 public:
2045 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
2046 : LIR_Op(code, result, info)
2047 , _opr1(opr1)
2048 , _opr2(opr2)
2049 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
2050 LIR_Opr in_opr1() const { return _opr1; }
2051 LIR_Opr in_opr2() const { return _opr2; }
2052 LIR_Opr in_opr3() const { return _opr3; }
2054 virtual void emit_code(LIR_Assembler* masm);
2055 virtual LIR_Op3* as_Op3() { return this; }
2056 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2057 };
2060 //--------------------------------
2061 class LabelObj: public CompilationResourceObj {
2062 private:
2063 Label _label;
2064 public:
2065 LabelObj() {}
2066 Label* label() { return &_label; }
2067 };
2070 class LIR_OpLock: public LIR_Op {
2071 friend class LIR_OpVisitState;
2073 private:
2074 LIR_Opr _hdr;
2075 LIR_Opr _obj;
2076 LIR_Opr _lock;
2077 LIR_Opr _scratch;
2078 CodeStub* _stub;
2079 public:
2080 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
2081 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
2082 , _hdr(hdr)
2083 , _obj(obj)
2084 , _lock(lock)
2085 , _scratch(scratch)
2086 , _stub(stub) {}
2088 LIR_Opr hdr_opr() const { return _hdr; }
2089 LIR_Opr obj_opr() const { return _obj; }
2090 LIR_Opr lock_opr() const { return _lock; }
2091 LIR_Opr scratch_opr() const { return _scratch; }
2092 CodeStub* stub() const { return _stub; }
2094 virtual void emit_code(LIR_Assembler* masm);
2095 virtual LIR_OpLock* as_OpLock() { return this; }
2096 void print_instr(outputStream* out) const PRODUCT_RETURN;
2097 };
2100 class LIR_OpDelay: public LIR_Op {
2101 friend class LIR_OpVisitState;
2103 private:
2104 LIR_Op* _op;
2106 public:
2107 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
2108 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
2109 _op(op) {
2110 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
2111 }
2112 virtual void emit_code(LIR_Assembler* masm);
2113 virtual LIR_OpDelay* as_OpDelay() { return this; }
2114 void print_instr(outputStream* out) const PRODUCT_RETURN;
2115 LIR_Op* delay_op() const { return _op; }
2116 CodeEmitInfo* call_info() const { return info(); }
2117 };
2119 #ifdef ASSERT
2120 // LIR_OpAssert
2121 class LIR_OpAssert : public LIR_Op2 {
2122 friend class LIR_OpVisitState;
2124 private:
2125 const char* _msg;
2126 bool _halt;
2128 public:
2129 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
2130 : LIR_Op2(lir_assert, condition, opr1, opr2)
2131 , _halt(halt)
2132 , _msg(msg) {
2133 }
2135 const char* msg() const { return _msg; }
2136 bool halt() const { return _halt; }
2138 virtual void emit_code(LIR_Assembler* masm);
2139 virtual LIR_OpAssert* as_OpAssert() { return this; }
2140 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2141 };
2142 #endif
2144 // LIR_OpCompareAndSwap
2145 class LIR_OpCompareAndSwap : public LIR_Op {
2146 friend class LIR_OpVisitState;
2148 private:
2149 LIR_Opr _addr;
2150 LIR_Opr _cmp_value;
2151 LIR_Opr _new_value;
2152 LIR_Opr _tmp1;
2153 LIR_Opr _tmp2;
2155 public:
2156 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2157 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
2158 : LIR_Op(code, result, NULL) // no result, no info
2159 , _addr(addr)
2160 , _cmp_value(cmp_value)
2161 , _new_value(new_value)
2162 , _tmp1(t1)
2163 , _tmp2(t2) { }
2165 LIR_Opr addr() const { return _addr; }
2166 LIR_Opr cmp_value() const { return _cmp_value; }
2167 LIR_Opr new_value() const { return _new_value; }
2168 LIR_Opr tmp1() const { return _tmp1; }
2169 LIR_Opr tmp2() const { return _tmp2; }
2171 virtual void emit_code(LIR_Assembler* masm);
2172 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
2173 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2174 };
2176 // LIR_OpProfileCall
2177 class LIR_OpProfileCall : public LIR_Op {
2178 friend class LIR_OpVisitState;
2180 private:
2181 ciMethod* _profiled_method;
2182 int _profiled_bci;
2183 ciMethod* _profiled_callee;
2184 LIR_Opr _mdo;
2185 LIR_Opr _recv;
2186 LIR_Opr _tmp1;
2187 ciKlass* _known_holder;
2189 public:
2190 // Destroys recv
2191 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
2192 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
2193 , _profiled_method(profiled_method)
2194 , _profiled_bci(profiled_bci)
2195 , _profiled_callee(profiled_callee)
2196 , _mdo(mdo)
2197 , _recv(recv)
2198 , _tmp1(t1)
2199 , _known_holder(known_holder) { }
2201 ciMethod* profiled_method() const { return _profiled_method; }
2202 int profiled_bci() const { return _profiled_bci; }
2203 ciMethod* profiled_callee() const { return _profiled_callee; }
2204 LIR_Opr mdo() const { return _mdo; }
2205 LIR_Opr recv() const { return _recv; }
2206 LIR_Opr tmp1() const { return _tmp1; }
2207 ciKlass* known_holder() const { return _known_holder; }
2209 virtual void emit_code(LIR_Assembler* masm);
2210 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
2211 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2212 };
2214 // LIR_OpProfileType
2215 class LIR_OpProfileType : public LIR_Op {
2216 friend class LIR_OpVisitState;
2218 private:
2219 LIR_Opr _mdp;
2220 LIR_Opr _obj;
2221 LIR_Opr _tmp;
2222 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
2223 intptr_t _current_klass; // what the profiling currently reports
2224 bool _not_null; // true if we know statically that _obj cannot be null
2225 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
2226 // _exact_klass it the only possible type for this parameter in any context.
2228 public:
2229 // Destroys recv
2230 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
2231 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
2232 , _mdp(mdp)
2233 , _obj(obj)
2234 , _exact_klass(exact_klass)
2235 , _current_klass(current_klass)
2236 , _tmp(tmp)
2237 , _not_null(not_null)
2238 , _no_conflict(no_conflict) { }
2240 LIR_Opr mdp() const { return _mdp; }
2241 LIR_Opr obj() const { return _obj; }
2242 LIR_Opr tmp() const { return _tmp; }
2243 ciKlass* exact_klass() const { return _exact_klass; }
2244 intptr_t current_klass() const { return _current_klass; }
2245 bool not_null() const { return _not_null; }
2246 bool no_conflict() const { return _no_conflict; }
2248 virtual void emit_code(LIR_Assembler* masm);
2249 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
2250 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2251 };
2253 class LIR_InsertionBuffer;
2255 //--------------------------------LIR_List---------------------------------------------------
2256 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2257 // The LIR instructions are appended by the LIR_List class itself;
2258 //
2259 // Notes:
2260 // - all offsets are(should be) in bytes
2261 // - local positions are specified with an offset, with offset 0 being local 0
2263 class LIR_List: public CompilationResourceObj {
2264 private:
2265 LIR_OpList _operations;
2267 Compilation* _compilation;
2268 #ifndef PRODUCT
2269 BlockBegin* _block;
2270 #endif
2271 #ifdef ASSERT
2272 const char * _file;
2273 int _line;
2274 #endif
2276 void append(LIR_Op* op) {
2277 if (op->source() == NULL)
2278 op->set_source(_compilation->current_instruction());
2279 #ifndef PRODUCT
2280 if (PrintIRWithLIR) {
2281 _compilation->maybe_print_current_instruction();
2282 op->print(); tty->cr();
2283 }
2284 #endif // PRODUCT
2286 _operations.append(op);
2288 #ifdef ASSERT
2289 op->verify();
2290 op->set_file_and_line(_file, _line);
2291 _file = NULL;
2292 _line = 0;
2293 #endif
2294 }
2296 public:
2297 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2299 #ifdef ASSERT
2300 void set_file_and_line(const char * file, int line);
2301 #endif
2303 //---------- accessors ---------------
2304 LIR_OpList* instructions_list() { return &_operations; }
2305 int length() const { return _operations.length(); }
2306 LIR_Op* at(int i) const { return _operations.at(i); }
2308 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2310 // insert LIR_Ops in buffer to right places in LIR_List
2311 void append(LIR_InsertionBuffer* buffer);
2313 //---------- mutators ---------------
2314 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2315 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2316 void remove_at(int i) { _operations.remove_at(i); }
2318 //---------- printing -------------
2319 void print_instructions() PRODUCT_RETURN;
2322 //---------- instructions -------------
2323 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2324 address dest, LIR_OprList* arguments,
2325 CodeEmitInfo* info) {
2326 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2327 }
2328 void call_static(ciMethod* method, LIR_Opr result,
2329 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2330 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2331 }
2332 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2333 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2334 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2335 }
2336 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2337 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2338 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2339 }
2340 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2341 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2342 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2343 }
2345 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
2346 void word_align() { append(new LIR_Op0(lir_word_align)); }
2347 void membar() { append(new LIR_Op0(lir_membar)); }
2348 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
2349 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
2350 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
2351 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
2352 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
2353 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2355 void nop() { append(new LIR_Op0(lir_nop)); }
2356 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2358 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
2359 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2361 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2363 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
2364 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
2366 // result is a stack location for old backend and vreg for UseLinearScan
2367 // stack_loc_temp is an illegal register for old backend
2368 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2369 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2370 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2371 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2372 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2373 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2374 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2375 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2376 if (UseCompressedOops) {
2377 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2378 } else {
2379 move(src, dst, info);
2380 }
2381 }
2382 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2383 if (UseCompressedOops) {
2384 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2385 } else {
2386 move(src, dst, info);
2387 }
2388 }
2389 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2391 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2392 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2394 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2395 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2397 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2399 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2401 #ifdef PPC
2402 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2403 #endif
2404 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2406 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
2407 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
2408 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2410 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2411 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2413 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
2414 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2415 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2416 }
2417 void unwind_exception(LIR_Opr exceptionOop) {
2418 append(new LIR_Op1(lir_unwind, exceptionOop));
2419 }
2421 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2422 append(new LIR_Op2(lir_compare_to, left, right, dst));
2423 }
2425 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2426 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2428 #ifndef MIPS
2429 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2430 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2431 }
2432 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2433 cmp(condition, left, LIR_OprFact::intConst(right), info);
2434 }
2436 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2437 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2439 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2440 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2441 }
2443 #else
2444 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right,
2445 CodeEmitInfo* info = NULL) {
2446 append(new LIR_Op2(lir_null_check_for_branch, condition, left, right, info));
2447 }
2449 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, int right,
2450 CodeEmitInfo* info = NULL) {
2451 append(new LIR_Op2(lir_null_check_for_branch, condition, left, LIR_OprFact::intConst(right), info));
2452 }
2454 void null_check_for_branch(LIR_Condition condition, LIR_Opr base, int disp, int c,
2455 CodeEmitInfo* info) {
2456 append(new LIR_Op2(lir_null_check_for_branch, condition,
2457 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
2458 LIR_OprFact::intConst(c),
2459 info, T_INT));
2460 }
2462 void null_check_branch(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr,
2463 CodeEmitInfo* info) {
2464 append(new LIR_Op2(lir_null_check_for_branch, condition,
2465 reg,
2466 LIR_OprFact::address(addr),
2467 info));
2468 }
2470 #endif
2471 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2472 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2473 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2474 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2475 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2476 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2478 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2479 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2480 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2481 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2482 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2483 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2484 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2485 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); }
2486 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); }
2488 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2489 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2490 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2491 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2492 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2493 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2494 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2496 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2497 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2499 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2501 void prefetch(LIR_Address* addr, bool is_store);
2503 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2504 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2505 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2506 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2507 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2509 #ifdef MIPS
2510 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL);
2511 #endif
2513 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2514 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2515 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2516 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2518 #ifndef MIPS
2519 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2520 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2521 #else
2522 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6,int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2523 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, LIR_Opr t5,BasicType type, LIR_Opr klass, CodeStub* stub);
2524 #endif
2526 // jump is an unconditional branch
2527 void jump(BlockBegin* block) {
2528 #ifndef MIPS
2529 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2530 #else
2531 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr,LIR_OprFact::illegalOpr,T_ILLEGAL, block));
2532 #endif
2533 }
2534 void jump(CodeStub* stub) {
2535 #ifndef MIPS
2536 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2537 #else
2538 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr,T_ILLEGAL, stub));
2539 #endif
2540 }
2541 #ifndef MIPS
2542 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2543 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2544 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2545 append(new LIR_OpBranch(cond, type, block));
2546 }
2547 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
2548 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2549 append(new LIR_OpBranch(cond, type, stub));
2550 }
2551 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2552 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2553 append(new LIR_OpBranch(cond, type, block, unordered));
2554 }
2555 #else
2556 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) {
2557 append(new LIR_OpBranch(cond, left, right, lbl));
2558 }
2560 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block) {
2561 append(new LIR_OpBranch(cond, left, right, type, block));
2562 }
2564 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub) {
2565 append(new LIR_OpBranch(cond, left, right, type, stub));
2566 }
2568 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
2569 BlockBegin* block, BlockBegin* unordered) {
2570 append(new LIR_OpBranch(cond, left, right, type, block, unordered));
2571 }
2573 #endif
2575 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2576 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2577 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2579 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2580 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2581 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2583 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2584 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2586 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2587 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2588 }
2590 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2591 LIR_OprList* arguments, CodeEmitInfo* info) {
2592 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2593 }
2595 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2596 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2597 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2599 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
2600 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
2601 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2603 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2605 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2607 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
2609 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2610 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2612 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2613 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2614 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2615 ciMethod* profiled_method, int profiled_bci);
2616 // MethodData* profiling
2617 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2618 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2619 }
2620 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2621 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2622 }
2624 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2625 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2626 #ifdef ASSERT
2627 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2628 #endif
2629 };
2631 void print_LIR(BlockList* blocks);
2633 class LIR_InsertionBuffer : public CompilationResourceObj {
2634 private:
2635 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2637 // list of insertion points. index and count are stored alternately:
2638 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2639 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2640 intStack _index_and_count;
2642 // the LIR_Ops to be inserted
2643 LIR_OpList _ops;
2645 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2646 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2647 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2649 #ifdef ASSERT
2650 void verify();
2651 #endif
2652 public:
2653 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2655 // must be called before using the insertion buffer
2656 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2657 bool initialized() const { return _lir != NULL; }
2658 // called automatically when the buffer is appended to the LIR_List
2659 void finish() { _lir = NULL; }
2661 // accessors
2662 LIR_List* lir_list() const { return _lir; }
2663 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2664 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2665 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2667 int number_of_ops() const { return _ops.length(); }
2668 LIR_Op* op_at(int i) const { return _ops.at(i); }
2670 // append an instruction to the buffer
2671 void append(int index, LIR_Op* op);
2673 // instruction
2674 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2675 };
2678 //
2679 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2680 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2681 // information about the input, output and temporaries used by the
2682 // op to be recorded. It also records whether the op has call semantics
2683 // and also records all the CodeEmitInfos used by this op.
2684 //
2687 class LIR_OpVisitState: public StackObj {
2688 public:
2689 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2691 enum {
2692 maxNumberOfOperands = 20,
2693 maxNumberOfInfos = 4
2694 };
2696 private:
2697 LIR_Op* _op;
2699 // optimization: the operands and infos are not stored in a variable-length
2700 // list, but in a fixed-size array to save time of size checks and resizing
2701 int _oprs_len[numModes];
2702 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2703 int _info_len;
2704 CodeEmitInfo* _info_new[maxNumberOfInfos];
2706 bool _has_call;
2707 bool _has_slow_case;
2710 // only include register operands
2711 // addresses are decomposed to the base and index registers
2712 // constants and stack operands are ignored
2713 void append(LIR_Opr& opr, OprMode mode) {
2714 assert(opr->is_valid(), "should not call this otherwise");
2715 assert(mode >= 0 && mode < numModes, "bad mode");
2717 if (opr->is_register()) {
2718 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2719 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2721 } else if (opr->is_pointer()) {
2722 LIR_Address* address = opr->as_address_ptr();
2723 if (address != NULL) {
2724 // special handling for addresses: add base and index register of the address
2725 // both are always input operands or temp if we want to extend
2726 // their liveness!
2727 if (mode == outputMode) {
2728 mode = inputMode;
2729 }
2730 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2731 if (address->_base->is_valid()) {
2732 assert(address->_base->is_register(), "must be");
2733 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2734 _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2735 }
2736 if (address->_index->is_valid()) {
2737 assert(address->_index->is_register(), "must be");
2738 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2739 _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2740 }
2742 } else {
2743 assert(opr->is_constant(), "constant operands are not processed");
2744 }
2745 } else {
2746 assert(opr->is_stack(), "stack operands are not processed");
2747 }
2748 }
2750 void append(CodeEmitInfo* info) {
2751 assert(info != NULL, "should not call this otherwise");
2752 assert(_info_len < maxNumberOfInfos, "array overflow");
2753 _info_new[_info_len++] = info;
2754 }
2756 public:
2757 LIR_OpVisitState() { reset(); }
2759 LIR_Op* op() const { return _op; }
2760 void set_op(LIR_Op* op) { reset(); _op = op; }
2762 bool has_call() const { return _has_call; }
2763 bool has_slow_case() const { return _has_slow_case; }
2765 void reset() {
2766 _op = NULL;
2767 _has_call = false;
2768 _has_slow_case = false;
2770 _oprs_len[inputMode] = 0;
2771 _oprs_len[tempMode] = 0;
2772 _oprs_len[outputMode] = 0;
2773 _info_len = 0;
2774 }
2777 int opr_count(OprMode mode) const {
2778 assert(mode >= 0 && mode < numModes, "bad mode");
2779 return _oprs_len[mode];
2780 }
2782 LIR_Opr opr_at(OprMode mode, int index) const {
2783 assert(mode >= 0 && mode < numModes, "bad mode");
2784 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2785 return *_oprs_new[mode][index];
2786 }
2788 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2789 assert(mode >= 0 && mode < numModes, "bad mode");
2790 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2791 *_oprs_new[mode][index] = opr;
2792 }
2794 int info_count() const {
2795 return _info_len;
2796 }
2798 CodeEmitInfo* info_at(int index) const {
2799 assert(index < _info_len, "index out of bounds");
2800 return _info_new[index];
2801 }
2803 XHandlers* all_xhandler();
2805 // collects all register operands of the instruction
2806 void visit(LIR_Op* op);
2808 #ifdef ASSERT
2809 // check that an operation has no operands
2810 bool no_operands(LIR_Op* op);
2811 #endif
2813 // LIR_Op visitor functions use these to fill in the state
2814 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2815 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2816 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2817 void do_info(CodeEmitInfo* info) { append(info); }
2819 void do_stub(CodeStub* stub);
2820 void do_call() { _has_call = true; }
2821 void do_slow_case() { _has_slow_case = true; }
2822 void do_slow_case(CodeEmitInfo* info) {
2823 _has_slow_case = true;
2824 append(info);
2825 }
2826 };
2829 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2831 #endif // SHARE_VM_C1_C1_LIR_HPP
