Mon, 20 Aug 2012 09:58:58 -0700
7190310: Inlining WeakReference.get(), and hoisting $referent may lead to non-terminating loops
Summary: In C2 add software membar after load from Reference.referent field to prevent commoning of loads across safepoint since GC can change its value. In C1 always generate Reference.get() intrinsic.
Reviewed-by: roland, twisti, dholmes, johnc
1 /*
2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "assembler_x86.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolderOop.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_x86.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
44 #define __ masm->
46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
48 class RegisterSaver {
49 enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ };
50 // Capture info about frame layout
51 enum layout {
52 fpu_state_off = 0,
53 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1,
54 st0_off, st0H_off,
55 st1_off, st1H_off,
56 st2_off, st2H_off,
57 st3_off, st3H_off,
58 st4_off, st4H_off,
59 st5_off, st5H_off,
60 st6_off, st6H_off,
61 st7_off, st7H_off,
63 xmm0_off, xmm0H_off,
64 xmm1_off, xmm1H_off,
65 xmm2_off, xmm2H_off,
66 xmm3_off, xmm3H_off,
67 xmm4_off, xmm4H_off,
68 xmm5_off, xmm5H_off,
69 xmm6_off, xmm6H_off,
70 xmm7_off, xmm7H_off,
71 flags_off,
72 rdi_off,
73 rsi_off,
74 ignore_off, // extra copy of rbp,
75 rsp_off,
76 rbx_off,
77 rdx_off,
78 rcx_off,
79 rax_off,
80 // The frame sender code expects that rbp will be in the "natural" place and
81 // will override any oopMap setting for it. We must therefore force the layout
82 // so that it agrees with the frame sender code.
83 rbp_off,
84 return_off, // slot for return address
85 reg_save_size };
88 public:
90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
91 int* total_frame_words, bool verify_fpu = true);
92 static void restore_live_registers(MacroAssembler* masm);
94 static int rax_offset() { return rax_off; }
95 static int rbx_offset() { return rbx_off; }
97 // Offsets into the register save area
98 // Used by deoptimization when it is managing result register
99 // values on its own
101 static int raxOffset(void) { return rax_off; }
102 static int rdxOffset(void) { return rdx_off; }
103 static int rbxOffset(void) { return rbx_off; }
104 static int xmm0Offset(void) { return xmm0_off; }
105 // This really returns a slot in the fp save area, which one is not important
106 static int fpResultOffset(void) { return st0_off; }
108 // During deoptimization only the result register need to be restored
109 // all the other values have already been extracted.
111 static void restore_result_registers(MacroAssembler* masm);
113 };
115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
116 int* total_frame_words, bool verify_fpu) {
118 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
119 int frame_words = frame_size_in_bytes / wordSize;
120 *total_frame_words = frame_words;
122 assert(FPUStateSizeInWords == 27, "update stack layout");
124 // save registers, fpu state, and flags
125 // We assume caller has already has return address slot on the stack
126 // We push epb twice in this sequence because we want the real rbp,
127 // to be under the return like a normal enter and we want to use pusha
128 // We push by hand instead of pusing push
129 __ enter();
130 __ pusha();
131 __ pushf();
132 __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space
133 __ push_FPU_state(); // Save FPU state & init
135 if (verify_fpu) {
136 // Some stubs may have non standard FPU control word settings so
137 // only check and reset the value when it required to be the
138 // standard value. The safepoint blob in particular can be used
139 // in methods which are using the 24 bit control word for
140 // optimized float math.
142 #ifdef ASSERT
143 // Make sure the control word has the expected value
144 Label ok;
145 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
146 __ jccb(Assembler::equal, ok);
147 __ stop("corrupted control word detected");
148 __ bind(ok);
149 #endif
151 // Reset the control word to guard against exceptions being unmasked
152 // since fstp_d can cause FPU stack underflow exceptions. Write it
153 // into the on stack copy and then reload that to make sure that the
154 // current and future values are correct.
155 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
156 }
158 __ frstor(Address(rsp, 0));
159 if (!verify_fpu) {
160 // Set the control word so that exceptions are masked for the
161 // following code.
162 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
163 }
165 // Save the FPU registers in de-opt-able form
167 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0)
168 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1)
169 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2)
170 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3)
171 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4)
172 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5)
173 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6)
174 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7)
176 if( UseSSE == 1 ) { // Save the XMM state
177 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0);
178 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1);
179 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2);
180 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3);
181 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4);
182 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5);
183 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6);
184 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7);
185 } else if( UseSSE >= 2 ) {
186 __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0);
187 __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1);
188 __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2);
189 __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3);
190 __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4);
191 __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5);
192 __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6);
193 __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7);
194 }
196 // Set an oopmap for the call site. This oopmap will map all
197 // oop-registers and debug-info registers as callee-saved. This
198 // will allow deoptimization at this safepoint to find all possible
199 // debug-info recordings, as well as let GC find all oops.
201 OopMapSet *oop_maps = new OopMapSet();
202 OopMap* map = new OopMap( frame_words, 0 );
204 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
206 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg());
207 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg());
208 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg());
209 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg());
210 // rbp, location is known implicitly, no oopMap
211 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg());
212 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg());
213 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg());
214 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg());
215 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg());
216 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg());
217 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg());
218 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg());
219 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg());
220 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg());
221 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg());
222 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg());
223 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg());
224 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg());
225 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg());
226 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg());
227 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg());
228 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg());
229 // %%% This is really a waste but we'll keep things as they were for now
230 if (true) {
231 #define NEXTREG(x) (x)->as_VMReg()->next()
232 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0)));
233 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1)));
234 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2)));
235 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3)));
236 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4)));
237 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5)));
238 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6)));
239 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7)));
240 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0));
241 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1));
242 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2));
243 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3));
244 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4));
245 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5));
246 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6));
247 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7));
248 #undef NEXTREG
249 #undef STACK_OFFSET
250 }
252 return map;
254 }
256 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
258 // Recover XMM & FPU state
259 if( UseSSE == 1 ) {
260 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize));
261 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize));
262 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize));
263 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize));
264 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize));
265 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize));
266 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize));
267 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize));
268 } else if( UseSSE >= 2 ) {
269 __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize));
270 __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize));
271 __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize));
272 __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize));
273 __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize));
274 __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize));
275 __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize));
276 __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize));
277 }
278 __ pop_FPU_state();
279 __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers
281 __ popf();
282 __ popa();
283 // Get the rbp, described implicitly by the frame sender code (no oopMap)
284 __ pop(rbp);
286 }
288 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
290 // Just restore result register. Only used by deoptimization. By
291 // now any callee save register that needs to be restore to a c2
292 // caller of the deoptee has been extracted into the vframeArray
293 // and will be stuffed into the c2i adapter we create for later
294 // restoration so only result registers need to be restored here.
295 //
297 __ frstor(Address(rsp, 0)); // Restore fpu state
299 // Recover XMM & FPU state
300 if( UseSSE == 1 ) {
301 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
302 } else if( UseSSE >= 2 ) {
303 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
304 }
305 __ movptr(rax, Address(rsp, rax_off*wordSize));
306 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
307 // Pop all of the register save are off the stack except the return address
308 __ addptr(rsp, return_off * wordSize);
309 }
311 // The java_calling_convention describes stack locations as ideal slots on
312 // a frame with no abi restrictions. Since we must observe abi restrictions
313 // (like the placement of the register window) the slots must be biased by
314 // the following value.
315 static int reg2offset_in(VMReg r) {
316 // Account for saved rbp, and return address
317 // This should really be in_preserve_stack_slots
318 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
319 }
321 static int reg2offset_out(VMReg r) {
322 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
323 }
325 // ---------------------------------------------------------------------------
326 // Read the array of BasicTypes from a signature, and compute where the
327 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
328 // quantities. Values less than SharedInfo::stack0 are registers, those above
329 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
330 // as framesizes are fixed.
331 // VMRegImpl::stack0 refers to the first slot 0(sp).
332 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
333 // up to RegisterImpl::number_of_registers) are the 32-bit
334 // integer registers.
336 // Pass first two oop/int args in registers ECX and EDX.
337 // Pass first two float/double args in registers XMM0 and XMM1.
338 // Doubles have precedence, so if you pass a mix of floats and doubles
339 // the doubles will grab the registers before the floats will.
341 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
342 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
343 // units regardless of build. Of course for i486 there is no 64 bit build
346 // ---------------------------------------------------------------------------
347 // The compiled Java calling convention.
348 // Pass first two oop/int args in registers ECX and EDX.
349 // Pass first two float/double args in registers XMM0 and XMM1.
350 // Doubles have precedence, so if you pass a mix of floats and doubles
351 // the doubles will grab the registers before the floats will.
352 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
353 VMRegPair *regs,
354 int total_args_passed,
355 int is_outgoing) {
356 uint stack = 0; // Starting stack position for args on stack
359 // Pass first two oop/int args in registers ECX and EDX.
360 uint reg_arg0 = 9999;
361 uint reg_arg1 = 9999;
363 // Pass first two float/double args in registers XMM0 and XMM1.
364 // Doubles have precedence, so if you pass a mix of floats and doubles
365 // the doubles will grab the registers before the floats will.
366 // CNC - TURNED OFF FOR non-SSE.
367 // On Intel we have to round all doubles (and most floats) at
368 // call sites by storing to the stack in any case.
369 // UseSSE=0 ==> Don't Use ==> 9999+0
370 // UseSSE=1 ==> Floats only ==> 9999+1
371 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
372 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
373 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
374 uint freg_arg0 = 9999+fargs;
375 uint freg_arg1 = 9999+fargs;
377 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
378 int i;
379 for( i = 0; i < total_args_passed; i++) {
380 if( sig_bt[i] == T_DOUBLE ) {
381 // first 2 doubles go in registers
382 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
383 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
384 else // Else double is passed low on the stack to be aligned.
385 stack += 2;
386 } else if( sig_bt[i] == T_LONG ) {
387 stack += 2;
388 }
389 }
390 int dstack = 0; // Separate counter for placing doubles
392 // Now pick where all else goes.
393 for( i = 0; i < total_args_passed; i++) {
394 // From the type and the argument number (count) compute the location
395 switch( sig_bt[i] ) {
396 case T_SHORT:
397 case T_CHAR:
398 case T_BYTE:
399 case T_BOOLEAN:
400 case T_INT:
401 case T_ARRAY:
402 case T_OBJECT:
403 case T_ADDRESS:
404 if( reg_arg0 == 9999 ) {
405 reg_arg0 = i;
406 regs[i].set1(rcx->as_VMReg());
407 } else if( reg_arg1 == 9999 ) {
408 reg_arg1 = i;
409 regs[i].set1(rdx->as_VMReg());
410 } else {
411 regs[i].set1(VMRegImpl::stack2reg(stack++));
412 }
413 break;
414 case T_FLOAT:
415 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
416 freg_arg0 = i;
417 regs[i].set1(xmm0->as_VMReg());
418 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
419 freg_arg1 = i;
420 regs[i].set1(xmm1->as_VMReg());
421 } else {
422 regs[i].set1(VMRegImpl::stack2reg(stack++));
423 }
424 break;
425 case T_LONG:
426 assert(sig_bt[i+1] == T_VOID, "missing Half" );
427 regs[i].set2(VMRegImpl::stack2reg(dstack));
428 dstack += 2;
429 break;
430 case T_DOUBLE:
431 assert(sig_bt[i+1] == T_VOID, "missing Half" );
432 if( freg_arg0 == (uint)i ) {
433 regs[i].set2(xmm0->as_VMReg());
434 } else if( freg_arg1 == (uint)i ) {
435 regs[i].set2(xmm1->as_VMReg());
436 } else {
437 regs[i].set2(VMRegImpl::stack2reg(dstack));
438 dstack += 2;
439 }
440 break;
441 case T_VOID: regs[i].set_bad(); break;
442 break;
443 default:
444 ShouldNotReachHere();
445 break;
446 }
447 }
449 // return value can be odd number of VMRegImpl stack slots make multiple of 2
450 return round_to(stack, 2);
451 }
453 // Patch the callers callsite with entry to compiled code if it exists.
454 static void patch_callers_callsite(MacroAssembler *masm) {
455 Label L;
456 __ verify_oop(rbx);
457 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
458 __ jcc(Assembler::equal, L);
459 // Schedule the branch target address early.
460 // Call into the VM to patch the caller, then jump to compiled callee
461 // rax, isn't live so capture return address while we easily can
462 __ movptr(rax, Address(rsp, 0));
463 __ pusha();
464 __ pushf();
466 if (UseSSE == 1) {
467 __ subptr(rsp, 2*wordSize);
468 __ movflt(Address(rsp, 0), xmm0);
469 __ movflt(Address(rsp, wordSize), xmm1);
470 }
471 if (UseSSE >= 2) {
472 __ subptr(rsp, 4*wordSize);
473 __ movdbl(Address(rsp, 0), xmm0);
474 __ movdbl(Address(rsp, 2*wordSize), xmm1);
475 }
476 #ifdef COMPILER2
477 // C2 may leave the stack dirty if not in SSE2+ mode
478 if (UseSSE >= 2) {
479 __ verify_FPU(0, "c2i transition should have clean FPU stack");
480 } else {
481 __ empty_FPU_stack();
482 }
483 #endif /* COMPILER2 */
485 // VM needs caller's callsite
486 __ push(rax);
487 // VM needs target method
488 __ push(rbx);
489 __ verify_oop(rbx);
490 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
491 __ addptr(rsp, 2*wordSize);
493 if (UseSSE == 1) {
494 __ movflt(xmm0, Address(rsp, 0));
495 __ movflt(xmm1, Address(rsp, wordSize));
496 __ addptr(rsp, 2*wordSize);
497 }
498 if (UseSSE >= 2) {
499 __ movdbl(xmm0, Address(rsp, 0));
500 __ movdbl(xmm1, Address(rsp, 2*wordSize));
501 __ addptr(rsp, 4*wordSize);
502 }
504 __ popf();
505 __ popa();
506 __ bind(L);
507 }
510 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
511 int next_off = st_off - Interpreter::stackElementSize;
512 __ movdbl(Address(rsp, next_off), r);
513 }
515 static void gen_c2i_adapter(MacroAssembler *masm,
516 int total_args_passed,
517 int comp_args_on_stack,
518 const BasicType *sig_bt,
519 const VMRegPair *regs,
520 Label& skip_fixup) {
521 // Before we get into the guts of the C2I adapter, see if we should be here
522 // at all. We've come from compiled code and are attempting to jump to the
523 // interpreter, which means the caller made a static call to get here
524 // (vcalls always get a compiled target if there is one). Check for a
525 // compiled target. If there is one, we need to patch the caller's call.
526 patch_callers_callsite(masm);
528 __ bind(skip_fixup);
530 #ifdef COMPILER2
531 // C2 may leave the stack dirty if not in SSE2+ mode
532 if (UseSSE >= 2) {
533 __ verify_FPU(0, "c2i transition should have clean FPU stack");
534 } else {
535 __ empty_FPU_stack();
536 }
537 #endif /* COMPILER2 */
539 // Since all args are passed on the stack, total_args_passed * interpreter_
540 // stack_element_size is the
541 // space we need.
542 int extraspace = total_args_passed * Interpreter::stackElementSize;
544 // Get return address
545 __ pop(rax);
547 // set senderSP value
548 __ movptr(rsi, rsp);
550 __ subptr(rsp, extraspace);
552 // Now write the args into the outgoing interpreter space
553 for (int i = 0; i < total_args_passed; i++) {
554 if (sig_bt[i] == T_VOID) {
555 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
556 continue;
557 }
559 // st_off points to lowest address on stack.
560 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
561 int next_off = st_off - Interpreter::stackElementSize;
563 // Say 4 args:
564 // i st_off
565 // 0 12 T_LONG
566 // 1 8 T_VOID
567 // 2 4 T_OBJECT
568 // 3 0 T_BOOL
569 VMReg r_1 = regs[i].first();
570 VMReg r_2 = regs[i].second();
571 if (!r_1->is_valid()) {
572 assert(!r_2->is_valid(), "");
573 continue;
574 }
576 if (r_1->is_stack()) {
577 // memory to memory use fpu stack top
578 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
580 if (!r_2->is_valid()) {
581 __ movl(rdi, Address(rsp, ld_off));
582 __ movptr(Address(rsp, st_off), rdi);
583 } else {
585 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
586 // st_off == MSW, st_off-wordSize == LSW
588 __ movptr(rdi, Address(rsp, ld_off));
589 __ movptr(Address(rsp, next_off), rdi);
590 #ifndef _LP64
591 __ movptr(rdi, Address(rsp, ld_off + wordSize));
592 __ movptr(Address(rsp, st_off), rdi);
593 #else
594 #ifdef ASSERT
595 // Overwrite the unused slot with known junk
596 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
597 __ movptr(Address(rsp, st_off), rax);
598 #endif /* ASSERT */
599 #endif // _LP64
600 }
601 } else if (r_1->is_Register()) {
602 Register r = r_1->as_Register();
603 if (!r_2->is_valid()) {
604 __ movl(Address(rsp, st_off), r);
605 } else {
606 // long/double in gpr
607 NOT_LP64(ShouldNotReachHere());
608 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
609 // T_DOUBLE and T_LONG use two slots in the interpreter
610 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
611 // long/double in gpr
612 #ifdef ASSERT
613 // Overwrite the unused slot with known junk
614 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
615 __ movptr(Address(rsp, st_off), rax);
616 #endif /* ASSERT */
617 __ movptr(Address(rsp, next_off), r);
618 } else {
619 __ movptr(Address(rsp, st_off), r);
620 }
621 }
622 } else {
623 assert(r_1->is_XMMRegister(), "");
624 if (!r_2->is_valid()) {
625 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
626 } else {
627 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
628 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
629 }
630 }
631 }
633 // Schedule the branch target address early.
634 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
635 // And repush original return address
636 __ push(rax);
637 __ jmp(rcx);
638 }
641 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
642 int next_val_off = ld_off - Interpreter::stackElementSize;
643 __ movdbl(r, Address(saved_sp, next_val_off));
644 }
646 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
647 address code_start, address code_end,
648 Label& L_ok) {
649 Label L_fail;
650 __ lea(temp_reg, ExternalAddress(code_start));
651 __ cmpptr(pc_reg, temp_reg);
652 __ jcc(Assembler::belowEqual, L_fail);
653 __ lea(temp_reg, ExternalAddress(code_end));
654 __ cmpptr(pc_reg, temp_reg);
655 __ jcc(Assembler::below, L_ok);
656 __ bind(L_fail);
657 }
659 static void gen_i2c_adapter(MacroAssembler *masm,
660 int total_args_passed,
661 int comp_args_on_stack,
662 const BasicType *sig_bt,
663 const VMRegPair *regs) {
665 // Note: rsi contains the senderSP on entry. We must preserve it since
666 // we may do a i2c -> c2i transition if we lose a race where compiled
667 // code goes non-entrant while we get args ready.
669 // Adapters can be frameless because they do not require the caller
670 // to perform additional cleanup work, such as correcting the stack pointer.
671 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
672 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
673 // even if a callee has modified the stack pointer.
674 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
675 // routinely repairs its caller's stack pointer (from sender_sp, which is set
676 // up via the senderSP register).
677 // In other words, if *either* the caller or callee is interpreted, we can
678 // get the stack pointer repaired after a call.
679 // This is why c2i and i2c adapters cannot be indefinitely composed.
680 // In particular, if a c2i adapter were to somehow call an i2c adapter,
681 // both caller and callee would be compiled methods, and neither would
682 // clean up the stack pointer changes performed by the two adapters.
683 // If this happens, control eventually transfers back to the compiled
684 // caller, but with an uncorrected stack, causing delayed havoc.
686 // Pick up the return address
687 __ movptr(rax, Address(rsp, 0));
689 if (VerifyAdapterCalls &&
690 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
691 // So, let's test for cascading c2i/i2c adapters right now.
692 // assert(Interpreter::contains($return_addr) ||
693 // StubRoutines::contains($return_addr),
694 // "i2c adapter must return to an interpreter frame");
695 __ block_comment("verify_i2c { ");
696 Label L_ok;
697 if (Interpreter::code() != NULL)
698 range_check(masm, rax, rdi,
699 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
700 L_ok);
701 if (StubRoutines::code1() != NULL)
702 range_check(masm, rax, rdi,
703 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
704 L_ok);
705 if (StubRoutines::code2() != NULL)
706 range_check(masm, rax, rdi,
707 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
708 L_ok);
709 const char* msg = "i2c adapter must return to an interpreter frame";
710 __ block_comment(msg);
711 __ stop(msg);
712 __ bind(L_ok);
713 __ block_comment("} verify_i2ce ");
714 }
716 // Must preserve original SP for loading incoming arguments because
717 // we need to align the outgoing SP for compiled code.
718 __ movptr(rdi, rsp);
720 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
721 // in registers, we will occasionally have no stack args.
722 int comp_words_on_stack = 0;
723 if (comp_args_on_stack) {
724 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
725 // registers are below. By subtracting stack0, we either get a negative
726 // number (all values in registers) or the maximum stack slot accessed.
727 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
728 // Convert 4-byte stack slots to words.
729 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
730 // Round up to miminum stack alignment, in wordSize
731 comp_words_on_stack = round_to(comp_words_on_stack, 2);
732 __ subptr(rsp, comp_words_on_stack * wordSize);
733 }
735 // Align the outgoing SP
736 __ andptr(rsp, -(StackAlignmentInBytes));
738 // push the return address on the stack (note that pushing, rather
739 // than storing it, yields the correct frame alignment for the callee)
740 __ push(rax);
742 // Put saved SP in another register
743 const Register saved_sp = rax;
744 __ movptr(saved_sp, rdi);
747 // Will jump to the compiled code just as if compiled code was doing it.
748 // Pre-load the register-jump target early, to schedule it better.
749 __ movptr(rdi, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
751 // Now generate the shuffle code. Pick up all register args and move the
752 // rest through the floating point stack top.
753 for (int i = 0; i < total_args_passed; i++) {
754 if (sig_bt[i] == T_VOID) {
755 // Longs and doubles are passed in native word order, but misaligned
756 // in the 32-bit build.
757 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
758 continue;
759 }
761 // Pick up 0, 1 or 2 words from SP+offset.
763 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
764 "scrambled load targets?");
765 // Load in argument order going down.
766 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
767 // Point to interpreter value (vs. tag)
768 int next_off = ld_off - Interpreter::stackElementSize;
769 //
770 //
771 //
772 VMReg r_1 = regs[i].first();
773 VMReg r_2 = regs[i].second();
774 if (!r_1->is_valid()) {
775 assert(!r_2->is_valid(), "");
776 continue;
777 }
778 if (r_1->is_stack()) {
779 // Convert stack slot to an SP offset (+ wordSize to account for return address )
780 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
782 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
783 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
784 // we be generated.
785 if (!r_2->is_valid()) {
786 // __ fld_s(Address(saved_sp, ld_off));
787 // __ fstp_s(Address(rsp, st_off));
788 __ movl(rsi, Address(saved_sp, ld_off));
789 __ movptr(Address(rsp, st_off), rsi);
790 } else {
791 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
792 // are accessed as negative so LSW is at LOW address
794 // ld_off is MSW so get LSW
795 // st_off is LSW (i.e. reg.first())
796 // __ fld_d(Address(saved_sp, next_off));
797 // __ fstp_d(Address(rsp, st_off));
798 //
799 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
800 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
801 // So we must adjust where to pick up the data to match the interpreter.
802 //
803 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
804 // are accessed as negative so LSW is at LOW address
806 // ld_off is MSW so get LSW
807 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
808 next_off : ld_off;
809 __ movptr(rsi, Address(saved_sp, offset));
810 __ movptr(Address(rsp, st_off), rsi);
811 #ifndef _LP64
812 __ movptr(rsi, Address(saved_sp, ld_off));
813 __ movptr(Address(rsp, st_off + wordSize), rsi);
814 #endif // _LP64
815 }
816 } else if (r_1->is_Register()) { // Register argument
817 Register r = r_1->as_Register();
818 assert(r != rax, "must be different");
819 if (r_2->is_valid()) {
820 //
821 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
822 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
823 // So we must adjust where to pick up the data to match the interpreter.
825 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
826 next_off : ld_off;
828 // this can be a misaligned move
829 __ movptr(r, Address(saved_sp, offset));
830 #ifndef _LP64
831 assert(r_2->as_Register() != rax, "need another temporary register");
832 // Remember r_1 is low address (and LSB on x86)
833 // So r_2 gets loaded from high address regardless of the platform
834 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
835 #endif // _LP64
836 } else {
837 __ movl(r, Address(saved_sp, ld_off));
838 }
839 } else {
840 assert(r_1->is_XMMRegister(), "");
841 if (!r_2->is_valid()) {
842 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
843 } else {
844 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
845 }
846 }
847 }
849 // 6243940 We might end up in handle_wrong_method if
850 // the callee is deoptimized as we race thru here. If that
851 // happens we don't want to take a safepoint because the
852 // caller frame will look interpreted and arguments are now
853 // "compiled" so it is much better to make this transition
854 // invisible to the stack walking code. Unfortunately if
855 // we try and find the callee by normal means a safepoint
856 // is possible. So we stash the desired callee in the thread
857 // and the vm will find there should this case occur.
859 __ get_thread(rax);
860 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
862 // move methodOop to rax, in case we end up in an c2i adapter.
863 // the c2i adapters expect methodOop in rax, (c2) because c2's
864 // resolve stubs return the result (the method) in rax,.
865 // I'd love to fix this.
866 __ mov(rax, rbx);
868 __ jmp(rdi);
869 }
871 // ---------------------------------------------------------------
872 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
873 int total_args_passed,
874 int comp_args_on_stack,
875 const BasicType *sig_bt,
876 const VMRegPair *regs,
877 AdapterFingerPrint* fingerprint) {
878 address i2c_entry = __ pc();
880 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
882 // -------------------------------------------------------------------------
883 // Generate a C2I adapter. On entry we know rbx, holds the methodOop during calls
884 // to the interpreter. The args start out packed in the compiled layout. They
885 // need to be unpacked into the interpreter layout. This will almost always
886 // require some stack space. We grow the current (compiled) stack, then repack
887 // the args. We finally end in a jump to the generic interpreter entry point.
888 // On exit from the interpreter, the interpreter will restore our SP (lest the
889 // compiled code, which relys solely on SP and not EBP, get sick).
891 address c2i_unverified_entry = __ pc();
892 Label skip_fixup;
894 Register holder = rax;
895 Register receiver = rcx;
896 Register temp = rbx;
898 {
900 Label missed;
902 __ verify_oop(holder);
903 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
904 __ verify_oop(temp);
906 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
907 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
908 __ jcc(Assembler::notEqual, missed);
909 // Method might have been compiled since the call site was patched to
910 // interpreted if that is the case treat it as a miss so we can get
911 // the call site corrected.
912 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
913 __ jcc(Assembler::equal, skip_fixup);
915 __ bind(missed);
916 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
917 }
919 address c2i_entry = __ pc();
921 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
923 __ flush();
924 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
925 }
927 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
928 VMRegPair *regs,
929 int total_args_passed) {
930 // We return the amount of VMRegImpl stack slots we need to reserve for all
931 // the arguments NOT counting out_preserve_stack_slots.
933 uint stack = 0; // All arguments on stack
935 for( int i = 0; i < total_args_passed; i++) {
936 // From the type and the argument number (count) compute the location
937 switch( sig_bt[i] ) {
938 case T_BOOLEAN:
939 case T_CHAR:
940 case T_FLOAT:
941 case T_BYTE:
942 case T_SHORT:
943 case T_INT:
944 case T_OBJECT:
945 case T_ARRAY:
946 case T_ADDRESS:
947 regs[i].set1(VMRegImpl::stack2reg(stack++));
948 break;
949 case T_LONG:
950 case T_DOUBLE: // The stack numbering is reversed from Java
951 // Since C arguments do not get reversed, the ordering for
952 // doubles on the stack must be opposite the Java convention
953 assert(sig_bt[i+1] == T_VOID, "missing Half" );
954 regs[i].set2(VMRegImpl::stack2reg(stack));
955 stack += 2;
956 break;
957 case T_VOID: regs[i].set_bad(); break;
958 default:
959 ShouldNotReachHere();
960 break;
961 }
962 }
963 return stack;
964 }
966 // A simple move of integer like type
967 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
968 if (src.first()->is_stack()) {
969 if (dst.first()->is_stack()) {
970 // stack to stack
971 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
972 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
973 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
974 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
975 } else {
976 // stack to reg
977 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
978 }
979 } else if (dst.first()->is_stack()) {
980 // reg to stack
981 // no need to sign extend on 64bit
982 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
983 } else {
984 if (dst.first() != src.first()) {
985 __ mov(dst.first()->as_Register(), src.first()->as_Register());
986 }
987 }
988 }
990 // An oop arg. Must pass a handle not the oop itself
991 static void object_move(MacroAssembler* masm,
992 OopMap* map,
993 int oop_handle_offset,
994 int framesize_in_slots,
995 VMRegPair src,
996 VMRegPair dst,
997 bool is_receiver,
998 int* receiver_offset) {
1000 // Because of the calling conventions we know that src can be a
1001 // register or a stack location. dst can only be a stack location.
1003 assert(dst.first()->is_stack(), "must be stack");
1004 // must pass a handle. First figure out the location we use as a handle
1006 if (src.first()->is_stack()) {
1007 // Oop is already on the stack as an argument
1008 Register rHandle = rax;
1009 Label nil;
1010 __ xorptr(rHandle, rHandle);
1011 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1012 __ jcc(Assembler::equal, nil);
1013 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1014 __ bind(nil);
1015 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1017 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1018 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1019 if (is_receiver) {
1020 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1021 }
1022 } else {
1023 // Oop is in an a register we must store it to the space we reserve
1024 // on the stack for oop_handles
1025 const Register rOop = src.first()->as_Register();
1026 const Register rHandle = rax;
1027 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1028 int offset = oop_slot*VMRegImpl::stack_slot_size;
1029 Label skip;
1030 __ movptr(Address(rsp, offset), rOop);
1031 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1032 __ xorptr(rHandle, rHandle);
1033 __ cmpptr(rOop, (int32_t)NULL_WORD);
1034 __ jcc(Assembler::equal, skip);
1035 __ lea(rHandle, Address(rsp, offset));
1036 __ bind(skip);
1037 // Store the handle parameter
1038 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1039 if (is_receiver) {
1040 *receiver_offset = offset;
1041 }
1042 }
1043 }
1045 // A float arg may have to do float reg int reg conversion
1046 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1047 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1049 // Because of the calling convention we know that src is either a stack location
1050 // or an xmm register. dst can only be a stack location.
1052 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1054 if (src.first()->is_stack()) {
1055 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1056 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1057 } else {
1058 // reg to stack
1059 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1060 }
1061 }
1063 // A long move
1064 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1066 // The only legal possibility for a long_move VMRegPair is:
1067 // 1: two stack slots (possibly unaligned)
1068 // as neither the java or C calling convention will use registers
1069 // for longs.
1071 if (src.first()->is_stack() && dst.first()->is_stack()) {
1072 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1073 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1074 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1075 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1076 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1077 } else {
1078 ShouldNotReachHere();
1079 }
1080 }
1082 // A double move
1083 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1085 // The only legal possibilities for a double_move VMRegPair are:
1086 // The painful thing here is that like long_move a VMRegPair might be
1088 // Because of the calling convention we know that src is either
1089 // 1: a single physical register (xmm registers only)
1090 // 2: two stack slots (possibly unaligned)
1091 // dst can only be a pair of stack slots.
1093 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1095 if (src.first()->is_stack()) {
1096 // source is all stack
1097 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1098 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1099 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1100 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1101 } else {
1102 // reg to stack
1103 // No worries about stack alignment
1104 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1105 }
1106 }
1109 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1110 // We always ignore the frame_slots arg and just use the space just below frame pointer
1111 // which by this time is free to use
1112 switch (ret_type) {
1113 case T_FLOAT:
1114 __ fstp_s(Address(rbp, -wordSize));
1115 break;
1116 case T_DOUBLE:
1117 __ fstp_d(Address(rbp, -2*wordSize));
1118 break;
1119 case T_VOID: break;
1120 case T_LONG:
1121 __ movptr(Address(rbp, -wordSize), rax);
1122 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1123 break;
1124 default: {
1125 __ movptr(Address(rbp, -wordSize), rax);
1126 }
1127 }
1128 }
1130 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1131 // We always ignore the frame_slots arg and just use the space just below frame pointer
1132 // which by this time is free to use
1133 switch (ret_type) {
1134 case T_FLOAT:
1135 __ fld_s(Address(rbp, -wordSize));
1136 break;
1137 case T_DOUBLE:
1138 __ fld_d(Address(rbp, -2*wordSize));
1139 break;
1140 case T_LONG:
1141 __ movptr(rax, Address(rbp, -wordSize));
1142 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1143 break;
1144 case T_VOID: break;
1145 default: {
1146 __ movptr(rax, Address(rbp, -wordSize));
1147 }
1148 }
1149 }
1152 static void save_or_restore_arguments(MacroAssembler* masm,
1153 const int stack_slots,
1154 const int total_in_args,
1155 const int arg_save_area,
1156 OopMap* map,
1157 VMRegPair* in_regs,
1158 BasicType* in_sig_bt) {
1159 // if map is non-NULL then the code should store the values,
1160 // otherwise it should load them.
1161 int handle_index = 0;
1162 // Save down double word first
1163 for ( int i = 0; i < total_in_args; i++) {
1164 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1165 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1166 int offset = slot * VMRegImpl::stack_slot_size;
1167 handle_index += 2;
1168 assert(handle_index <= stack_slots, "overflow");
1169 if (map != NULL) {
1170 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1171 } else {
1172 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1173 }
1174 }
1175 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1176 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1177 int offset = slot * VMRegImpl::stack_slot_size;
1178 handle_index += 2;
1179 assert(handle_index <= stack_slots, "overflow");
1180 if (map != NULL) {
1181 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1182 if (in_regs[i].second()->is_Register()) {
1183 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1184 }
1185 } else {
1186 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1187 if (in_regs[i].second()->is_Register()) {
1188 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1189 }
1190 }
1191 }
1192 }
1193 // Save or restore single word registers
1194 for ( int i = 0; i < total_in_args; i++) {
1195 if (in_regs[i].first()->is_Register()) {
1196 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1197 int offset = slot * VMRegImpl::stack_slot_size;
1198 assert(handle_index <= stack_slots, "overflow");
1199 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1200 map->set_oop(VMRegImpl::stack2reg(slot));;
1201 }
1203 // Value is in an input register pass we must flush it to the stack
1204 const Register reg = in_regs[i].first()->as_Register();
1205 switch (in_sig_bt[i]) {
1206 case T_ARRAY:
1207 if (map != NULL) {
1208 __ movptr(Address(rsp, offset), reg);
1209 } else {
1210 __ movptr(reg, Address(rsp, offset));
1211 }
1212 break;
1213 case T_BOOLEAN:
1214 case T_CHAR:
1215 case T_BYTE:
1216 case T_SHORT:
1217 case T_INT:
1218 if (map != NULL) {
1219 __ movl(Address(rsp, offset), reg);
1220 } else {
1221 __ movl(reg, Address(rsp, offset));
1222 }
1223 break;
1224 case T_OBJECT:
1225 default: ShouldNotReachHere();
1226 }
1227 } else if (in_regs[i].first()->is_XMMRegister()) {
1228 if (in_sig_bt[i] == T_FLOAT) {
1229 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1230 int offset = slot * VMRegImpl::stack_slot_size;
1231 assert(handle_index <= stack_slots, "overflow");
1232 if (map != NULL) {
1233 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1234 } else {
1235 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1236 }
1237 }
1238 } else if (in_regs[i].first()->is_stack()) {
1239 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1240 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1241 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1242 }
1243 }
1244 }
1245 }
1247 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1248 // keeps a new JNI critical region from starting until a GC has been
1249 // forced. Save down any oops in registers and describe them in an
1250 // OopMap.
1251 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1252 Register thread,
1253 int stack_slots,
1254 int total_c_args,
1255 int total_in_args,
1256 int arg_save_area,
1257 OopMapSet* oop_maps,
1258 VMRegPair* in_regs,
1259 BasicType* in_sig_bt) {
1260 __ block_comment("check GC_locker::needs_gc");
1261 Label cont;
1262 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false);
1263 __ jcc(Assembler::equal, cont);
1265 // Save down any incoming oops and call into the runtime to halt for a GC
1267 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1269 save_or_restore_arguments(masm, stack_slots, total_in_args,
1270 arg_save_area, map, in_regs, in_sig_bt);
1272 address the_pc = __ pc();
1273 oop_maps->add_gc_map( __ offset(), map);
1274 __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1276 __ block_comment("block_for_jni_critical");
1277 __ push(thread);
1278 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1279 __ increment(rsp, wordSize);
1281 __ get_thread(thread);
1282 __ reset_last_Java_frame(thread, false, true);
1284 save_or_restore_arguments(masm, stack_slots, total_in_args,
1285 arg_save_area, NULL, in_regs, in_sig_bt);
1287 __ bind(cont);
1288 #ifdef ASSERT
1289 if (StressCriticalJNINatives) {
1290 // Stress register saving
1291 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1292 save_or_restore_arguments(masm, stack_slots, total_in_args,
1293 arg_save_area, map, in_regs, in_sig_bt);
1294 // Destroy argument registers
1295 for (int i = 0; i < total_in_args - 1; i++) {
1296 if (in_regs[i].first()->is_Register()) {
1297 const Register reg = in_regs[i].first()->as_Register();
1298 __ xorptr(reg, reg);
1299 } else if (in_regs[i].first()->is_XMMRegister()) {
1300 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1301 } else if (in_regs[i].first()->is_FloatRegister()) {
1302 ShouldNotReachHere();
1303 } else if (in_regs[i].first()->is_stack()) {
1304 // Nothing to do
1305 } else {
1306 ShouldNotReachHere();
1307 }
1308 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1309 i++;
1310 }
1311 }
1313 save_or_restore_arguments(masm, stack_slots, total_in_args,
1314 arg_save_area, NULL, in_regs, in_sig_bt);
1315 }
1316 #endif
1317 }
1319 // Unpack an array argument into a pointer to the body and the length
1320 // if the array is non-null, otherwise pass 0 for both.
1321 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1322 Register tmp_reg = rax;
1323 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1324 "possible collision");
1325 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1326 "possible collision");
1328 // Pass the length, ptr pair
1329 Label is_null, done;
1330 VMRegPair tmp(tmp_reg->as_VMReg());
1331 if (reg.first()->is_stack()) {
1332 // Load the arg up from the stack
1333 simple_move32(masm, reg, tmp);
1334 reg = tmp;
1335 }
1336 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1337 __ jccb(Assembler::equal, is_null);
1338 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1339 simple_move32(masm, tmp, body_arg);
1340 // load the length relative to the body.
1341 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1342 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1343 simple_move32(masm, tmp, length_arg);
1344 __ jmpb(done);
1345 __ bind(is_null);
1346 // Pass zeros
1347 __ xorptr(tmp_reg, tmp_reg);
1348 simple_move32(masm, tmp, body_arg);
1349 simple_move32(masm, tmp, length_arg);
1350 __ bind(done);
1351 }
1353 static void verify_oop_args(MacroAssembler* masm,
1354 int total_args_passed,
1355 const BasicType* sig_bt,
1356 const VMRegPair* regs) {
1357 Register temp_reg = rbx; // not part of any compiled calling seq
1358 if (VerifyOops) {
1359 for (int i = 0; i < total_args_passed; i++) {
1360 if (sig_bt[i] == T_OBJECT ||
1361 sig_bt[i] == T_ARRAY) {
1362 VMReg r = regs[i].first();
1363 assert(r->is_valid(), "bad oop arg");
1364 if (r->is_stack()) {
1365 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1366 __ verify_oop(temp_reg);
1367 } else {
1368 __ verify_oop(r->as_Register());
1369 }
1370 }
1371 }
1372 }
1373 }
1375 static void gen_special_dispatch(MacroAssembler* masm,
1376 int total_args_passed,
1377 int comp_args_on_stack,
1378 vmIntrinsics::ID special_dispatch,
1379 const BasicType* sig_bt,
1380 const VMRegPair* regs) {
1381 verify_oop_args(masm, total_args_passed, sig_bt, regs);
1383 // Now write the args into the outgoing interpreter space
1384 bool has_receiver = false;
1385 Register receiver_reg = noreg;
1386 int member_arg_pos = -1;
1387 Register member_reg = noreg;
1388 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(special_dispatch);
1389 if (ref_kind != 0) {
1390 member_arg_pos = total_args_passed - 1; // trailing MemberName argument
1391 member_reg = rbx; // known to be free at this point
1392 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1393 } else if (special_dispatch == vmIntrinsics::_invokeBasic) {
1394 has_receiver = true;
1395 } else {
1396 guarantee(false, err_msg("special_dispatch=%d", special_dispatch));
1397 }
1399 if (member_reg != noreg) {
1400 // Load the member_arg into register, if necessary.
1401 assert(member_arg_pos >= 0 && member_arg_pos < total_args_passed, "oob");
1402 assert(sig_bt[member_arg_pos] == T_OBJECT, "dispatch argument must be an object");
1403 VMReg r = regs[member_arg_pos].first();
1404 assert(r->is_valid(), "bad member arg");
1405 if (r->is_stack()) {
1406 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1407 } else {
1408 // no data motion is needed
1409 member_reg = r->as_Register();
1410 }
1411 }
1413 if (has_receiver) {
1414 // Make sure the receiver is loaded into a register.
1415 assert(total_args_passed > 0, "oob");
1416 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1417 VMReg r = regs[0].first();
1418 assert(r->is_valid(), "bad receiver arg");
1419 if (r->is_stack()) {
1420 // Porting note: This assumes that compiled calling conventions always
1421 // pass the receiver oop in a register. If this is not true on some
1422 // platform, pick a temp and load the receiver from stack.
1423 assert(false, "receiver always in a register");
1424 receiver_reg = rcx; // known to be free at this point
1425 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1426 } else {
1427 // no data motion is needed
1428 receiver_reg = r->as_Register();
1429 }
1430 }
1432 // Figure out which address we are really jumping to:
1433 MethodHandles::generate_method_handle_dispatch(masm, special_dispatch,
1434 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1435 }
1437 // ---------------------------------------------------------------------------
1438 // Generate a native wrapper for a given method. The method takes arguments
1439 // in the Java compiled code convention, marshals them to the native
1440 // convention (handlizes oops, etc), transitions to native, makes the call,
1441 // returns to java state (possibly blocking), unhandlizes any result and
1442 // returns.
1443 //
1444 // Critical native functions are a shorthand for the use of
1445 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1446 // functions. The wrapper is expected to unpack the arguments before
1447 // passing them to the callee and perform checks before and after the
1448 // native call to ensure that they GC_locker
1449 // lock_critical/unlock_critical semantics are followed. Some other
1450 // parts of JNI setup are skipped like the tear down of the JNI handle
1451 // block and the check for pending exceptions it's impossible for them
1452 // to be thrown.
1453 //
1454 // They are roughly structured like this:
1455 // if (GC_locker::needs_gc())
1456 // SharedRuntime::block_for_jni_critical();
1457 // tranistion to thread_in_native
1458 // unpack arrray arguments and call native entry point
1459 // check for safepoint in progress
1460 // check if any thread suspend flags are set
1461 // call into JVM and possible unlock the JNI critical
1462 // if a GC was suppressed while in the critical native.
1463 // transition back to thread_in_Java
1464 // return to caller
1465 //
1466 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1467 methodHandle method,
1468 int compile_id,
1469 int total_in_args,
1470 int comp_args_on_stack,
1471 BasicType* in_sig_bt,
1472 VMRegPair* in_regs,
1473 BasicType ret_type) {
1474 if (method->is_method_handle_intrinsic()) {
1475 vmIntrinsics::ID iid = method->intrinsic_id();
1476 intptr_t start = (intptr_t)__ pc();
1477 int vep_offset = ((intptr_t)__ pc()) - start;
1478 gen_special_dispatch(masm,
1479 total_in_args,
1480 comp_args_on_stack,
1481 method->intrinsic_id(),
1482 in_sig_bt,
1483 in_regs);
1484 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1485 __ flush();
1486 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1487 return nmethod::new_native_nmethod(method,
1488 compile_id,
1489 masm->code(),
1490 vep_offset,
1491 frame_complete,
1492 stack_slots / VMRegImpl::slots_per_word,
1493 in_ByteSize(-1),
1494 in_ByteSize(-1),
1495 (OopMapSet*)NULL);
1496 }
1497 bool is_critical_native = true;
1498 address native_func = method->critical_native_function();
1499 if (native_func == NULL) {
1500 native_func = method->native_function();
1501 is_critical_native = false;
1502 }
1503 assert(native_func != NULL, "must have function");
1505 // An OopMap for lock (and class if static)
1506 OopMapSet *oop_maps = new OopMapSet();
1508 // We have received a description of where all the java arg are located
1509 // on entry to the wrapper. We need to convert these args to where
1510 // the jni function will expect them. To figure out where they go
1511 // we convert the java signature to a C signature by inserting
1512 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1514 int total_c_args = total_in_args;
1515 if (!is_critical_native) {
1516 total_c_args += 1;
1517 if (method->is_static()) {
1518 total_c_args++;
1519 }
1520 } else {
1521 for (int i = 0; i < total_in_args; i++) {
1522 if (in_sig_bt[i] == T_ARRAY) {
1523 total_c_args++;
1524 }
1525 }
1526 }
1528 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1529 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1530 BasicType* in_elem_bt = NULL;
1532 int argc = 0;
1533 if (!is_critical_native) {
1534 out_sig_bt[argc++] = T_ADDRESS;
1535 if (method->is_static()) {
1536 out_sig_bt[argc++] = T_OBJECT;
1537 }
1539 for (int i = 0; i < total_in_args ; i++ ) {
1540 out_sig_bt[argc++] = in_sig_bt[i];
1541 }
1542 } else {
1543 Thread* THREAD = Thread::current();
1544 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1545 SignatureStream ss(method->signature());
1546 for (int i = 0; i < total_in_args ; i++ ) {
1547 if (in_sig_bt[i] == T_ARRAY) {
1548 // Arrays are passed as int, elem* pair
1549 out_sig_bt[argc++] = T_INT;
1550 out_sig_bt[argc++] = T_ADDRESS;
1551 Symbol* atype = ss.as_symbol(CHECK_NULL);
1552 const char* at = atype->as_C_string();
1553 if (strlen(at) == 2) {
1554 assert(at[0] == '[', "must be");
1555 switch (at[1]) {
1556 case 'B': in_elem_bt[i] = T_BYTE; break;
1557 case 'C': in_elem_bt[i] = T_CHAR; break;
1558 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1559 case 'F': in_elem_bt[i] = T_FLOAT; break;
1560 case 'I': in_elem_bt[i] = T_INT; break;
1561 case 'J': in_elem_bt[i] = T_LONG; break;
1562 case 'S': in_elem_bt[i] = T_SHORT; break;
1563 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1564 default: ShouldNotReachHere();
1565 }
1566 }
1567 } else {
1568 out_sig_bt[argc++] = in_sig_bt[i];
1569 in_elem_bt[i] = T_VOID;
1570 }
1571 if (in_sig_bt[i] != T_VOID) {
1572 assert(in_sig_bt[i] == ss.type(), "must match");
1573 ss.next();
1574 }
1575 }
1576 }
1578 // Now figure out where the args must be stored and how much stack space
1579 // they require.
1580 int out_arg_slots;
1581 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1583 // Compute framesize for the wrapper. We need to handlize all oops in
1584 // registers a max of 2 on x86.
1586 // Calculate the total number of stack slots we will need.
1588 // First count the abi requirement plus all of the outgoing args
1589 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1591 // Now the space for the inbound oop handle area
1592 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1593 if (is_critical_native) {
1594 // Critical natives may have to call out so they need a save area
1595 // for register arguments.
1596 int double_slots = 0;
1597 int single_slots = 0;
1598 for ( int i = 0; i < total_in_args; i++) {
1599 if (in_regs[i].first()->is_Register()) {
1600 const Register reg = in_regs[i].first()->as_Register();
1601 switch (in_sig_bt[i]) {
1602 case T_ARRAY: // critical array (uses 2 slots on LP64)
1603 case T_BOOLEAN:
1604 case T_BYTE:
1605 case T_SHORT:
1606 case T_CHAR:
1607 case T_INT: single_slots++; break;
1608 case T_LONG: double_slots++; break;
1609 default: ShouldNotReachHere();
1610 }
1611 } else if (in_regs[i].first()->is_XMMRegister()) {
1612 switch (in_sig_bt[i]) {
1613 case T_FLOAT: single_slots++; break;
1614 case T_DOUBLE: double_slots++; break;
1615 default: ShouldNotReachHere();
1616 }
1617 } else if (in_regs[i].first()->is_FloatRegister()) {
1618 ShouldNotReachHere();
1619 }
1620 }
1621 total_save_slots = double_slots * 2 + single_slots;
1622 // align the save area
1623 if (double_slots != 0) {
1624 stack_slots = round_to(stack_slots, 2);
1625 }
1626 }
1628 int oop_handle_offset = stack_slots;
1629 stack_slots += total_save_slots;
1631 // Now any space we need for handlizing a klass if static method
1633 int klass_slot_offset = 0;
1634 int klass_offset = -1;
1635 int lock_slot_offset = 0;
1636 bool is_static = false;
1638 if (method->is_static()) {
1639 klass_slot_offset = stack_slots;
1640 stack_slots += VMRegImpl::slots_per_word;
1641 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1642 is_static = true;
1643 }
1645 // Plus a lock if needed
1647 if (method->is_synchronized()) {
1648 lock_slot_offset = stack_slots;
1649 stack_slots += VMRegImpl::slots_per_word;
1650 }
1652 // Now a place (+2) to save return values or temp during shuffling
1653 // + 2 for return address (which we own) and saved rbp,
1654 stack_slots += 4;
1656 // Ok The space we have allocated will look like:
1657 //
1658 //
1659 // FP-> | |
1660 // |---------------------|
1661 // | 2 slots for moves |
1662 // |---------------------|
1663 // | lock box (if sync) |
1664 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1665 // | klass (if static) |
1666 // |---------------------| <- klass_slot_offset
1667 // | oopHandle area |
1668 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1669 // | outbound memory |
1670 // | based arguments |
1671 // | |
1672 // |---------------------|
1673 // | |
1674 // SP-> | out_preserved_slots |
1675 //
1676 //
1677 // ****************************************************************************
1678 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1679 // arguments off of the stack after the jni call. Before the call we can use
1680 // instructions that are SP relative. After the jni call we switch to FP
1681 // relative instructions instead of re-adjusting the stack on windows.
1682 // ****************************************************************************
1685 // Now compute actual number of stack words we need rounding to make
1686 // stack properly aligned.
1687 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1689 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1691 intptr_t start = (intptr_t)__ pc();
1693 // First thing make an ic check to see if we should even be here
1695 // We are free to use all registers as temps without saving them and
1696 // restoring them except rbp. rbp is the only callee save register
1697 // as far as the interpreter and the compiler(s) are concerned.
1700 const Register ic_reg = rax;
1701 const Register receiver = rcx;
1702 Label hit;
1703 Label exception_pending;
1705 __ verify_oop(receiver);
1706 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1707 __ jcc(Assembler::equal, hit);
1709 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1711 // verified entry must be aligned for code patching.
1712 // and the first 5 bytes must be in the same cache line
1713 // if we align at 8 then we will be sure 5 bytes are in the same line
1714 __ align(8);
1716 __ bind(hit);
1718 int vep_offset = ((intptr_t)__ pc()) - start;
1720 #ifdef COMPILER1
1721 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1722 // Object.hashCode can pull the hashCode from the header word
1723 // instead of doing a full VM transition once it's been computed.
1724 // Since hashCode is usually polymorphic at call sites we can't do
1725 // this optimization at the call site without a lot of work.
1726 Label slowCase;
1727 Register receiver = rcx;
1728 Register result = rax;
1729 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1731 // check if locked
1732 __ testptr(result, markOopDesc::unlocked_value);
1733 __ jcc (Assembler::zero, slowCase);
1735 if (UseBiasedLocking) {
1736 // Check if biased and fall through to runtime if so
1737 __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1738 __ jcc (Assembler::notZero, slowCase);
1739 }
1741 // get hash
1742 __ andptr(result, markOopDesc::hash_mask_in_place);
1743 // test if hashCode exists
1744 __ jcc (Assembler::zero, slowCase);
1745 __ shrptr(result, markOopDesc::hash_shift);
1746 __ ret(0);
1747 __ bind (slowCase);
1748 }
1749 #endif // COMPILER1
1751 // The instruction at the verified entry point must be 5 bytes or longer
1752 // because it can be patched on the fly by make_non_entrant. The stack bang
1753 // instruction fits that requirement.
1755 // Generate stack overflow check
1757 if (UseStackBanging) {
1758 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1759 } else {
1760 // need a 5 byte instruction to allow MT safe patching to non-entrant
1761 __ fat_nop();
1762 }
1764 // Generate a new frame for the wrapper.
1765 __ enter();
1766 // -2 because return address is already present and so is saved rbp
1767 __ subptr(rsp, stack_size - 2*wordSize);
1769 // Frame is now completed as far as size and linkage.
1770 int frame_complete = ((intptr_t)__ pc()) - start;
1772 // Calculate the difference between rsp and rbp,. We need to know it
1773 // after the native call because on windows Java Natives will pop
1774 // the arguments and it is painful to do rsp relative addressing
1775 // in a platform independent way. So after the call we switch to
1776 // rbp, relative addressing.
1778 int fp_adjustment = stack_size - 2*wordSize;
1780 #ifdef COMPILER2
1781 // C2 may leave the stack dirty if not in SSE2+ mode
1782 if (UseSSE >= 2) {
1783 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1784 } else {
1785 __ empty_FPU_stack();
1786 }
1787 #endif /* COMPILER2 */
1789 // Compute the rbp, offset for any slots used after the jni call
1791 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1793 // We use rdi as a thread pointer because it is callee save and
1794 // if we load it once it is usable thru the entire wrapper
1795 const Register thread = rdi;
1797 // We use rsi as the oop handle for the receiver/klass
1798 // It is callee save so it survives the call to native
1800 const Register oop_handle_reg = rsi;
1802 __ get_thread(thread);
1804 if (is_critical_native) {
1805 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1806 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1807 }
1809 //
1810 // We immediately shuffle the arguments so that any vm call we have to
1811 // make from here on out (sync slow path, jvmti, etc.) we will have
1812 // captured the oops from our caller and have a valid oopMap for
1813 // them.
1815 // -----------------
1816 // The Grand Shuffle
1817 //
1818 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1819 // and, if static, the class mirror instead of a receiver. This pretty much
1820 // guarantees that register layout will not match (and x86 doesn't use reg
1821 // parms though amd does). Since the native abi doesn't use register args
1822 // and the java conventions does we don't have to worry about collisions.
1823 // All of our moved are reg->stack or stack->stack.
1824 // We ignore the extra arguments during the shuffle and handle them at the
1825 // last moment. The shuffle is described by the two calling convention
1826 // vectors we have in our possession. We simply walk the java vector to
1827 // get the source locations and the c vector to get the destinations.
1829 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1831 // Record rsp-based slot for receiver on stack for non-static methods
1832 int receiver_offset = -1;
1834 // This is a trick. We double the stack slots so we can claim
1835 // the oops in the caller's frame. Since we are sure to have
1836 // more args than the caller doubling is enough to make
1837 // sure we can capture all the incoming oop args from the
1838 // caller.
1839 //
1840 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1842 // Mark location of rbp,
1843 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1845 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1846 // Are free to temporaries if we have to do stack to steck moves.
1847 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1849 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1850 switch (in_sig_bt[i]) {
1851 case T_ARRAY:
1852 if (is_critical_native) {
1853 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1854 c_arg++;
1855 break;
1856 }
1857 case T_OBJECT:
1858 assert(!is_critical_native, "no oop arguments");
1859 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1860 ((i == 0) && (!is_static)),
1861 &receiver_offset);
1862 break;
1863 case T_VOID:
1864 break;
1866 case T_FLOAT:
1867 float_move(masm, in_regs[i], out_regs[c_arg]);
1868 break;
1870 case T_DOUBLE:
1871 assert( i + 1 < total_in_args &&
1872 in_sig_bt[i + 1] == T_VOID &&
1873 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1874 double_move(masm, in_regs[i], out_regs[c_arg]);
1875 break;
1877 case T_LONG :
1878 long_move(masm, in_regs[i], out_regs[c_arg]);
1879 break;
1881 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1883 default:
1884 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1885 }
1886 }
1888 // Pre-load a static method's oop into rsi. Used both by locking code and
1889 // the normal JNI call code.
1890 if (method->is_static() && !is_critical_native) {
1892 // load opp into a register
1893 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1895 // Now handlize the static class mirror it's known not-null.
1896 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1897 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1899 // Now get the handle
1900 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1901 // store the klass handle as second argument
1902 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1903 }
1905 // Change state to native (we save the return address in the thread, since it might not
1906 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1907 // points into the right code segment. It does not have to be the correct return pc.
1908 // We use the same pc/oopMap repeatedly when we call out
1910 intptr_t the_pc = (intptr_t) __ pc();
1911 oop_maps->add_gc_map(the_pc - start, map);
1913 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1916 // We have all of the arguments setup at this point. We must not touch any register
1917 // argument registers at this point (what if we save/restore them there are no oop?
1919 {
1920 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1921 __ movoop(rax, JNIHandles::make_local(method()));
1922 __ call_VM_leaf(
1923 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1924 thread, rax);
1925 }
1927 // RedefineClasses() tracing support for obsolete method entry
1928 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1929 __ movoop(rax, JNIHandles::make_local(method()));
1930 __ call_VM_leaf(
1931 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1932 thread, rax);
1933 }
1935 // These are register definitions we need for locking/unlocking
1936 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1937 const Register obj_reg = rcx; // Will contain the oop
1938 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1940 Label slow_path_lock;
1941 Label lock_done;
1943 // Lock a synchronized method
1944 if (method->is_synchronized()) {
1945 assert(!is_critical_native, "unhandled");
1948 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1950 // Get the handle (the 2nd argument)
1951 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1953 // Get address of the box
1955 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1957 // Load the oop from the handle
1958 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1960 if (UseBiasedLocking) {
1961 // Note that oop_handle_reg is trashed during this call
1962 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
1963 }
1965 // Load immediate 1 into swap_reg %rax,
1966 __ movptr(swap_reg, 1);
1968 // Load (object->mark() | 1) into swap_reg %rax,
1969 __ orptr(swap_reg, Address(obj_reg, 0));
1971 // Save (object->mark() | 1) into BasicLock's displaced header
1972 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1974 if (os::is_MP()) {
1975 __ lock();
1976 }
1978 // src -> dest iff dest == rax, else rax, <- dest
1979 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1980 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1981 __ jcc(Assembler::equal, lock_done);
1983 // Test if the oopMark is an obvious stack pointer, i.e.,
1984 // 1) (mark & 3) == 0, and
1985 // 2) rsp <= mark < mark + os::pagesize()
1986 // These 3 tests can be done by evaluating the following
1987 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1988 // assuming both stack pointer and pagesize have their
1989 // least significant 2 bits clear.
1990 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1992 __ subptr(swap_reg, rsp);
1993 __ andptr(swap_reg, 3 - os::vm_page_size());
1995 // Save the test result, for recursive case, the result is zero
1996 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1997 __ jcc(Assembler::notEqual, slow_path_lock);
1998 // Slow path will re-enter here
1999 __ bind(lock_done);
2001 if (UseBiasedLocking) {
2002 // Re-fetch oop_handle_reg as we trashed it above
2003 __ movptr(oop_handle_reg, Address(rsp, wordSize));
2004 }
2005 }
2008 // Finally just about ready to make the JNI call
2011 // get JNIEnv* which is first argument to native
2012 if (!is_critical_native) {
2013 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2014 __ movptr(Address(rsp, 0), rdx);
2015 }
2017 // Now set thread in native
2018 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2020 __ call(RuntimeAddress(native_func));
2022 // WARNING - on Windows Java Natives use pascal calling convention and pop the
2023 // arguments off of the stack. We could just re-adjust the stack pointer here
2024 // and continue to do SP relative addressing but we instead switch to FP
2025 // relative addressing.
2027 // Unpack native results.
2028 switch (ret_type) {
2029 case T_BOOLEAN: __ c2bool(rax); break;
2030 case T_CHAR : __ andptr(rax, 0xFFFF); break;
2031 case T_BYTE : __ sign_extend_byte (rax); break;
2032 case T_SHORT : __ sign_extend_short(rax); break;
2033 case T_INT : /* nothing to do */ break;
2034 case T_DOUBLE :
2035 case T_FLOAT :
2036 // Result is in st0 we'll save as needed
2037 break;
2038 case T_ARRAY: // Really a handle
2039 case T_OBJECT: // Really a handle
2040 break; // can't de-handlize until after safepoint check
2041 case T_VOID: break;
2042 case T_LONG: break;
2043 default : ShouldNotReachHere();
2044 }
2046 // Switch thread to "native transition" state before reading the synchronization state.
2047 // This additional state is necessary because reading and testing the synchronization
2048 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2049 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2050 // VM thread changes sync state to synchronizing and suspends threads for GC.
2051 // Thread A is resumed to finish this native method, but doesn't block here since it
2052 // didn't see any synchronization is progress, and escapes.
2053 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2055 if(os::is_MP()) {
2056 if (UseMembar) {
2057 // Force this write out before the read below
2058 __ membar(Assembler::Membar_mask_bits(
2059 Assembler::LoadLoad | Assembler::LoadStore |
2060 Assembler::StoreLoad | Assembler::StoreStore));
2061 } else {
2062 // Write serialization page so VM thread can do a pseudo remote membar.
2063 // We use the current thread pointer to calculate a thread specific
2064 // offset to write to within the page. This minimizes bus traffic
2065 // due to cache line collision.
2066 __ serialize_memory(thread, rcx);
2067 }
2068 }
2070 if (AlwaysRestoreFPU) {
2071 // Make sure the control word is correct.
2072 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2073 }
2075 Label after_transition;
2077 // check for safepoint operation in progress and/or pending suspend requests
2078 { Label Continue;
2080 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2081 SafepointSynchronize::_not_synchronized);
2083 Label L;
2084 __ jcc(Assembler::notEqual, L);
2085 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2086 __ jcc(Assembler::equal, Continue);
2087 __ bind(L);
2089 // Don't use call_VM as it will see a possible pending exception and forward it
2090 // and never return here preventing us from clearing _last_native_pc down below.
2091 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2092 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2093 // by hand.
2094 //
2095 save_native_result(masm, ret_type, stack_slots);
2096 __ push(thread);
2097 if (!is_critical_native) {
2098 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2099 JavaThread::check_special_condition_for_native_trans)));
2100 } else {
2101 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2102 JavaThread::check_special_condition_for_native_trans_and_transition)));
2103 }
2104 __ increment(rsp, wordSize);
2105 // Restore any method result value
2106 restore_native_result(masm, ret_type, stack_slots);
2108 if (is_critical_native) {
2109 // The call above performed the transition to thread_in_Java so
2110 // skip the transition logic below.
2111 __ jmpb(after_transition);
2112 }
2114 __ bind(Continue);
2115 }
2117 // change thread state
2118 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2119 __ bind(after_transition);
2121 Label reguard;
2122 Label reguard_done;
2123 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
2124 __ jcc(Assembler::equal, reguard);
2126 // slow path reguard re-enters here
2127 __ bind(reguard_done);
2129 // Handle possible exception (will unlock if necessary)
2131 // native result if any is live
2133 // Unlock
2134 Label slow_path_unlock;
2135 Label unlock_done;
2136 if (method->is_synchronized()) {
2138 Label done;
2140 // Get locked oop from the handle we passed to jni
2141 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2143 if (UseBiasedLocking) {
2144 __ biased_locking_exit(obj_reg, rbx, done);
2145 }
2147 // Simple recursive lock?
2149 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2150 __ jcc(Assembler::equal, done);
2152 // Must save rax, if if it is live now because cmpxchg must use it
2153 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2154 save_native_result(masm, ret_type, stack_slots);
2155 }
2157 // get old displaced header
2158 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2160 // get address of the stack lock
2161 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2163 // Atomic swap old header if oop still contains the stack lock
2164 if (os::is_MP()) {
2165 __ lock();
2166 }
2168 // src -> dest iff dest == rax, else rax, <- dest
2169 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2170 __ cmpxchgptr(rbx, Address(obj_reg, 0));
2171 __ jcc(Assembler::notEqual, slow_path_unlock);
2173 // slow path re-enters here
2174 __ bind(unlock_done);
2175 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2176 restore_native_result(masm, ret_type, stack_slots);
2177 }
2179 __ bind(done);
2181 }
2183 {
2184 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2185 // Tell dtrace about this method exit
2186 save_native_result(masm, ret_type, stack_slots);
2187 __ movoop(rax, JNIHandles::make_local(method()));
2188 __ call_VM_leaf(
2189 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2190 thread, rax);
2191 restore_native_result(masm, ret_type, stack_slots);
2192 }
2194 // We can finally stop using that last_Java_frame we setup ages ago
2196 __ reset_last_Java_frame(thread, false, true);
2198 // Unpack oop result
2199 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2200 Label L;
2201 __ cmpptr(rax, (int32_t)NULL_WORD);
2202 __ jcc(Assembler::equal, L);
2203 __ movptr(rax, Address(rax, 0));
2204 __ bind(L);
2205 __ verify_oop(rax);
2206 }
2208 if (!is_critical_native) {
2209 // reset handle block
2210 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2211 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2213 // Any exception pending?
2214 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2215 __ jcc(Assembler::notEqual, exception_pending);
2216 }
2218 // no exception, we're almost done
2220 // check that only result value is on FPU stack
2221 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2223 // Fixup floating pointer results so that result looks like a return from a compiled method
2224 if (ret_type == T_FLOAT) {
2225 if (UseSSE >= 1) {
2226 // Pop st0 and store as float and reload into xmm register
2227 __ fstp_s(Address(rbp, -4));
2228 __ movflt(xmm0, Address(rbp, -4));
2229 }
2230 } else if (ret_type == T_DOUBLE) {
2231 if (UseSSE >= 2) {
2232 // Pop st0 and store as double and reload into xmm register
2233 __ fstp_d(Address(rbp, -8));
2234 __ movdbl(xmm0, Address(rbp, -8));
2235 }
2236 }
2238 // Return
2240 __ leave();
2241 __ ret(0);
2243 // Unexpected paths are out of line and go here
2245 // Slow path locking & unlocking
2246 if (method->is_synchronized()) {
2248 // BEGIN Slow path lock
2250 __ bind(slow_path_lock);
2252 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2253 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2254 __ push(thread);
2255 __ push(lock_reg);
2256 __ push(obj_reg);
2257 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2258 __ addptr(rsp, 3*wordSize);
2260 #ifdef ASSERT
2261 { Label L;
2262 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2263 __ jcc(Assembler::equal, L);
2264 __ stop("no pending exception allowed on exit from monitorenter");
2265 __ bind(L);
2266 }
2267 #endif
2268 __ jmp(lock_done);
2270 // END Slow path lock
2272 // BEGIN Slow path unlock
2273 __ bind(slow_path_unlock);
2275 // Slow path unlock
2277 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2278 save_native_result(masm, ret_type, stack_slots);
2279 }
2280 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2282 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2283 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2286 // should be a peal
2287 // +wordSize because of the push above
2288 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2289 __ push(rax);
2291 __ push(obj_reg);
2292 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2293 __ addptr(rsp, 2*wordSize);
2294 #ifdef ASSERT
2295 {
2296 Label L;
2297 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2298 __ jcc(Assembler::equal, L);
2299 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2300 __ bind(L);
2301 }
2302 #endif /* ASSERT */
2304 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2306 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2307 restore_native_result(masm, ret_type, stack_slots);
2308 }
2309 __ jmp(unlock_done);
2310 // END Slow path unlock
2312 }
2314 // SLOW PATH Reguard the stack if needed
2316 __ bind(reguard);
2317 save_native_result(masm, ret_type, stack_slots);
2318 {
2319 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2320 }
2321 restore_native_result(masm, ret_type, stack_slots);
2322 __ jmp(reguard_done);
2325 // BEGIN EXCEPTION PROCESSING
2327 if (!is_critical_native) {
2328 // Forward the exception
2329 __ bind(exception_pending);
2331 // remove possible return value from FPU register stack
2332 __ empty_FPU_stack();
2334 // pop our frame
2335 __ leave();
2336 // and forward the exception
2337 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2338 }
2340 __ flush();
2342 nmethod *nm = nmethod::new_native_nmethod(method,
2343 compile_id,
2344 masm->code(),
2345 vep_offset,
2346 frame_complete,
2347 stack_slots / VMRegImpl::slots_per_word,
2348 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2349 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2350 oop_maps);
2352 if (is_critical_native) {
2353 nm->set_lazy_critical_native(true);
2354 }
2356 return nm;
2358 }
2360 #ifdef HAVE_DTRACE_H
2361 // ---------------------------------------------------------------------------
2362 // Generate a dtrace nmethod for a given signature. The method takes arguments
2363 // in the Java compiled code convention, marshals them to the native
2364 // abi and then leaves nops at the position you would expect to call a native
2365 // function. When the probe is enabled the nops are replaced with a trap
2366 // instruction that dtrace inserts and the trace will cause a notification
2367 // to dtrace.
2368 //
2369 // The probes are only able to take primitive types and java/lang/String as
2370 // arguments. No other java types are allowed. Strings are converted to utf8
2371 // strings so that from dtrace point of view java strings are converted to C
2372 // strings. There is an arbitrary fixed limit on the total space that a method
2373 // can use for converting the strings. (256 chars per string in the signature).
2374 // So any java string larger then this is truncated.
2376 nmethod *SharedRuntime::generate_dtrace_nmethod(
2377 MacroAssembler *masm, methodHandle method) {
2379 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
2380 // be single threaded in this method.
2381 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
2383 // Fill in the signature array, for the calling-convention call.
2384 int total_args_passed = method->size_of_parameters();
2386 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
2387 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
2389 // The signature we are going to use for the trap that dtrace will see
2390 // java/lang/String is converted. We drop "this" and any other object
2391 // is converted to NULL. (A one-slot java/lang/Long object reference
2392 // is converted to a two-slot long, which is why we double the allocation).
2393 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
2394 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
2396 int i=0;
2397 int total_strings = 0;
2398 int first_arg_to_pass = 0;
2399 int total_c_args = 0;
2401 if( !method->is_static() ) { // Pass in receiver first
2402 in_sig_bt[i++] = T_OBJECT;
2403 first_arg_to_pass = 1;
2404 }
2406 // We need to convert the java args to where a native (non-jni) function
2407 // would expect them. To figure out where they go we convert the java
2408 // signature to a C signature.
2410 SignatureStream ss(method->signature());
2411 for ( ; !ss.at_return_type(); ss.next()) {
2412 BasicType bt = ss.type();
2413 in_sig_bt[i++] = bt; // Collect remaining bits of signature
2414 out_sig_bt[total_c_args++] = bt;
2415 if( bt == T_OBJECT) {
2416 Symbol* s = ss.as_symbol_or_null(); // symbol is created
2417 if (s == vmSymbols::java_lang_String()) {
2418 total_strings++;
2419 out_sig_bt[total_c_args-1] = T_ADDRESS;
2420 } else if (s == vmSymbols::java_lang_Boolean() ||
2421 s == vmSymbols::java_lang_Character() ||
2422 s == vmSymbols::java_lang_Byte() ||
2423 s == vmSymbols::java_lang_Short() ||
2424 s == vmSymbols::java_lang_Integer() ||
2425 s == vmSymbols::java_lang_Float()) {
2426 out_sig_bt[total_c_args-1] = T_INT;
2427 } else if (s == vmSymbols::java_lang_Long() ||
2428 s == vmSymbols::java_lang_Double()) {
2429 out_sig_bt[total_c_args-1] = T_LONG;
2430 out_sig_bt[total_c_args++] = T_VOID;
2431 }
2432 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
2433 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
2434 out_sig_bt[total_c_args++] = T_VOID;
2435 }
2436 }
2438 assert(i==total_args_passed, "validly parsed signature");
2440 // Now get the compiled-Java layout as input arguments
2441 int comp_args_on_stack;
2442 comp_args_on_stack = SharedRuntime::java_calling_convention(
2443 in_sig_bt, in_regs, total_args_passed, false);
2445 // Now figure out where the args must be stored and how much stack space
2446 // they require (neglecting out_preserve_stack_slots).
2448 int out_arg_slots;
2449 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
2451 // Calculate the total number of stack slots we will need.
2453 // First count the abi requirement plus all of the outgoing args
2454 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2456 // Now space for the string(s) we must convert
2458 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2459 for (i = 0; i < total_strings ; i++) {
2460 string_locs[i] = stack_slots;
2461 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2462 }
2464 // + 2 for return address (which we own) and saved rbp,
2466 stack_slots += 2;
2468 // Ok The space we have allocated will look like:
2469 //
2470 //
2471 // FP-> | |
2472 // |---------------------|
2473 // | string[n] |
2474 // |---------------------| <- string_locs[n]
2475 // | string[n-1] |
2476 // |---------------------| <- string_locs[n-1]
2477 // | ... |
2478 // | ... |
2479 // |---------------------| <- string_locs[1]
2480 // | string[0] |
2481 // |---------------------| <- string_locs[0]
2482 // | outbound memory |
2483 // | based arguments |
2484 // | |
2485 // |---------------------|
2486 // | |
2487 // SP-> | out_preserved_slots |
2488 //
2489 //
2491 // Now compute actual number of stack words we need rounding to make
2492 // stack properly aligned.
2493 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word);
2495 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2497 intptr_t start = (intptr_t)__ pc();
2499 // First thing make an ic check to see if we should even be here
2501 // We are free to use all registers as temps without saving them and
2502 // restoring them except rbp. rbp, is the only callee save register
2503 // as far as the interpreter and the compiler(s) are concerned.
2505 const Register ic_reg = rax;
2506 const Register receiver = rcx;
2507 Label hit;
2508 Label exception_pending;
2511 __ verify_oop(receiver);
2512 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2513 __ jcc(Assembler::equal, hit);
2515 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2517 // verified entry must be aligned for code patching.
2518 // and the first 5 bytes must be in the same cache line
2519 // if we align at 8 then we will be sure 5 bytes are in the same line
2520 __ align(8);
2522 __ bind(hit);
2524 int vep_offset = ((intptr_t)__ pc()) - start;
2527 // The instruction at the verified entry point must be 5 bytes or longer
2528 // because it can be patched on the fly by make_non_entrant. The stack bang
2529 // instruction fits that requirement.
2531 // Generate stack overflow check
2534 if (UseStackBanging) {
2535 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2536 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2537 } else {
2538 __ movl(rax, stack_size);
2539 __ bang_stack_size(rax, rbx);
2540 }
2541 } else {
2542 // need a 5 byte instruction to allow MT safe patching to non-entrant
2543 __ fat_nop();
2544 }
2546 assert(((int)__ pc() - start - vep_offset) >= 5,
2547 "valid size for make_non_entrant");
2549 // Generate a new frame for the wrapper.
2550 __ enter();
2552 // -2 because return address is already present and so is saved rbp,
2553 if (stack_size - 2*wordSize != 0) {
2554 __ subl(rsp, stack_size - 2*wordSize);
2555 }
2557 // Frame is now completed as far a size and linkage.
2559 int frame_complete = ((intptr_t)__ pc()) - start;
2561 // First thing we do store all the args as if we are doing the call.
2562 // Since the C calling convention is stack based that ensures that
2563 // all the Java register args are stored before we need to convert any
2564 // string we might have.
2566 int sid = 0;
2567 int c_arg, j_arg;
2568 int string_reg = 0;
2570 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2571 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2573 VMRegPair src = in_regs[j_arg];
2574 VMRegPair dst = out_regs[c_arg];
2575 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID,
2576 "stack based abi assumed");
2578 switch (in_sig_bt[j_arg]) {
2580 case T_ARRAY:
2581 case T_OBJECT:
2582 if (out_sig_bt[c_arg] == T_ADDRESS) {
2583 // Any register based arg for a java string after the first
2584 // will be destroyed by the call to get_utf so we store
2585 // the original value in the location the utf string address
2586 // will eventually be stored.
2587 if (src.first()->is_reg()) {
2588 if (string_reg++ != 0) {
2589 simple_move32(masm, src, dst);
2590 }
2591 }
2592 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2593 // need to unbox a one-word value
2594 Register in_reg = rax;
2595 if ( src.first()->is_reg() ) {
2596 in_reg = src.first()->as_Register();
2597 } else {
2598 simple_move32(masm, src, in_reg->as_VMReg());
2599 }
2600 Label skipUnbox;
2601 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2602 if ( out_sig_bt[c_arg] == T_LONG ) {
2603 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD);
2604 }
2605 __ testl(in_reg, in_reg);
2606 __ jcc(Assembler::zero, skipUnbox);
2607 assert(dst.first()->is_stack() &&
2608 (!dst.second()->is_valid() || dst.second()->is_stack()),
2609 "value(s) must go into stack slots");
2611 BasicType bt = out_sig_bt[c_arg];
2612 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2613 if ( bt == T_LONG ) {
2614 __ movl(rbx, Address(in_reg,
2615 box_offset + VMRegImpl::stack_slot_size));
2616 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
2617 }
2618 __ movl(in_reg, Address(in_reg, box_offset));
2619 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg);
2620 __ bind(skipUnbox);
2621 } else {
2622 // Convert the arg to NULL
2623 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2624 }
2625 if (out_sig_bt[c_arg] == T_LONG) {
2626 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2627 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2628 }
2629 break;
2631 case T_VOID:
2632 break;
2634 case T_FLOAT:
2635 float_move(masm, src, dst);
2636 break;
2638 case T_DOUBLE:
2639 assert( j_arg + 1 < total_args_passed &&
2640 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list");
2641 double_move(masm, src, dst);
2642 break;
2644 case T_LONG :
2645 long_move(masm, src, dst);
2646 break;
2648 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2650 default:
2651 simple_move32(masm, src, dst);
2652 }
2653 }
2655 // Now we must convert any string we have to utf8
2656 //
2658 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ;
2659 sid < total_strings ; j_arg++, c_arg++ ) {
2661 if (out_sig_bt[c_arg] == T_ADDRESS) {
2663 Address utf8_addr = Address(
2664 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2665 __ leal(rax, utf8_addr);
2667 // The first string we find might still be in the original java arg
2668 // register
2669 VMReg orig_loc = in_regs[j_arg].first();
2670 Register string_oop;
2672 // This is where the argument will eventually reside
2673 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first()));
2675 if (sid == 1 && orig_loc->is_reg()) {
2676 string_oop = orig_loc->as_Register();
2677 assert(string_oop != rax, "smashed arg");
2678 } else {
2680 if (orig_loc->is_reg()) {
2681 // Get the copy of the jls object
2682 __ movl(rcx, dest);
2683 } else {
2684 // arg is still in the original location
2685 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc)));
2686 }
2687 string_oop = rcx;
2689 }
2690 Label nullString;
2691 __ movl(dest, NULL_WORD);
2692 __ testl(string_oop, string_oop);
2693 __ jcc(Assembler::zero, nullString);
2695 // Now we can store the address of the utf string as the argument
2696 __ movl(dest, rax);
2698 // And do the conversion
2699 __ call_VM_leaf(CAST_FROM_FN_PTR(
2700 address, SharedRuntime::get_utf), string_oop, rax);
2701 __ bind(nullString);
2702 }
2704 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2705 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2706 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2707 }
2708 }
2711 // Ok now we are done. Need to place the nop that dtrace wants in order to
2712 // patch in the trap
2714 int patch_offset = ((intptr_t)__ pc()) - start;
2716 __ nop();
2719 // Return
2721 __ leave();
2722 __ ret(0);
2724 __ flush();
2726 nmethod *nm = nmethod::new_dtrace_nmethod(
2727 method, masm->code(), vep_offset, patch_offset, frame_complete,
2728 stack_slots / VMRegImpl::slots_per_word);
2729 return nm;
2731 }
2733 #endif // HAVE_DTRACE_H
2735 // this function returns the adjust size (in number of words) to a c2i adapter
2736 // activation for use during deoptimization
2737 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2738 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2739 }
2742 uint SharedRuntime::out_preserve_stack_slots() {
2743 return 0;
2744 }
2747 //------------------------------generate_deopt_blob----------------------------
2748 void SharedRuntime::generate_deopt_blob() {
2749 // allocate space for the code
2750 ResourceMark rm;
2751 // setup code generation tools
2752 CodeBuffer buffer("deopt_blob", 1024, 1024);
2753 MacroAssembler* masm = new MacroAssembler(&buffer);
2754 int frame_size_in_words;
2755 OopMap* map = NULL;
2756 // Account for the extra args we place on the stack
2757 // by the time we call fetch_unroll_info
2758 const int additional_words = 2; // deopt kind, thread
2760 OopMapSet *oop_maps = new OopMapSet();
2762 // -------------
2763 // This code enters when returning to a de-optimized nmethod. A return
2764 // address has been pushed on the the stack, and return values are in
2765 // registers.
2766 // If we are doing a normal deopt then we were called from the patched
2767 // nmethod from the point we returned to the nmethod. So the return
2768 // address on the stack is wrong by NativeCall::instruction_size
2769 // We will adjust the value to it looks like we have the original return
2770 // address on the stack (like when we eagerly deoptimized).
2771 // In the case of an exception pending with deoptimized then we enter
2772 // with a return address on the stack that points after the call we patched
2773 // into the exception handler. We have the following register state:
2774 // rax,: exception
2775 // rbx,: exception handler
2776 // rdx: throwing pc
2777 // So in this case we simply jam rdx into the useless return address and
2778 // the stack looks just like we want.
2779 //
2780 // At this point we need to de-opt. We save the argument return
2781 // registers. We call the first C routine, fetch_unroll_info(). This
2782 // routine captures the return values and returns a structure which
2783 // describes the current frame size and the sizes of all replacement frames.
2784 // The current frame is compiled code and may contain many inlined
2785 // functions, each with their own JVM state. We pop the current frame, then
2786 // push all the new frames. Then we call the C routine unpack_frames() to
2787 // populate these frames. Finally unpack_frames() returns us the new target
2788 // address. Notice that callee-save registers are BLOWN here; they have
2789 // already been captured in the vframeArray at the time the return PC was
2790 // patched.
2791 address start = __ pc();
2792 Label cont;
2794 // Prolog for non exception case!
2796 // Save everything in sight.
2798 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2799 // Normal deoptimization
2800 __ push(Deoptimization::Unpack_deopt);
2801 __ jmp(cont);
2803 int reexecute_offset = __ pc() - start;
2805 // Reexecute case
2806 // return address is the pc describes what bci to do re-execute at
2808 // No need to update map as each call to save_live_registers will produce identical oopmap
2809 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2811 __ push(Deoptimization::Unpack_reexecute);
2812 __ jmp(cont);
2814 int exception_offset = __ pc() - start;
2816 // Prolog for exception case
2818 // all registers are dead at this entry point, except for rax, and
2819 // rdx which contain the exception oop and exception pc
2820 // respectively. Set them in TLS and fall thru to the
2821 // unpack_with_exception_in_tls entry point.
2823 __ get_thread(rdi);
2824 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2825 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2827 int exception_in_tls_offset = __ pc() - start;
2829 // new implementation because exception oop is now passed in JavaThread
2831 // Prolog for exception case
2832 // All registers must be preserved because they might be used by LinearScan
2833 // Exceptiop oop and throwing PC are passed in JavaThread
2834 // tos: stack at point of call to method that threw the exception (i.e. only
2835 // args are on the stack, no return address)
2837 // make room on stack for the return address
2838 // It will be patched later with the throwing pc. The correct value is not
2839 // available now because loading it from memory would destroy registers.
2840 __ push(0);
2842 // Save everything in sight.
2844 // No need to update map as each call to save_live_registers will produce identical oopmap
2845 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2847 // Now it is safe to overwrite any register
2849 // store the correct deoptimization type
2850 __ push(Deoptimization::Unpack_exception);
2852 // load throwing pc from JavaThread and patch it as the return address
2853 // of the current frame. Then clear the field in JavaThread
2854 __ get_thread(rdi);
2855 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2856 __ movptr(Address(rbp, wordSize), rdx);
2857 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2859 #ifdef ASSERT
2860 // verify that there is really an exception oop in JavaThread
2861 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2862 __ verify_oop(rax);
2864 // verify that there is no pending exception
2865 Label no_pending_exception;
2866 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2867 __ testptr(rax, rax);
2868 __ jcc(Assembler::zero, no_pending_exception);
2869 __ stop("must not have pending exception here");
2870 __ bind(no_pending_exception);
2871 #endif
2873 __ bind(cont);
2875 // Compiled code leaves the floating point stack dirty, empty it.
2876 __ empty_FPU_stack();
2879 // Call C code. Need thread and this frame, but NOT official VM entry
2880 // crud. We cannot block on this call, no GC can happen.
2881 __ get_thread(rcx);
2882 __ push(rcx);
2883 // fetch_unroll_info needs to call last_java_frame()
2884 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2886 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2888 // Need to have an oopmap that tells fetch_unroll_info where to
2889 // find any register it might need.
2891 oop_maps->add_gc_map( __ pc()-start, map);
2893 // Discard arg to fetch_unroll_info
2894 __ pop(rcx);
2896 __ get_thread(rcx);
2897 __ reset_last_Java_frame(rcx, false, false);
2899 // Load UnrollBlock into EDI
2900 __ mov(rdi, rax);
2902 // Move the unpack kind to a safe place in the UnrollBlock because
2903 // we are very short of registers
2905 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2906 // retrieve the deopt kind from where we left it.
2907 __ pop(rax);
2908 __ movl(unpack_kind, rax); // save the unpack_kind value
2910 Label noException;
2911 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2912 __ jcc(Assembler::notEqual, noException);
2913 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2914 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2915 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2916 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2918 __ verify_oop(rax);
2920 // Overwrite the result registers with the exception results.
2921 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2922 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2924 __ bind(noException);
2926 // Stack is back to only having register save data on the stack.
2927 // Now restore the result registers. Everything else is either dead or captured
2928 // in the vframeArray.
2930 RegisterSaver::restore_result_registers(masm);
2932 // Non standard control word may be leaked out through a safepoint blob, and we can
2933 // deopt at a poll point with the non standard control word. However, we should make
2934 // sure the control word is correct after restore_result_registers.
2935 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2937 // All of the register save area has been popped of the stack. Only the
2938 // return address remains.
2940 // Pop all the frames we must move/replace.
2941 //
2942 // Frame picture (youngest to oldest)
2943 // 1: self-frame (no frame link)
2944 // 2: deopting frame (no frame link)
2945 // 3: caller of deopting frame (could be compiled/interpreted).
2946 //
2947 // Note: by leaving the return address of self-frame on the stack
2948 // and using the size of frame 2 to adjust the stack
2949 // when we are done the return to frame 3 will still be on the stack.
2951 // Pop deoptimized frame
2952 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2954 // sp should be pointing at the return address to the caller (3)
2956 // Stack bang to make sure there's enough room for these interpreter frames.
2957 if (UseStackBanging) {
2958 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2959 __ bang_stack_size(rbx, rcx);
2960 }
2962 // Load array of frame pcs into ECX
2963 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2965 __ pop(rsi); // trash the old pc
2967 // Load array of frame sizes into ESI
2968 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2970 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2972 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2973 __ movl(counter, rbx);
2975 // Pick up the initial fp we should save
2976 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2978 // Now adjust the caller's stack to make up for the extra locals
2979 // but record the original sp so that we can save it in the skeletal interpreter
2980 // frame and the stack walking of interpreter_sender will get the unextended sp
2981 // value and not the "real" sp value.
2983 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2984 __ movptr(sp_temp, rsp);
2985 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2986 __ subptr(rsp, rbx);
2988 // Push interpreter frames in a loop
2989 Label loop;
2990 __ bind(loop);
2991 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2992 #ifdef CC_INTERP
2993 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2994 #ifdef ASSERT
2995 __ push(0xDEADDEAD); // Make a recognizable pattern
2996 __ push(0xDEADDEAD);
2997 #else /* ASSERT */
2998 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2999 #endif /* ASSERT */
3000 #else /* CC_INTERP */
3001 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
3002 #endif /* CC_INTERP */
3003 __ pushptr(Address(rcx, 0)); // save return address
3004 __ enter(); // save old & set new rbp,
3005 __ subptr(rsp, rbx); // Prolog!
3006 __ movptr(rbx, sp_temp); // sender's sp
3007 #ifdef CC_INTERP
3008 __ movptr(Address(rbp,
3009 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3010 rbx); // Make it walkable
3011 #else /* CC_INTERP */
3012 // This value is corrected by layout_activation_impl
3013 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
3014 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3015 #endif /* CC_INTERP */
3016 __ movptr(sp_temp, rsp); // pass to next frame
3017 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3018 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3019 __ decrementl(counter); // decrement counter
3020 __ jcc(Assembler::notZero, loop);
3021 __ pushptr(Address(rcx, 0)); // save final return address
3023 // Re-push self-frame
3024 __ enter(); // save old & set new rbp,
3026 // Return address and rbp, are in place
3027 // We'll push additional args later. Just allocate a full sized
3028 // register save area
3029 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
3031 // Restore frame locals after moving the frame
3032 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
3033 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
3034 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
3035 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
3036 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
3038 // Set up the args to unpack_frame
3040 __ pushl(unpack_kind); // get the unpack_kind value
3041 __ get_thread(rcx);
3042 __ push(rcx);
3044 // set last_Java_sp, last_Java_fp
3045 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
3047 // Call C code. Need thread but NOT official VM entry
3048 // crud. We cannot block on this call, no GC can happen. Call should
3049 // restore return values to their stack-slots with the new SP.
3050 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3051 // Set an oopmap for the call site
3052 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
3054 // rax, contains the return result type
3055 __ push(rax);
3057 __ get_thread(rcx);
3058 __ reset_last_Java_frame(rcx, false, false);
3060 // Collect return values
3061 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
3062 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
3064 // Clear floating point stack before returning to interpreter
3065 __ empty_FPU_stack();
3067 // Check if we should push the float or double return value.
3068 Label results_done, yes_double_value;
3069 __ cmpl(Address(rsp, 0), T_DOUBLE);
3070 __ jcc (Assembler::zero, yes_double_value);
3071 __ cmpl(Address(rsp, 0), T_FLOAT);
3072 __ jcc (Assembler::notZero, results_done);
3074 // return float value as expected by interpreter
3075 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
3076 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
3077 __ jmp(results_done);
3079 // return double value as expected by interpreter
3080 __ bind(yes_double_value);
3081 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
3082 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
3084 __ bind(results_done);
3086 // Pop self-frame.
3087 __ leave(); // Epilog!
3089 // Jump to interpreter
3090 __ ret(0);
3092 // -------------
3093 // make sure all code is generated
3094 masm->flush();
3096 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3097 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3098 }
3101 #ifdef COMPILER2
3102 //------------------------------generate_uncommon_trap_blob--------------------
3103 void SharedRuntime::generate_uncommon_trap_blob() {
3104 // allocate space for the code
3105 ResourceMark rm;
3106 // setup code generation tools
3107 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
3108 MacroAssembler* masm = new MacroAssembler(&buffer);
3110 enum frame_layout {
3111 arg0_off, // thread sp + 0 // Arg location for
3112 arg1_off, // unloaded_class_index sp + 1 // calling C
3113 // The frame sender code expects that rbp will be in the "natural" place and
3114 // will override any oopMap setting for it. We must therefore force the layout
3115 // so that it agrees with the frame sender code.
3116 rbp_off, // callee saved register sp + 2
3117 return_off, // slot for return address sp + 3
3118 framesize
3119 };
3121 address start = __ pc();
3122 // Push self-frame.
3123 __ subptr(rsp, return_off*wordSize); // Epilog!
3125 // rbp, is an implicitly saved callee saved register (i.e. the calling
3126 // convention will save restore it in prolog/epilog) Other than that
3127 // there are no callee save registers no that adapter frames are gone.
3128 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
3130 // Clear the floating point exception stack
3131 __ empty_FPU_stack();
3133 // set last_Java_sp
3134 __ get_thread(rdx);
3135 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
3137 // Call C code. Need thread but NOT official VM entry
3138 // crud. We cannot block on this call, no GC can happen. Call should
3139 // capture callee-saved registers as well as return values.
3140 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
3141 // argument already in ECX
3142 __ movl(Address(rsp, arg1_off*wordSize),rcx);
3143 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3145 // Set an oopmap for the call site
3146 OopMapSet *oop_maps = new OopMapSet();
3147 OopMap* map = new OopMap( framesize, 0 );
3148 // No oopMap for rbp, it is known implicitly
3150 oop_maps->add_gc_map( __ pc()-start, map);
3152 __ get_thread(rcx);
3154 __ reset_last_Java_frame(rcx, false, false);
3156 // Load UnrollBlock into EDI
3157 __ movptr(rdi, rax);
3159 // Pop all the frames we must move/replace.
3160 //
3161 // Frame picture (youngest to oldest)
3162 // 1: self-frame (no frame link)
3163 // 2: deopting frame (no frame link)
3164 // 3: caller of deopting frame (could be compiled/interpreted).
3166 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
3167 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
3169 // Pop deoptimized frame
3170 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3171 __ addptr(rsp, rcx);
3173 // sp should be pointing at the return address to the caller (3)
3175 // Stack bang to make sure there's enough room for these interpreter frames.
3176 if (UseStackBanging) {
3177 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3178 __ bang_stack_size(rbx, rcx);
3179 }
3182 // Load array of frame pcs into ECX
3183 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3185 __ pop(rsi); // trash the pc
3187 // Load array of frame sizes into ESI
3188 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3190 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3192 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3193 __ movl(counter, rbx);
3195 // Pick up the initial fp we should save
3196 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3198 // Now adjust the caller's stack to make up for the extra locals
3199 // but record the original sp so that we can save it in the skeletal interpreter
3200 // frame and the stack walking of interpreter_sender will get the unextended sp
3201 // value and not the "real" sp value.
3203 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3204 __ movptr(sp_temp, rsp);
3205 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3206 __ subptr(rsp, rbx);
3208 // Push interpreter frames in a loop
3209 Label loop;
3210 __ bind(loop);
3211 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3212 #ifdef CC_INTERP
3213 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
3214 #ifdef ASSERT
3215 __ push(0xDEADDEAD); // Make a recognizable pattern
3216 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...)
3217 #else /* ASSERT */
3218 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
3219 #endif /* ASSERT */
3220 #else /* CC_INTERP */
3221 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
3222 #endif /* CC_INTERP */
3223 __ pushptr(Address(rcx, 0)); // save return address
3224 __ enter(); // save old & set new rbp,
3225 __ subptr(rsp, rbx); // Prolog!
3226 __ movptr(rbx, sp_temp); // sender's sp
3227 #ifdef CC_INTERP
3228 __ movptr(Address(rbp,
3229 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3230 rbx); // Make it walkable
3231 #else /* CC_INTERP */
3232 // This value is corrected by layout_activation_impl
3233 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
3234 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3235 #endif /* CC_INTERP */
3236 __ movptr(sp_temp, rsp); // pass to next frame
3237 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3238 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3239 __ decrementl(counter); // decrement counter
3240 __ jcc(Assembler::notZero, loop);
3241 __ pushptr(Address(rcx, 0)); // save final return address
3243 // Re-push self-frame
3244 __ enter(); // save old & set new rbp,
3245 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
3248 // set last_Java_sp, last_Java_fp
3249 __ get_thread(rdi);
3250 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
3252 // Call C code. Need thread but NOT official VM entry
3253 // crud. We cannot block on this call, no GC can happen. Call should
3254 // restore return values to their stack-slots with the new SP.
3255 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
3256 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
3257 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3258 // Set an oopmap for the call site
3259 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
3261 __ get_thread(rdi);
3262 __ reset_last_Java_frame(rdi, true, false);
3264 // Pop self-frame.
3265 __ leave(); // Epilog!
3267 // Jump to interpreter
3268 __ ret(0);
3270 // -------------
3271 // make sure all code is generated
3272 masm->flush();
3274 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
3275 }
3276 #endif // COMPILER2
3278 //------------------------------generate_handler_blob------
3279 //
3280 // Generate a special Compile2Runtime blob that saves all registers,
3281 // setup oopmap, and calls safepoint code to stop the compiled code for
3282 // a safepoint.
3283 //
3284 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) {
3286 // Account for thread arg in our frame
3287 const int additional_words = 1;
3288 int frame_size_in_words;
3290 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3292 ResourceMark rm;
3293 OopMapSet *oop_maps = new OopMapSet();
3294 OopMap* map;
3296 // allocate space for the code
3297 // setup code generation tools
3298 CodeBuffer buffer("handler_blob", 1024, 512);
3299 MacroAssembler* masm = new MacroAssembler(&buffer);
3301 const Register java_thread = rdi; // callee-saved for VC++
3302 address start = __ pc();
3303 address call_pc = NULL;
3305 // If cause_return is true we are at a poll_return and there is
3306 // the return address on the stack to the caller on the nmethod
3307 // that is safepoint. We can leave this return on the stack and
3308 // effectively complete the return and safepoint in the caller.
3309 // Otherwise we push space for a return address that the safepoint
3310 // handler will install later to make the stack walking sensible.
3311 if( !cause_return )
3312 __ push(rbx); // Make room for return address (or push it again)
3314 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
3316 // The following is basically a call_VM. However, we need the precise
3317 // address of the call in order to generate an oopmap. Hence, we do all the
3318 // work ourselves.
3320 // Push thread argument and setup last_Java_sp
3321 __ get_thread(java_thread);
3322 __ push(java_thread);
3323 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3325 // if this was not a poll_return then we need to correct the return address now.
3326 if( !cause_return ) {
3327 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3328 __ movptr(Address(rbp, wordSize), rax);
3329 }
3331 // do the call
3332 __ call(RuntimeAddress(call_ptr));
3334 // Set an oopmap for the call site. This oopmap will map all
3335 // oop-registers and debug-info registers as callee-saved. This
3336 // will allow deoptimization at this safepoint to find all possible
3337 // debug-info recordings, as well as let GC find all oops.
3339 oop_maps->add_gc_map( __ pc() - start, map);
3341 // Discard arg
3342 __ pop(rcx);
3344 Label noException;
3346 // Clear last_Java_sp again
3347 __ get_thread(java_thread);
3348 __ reset_last_Java_frame(java_thread, false, false);
3350 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3351 __ jcc(Assembler::equal, noException);
3353 // Exception pending
3355 RegisterSaver::restore_live_registers(masm);
3357 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3359 __ bind(noException);
3361 // Normal exit, register restoring and exit
3362 RegisterSaver::restore_live_registers(masm);
3364 __ ret(0);
3366 // make sure all code is generated
3367 masm->flush();
3369 // Fill-out other meta info
3370 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3371 }
3373 //
3374 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3375 //
3376 // Generate a stub that calls into vm to find out the proper destination
3377 // of a java call. All the argument registers are live at this point
3378 // but since this is generic code we don't know what they are and the caller
3379 // must do any gc of the args.
3380 //
3381 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3382 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3384 // allocate space for the code
3385 ResourceMark rm;
3387 CodeBuffer buffer(name, 1000, 512);
3388 MacroAssembler* masm = new MacroAssembler(&buffer);
3390 int frame_size_words;
3391 enum frame_layout {
3392 thread_off,
3393 extra_words };
3395 OopMapSet *oop_maps = new OopMapSet();
3396 OopMap* map = NULL;
3398 int start = __ offset();
3400 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3402 int frame_complete = __ offset();
3404 const Register thread = rdi;
3405 __ get_thread(rdi);
3407 __ push(thread);
3408 __ set_last_Java_frame(thread, noreg, rbp, NULL);
3410 __ call(RuntimeAddress(destination));
3413 // Set an oopmap for the call site.
3414 // We need this not only for callee-saved registers, but also for volatile
3415 // registers that the compiler might be keeping live across a safepoint.
3417 oop_maps->add_gc_map( __ offset() - start, map);
3419 // rax, contains the address we are going to jump to assuming no exception got installed
3421 __ addptr(rsp, wordSize);
3423 // clear last_Java_sp
3424 __ reset_last_Java_frame(thread, true, false);
3425 // check for pending exceptions
3426 Label pending;
3427 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3428 __ jcc(Assembler::notEqual, pending);
3430 // get the returned methodOop
3431 __ movptr(rbx, Address(thread, JavaThread::vm_result_offset()));
3432 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3434 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3436 RegisterSaver::restore_live_registers(masm);
3438 // We are back the the original state on entry and ready to go.
3440 __ jmp(rax);
3442 // Pending exception after the safepoint
3444 __ bind(pending);
3446 RegisterSaver::restore_live_registers(masm);
3448 // exception pending => remove activation and forward to exception handler
3450 __ get_thread(thread);
3451 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3452 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3453 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3455 // -------------
3456 // make sure all code is generated
3457 masm->flush();
3459 // return the blob
3460 // frame_size_words or bytes??
3461 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3462 }