src/cpu/ppc/vm/ppc.ad

changeset 7222
f6bde7889409
parent 6723
0bf37f737702
child 7358
327e7269f90d
     1.1 --- a/src/cpu/ppc/vm/ppc.ad	Thu Oct 02 11:31:31 2014 -0700
     1.2 +++ b/src/cpu/ppc/vm/ppc.ad	Thu Oct 02 09:32:53 2014 +0200
     1.3 @@ -1249,6 +1249,7 @@
     1.4  
     1.5      // Emit the trampoline stub which will be related to the branch-and-link below.
     1.6      CallStubImpl::emit_trampoline_stub(_masm, entry_point_toc_offset, offsets.insts_call_instruction_offset);
     1.7 +    if (Compile::current()->env()->failing()) { return offsets; } // Code cache may be full.
     1.8      __ relocate(rtype);
     1.9    }
    1.10  
    1.11 @@ -1412,7 +1413,7 @@
    1.12      while (bang_offset <= bang_end) {
    1.13        // Need at least one stack bang at end of shadow zone.
    1.14  
    1.15 -      // Again I had to copy code, this time from assembler_ppc64.cpp,
    1.16 +      // Again I had to copy code, this time from assembler_ppc.cpp,
    1.17        // bang_stack_with_offset - see there for comments.
    1.18  
    1.19        // Stack grows down, caller passes positive offset.
    1.20 @@ -2002,7 +2003,7 @@
    1.21  
    1.22    // Inline_cache contains a klass.
    1.23    Register ic_klass       = as_Register(Matcher::inline_cache_reg_encode());
    1.24 -  Register receiver_klass = R0;  // tmp
    1.25 +  Register receiver_klass = R12_scratch2;  // tmp
    1.26  
    1.27    assert_different_registers(ic_klass, receiver_klass, R11_scratch1, R3_ARG1);
    1.28    assert(R11_scratch1 == R11, "need prologue scratch register");
    1.29 @@ -3486,6 +3487,7 @@
    1.30  
    1.31          // Emit the trampoline stub which will be related to the branch-and-link below.
    1.32          CallStubImpl::emit_trampoline_stub(_masm, entry_point_toc_offset, start_offset);
    1.33 +        if (Compile::current()->env()->failing()) { return; } // Code cache may be full.
    1.34          __ relocate(_optimized_virtual ?
    1.35                      relocInfo::opt_virtual_call_type : relocInfo::static_call_type);
    1.36        }
    1.37 @@ -3529,6 +3531,7 @@
    1.38  
    1.39        // Emit the trampoline stub which will be related to the branch-and-link below.
    1.40        CallStubImpl::emit_trampoline_stub(_masm, entry_point_toc_offset, start_offset);
    1.41 +      if (ra_->C->env()->failing()) { return; } // Code cache may be full.
    1.42        assert(_optimized_virtual, "methodHandle call should be a virtual call");
    1.43        __ relocate(relocInfo::opt_virtual_call_type);
    1.44      }
    1.45 @@ -3579,9 +3582,7 @@
    1.46        const address entry_point_const = __ address_constant(entry_point, RelocationHolder::none);
    1.47        const int entry_point_const_toc_offset = __ offset_to_method_toc(entry_point_const);
    1.48        CallStubImpl::emit_trampoline_stub(_masm, entry_point_const_toc_offset, __ offset());
    1.49 -
    1.50 -      if (ra_->C->env()->failing())
    1.51 -        return;
    1.52 +      if (ra_->C->env()->failing()) { return; } // Code cache may be full.
    1.53  
    1.54        // Build relocation at call site with ic position as data.
    1.55        assert((_load_ic_hi_node != NULL && _load_ic_node == NULL) ||
    1.56 @@ -5640,19 +5641,6 @@
    1.57    ins_pipe(pipe_class_memory);
    1.58  %}
    1.59  
    1.60 -//// Load compressed klass and decode it if narrow_klass_shift == 0.
    1.61 -//// TODO: will narrow_klass_shift ever be 0?
    1.62 -//instruct decodeNKlass2Klass(iRegPdst dst, memory mem) %{
    1.63 -//  match(Set dst (DecodeNKlass (LoadNKlass mem)));
    1.64 -//  predicate(false /* TODO: PPC port Universe::narrow_klass_shift() == 0*);
    1.65 -//  ins_cost(MEMORY_REF_COST);
    1.66 -//
    1.67 -//  format %{ "LWZ     $dst, $mem \t// DecodeNKlass (unscaled)" %}
    1.68 -//  size(4);
    1.69 -//  ins_encode( enc_lwz(dst, mem) );
    1.70 -//  ins_pipe(pipe_class_memory);
    1.71 -//%}
    1.72 -
    1.73  // Load Klass Pointer
    1.74  instruct loadKlass(iRegPdst dst, memoryAlg4 mem) %{
    1.75    match(Set dst (LoadKlass mem));
    1.76 @@ -6072,11 +6060,15 @@
    1.77    %}
    1.78  %}
    1.79  
    1.80 -instruct loadConNKlass_hi(iRegNdst dst, immNKlass src) %{
    1.81 +// We have seen a safepoint between the hi and lo parts, and this node was handled
    1.82 +// as an oop. Therefore this needs a match rule so that build_oop_map knows this is
    1.83 +// not a narrow oop.
    1.84 +instruct loadConNKlass_hi(iRegNdst dst, immNKlass_NM src) %{
    1.85 +  match(Set dst src);
    1.86    effect(DEF dst, USE src);
    1.87    ins_cost(DEFAULT_COST);
    1.88  
    1.89 -  format %{ "LIS     $dst, $src \t// narrow oop hi" %}
    1.90 +  format %{ "LIS     $dst, $src \t// narrow klass hi" %}
    1.91    size(4);
    1.92    ins_encode %{
    1.93      // TODO: PPC port $archOpcode(ppc64Opcode_addis);
    1.94 @@ -6086,6 +6078,21 @@
    1.95    ins_pipe(pipe_class_default);
    1.96  %}
    1.97  
    1.98 +// As loadConNKlass_hi this must be recognized as narrow klass, not oop!
    1.99 +instruct loadConNKlass_mask(iRegNdst dst, immNKlass_NM src1, iRegNsrc src2) %{
   1.100 +  match(Set dst src1);
   1.101 +  effect(TEMP src2);
   1.102 +  ins_cost(DEFAULT_COST);
   1.103 +
   1.104 +  format %{ "MASK    $dst, $src2, 0xFFFFFFFF" %} // mask
   1.105 +  size(4);
   1.106 +  ins_encode %{
   1.107 +    // TODO: PPC port $archOpcode(ppc64Opcode_rldicl);
   1.108 +    __ clrldi($dst$$Register, $src2$$Register, 0x20);
   1.109 +  %}
   1.110 +  ins_pipe(pipe_class_default);
   1.111 +%}
   1.112 +
   1.113  // This needs a match rule so that build_oop_map knows this is
   1.114  // not a narrow oop.
   1.115  instruct loadConNKlass_lo(iRegNdst dst, immNKlass_NM src1, iRegNsrc src2) %{
   1.116 @@ -6093,10 +6100,10 @@
   1.117    effect(TEMP src2);
   1.118    ins_cost(DEFAULT_COST);
   1.119  
   1.120 -  format %{ "ADDI    $dst, $src1, $src2 \t// narrow oop lo" %}
   1.121 -  size(4);
   1.122 -  ins_encode %{
   1.123 -    // TODO: PPC port $archOpcode(ppc64Opcode_addi);
   1.124 +  format %{ "ORI    $dst, $src1, $src2 \t// narrow klass lo" %}
   1.125 +  size(4);
   1.126 +  ins_encode %{
   1.127 +    // TODO: PPC port $archOpcode(ppc64Opcode_ori);
   1.128      intptr_t Csrc = Klass::encode_klass((Klass *)$src1$$constant);
   1.129      assert(__ oop_recorder() != NULL, "this assembler needs an OopRecorder");
   1.130      int klass_index = __ oop_recorder()->find_index((Klass *)$src1$$constant);
   1.131 @@ -6127,10 +6134,11 @@
   1.132      MachNode *m2 = m1;
   1.133      if (!Assembler::is_uimm((jlong)Klass::encode_klass((Klass *)op_src->constant()), 31)) {
   1.134        // Value might be 1-extended. Mask out these bits.
   1.135 -      m2 = new (C) clearMs32bNode();
   1.136 +      m2 = new (C) loadConNKlass_maskNode();
   1.137        m2->add_req(NULL, m1);
   1.138        m2->_opnds[0] = op_dst;
   1.139 -      m2->_opnds[1] = op_dst;
   1.140 +      m2->_opnds[1] = op_src;
   1.141 +      m2->_opnds[2] = op_dst;
   1.142        ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
   1.143        nodes->push(m2);
   1.144      }
   1.145 @@ -6975,7 +6983,7 @@
   1.146    size(4);
   1.147    ins_encode %{
   1.148      // TODO: PPC port $archOpcode(ppc64Opcode_rldicl);
   1.149 -    __ rldicl($dst$$Register, $src$$Register, 64-Universe::narrow_oop_shift(), 32);
   1.150 +    __ rldicl($dst$$Register, $src$$Register, 64-Universe::narrow_klass_shift(), 32);
   1.151    %}
   1.152    ins_pipe(pipe_class_default);
   1.153  %}

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