1.1 --- a/src/cpu/mips/vm/mips_64.ad Wed Aug 02 09:12:28 2017 +0800
1.2 +++ b/src/cpu/mips/vm/mips_64.ad Tue Jul 11 09:40:23 2017 +0800
1.3 @@ -2907,63 +2907,6 @@
1.4 }
1.5 %}
1.6
1.7 - enc_class store_P_immP_enc (memory mem, immP31 src) %{
1.8 - MacroAssembler _masm(&cbuf);
1.9 - int base = $mem$$base;
1.10 - int index = $mem$$index;
1.11 - int scale = $mem$$scale;
1.12 - int disp = $mem$$disp;
1.13 - long value = $src$$constant;
1.14 -
1.15 - if( index != 0 ) {
1.16 - if (scale == 0) {
1.17 - __ daddu(AT, as_Register(base), as_Register(index));
1.18 - } else {
1.19 - __ dsll(AT, as_Register(index), scale);
1.20 - __ daddu(AT, as_Register(base), AT);
1.21 - }
1.22 - if( Assembler::is_simm16(disp) ) {
1.23 - if (value == 0) {
1.24 - __ sd(R0, AT, disp);
1.25 - } else {
1.26 - __ move(T9, value);
1.27 - __ sd(T9, AT, disp);
1.28 - }
1.29 - } else {
1.30 - if (value == 0) {
1.31 - __ move(T9, disp);
1.32 - __ daddu(AT, AT, T9);
1.33 - __ sd(R0, AT, 0);
1.34 - } else {
1.35 - __ move(T9, disp);
1.36 - __ daddu(AT, AT, T9);
1.37 - __ move(T9, value);
1.38 - __ sd(T9, AT, 0);
1.39 - }
1.40 - }
1.41 - } else {
1.42 - if( Assembler::is_simm16(disp) ) {
1.43 - if (value == 0) {
1.44 - __ sd(R0, as_Register(base), disp);
1.45 - } else {
1.46 - __ move(AT, value);
1.47 - __ sd(AT, as_Register(base), disp);
1.48 - }
1.49 - } else {
1.50 - if (value == 0) {
1.51 - __ move(T9, disp);
1.52 - __ daddu(AT, as_Register(base), T9);
1.53 - __ sd(R0, AT, 0);
1.54 - } else {
1.55 - __ move(T9, disp);
1.56 - __ daddu(AT, as_Register(base), T9);
1.57 - __ move(T9, value);
1.58 - __ sd(T9, AT, 0);
1.59 - }
1.60 - }
1.61 - }
1.62 - %}
1.63 -
1.64 enc_class storeImmN0_enc(memory mem, ImmN0 src) %{
1.65 MacroAssembler _masm(&cbuf);
1.66 int base = $mem$$base;
1.67 @@ -2998,156 +2941,6 @@
1.68 }
1.69 %}
1.70
1.71 - enc_class storeImmN_enc (memory mem, immN src) %{
1.72 - MacroAssembler _masm(&cbuf);
1.73 - int base = $mem$$base;
1.74 - int index = $mem$$index;
1.75 - int scale = $mem$$scale;
1.76 - int disp = $mem$$disp;
1.77 - long * value = (long *)$src$$constant;
1.78 -
1.79 - if (value == NULL) {
1.80 - guarantee(Assembler::is_simm16(disp), "FIXME: disp is not simm16!");
1.81 - if (index == 0) {
1.82 - __ sw(R0, as_Register(base), disp);
1.83 - } else {
1.84 - if (scale == 0) {
1.85 - __ daddu(AT, as_Register(base), as_Register(index));
1.86 - } else {
1.87 - __ dsll(AT, as_Register(index), scale);
1.88 - __ daddu(AT, as_Register(base), AT);
1.89 - }
1.90 - __ sw(R0, AT, disp);
1.91 - }
1.92 -
1.93 - return;
1.94 - }
1.95 -
1.96 - int oop_index = __ oop_recorder()->find_index((jobject)value);
1.97 - RelocationHolder rspec = oop_Relocation::spec(oop_index);
1.98 -
1.99 - if (index != 0) {
1.100 - if (scale == 0) {
1.101 - __ daddu(AT, as_Register(base), as_Register(index));
1.102 - } else {
1.103 - __ dsll(AT, as_Register(index), scale);
1.104 - __ daddu(AT, as_Register(base), AT);
1.105 - }
1.106 - if( Assembler::is_simm16(disp) ) {
1.107 - if(rspec.type() != relocInfo::none) {
1.108 - __ relocate(rspec, Assembler::narrow_oop_operand);
1.109 - __ patchable_set48(T9, oop_index);
1.110 - } else {
1.111 - __ set64(T9, oop_index);
1.112 - }
1.113 - __ sw(T9, AT, disp);
1.114 - } else {
1.115 - __ move(T9, disp);
1.116 - __ addu(AT, AT, T9);
1.117 -
1.118 - if(rspec.type() != relocInfo::none) {
1.119 - __ relocate(rspec, Assembler::narrow_oop_operand);
1.120 - __ patchable_set48(T9, oop_index);
1.121 - } else {
1.122 - __ set64(T9, oop_index);
1.123 - }
1.124 - __ sw(T9, AT, 0);
1.125 - }
1.126 - }
1.127 - else {
1.128 - if( Assembler::is_simm16(disp) ) {
1.129 - if($src->constant_reloc() != relocInfo::none) {
1.130 - __ relocate(rspec, Assembler::narrow_oop_operand);
1.131 - __ patchable_set48(T9, oop_index);
1.132 - } else {
1.133 - __ set64(T9, oop_index);
1.134 - }
1.135 - __ sw(T9, as_Register(base), disp);
1.136 - } else {
1.137 - __ move(T9, disp);
1.138 - __ daddu(AT, as_Register(base), T9);
1.139 -
1.140 - if($src->constant_reloc() != relocInfo::none){
1.141 - __ relocate(rspec, Assembler::narrow_oop_operand);
1.142 - __ patchable_set48(T9, oop_index);
1.143 - } else {
1.144 - __ set64(T9, oop_index);
1.145 - }
1.146 - __ sw(T9, AT, 0);
1.147 - }
1.148 - }
1.149 - %}
1.150 -
1.151 - enc_class storeImmNKlass_enc (memory mem, immNKlass src) %{
1.152 - MacroAssembler _masm(&cbuf);
1.153 -
1.154 - assert (UseCompressedOops, "should only be used for compressed headers");
1.155 - assert (__ oop_recorder() != NULL, "this assembler needs an OopRecorder");
1.156 -
1.157 - int base = $mem$$base;
1.158 - int index = $mem$$index;
1.159 - int scale = $mem$$scale;
1.160 - int disp = $mem$$disp;
1.161 - long value = $src$$constant;
1.162 -
1.163 - int klass_index = __ oop_recorder()->find_index((Klass*)value);
1.164 - RelocationHolder rspec = metadata_Relocation::spec(klass_index);
1.165 - long narrowp = Klass::encode_klass((Klass*)value);
1.166 -
1.167 - if(index!=0){
1.168 - if (scale == 0) {
1.169 - __ daddu(AT, as_Register(base), as_Register(index));
1.170 - } else {
1.171 - __ dsll(AT, as_Register(index), scale);
1.172 - __ daddu(AT, as_Register(base), AT);
1.173 - }
1.174 -
1.175 - if( Assembler::is_simm16(disp) ) {
1.176 - if(rspec.type() != relocInfo::none){
1.177 - __ relocate(rspec, Assembler::narrow_oop_operand);
1.178 - __ patchable_set48(T9, narrowp);
1.179 - } else {
1.180 - __ set64(T9, narrowp);
1.181 - }
1.182 - __ sw(T9, AT, disp);
1.183 - } else {
1.184 - __ move(T9, disp);
1.185 - __ daddu(AT, AT, T9);
1.186 -
1.187 - if(rspec.type() != relocInfo::none){
1.188 - __ relocate(rspec, Assembler::narrow_oop_operand);
1.189 - __ patchable_set48(T9, narrowp);
1.190 - } else {
1.191 - __ set64(T9, narrowp);
1.192 - }
1.193 -
1.194 - __ sw(T9, AT, 0);
1.195 - }
1.196 - } else {
1.197 - if( Assembler::is_simm16(disp) ) {
1.198 - if(rspec.type() != relocInfo::none){
1.199 - __ relocate(rspec, Assembler::narrow_oop_operand);
1.200 - __ patchable_set48(T9, narrowp);
1.201 - }
1.202 - else {
1.203 - __ set64(T9, narrowp);
1.204 - }
1.205 - __ sw(T9, as_Register(base), disp);
1.206 - } else {
1.207 - __ move(T9, disp);
1.208 - __ daddu(AT, as_Register(base), T9);
1.209 -
1.210 - if(rspec.type() != relocInfo::none){
1.211 - __ relocate(rspec, Assembler::narrow_oop_operand);
1.212 - __ patchable_set48(T9, narrowp);
1.213 - } else {
1.214 - __ set64(T9, narrowp);
1.215 - }
1.216 - __ sw(T9, AT, 0);
1.217 - }
1.218 - }
1.219 - %}
1.220 -
1.221 enc_class load_L_enc (mRegL dst, memory mem) %{
1.222 MacroAssembler _masm(&cbuf);
1.223 int base = $mem$$base;
1.224 @@ -4071,17 +3864,6 @@
1.225 interface(CONST_INTER);
1.226 %}
1.227
1.228 -operand immP31()
1.229 -%{
1.230 - predicate(n->as_Type()->type()->reloc() == relocInfo::none
1.231 - && (n->get_ptr() >> 31) == 0);
1.232 - match(ConP);
1.233 -
1.234 - op_cost(5);
1.235 - format %{ %}
1.236 - interface(CONST_INTER);
1.237 -%}
1.238 -
1.239 // NULL Pointer Immediate
1.240 operand immP0() %{
1.241 predicate( n->get_ptr() == 0 );
1.242 @@ -6496,16 +6278,6 @@
1.243 ins_pipe( ialu_storeI );
1.244 %}
1.245
1.246 -// Store NULL Pointer, mark word, or other simple pointer constant.
1.247 -instruct storeImmP(memory mem, immP31 src) %{
1.248 - match(Set mem (StoreP mem src));
1.249 -
1.250 - ins_cost(150);
1.251 - format %{ "mov $mem, $src #@storeImmP" %}
1.252 - ins_encode(store_P_immP_enc(mem, src));
1.253 - ins_pipe( ialu_storeI );
1.254 -%}
1.255 -
1.256 // Store Byte Immediate
1.257 instruct storeImmB(memory mem, immI8 src) %{
1.258 match(Set mem (StoreB mem src));
1.259 @@ -6569,26 +6341,6 @@
1.260 ins_pipe( ialu_storeI );
1.261 %}
1.262
1.263 -instruct storeImmN(memory mem, immN src)
1.264 -%{
1.265 - match(Set mem (StoreN mem src));
1.266 -
1.267 - ins_cost(150);
1.268 - format %{ "storeImmN $mem, $src\t# compressed ptr @ storeImmN" %}
1.269 - ins_encode(storeImmN_enc(mem, src));
1.270 - ins_pipe( ialu_storeI );
1.271 -%}
1.272 -
1.273 -instruct storeImmNKlass(memory mem, immNKlass src)
1.274 -%{
1.275 - match(Set mem (StoreNKlass mem src));
1.276 -
1.277 - ins_cost(150); // XXX
1.278 - format %{ "sw $mem, $src\t# compressed klass ptr @ storeImmNKlass" %}
1.279 - ins_encode(storeImmNKlass_enc(mem, src));
1.280 - ins_pipe( ialu_storeI );
1.281 -%}
1.282 -
1.283 // Store Byte
1.284 instruct storeB(memory mem, mRegI src) %{
1.285 match(Set mem (StoreB mem src));
