src/cpu/x86/vm/vm_version_x86.cpp

changeset 4205
a3ecd773a7b9
parent 4106
7eca5de9e0b6
child 4254
dbeaeee28bc2
     1.1 --- a/src/cpu/x86/vm/vm_version_x86.cpp	Tue Oct 23 13:06:37 2012 -0700
     1.2 +++ b/src/cpu/x86/vm/vm_version_x86.cpp	Wed Oct 24 14:33:22 2012 -0700
     1.3 @@ -419,13 +419,16 @@
     1.4    if (UseAVX < 1)
     1.5      _cpuFeatures &= ~CPU_AVX;
     1.6  
     1.7 +  if (!UseAES && !FLAG_IS_DEFAULT(UseAES))
     1.8 +    _cpuFeatures &= ~CPU_AES;
     1.9 +
    1.10    if (logical_processors_per_package() == 1) {
    1.11      // HT processor could be installed on a system which doesn't support HT.
    1.12      _cpuFeatures &= ~CPU_HT;
    1.13    }
    1.14  
    1.15    char buf[256];
    1.16 -  jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
    1.17 +  jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
    1.18                 cores_per_cpu(), threads_per_core(),
    1.19                 cpu_family(), _model, _stepping,
    1.20                 (supports_cmov() ? ", cmov" : ""),
    1.21 @@ -441,6 +444,7 @@
    1.22                 (supports_popcnt() ? ", popcnt" : ""),
    1.23                 (supports_avx()    ? ", avx" : ""),
    1.24                 (supports_avx2()   ? ", avx2" : ""),
    1.25 +               (supports_aes()    ? ", aes" : ""),
    1.26                 (supports_mmx_ext() ? ", mmxext" : ""),
    1.27                 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
    1.28                 (supports_lzcnt()   ? ", lzcnt": ""),
    1.29 @@ -472,6 +476,29 @@
    1.30    if (!supports_avx ()) // Drop to 0 if no AVX  support
    1.31      UseAVX = 0;
    1.32  
    1.33 +  // Use AES instructions if available.
    1.34 +  if (supports_aes()) {
    1.35 +    if (FLAG_IS_DEFAULT(UseAES)) {
    1.36 +      UseAES = true;
    1.37 +    }
    1.38 +  } else if (UseAES) {
    1.39 +    if (!FLAG_IS_DEFAULT(UseAES))
    1.40 +      warning("AES instructions not available on this CPU");
    1.41 +    FLAG_SET_DEFAULT(UseAES, false);
    1.42 +  }
    1.43 +
    1.44 +  // The AES intrinsic stubs require AES instruction support (of course)
    1.45 +  // but also require AVX mode for misaligned SSE access
    1.46 +  if (UseAES && (UseAVX > 0)) {
    1.47 +    if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    1.48 +      UseAESIntrinsics = true;
    1.49 +    }
    1.50 +  } else if (UseAESIntrinsics) {
    1.51 +    if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
    1.52 +      warning("AES intrinsics not available on this CPU");
    1.53 +    FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    1.54 +  }
    1.55 +
    1.56  #ifdef COMPILER2
    1.57    if (UseFPUForSpilling) {
    1.58      if (UseSSE < 2) {
    1.59 @@ -714,6 +741,9 @@
    1.60      if (UseAVX > 0) {
    1.61        tty->print("  UseAVX=%d",UseAVX);
    1.62      }
    1.63 +    if (UseAES) {
    1.64 +      tty->print("  UseAES=1");
    1.65 +    }
    1.66      tty->cr();
    1.67      tty->print("Allocation");
    1.68      if (AllocatePrefetchStyle <= 0 || UseSSE == 0 && !supports_3dnow_prefetch()) {

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