src/share/vm/c1/c1_LIR.cpp

changeset 3141
10ee2b297ccd
parent 2488
e4fee0bdaa85
child 3153
5cceda753a4a
     1.1 --- a/src/share/vm/c1/c1_LIR.cpp	Tue Sep 13 11:46:51 2011 -0700
     1.2 +++ b/src/share/vm/c1/c1_LIR.cpp	Wed Sep 14 10:40:13 2011 +0200
     1.3 @@ -142,7 +142,8 @@
     1.4  #endif
     1.5  #ifdef ARM
     1.6    assert(disp() == 0 || index()->is_illegal(), "can't have both");
     1.7 -  assert(-4096 < disp() && disp() < 4096, "architecture constraint");
     1.8 +  // Note: offsets higher than 4096 must not be rejected here. They can
     1.9 +  // be handled by the back-end or will be rejected if not.
    1.10  #endif
    1.11  #ifdef _LP64
    1.12    assert(base()->is_cpu_register(), "wrong base operand");

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