src/cpu/mips/vm/c1_FrameMap_mips.hpp

changeset 6880
52ea28d233d2
parent 1
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child 8865
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equal deleted inserted replaced
6879:11d997b1e656 6880:52ea28d233d2
30 // 30 //
31 // +----------------+---------+----------------------------+----------------+----------- 31 // +----------------+---------+----------------------------+----------------+-----------
32 // | size_arguments | 2 words | size_locals-size_arguments | _size_monitors | spilling . 32 // | size_arguments | 2 words | size_locals-size_arguments | _size_monitors | spilling .
33 // +----------------+---------+----------------------------+----------------+----------- 33 // +----------------+---------+----------------------------+----------------+-----------
34 // 34 //
35 //12/21, 06, jerome 35 private:
36 private: 36
37
38 //static FloatRegister _fpu_regs [nof_fpu_regs]; 37 //static FloatRegister _fpu_regs [nof_fpu_regs];
39 static FloatRegister _fpu_regs [32]; 38 static FloatRegister _fpu_regs [32];
40 39
41 WordSize fp_offset_for_slot (int slot) const; 40 WordSize fp_offset_for_slot (int slot) const;
42 int local_to_slot (int local_name, bool is_two_word) const; 41 int local_to_slot (int local_name, bool is_two_word) const;
43 // NOTE : name consist of argument, local, spill, they are not continuous 42 // NOTE : name consist of argument, local, spill, they are not continuous
44 WordSize fp_offset_for_name (int name, bool is_two_word, bool for_hi_word) const; 43 WordSize fp_offset_for_name (int name, bool is_two_word, bool for_hi_word) const;
45 WordSize fp_offset_for_monitor_lock (int monitor_index) const; 44 WordSize fp_offset_for_monitor_lock (int monitor_index) const;
46 WordSize fp_offset_for_monitor_object(int monitor_index) const; 45 WordSize fp_offset_for_monitor_object(int monitor_index) const;
47 bool location_for_fp_offset (WordSize word_offset_from_fp, 46 bool location_for_fp_offset (WordSize word_offset_from_fp,
48 Location::Type loc_type, 47 Location::Type loc_type,
51 50
52 51
53 public: 52 public:
54 static const int pd_c_runtime_reserved_arg_size; 53 static const int pd_c_runtime_reserved_arg_size;
55 enum { 54 enum {
56 nof_reg_args = 5, // registers t0,a0-a3 are available for parameter passing 55 nof_reg_args = 5, // registers t0,a0-a3 are available for parameter passing
57 first_available_sp_in_frame = 0, 56 first_available_sp_in_frame = 0,
58 //frame_pad_in_bytes = 8 57 //frame_pad_in_bytes = 8
59 frame_pad_in_bytes = 2 * sizeof(intptr_t) 58 frame_pad_in_bytes = 2 * sizeof(intptr_t)
60 }; 59 };
61 60
62 static LIR_Opr _zero_opr; 61 static LIR_Opr _zero_opr;
63 static LIR_Opr _at_opr; 62 static LIR_Opr _at_opr;
64 static LIR_Opr _v0_opr; 63 static LIR_Opr _v0_opr;
96 static LIR_Opr _fp_opr; 95 static LIR_Opr _fp_opr;
97 static LIR_Opr _sp_opr; 96 static LIR_Opr _sp_opr;
98 static LIR_Opr _ra_opr; 97 static LIR_Opr _ra_opr;
99 static LIR_Opr _k0_opr; 98 static LIR_Opr _k0_opr;
100 static LIR_Opr _k1_opr; 99 static LIR_Opr _k1_opr;
101 100
102 static LIR_Opr _f0_opr; 101 static LIR_Opr _f0_opr;
103 static LIR_Opr _f12_opr; 102 static LIR_Opr _f12_opr;
104 static LIR_Opr _f14_opr; 103 static LIR_Opr _f14_opr;
105 static LIR_Opr _d0_opr; 104 static LIR_Opr _d0_opr;
106 static LIR_Opr _d12_opr; 105 static LIR_Opr _d12_opr;
107 static LIR_Opr _d14_opr; 106 static LIR_Opr _d14_opr;
108 107
109 static LIR_Opr _a0_a1_opr; 108 static LIR_Opr _a0_a1_opr;
110 static LIR_Opr _a2_a3_opr; 109 static LIR_Opr _a2_a3_opr;
111 static LIR_Opr _v0_v1_opr; 110 static LIR_Opr _v0_v1_opr;
112 111
113 112
114 static LIR_Opr receiver_opr; 113 static LIR_Opr receiver_opr;
115 static LIR_Opr _zero_oop_opr; 114 static LIR_Opr _zero_oop_opr;
116 static LIR_Opr _at_oop_opr; 115 static LIR_Opr _at_oop_opr;
117 static LIR_Opr _v0_oop_opr; 116 static LIR_Opr _v0_oop_opr;
118 static LIR_Opr _v1_oop_opr; 117 static LIR_Opr _v1_oop_opr;
149 static LIR_Opr _fp_oop_opr; 148 static LIR_Opr _fp_oop_opr;
150 static LIR_Opr _sp_oop_opr; 149 static LIR_Opr _sp_oop_opr;
151 static LIR_Opr _ra_oop_opr; 150 static LIR_Opr _ra_oop_opr;
152 static LIR_Opr _k0_oop_opr; 151 static LIR_Opr _k0_oop_opr;
153 static LIR_Opr _k1_oop_opr; 152 static LIR_Opr _k1_oop_opr;
154 153
155 static LIR_Opr _f0_oop_opr; 154 static LIR_Opr _f0_oop_opr;
156 static LIR_Opr _f12_oop_opr; 155 static LIR_Opr _f12_oop_opr;
157 static LIR_Opr _f14_oop_opr; 156 static LIR_Opr _f14_oop_opr;
158 static LIR_Opr _d0_oop_opr; 157 static LIR_Opr _d0_oop_opr;
159 static LIR_Opr _d12_oop_opr; 158 static LIR_Opr _d12_oop_opr;
161 160
162 static LIR_Opr _a0_a1_oop_opr; 161 static LIR_Opr _a0_a1_oop_opr;
163 static LIR_Opr _a2_a3_oop_opr; 162 static LIR_Opr _a2_a3_oop_opr;
164 static LIR_Opr _v0_v1_oop_opr; 163 static LIR_Opr _v0_v1_oop_opr;
165 164
166 //FIXME, needed under 64-bit? by aoqi 165 //FIXME, needed under 64-bit? by aoqi
167 static LIR_Opr _a0_a1_long_opr; 166 static LIR_Opr _a0_a1_long_opr;
168 static LIR_Opr _a2_a3_long_opr; 167 static LIR_Opr _a2_a3_long_opr;
169 static LIR_Opr _v0_v1_long_opr; 168 static LIR_Opr _v0_v1_long_opr;
170 static LIR_Opr _f0_float_opr; 169 static LIR_Opr _f0_float_opr;
171 static LIR_Opr _f12_float_opr; 170 static LIR_Opr _f12_float_opr;
174 static LIR_Opr _d12_double_opr; 173 static LIR_Opr _d12_double_opr;
175 static LIR_Opr _d14_double_opr; 174 static LIR_Opr _d14_double_opr;
176 175
177 176
178 static LIR_Opr as_long_opr(Register r, Register r2){ 177 static LIR_Opr as_long_opr(Register r, Register r2){
179 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2)); 178 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));
180 } 179 }
181 180
182 static LIR_Opr as_float_opr(FloatRegister r) { 181 static LIR_Opr as_float_opr(FloatRegister r) {
183 return LIR_OprFact::single_fpu(r->encoding()); 182 return LIR_OprFact::single_fpu(r->encoding());
184 } 183 }
185 184
186 185
187 static bool is_caller_save_register (LIR_Opr opr); 186 static bool is_caller_save_register (LIR_Opr opr);
188 static bool is_caller_save_register (Register r); 187 static bool is_caller_save_register (Register r);
197 static int adjust_reg_range(int range) { 196 static int adjust_reg_range(int range) {
198 // Reduce the number of available regs (to free r12) in case of compressed oops 197 // Reduce the number of available regs (to free r12) in case of compressed oops
199 if (UseCompressedOops || UseCompressedClassPointers) return range - 1; 198 if (UseCompressedOops || UseCompressedClassPointers) return range - 1;
200 return range; 199 return range;
201 } 200 }
202 201
203 static int nof_caller_save_cpu_regs() { return adjust_reg_range(pd_nof_caller_save_cpu_regs_frame_map); } 202 static int nof_caller_save_cpu_regs() { return adjust_reg_range(pd_nof_caller_save_cpu_regs_frame_map); }
204 static int last_cpu_reg() { return adjust_reg_range(pd_last_cpu_reg); } 203 static int last_cpu_reg() { return adjust_reg_range(pd_last_cpu_reg); }
205 //static int last_byte_reg() { return adjust_reg_range(pd_last_byte_reg); } 204 //static int last_byte_reg() { return adjust_reg_range(pd_last_byte_reg); }
206 205
207 #endif // CPU_MIPS_VM_C1_FRAMEMAP_MIPS_HPP 206 #endif // CPU_MIPS_VM_C1_FRAMEMAP_MIPS_HPP

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