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comparison: src/cpu/mips/vm/c1_FrameMap_mips.hpp
src/cpu/mips/vm/c1_FrameMap_mips.hpp
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| 1 /* | |
| 2 * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. | |
| 3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. | |
| 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 5 * | |
| 6 * This code is free software; you can redistribute it and/or modify it | |
| 7 * under the terms of the GNU General Public License version 2 only, as | |
| 8 * published by the Free Software Foundation. | |
| 9 * | |
| 10 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 13 * version 2 for more details (a copy is included in the LICENSE file that | |
| 14 * accompanied this code). | |
| 15 * | |
| 16 * You should have received a copy of the GNU General Public License version | |
| 17 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 19 * | |
| 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA | |
| 21 * or visit www.oracle.com if you need additional information or have any | |
| 22 * questions. | |
| 23 * | |
| 24 */ | |
| 25 | |
| 26 #ifndef CPU_MIPS_VM_C1_FRAMEMAP_MIPS_HPP | |
| 27 #define CPU_MIPS_VM_C1_FRAMEMAP_MIPS_HPP | |
| 28 | |
| 29 // On i486/gs2 the frame looks as follows: | |
| 30 // | |
| 31 // +----------------+---------+----------------------------+----------------+----------- | |
| 32 // | size_arguments | 2 words | size_locals-size_arguments | _size_monitors | spilling . | |
| 33 // +----------------+---------+----------------------------+----------------+----------- | |
| 34 // | |
| 35 //12/21, 06, jerome | |
| 36 private: | |
| 37 | |
| 38 //static FloatRegister _fpu_regs [nof_fpu_regs]; | |
| 39 static FloatRegister _fpu_regs [32]; | |
| 40 | |
| 41 WordSize fp_offset_for_slot (int slot) const; | |
| 42 int local_to_slot (int local_name, bool is_two_word) const; | |
| 43 // NOTE : name consist of argument, local, spill, they are not continuous | |
| 44 WordSize fp_offset_for_name (int name, bool is_two_word, bool for_hi_word) const; | |
| 45 WordSize fp_offset_for_monitor_lock (int monitor_index) const; | |
| 46 WordSize fp_offset_for_monitor_object(int monitor_index) const; | |
| 47 bool location_for_fp_offset (WordSize word_offset_from_fp, | |
| 48 Location::Type loc_type, | |
| 49 Location* loc) const; | |
| 50 WordSize fp2sp_offset (WordSize fp_offset) const; | |
| 51 | |
| 52 | |
| 53 public: | |
| 54 static const int pd_c_runtime_reserved_arg_size; | |
| 55 enum { | |
| 56 nof_reg_args = 5, // registers t0,a0-a3 are available for parameter passing | |
| 57 first_available_sp_in_frame = 0, | |
| 58 //frame_pad_in_bytes = 8 | |
| 59 frame_pad_in_bytes = 2 * sizeof(intptr_t) | |
| 60 }; | |
| 61 | |
| 62 static LIR_Opr _zero_opr; | |
| 63 static LIR_Opr _at_opr; | |
| 64 static LIR_Opr _v0_opr; | |
| 65 static LIR_Opr _v1_opr; | |
| 66 static LIR_Opr _a0_opr; | |
| 67 static LIR_Opr _a1_opr; | |
| 68 static LIR_Opr _a2_opr; | |
| 69 static LIR_Opr _a3_opr; | |
| 70 static LIR_Opr _t0_opr; | |
| 71 static LIR_Opr _t1_opr; | |
| 72 static LIR_Opr _t2_opr; | |
| 73 static LIR_Opr _t3_opr; | |
| 74 #ifndef _LP64 | |
| 75 static LIR_Opr _t4_opr; | |
| 76 static LIR_Opr _t5_opr; | |
| 77 static LIR_Opr _t6_opr; | |
| 78 static LIR_Opr _t7_opr; | |
| 79 #else | |
| 80 static LIR_Opr _a4_opr; | |
| 81 static LIR_Opr _a5_opr; | |
| 82 static LIR_Opr _a6_opr; | |
| 83 static LIR_Opr _a7_opr; | |
| 84 #endif | |
| 85 static LIR_Opr _t8_opr; | |
| 86 static LIR_Opr _t9_opr; | |
| 87 static LIR_Opr _s0_opr; | |
| 88 static LIR_Opr _s1_opr; | |
| 89 static LIR_Opr _s2_opr; | |
| 90 static LIR_Opr _s3_opr; | |
| 91 static LIR_Opr _s4_opr; | |
| 92 static LIR_Opr _s5_opr; | |
| 93 static LIR_Opr _s6_opr; | |
| 94 static LIR_Opr _s7_opr; | |
| 95 static LIR_Opr _gp_opr; | |
| 96 static LIR_Opr _fp_opr; | |
| 97 static LIR_Opr _sp_opr; | |
| 98 static LIR_Opr _ra_opr; | |
| 99 static LIR_Opr _k0_opr; | |
| 100 static LIR_Opr _k1_opr; | |
| 101 | |
| 102 static LIR_Opr _f0_opr; | |
| 103 static LIR_Opr _f12_opr; | |
| 104 static LIR_Opr _f14_opr; | |
| 105 static LIR_Opr _d0_opr; | |
| 106 static LIR_Opr _d12_opr; | |
| 107 static LIR_Opr _d14_opr; | |
| 108 | |
| 109 static LIR_Opr _a0_a1_opr; | |
| 110 static LIR_Opr _a2_a3_opr; | |
| 111 static LIR_Opr _v0_v1_opr; | |
| 112 | |
| 113 | |
| 114 static LIR_Opr receiver_opr; | |
| 115 static LIR_Opr _zero_oop_opr; | |
| 116 static LIR_Opr _at_oop_opr; | |
| 117 static LIR_Opr _v0_oop_opr; | |
| 118 static LIR_Opr _v1_oop_opr; | |
| 119 static LIR_Opr _a0_oop_opr; | |
| 120 static LIR_Opr _a1_oop_opr; | |
| 121 static LIR_Opr _a2_oop_opr; | |
| 122 static LIR_Opr _a3_oop_opr; | |
| 123 static LIR_Opr _t0_oop_opr; | |
| 124 static LIR_Opr _t1_oop_opr; | |
| 125 static LIR_Opr _t2_oop_opr; | |
| 126 static LIR_Opr _t3_oop_opr; | |
| 127 #ifndef _LP64 | |
| 128 static LIR_Opr _t4_oop_opr; | |
| 129 static LIR_Opr _t5_oop_opr; | |
| 130 static LIR_Opr _t6_oop_opr; | |
| 131 static LIR_Opr _t7_oop_opr; | |
| 132 #else | |
| 133 static LIR_Opr _a4_oop_opr; | |
| 134 static LIR_Opr _a5_oop_opr; | |
| 135 static LIR_Opr _a6_oop_opr; | |
| 136 static LIR_Opr _a7_oop_opr; | |
| 137 #endif | |
| 138 static LIR_Opr _t8_oop_opr; | |
| 139 static LIR_Opr _t9_oop_opr; | |
| 140 static LIR_Opr _s0_oop_opr; | |
| 141 static LIR_Opr _s1_oop_opr; | |
| 142 static LIR_Opr _s2_oop_opr; | |
| 143 static LIR_Opr _s3_oop_opr; | |
| 144 static LIR_Opr _s4_oop_opr; | |
| 145 static LIR_Opr _s5_oop_opr; | |
| 146 static LIR_Opr _s6_oop_opr; | |
| 147 static LIR_Opr _s7_oop_opr; | |
| 148 static LIR_Opr _gp_oop_opr; | |
| 149 static LIR_Opr _fp_oop_opr; | |
| 150 static LIR_Opr _sp_oop_opr; | |
| 151 static LIR_Opr _ra_oop_opr; | |
| 152 static LIR_Opr _k0_oop_opr; | |
| 153 static LIR_Opr _k1_oop_opr; | |
| 154 | |
| 155 static LIR_Opr _f0_oop_opr; | |
| 156 static LIR_Opr _f12_oop_opr; | |
| 157 static LIR_Opr _f14_oop_opr; | |
| 158 static LIR_Opr _d0_oop_opr; | |
| 159 static LIR_Opr _d12_oop_opr; | |
| 160 static LIR_Opr _d14_oop_opr; | |
| 161 | |
| 162 static LIR_Opr _a0_a1_oop_opr; | |
| 163 static LIR_Opr _a2_a3_oop_opr; | |
| 164 static LIR_Opr _v0_v1_oop_opr; | |
| 165 | |
| 166 //FIXME, needed under 64-bit? by aoqi | |
| 167 static LIR_Opr _a0_a1_long_opr; | |
| 168 static LIR_Opr _a2_a3_long_opr; | |
| 169 static LIR_Opr _v0_v1_long_opr; | |
| 170 static LIR_Opr _f0_float_opr; | |
| 171 static LIR_Opr _f12_float_opr; | |
| 172 static LIR_Opr _f14_float_opr; | |
| 173 static LIR_Opr _d0_double_opr; | |
| 174 static LIR_Opr _d12_double_opr; | |
| 175 static LIR_Opr _d14_double_opr; | |
| 176 | |
| 177 | |
| 178 static LIR_Opr as_long_opr(Register r, Register r2){ | |
| 179 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2)); | |
| 180 } | |
| 181 | |
| 182 static LIR_Opr as_float_opr(FloatRegister r) { | |
| 183 return LIR_OprFact::single_fpu(r->encoding()); | |
| 184 } | |
| 185 | |
| 186 | |
| 187 static bool is_caller_save_register (LIR_Opr opr); | |
| 188 static bool is_caller_save_register (Register r); | |
| 189 | |
| 190 | |
| 191 // OptoReg name for spilled virtual FPU register n | |
| 192 //OptoReg::Name fpu_regname (int n); | |
| 193 | |
| 194 static VMReg fpu_regname (int n); | |
| 195 static Register first_register(); | |
| 196 static FloatRegister nr2floatreg (int rnr); | |
| 197 static int adjust_reg_range(int range) { | |
| 198 // Reduce the number of available regs (to free r12) in case of compressed oops | |
| 199 if (UseCompressedOops || UseCompressedClassPointers) return range - 1; | |
| 200 return range; | |
| 201 } | |
| 202 | |
| 203 static int nof_caller_save_cpu_regs() { return adjust_reg_range(pd_nof_caller_save_cpu_regs_frame_map); } | |
| 204 static int last_cpu_reg() { return adjust_reg_range(pd_last_cpu_reg); } | |
| 205 //static int last_byte_reg() { return adjust_reg_range(pd_last_byte_reg); } | |
| 206 | |
| 207 #endif // CPU_MIPS_VM_C1_FRAMEMAP_MIPS_HPP | |
| 208 |
