jdk8-mips64-public/hotspot: comparison src/cpu/mips/vm/macroAssembler

-:2c1fab4a6f4e
+:0477693968a6
 if(!(opcode(pc[3]) == lui_op
 && opcode(pc[4]) == ori_op
 && special(pc[5]) == daddu_op)) { tty->print_cr("Not a branch label patch"); }
 int offset = target - branch;
-if (!is_simm16(offset))
+if (!is_simm16(offset)) {
-{
 pc[3] = (pc[3] & 0xffff0000) | high16(offset - 12);
 pc[4] = (pc[4] & 0xffff0000) | low16(offset - 12);
-}
+} else {
-else
-{
 /* revert to "beq + nop" */
 CodeBuffer cb(branch, 4 * 10);
 MacroAssembler masm(&cb);
 #define __ masm.
 __ b(target);
 }
 return;
 }
 #ifndef PRODUCT
-if (!is_simm16((target - branch - 4) >> 2))
+if (!is_simm16((target - branch - 4) >> 2)) {
-{
 tty->print_cr("Illegal patching: target=0x%lx", target);
 int *p = (int *)branch;
-for (int i = -10; i < 10; i++)
+for (int i = -10; i < 10; i++) {
-{
 tty->print("0x%lx, ", p[i]);
 }
 tty->print_cr("");
 }
 #endif
 int MacroAssembler::insts_for_patchable_call(address target) {
 return 6;
 }
-void MacroAssembler::beq_far(Register rs, Register rt, address entry)
+void MacroAssembler::beq_far(Register rs, Register rt, address entry) {
-{
 u_char * cur_pc = pc();
 /* Jin: Near/Far jump */
-if(is_simm16((entry - pc() - 4) / 4))
+if(is_simm16((entry - pc() - 4) / 4)) {
-{
 Assembler::beq(rs, rt, offset(entry));
-}
+} else {
-else
-{
 Label not_jump;
 bne(rs, rt, not_jump);
 delayed()->nop();
 b_far(entry);
 bind(not_jump);
 has_delay_slot();
 }
 }
-void MacroAssembler::beq_far(Register rs, Register rt, Label& L)
+void MacroAssembler::beq_far(Register rs, Register rt, Label& L) {
-{
 if (L.is_bound()) {
 beq_far(rs, rt, target(L));
 } else {
 u_char * cur_pc = pc();
 Label not_jump;
 bind(not_jump);
 has_delay_slot();
 }
 }
-void MacroAssembler::bne_far(Register rs, Register rt, address entry)
+void MacroAssembler::bne_far(Register rs, Register rt, address entry) {
-{
 u_char * cur_pc = pc();
 /* Jin: Near/Far jump */
-if(is_simm16((entry - pc() - 4) / 4))
+if(is_simm16((entry - pc() - 4) / 4)) {
-{
 Assembler::bne(rs, rt, offset(entry));
-}
+} else {
-else
-{
 Label not_jump;
 beq(rs, rt, not_jump);
 delayed()->nop();
 b_far(entry);
 bind(not_jump);
 has_delay_slot();
 }
 }
-void MacroAssembler::bne_far(Register rs, Register rt, Label& L)
+void MacroAssembler::bne_far(Register rs, Register rt, Label& L) {
-{
 if (L.is_bound()) {
 bne_far(rs, rt, target(L));
 } else {
 u_char * cur_pc = pc();
 Label not_jump;
 bind(not_jump);
 has_delay_slot();
 }
 }
-void MacroAssembler::b_far(Label& L)
+void MacroAssembler::b_far(Label& L) {
-{
 if (L.is_bound()) {
 b_far(target(L));
 } else {
 volatile address dest = target(L);
 /*
 MacroAssembler::pd_patch_instruction branch=55651ed514, target=55651ef6d8
 0x00000055651ed514: dadd at, ra, zero
 0x00000055651ed518: [4110001]bgezal zero, 0x00000055651ed520
 0x00000055651ed528: daddu t9, t9, ra
 0x00000055651ed52c: dadd ra, at, zero
 0x00000055651ed530: jr t9
 0x00000055651ed534: sll zero, zero, 0
 */
 move(AT, RA);
 emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1));
 nop();
 lui(T9, 0); // to be patched
 ori(T9, T9, 0);
 daddu(T9, T9, RA);
 move(RA, AT);
 jr(T9);
 }
 }
-void MacroAssembler::b_far(address entry)
+void MacroAssembler::b_far(address entry) {
-{
 u_char * cur_pc = pc();
 /* Jin: Near/Far jump */
-if(is_simm16((entry - pc() - 4) / 4))
+if(is_simm16((entry - pc() - 4) / 4)) {
-{
 b(offset(entry));
-}
+} else {
-else
-{
 /* address must be bounded */
 move(AT, RA);
 emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1));
 nop();
 li32(T9, entry - pc());
 daddu(T9, T9, RA);
 move(RA, AT);
 jr(T9);
 beq(AT, temp_reg, done);
 delayed()->nop();
 }
-// NOTE: we dont increment the SP after call like the x86 version, maybe this is a problem, FIXME.
 // the stack pointer adjustment is needed. see InterpreterMacroAssembler::super_call_VM_leaf
 // this method will handle the stack problem, you need not to preserve the stack space for the argument now
-void MacroAssembler::call_VM_leaf_base(address entry_point,
+void MacroAssembler::call_VM_leaf_base(address entry_point, int number_of_arguments) {
-int number_of_arguments) {
-//call(RuntimeAddress(entry_point));
-//increment(rsp, number_of_arguments * wordSize);
 Label L, E;
 assert(number_of_arguments <= 4, "just check");
 andi(AT, SP, 0xf);
 void MacroAssembler::call_VM_base(Register oop_result,
 Register java_thread,
 Register last_java_sp,
 address  entry_point,
 int      number_of_arguments,
 bool     check_exceptions) {
 address before_call_pc;
 // determine java_thread register
 if (!java_thread->is_valid()) {
 #ifndef OPT_THREAD
 // do the call
 move(A0, java_thread);
 call(entry_point, relocInfo::runtime_call_type);
 delayed()->nop();
+//MacroAssembler::call_VM_leaf_base(entry_point, number_of_arguments);
 // restore the thread (cannot use the pushed argument since arguments
 // may be overwritten by C code generated by an optimizing compiler);
 // however can use the register value directly if it is callee saved.
 #ifndef OPT_THREAD
 {
 Label L;
 get_thread(AT);
 beq(java_thread, AT, L);
 delayed()->nop();
-stop("MacroAssembler::call_VM_base: edi not callee saved?");
+stop("MacroAssembler::call_VM_base: TREG not callee saved?");
 bind(L);
 }
 #endif
 #endif
 }
 sd(last_java_sp, Address(thread, JavaThread::last_Java_sp_offset()));
 }
 //////////////////////////////////////////////////////////////////////////////////
 #if INCLUDE_ALL_GCS
 void MacroAssembler::g1_write_barrier_pre(Register obj,
 Register pre_val,
 // Does store cross heap regions?
 xorr(AT, store_addr, new_val);
 dsrl(AT, AT, HeapRegion::LogOfHRGrainBytes);
 beq(AT, R0, done);
 nop();
 // crosses regions, storing NULL?
 beq(new_val, R0, done);
 nop();
 nop();
 // storing a region crossing, non-NULL oop, card is clean.
 // dirty card and log.
 move(AT, (int)CardTableModRefBS::dirty_card_val());
 sb(AT, card_addr, 0);
 lw(AT, queue_index);
 beq(AT, R0, runtime);
 nop();
 }
 //for UseCompressedOops Option
 void MacroAssembler::load_klass(Register dst, Register src) {
 #ifdef _LP64
 if(UseCompressedClassPointers){
 lwu(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 decode_klass_not_null(dst);
 } else
 #endif
 ld(dst, src, oopDesc::klass_offset_in_bytes());
 }
 void MacroAssembler::store_klass(Register dst, Register src) {
 #ifdef _LP64
 if(UseCompressedClassPointers){
 encode_klass_not_null(src);
 sw(src, dst, oopDesc::klass_offset_in_bytes());
 } else {
 #endif
 sd(src, dst, oopDesc::klass_offset_in_bytes());
 }
 }
 void MacroAssembler::load_prototype_header(Register dst, Register src) {
 load_klass(dst, src);
 ld(dst, Address(dst, Klass::prototype_header_offset()));
 sw(src, dst, oopDesc::klass_gap_offset_in_bytes());
 }
 }
 void MacroAssembler::load_heap_oop(Register dst, Address src) {
 if(UseCompressedOops){
 lwu(dst, src);
 decode_heap_oop(dst);
-} else{
+} else {
 ld(dst, src);
 }
 }
 void MacroAssembler::store_heap_oop(Address dst, Register src){
 if(UseCompressedOops){
 assert(!dst.uses(src), "not enough registers");
 encode_heap_oop(src);
 sw(src, dst);
-} else{
+} else {
 sd(src, dst);
 }
 }
 void MacroAssembler::store_heap_oop_null(Address dst){
 if(UseCompressedOops){
 sw(R0, dst);
-} else{
+} else {
 sd(R0, dst);
 }
 }
 #ifdef ASSERT
 void MacroAssembler::verify_heapbase(const char* msg) {
 assert (UseCompressedOops || UseCompressedClassPointers, "should be compressed");
 shr(r, LogMinObjAlignmentInBytes);
 }
 return;
 }
 movz(r, S5_heapbase, r);
 dsub(r, r, S5_heapbase);
 if (Universe::narrow_oop_shift() != 0) {
 assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong");
 shr(r, LogMinObjAlignmentInBytes);
 }
 }
 void MacroAssembler::encode_heap_oop(Register dst, Register src) {
 #ifdef ASSERT
 verify_heapbase("MacroAssembler::encode_heap_oop:heap base corrupted?");
 }
 }
 }
 void MacroAssembler::encode_heap_oop_not_null(Register r) {
 assert (UseCompressedOops, "should be compressed");
 #ifdef ASSERT
 if (CheckCompressedOops) {
 Label ok;
 bne(r, R0, ok);
 delayed()->nop();
 stop("null oop passed to encode_heap_oop_not_null");
 bind(ok);
 }
 #endif
 verify_oop(r, "broken oop in encode_heap_oop_not_null");
 if (Universe::narrow_oop_base() != NULL) {
 dsub(r, r, S5_heapbase);
 }
 }
 }
 void MacroAssembler::encode_heap_oop_not_null(Register dst, Register src) {
 assert (UseCompressedOops, "should be compressed");
 #ifdef ASSERT
 if (CheckCompressedOops) {
 Label ok;
 bne(src, R0, ok);
 delayed()->nop();
 stop("null oop passed to encode_heap_oop_not_null2");
 bind(ok);
+}
+#endif
+verify_oop(src, "broken oop in encode_heap_oop_not_null2");
+if (Universe::narrow_oop_base() != NULL) {
+dsub(dst, src, S5_heapbase);
+if (Universe::narrow_oop_shift() != 0) {
+assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong");
+shr(dst, LogMinObjAlignmentInBytes);
 }
-#endif
+} else {
-verify_oop(src, "broken oop in encode_heap_oop_not_null2");
+if (Universe::narrow_oop_shift() != 0) {
+assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong");
-if (Universe::narrow_oop_base() != NULL) {
+dsrl(dst, src, LogMinObjAlignmentInBytes);
-dsub(dst, src, S5_heapbase);
-if (Universe::narrow_oop_shift() != 0) {
-assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong");
-shr(dst, LogMinObjAlignmentInBytes);
-}
 } else {
-if (Universe::narrow_oop_shift() != 0) {
+if (dst != src) move(dst, src);
-assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong");
-dsrl(dst, src, LogMinObjAlignmentInBytes);
-} else {
-if (dst != src) move(dst, src);
-}
 }
+}
 }
 void  MacroAssembler::decode_heap_oop(Register r) {
 #ifdef ASSERT
 verify_heapbase("MacroAssembler::decode_heap_oop corrupted?");
 }
 if (Universe::narrow_klass_shift() != 0) {
 assert (LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong");
 shr(r, LogKlassAlignmentInBytes);
 }
-// Not neccessary for MIPS at all.
-//if (Universe::narrow_klass_base() != NULL) {
-//  reinit_heapbase();
-//}
 }
 void MacroAssembler::encode_klass_not_null(Register dst, Register src) {
 if (dst == src) {
 encode_klass_not_null(src);
 return;
 }
 if (value <  0) { incrementl(reg, -value); return; }
 if (value == 0) {                        ; return; }
-if(Assembler::is_simm16(value)) {
+if (Assembler::is_simm16(value)) {
 NOT_LP64(addiu(reg, reg, -value));
 LP64_ONLY(move(AT, value); subu32(reg, reg, AT));
 } else {
 move(AT, value);
 LP64_ONLY(subu32(reg, reg, AT)) NOT_LP64(subu(reg, reg, AT));
 // non-primary types such as array-of-interface.  Otherwise, each such
 // type would need its own customized SSA.
 // We move this check to the front of the fast path because many
 // type checks are in fact trivially successful in this manner,
 // so we get a nicely predicted branch right at the start of the check.
-//cmpptr(sub_klass, super_klass);
-//local_jcc(Assembler::equal, *L_success);
 beq(sub_klass, super_klass, *L_success);
 delayed()->nop();
 // Check the supertype display:
 if (must_load_sco) {
 // Positive movl does right thing on LP64.
 lwu(temp_reg, super_klass, sco_offset);
 super_check_offset = RegisterOrConstant(temp_reg);
 }
 dsll(AT, super_check_offset.register_or_noreg(), Address::times_1);
 daddu(AT, sub_klass, AT);
 ld(AT, AT, super_check_offset.constant_or_zero()*Address::times_1);
 // what we need immediately.
 // So if it was a primary super, we can just fail immediately.
 // Otherwise, it's the slow path for us (no success at this point).
 if (super_check_offset.is_register()) {
 beq(super_klass, AT, *L_success);
 delayed()->nop();
 addi(AT, super_check_offset.as_register(), -sc_offset);
 if (L_failure == &L_fallthrough) {
 beq(AT, R0, *L_slow_path);
 delayed()->nop();
 } else {
 bne(AT, R0, *L_failure);
 delayed()->nop();
 b(*L_slow_path);
 delayed()->nop();
 }
 } else if (super_check_offset.as_constant() == sc_offset) {
 // Need a slow path; fast failure is impossible.
 if (L_slow_path == &L_fallthrough) {
 beq(super_klass, AT, *L_success);
 delayed()->nop();
 } else {
 bne(super_klass, AT, *L_slow_path);
 delayed()->nop();
 b(*L_success);
 delayed()->nop();
 }
 } else {
 // No slow path; it's a fast decision.
 if (L_failure == &L_fallthrough) {
 beq(super_klass, AT, *L_success);
 delayed()->nop();
 } else {
 bne(super_klass, AT, *L_failure);
 delayed()->nop();
 b(*L_success);
 delayed()->nop();
 }
 }
 bind(L_fallthrough);
 // Do a linear scan of the secondary super-klass chain.
 // This code is rarely used, so simplicity is a virtue here.
 // The repne_scan instruction uses fixed registers, which we must spill.
 // Don't worry too much about pre-existing connections with the input regs.
-#if 0
-assert(sub_klass != T9, "killed reg"); // killed by mov(rax, super)
-assert(sub_klass != T1, "killed reg"); // killed by lea(rcx, &pst_counter)
-#endif
 // Get super_klass value into rax (even if it was in rdi or rcx).
 #ifndef PRODUCT
 int* pst_counter = &SharedRuntime::_partial_subtype_ctr;
 ExternalAddress pst_counter_addr((address) pst_counter);
 NOT_LP64(  incrementl(pst_counter_addr) );
-//LP64_ONLY( lea(rcx, pst_counter_addr) );
-//LP64_ONLY( incrementl(Address(rcx, 0)) );
 #endif //PRODUCT
 // We will consult the secondary-super array.
 ld(temp_reg, secondary_supers_addr);
 // Load the array length.  (Positive movl does right thing on LP64.)
 // Success.  Cache the super we found and proceed in triumph.
 #undef IS_A_TEMP
 bind(L_fallthrough);
 }
 void MacroAssembler::get_vm_result(Register oop_result, Register java_thread) {
 ld(oop_result, Address(java_thread, JavaThread::vm_result_offset()));
 sd(R0, Address(java_thread, JavaThread::vm_result_offset()));
 verify_oop(oop_result, "broken oop in call_VM_base");
 }
 round_to(scan_temp, BytesPerLong);
 }
 // Adjust recv_klass by scaled itable_index, so we can free itable_index.
 assert(itableMethodEntry::size() * wordSize == wordSize, "adjust the scaling in the code below");
-//  lea(recv_klass, Address(recv_klass, itable_index, Address::times_ptr, itentry_off));
 if (itable_index.is_constant()) {
 set64(AT, (int)itable_index.is_constant());
 dsll(AT, AT, (int)Address::times_ptr);
 } else {
 dsll(AT, itable_index.as_register(), (int)Address::times_ptr);
 }
 daddu(AT, AT, recv_klass);
 daddiu(recv_klass, AT, itentry_off);
-// for (scan = klass->itable(); scan->interface() != NULL; scan += scan_step) {
-//   if (scan->interface() == intf) {
-//     result = (klass + scan->offset() + itable_index);
-//   }
-// }
 Label search, found_method;
 for (int peel = 1; peel >= 0; peel--) {
 ld(method_result, Address(scan_temp, itableOffsetEntry::interface_offset_in_bytes()));
 bind(found_method);
 // Got a hit.
 lw(scan_temp, Address(scan_temp, itableOffsetEntry::offset_offset_in_bytes()));
-//ld(method_result, Address(recv_klass, scan_temp, Address::times_1));
 if(UseLoongsonISA) {
 gsldx(method_result, recv_klass, scan_temp, 0);
 } else {
 daddu(AT, recv_klass, scan_temp);
 ld(method_result, AT);
 }
 }
 // virtual method calling
 void MacroAssembler::lookup_virtual_method(Register recv_klass,
 RegisterOrConstant vtable_index,
 Register method_result) {

comparison: src/cpu/mips/vm/macroAssembler_mips.cpp

src/cpu/mips/vm/macroAssembler_mips.cpp

Mercurial > jdk8-mips64-public > hotspot / file comparison

comparison: src/cpu/mips/vm/macroAssembler_mips.cpp

src/cpu/mips/vm/macroAssembler_mips.cpp