src/cpu/ppc/vm/ppc.ad

changeset 9333
2fccf735a116
parent 8906
584eac5794ff
child 9448
73d689add964
equal deleted inserted replaced
9332:ae93017b2930 9333:2fccf735a116
1 // 1 //
2 // Copyright (c) 2011, 2014, Oracle and/or its affiliates. All rights reserved. 2 // Copyright (c) 2011, 2018, Oracle and/or its affiliates. All rights reserved.
3 // Copyright (c) 2012, 2017 SAP SE. All rights reserved. 3 // Copyright (c) 2012, 2017 SAP SE. All rights reserved.
4 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 // 5 //
6 // This code is free software; you can redistribute it and/or modify it 6 // This code is free software; you can redistribute it and/or modify it
7 // under the terms of the GNU General Public License version 2 only, as 7 // under the terms of the GNU General Public License version 2 only, as
2172 assert(MaxVectorSize == 8, ""); 2172 assert(MaxVectorSize == 8, "");
2173 return 8; 2173 return 8;
2174 } 2174 }
2175 2175
2176 // Vector ideal reg. 2176 // Vector ideal reg.
2177 const int Matcher::vector_ideal_reg(int size) { 2177 const uint Matcher::vector_ideal_reg(int size) {
2178 assert(MaxVectorSize == 8 && size == 8, ""); 2178 assert(MaxVectorSize == 8 && size == 8, "");
2179 return Op_RegL; 2179 return Op_RegL;
2180 } 2180 }
2181 2181
2182 const int Matcher::vector_shift_count_ideal_reg(int size) { 2182 const uint Matcher::vector_shift_count_ideal_reg(int size) {
2183 fatal("vector shift is not supported"); 2183 fatal("vector shift is not supported");
2184 return Node::NotAMachineReg; 2184 return Node::NotAMachineReg;
2185 } 2185 }
2186 2186
2187 // Limits on vector size (number of elements) loaded into vector. 2187 // Limits on vector size (number of elements) loaded into vector.

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