src/share/vm/opto/regmask.hpp

Wed, 27 Apr 2016 01:25:04 +0800

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aoqi
date
Wed, 27 Apr 2016 01:25:04 +0800
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aoqi@0 1 /*
aoqi@0 2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
aoqi@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0 4 *
aoqi@0 5 * This code is free software; you can redistribute it and/or modify it
aoqi@0 6 * under the terms of the GNU General Public License version 2 only, as
aoqi@0 7 * published by the Free Software Foundation.
aoqi@0 8 *
aoqi@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0 12 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0 13 * accompanied this code).
aoqi@0 14 *
aoqi@0 15 * You should have received a copy of the GNU General Public License version
aoqi@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0 18 *
aoqi@0 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0 20 * or visit www.oracle.com if you need additional information or have any
aoqi@0 21 * questions.
aoqi@0 22 *
aoqi@0 23 */
aoqi@0 24
aoqi@0 25 #ifndef SHARE_VM_OPTO_REGMASK_HPP
aoqi@0 26 #define SHARE_VM_OPTO_REGMASK_HPP
aoqi@0 27
aoqi@0 28 #include "code/vmreg.hpp"
aoqi@0 29 #include "libadt/port.hpp"
aoqi@0 30 #include "opto/optoreg.hpp"
aoqi@0 31 #ifdef TARGET_ARCH_MODEL_x86_32
aoqi@0 32 # include "adfiles/adGlobals_x86_32.hpp"
aoqi@0 33 #endif
aoqi@0 34 #ifdef TARGET_ARCH_MODEL_x86_64
aoqi@0 35 # include "adfiles/adGlobals_x86_64.hpp"
aoqi@0 36 #endif
aoqi@0 37 #ifdef TARGET_ARCH_MODEL_sparc
aoqi@0 38 # include "adfiles/adGlobals_sparc.hpp"
aoqi@0 39 #endif
aoqi@0 40 #ifdef TARGET_ARCH_MODEL_zero
aoqi@0 41 # include "adfiles/adGlobals_zero.hpp"
aoqi@0 42 #endif
aoqi@0 43 #ifdef TARGET_ARCH_MODEL_arm
aoqi@0 44 # include "adfiles/adGlobals_arm.hpp"
aoqi@0 45 #endif
aoqi@0 46 #ifdef TARGET_ARCH_MODEL_ppc_32
aoqi@0 47 # include "adfiles/adGlobals_ppc_32.hpp"
aoqi@0 48 #endif
aoqi@0 49 #ifdef TARGET_ARCH_MODEL_ppc_64
aoqi@0 50 # include "adfiles/adGlobals_ppc_64.hpp"
aoqi@0 51 #endif
aoqi@0 52
aoqi@0 53 // Some fun naming (textual) substitutions:
aoqi@0 54 //
aoqi@0 55 // RegMask::get_low_elem() ==> RegMask::find_first_elem()
aoqi@0 56 // RegMask::Special ==> RegMask::Empty
aoqi@0 57 // RegMask::_flags ==> RegMask::is_AllStack()
aoqi@0 58 // RegMask::operator<<=() ==> RegMask::Insert()
aoqi@0 59 // RegMask::operator>>=() ==> RegMask::Remove()
aoqi@0 60 // RegMask::Union() ==> RegMask::OR
aoqi@0 61 // RegMask::Inter() ==> RegMask::AND
aoqi@0 62 //
aoqi@0 63 // OptoRegister::RegName ==> OptoReg::Name
aoqi@0 64 //
aoqi@0 65 // OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version
aoqi@0 66 //
aoqi@0 67 // numregs in chaitin ==> proper degree in chaitin
aoqi@0 68
aoqi@0 69 //-------------Non-zero bit search methods used by RegMask---------------------
aoqi@0 70 // Find lowest 1, or return 32 if empty
aoqi@0 71 int find_lowest_bit( uint32 mask );
aoqi@0 72 // Find highest 1, or return 32 if empty
aoqi@0 73 int find_hihghest_bit( uint32 mask );
aoqi@0 74
aoqi@0 75 //------------------------------RegMask----------------------------------------
aoqi@0 76 // The ADL file describes how to print the machine-specific registers, as well
aoqi@0 77 // as any notion of register classes. We provide a register mask, which is
aoqi@0 78 // just a collection of Register numbers.
aoqi@0 79
aoqi@0 80 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY.
aoqi@0 81 // RM_SIZE is the size of a register mask in words.
aoqi@0 82 // FORALL_BODY replicates a BODY macro once per word in the register mask.
aoqi@0 83 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files.
aoqi@0 84 // However, it means the ADLC can redefine the unroll macro and all loops
aoqi@0 85 // over register masks will be unrolled by the correct amount.
aoqi@0 86
aoqi@0 87 class RegMask VALUE_OBJ_CLASS_SPEC {
aoqi@0 88 union {
aoqi@0 89 double _dummy_force_double_alignment[RM_SIZE>>1];
aoqi@0 90 // Array of Register Mask bits. This array is large enough to cover
aoqi@0 91 // all the machine registers and all parameters that need to be passed
aoqi@0 92 // on the stack (stack registers) up to some interesting limit. Methods
aoqi@0 93 // that need more parameters will NOT be compiled. On Intel, the limit
aoqi@0 94 // is something like 90+ parameters.
aoqi@0 95 int _A[RM_SIZE];
aoqi@0 96 };
aoqi@0 97
aoqi@0 98 enum {
aoqi@0 99 _WordBits = BitsPerInt,
aoqi@0 100 _LogWordBits = LogBitsPerInt,
aoqi@0 101 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef
aoqi@0 102 };
aoqi@0 103
aoqi@0 104 public:
aoqi@0 105 enum { CHUNK_SIZE = RM_SIZE*_WordBits };
aoqi@0 106
aoqi@0 107 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
aoqi@0 108 // Also, consider the maximum alignment size for a normally allocated
aoqi@0 109 // value. Since we allocate register pairs but not register quads (at
aoqi@0 110 // present), this alignment is SlotsPerLong (== 2). A normally
aoqi@0 111 // aligned allocated register is either a single register, or a pair
aoqi@0 112 // of adjacent registers, the lower-numbered being even.
aoqi@0 113 // See also is_aligned_Pairs() below, and the padding added before
aoqi@0 114 // Matcher::_new_SP to keep allocated pairs aligned properly.
aoqi@0 115 // If we ever go to quad-word allocations, SlotsPerQuad will become
aoqi@0 116 // the controlling alignment constraint. Note that this alignment
aoqi@0 117 // requirement is internal to the allocator, and independent of any
aoqi@0 118 // particular platform.
aoqi@0 119 enum { SlotsPerLong = 2,
aoqi@0 120 SlotsPerVecS = 1,
aoqi@0 121 SlotsPerVecD = 2,
aoqi@0 122 SlotsPerVecX = 4,
aoqi@0 123 SlotsPerVecY = 8 };
aoqi@0 124
aoqi@0 125 // A constructor only used by the ADLC output. All mask fields are filled
aoqi@0 126 // in directly. Calls to this look something like RM(1,2,3,4);
aoqi@0 127 RegMask(
aoqi@0 128 # define BODY(I) int a##I,
aoqi@0 129 FORALL_BODY
aoqi@0 130 # undef BODY
aoqi@0 131 int dummy = 0 ) {
aoqi@0 132 # define BODY(I) _A[I] = a##I;
aoqi@0 133 FORALL_BODY
aoqi@0 134 # undef BODY
aoqi@0 135 }
aoqi@0 136
aoqi@0 137 // Handy copying constructor
aoqi@0 138 RegMask( RegMask *rm ) {
aoqi@0 139 # define BODY(I) _A[I] = rm->_A[I];
aoqi@0 140 FORALL_BODY
aoqi@0 141 # undef BODY
aoqi@0 142 }
aoqi@0 143
aoqi@0 144 // Construct an empty mask
aoqi@0 145 RegMask( ) { Clear(); }
aoqi@0 146
aoqi@0 147 // Construct a mask with a single bit
aoqi@0 148 RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); }
aoqi@0 149
aoqi@0 150 // Check for register being in mask
aoqi@0 151 int Member( OptoReg::Name reg ) const {
aoqi@0 152 assert( reg < CHUNK_SIZE, "" );
aoqi@0 153 return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1)));
aoqi@0 154 }
aoqi@0 155
aoqi@0 156 // The last bit in the register mask indicates that the mask should repeat
aoqi@0 157 // indefinitely with ONE bits. Returns TRUE if mask is infinite or
aoqi@0 158 // unbounded in size. Returns FALSE if mask is finite size.
aoqi@0 159 int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); }
aoqi@0 160
aoqi@0 161 // Work around an -xO3 optimization problme in WS6U1. The old way:
aoqi@0 162 // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); }
aoqi@0 163 // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack()
aoqi@0 164 // follows an Insert() loop, like the one found in init_spill_mask(). Using
aoqi@0 165 // Insert() instead works because the index into _A in computed instead of
aoqi@0 166 // constant. See bug 4665841.
aoqi@0 167 void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); }
aoqi@0 168
aoqi@0 169 // Test for being a not-empty mask.
aoqi@0 170 int is_NotEmpty( ) const {
aoqi@0 171 int tmp = 0;
aoqi@0 172 # define BODY(I) tmp |= _A[I];
aoqi@0 173 FORALL_BODY
aoqi@0 174 # undef BODY
aoqi@0 175 return tmp;
aoqi@0 176 }
aoqi@0 177
aoqi@0 178 // Find lowest-numbered register from mask, or BAD if mask is empty.
aoqi@0 179 OptoReg::Name find_first_elem() const {
aoqi@0 180 int base, bits;
aoqi@0 181 # define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else
aoqi@0 182 FORALL_BODY
aoqi@0 183 # undef BODY
aoqi@0 184 { base = OptoReg::Bad; bits = 1<<0; }
aoqi@0 185 return OptoReg::Name(base + find_lowest_bit(bits));
aoqi@0 186 }
aoqi@0 187 // Get highest-numbered register from mask, or BAD if mask is empty.
aoqi@0 188 OptoReg::Name find_last_elem() const {
aoqi@0 189 int base, bits;
aoqi@0 190 # define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else
aoqi@0 191 FORALL_BODY
aoqi@0 192 # undef BODY
aoqi@0 193 { base = OptoReg::Bad; bits = 1<<0; }
aoqi@0 194 return OptoReg::Name(base + find_hihghest_bit(bits));
aoqi@0 195 }
aoqi@0 196
aoqi@0 197 // Find the lowest-numbered register pair in the mask. Return the
aoqi@0 198 // HIGHEST register number in the pair, or BAD if no pairs.
aoqi@0 199 // Assert that the mask contains only bit pairs.
aoqi@0 200 OptoReg::Name find_first_pair() const;
aoqi@0 201
aoqi@0 202 // Clear out partial bits; leave only aligned adjacent bit pairs.
aoqi@0 203 void clear_to_pairs();
aoqi@0 204 // Smear out partial bits; leave only aligned adjacent bit pairs.
aoqi@0 205 void smear_to_pairs();
aoqi@0 206 // Verify that the mask contains only aligned adjacent bit pairs
aoqi@0 207 void verify_pairs() const { assert( is_aligned_pairs(), "mask is not aligned, adjacent pairs" ); }
aoqi@0 208 // Test that the mask contains only aligned adjacent bit pairs
aoqi@0 209 bool is_aligned_pairs() const;
aoqi@0 210
aoqi@0 211 // mask is a pair of misaligned registers
aoqi@0 212 bool is_misaligned_pair() const { return Size()==2 && !is_aligned_pairs(); }
aoqi@0 213 // Test for single register
aoqi@0 214 int is_bound1() const;
aoqi@0 215 // Test for a single adjacent pair
aoqi@0 216 int is_bound_pair() const;
aoqi@0 217 // Test for a single adjacent set of ideal register's size.
aoqi@0 218 int is_bound(uint ireg) const {
aoqi@0 219 if (is_vector(ireg)) {
aoqi@0 220 if (is_bound_set(num_registers(ireg)))
aoqi@0 221 return true;
aoqi@0 222 } else if (is_bound1() || is_bound_pair()) {
aoqi@0 223 return true;
aoqi@0 224 }
aoqi@0 225 return false;
aoqi@0 226 }
aoqi@0 227
aoqi@0 228 // Find the lowest-numbered register set in the mask. Return the
aoqi@0 229 // HIGHEST register number in the set, or BAD if no sets.
aoqi@0 230 // Assert that the mask contains only bit sets.
aoqi@0 231 OptoReg::Name find_first_set(const int size) const;
aoqi@0 232
aoqi@0 233 // Clear out partial bits; leave only aligned adjacent bit sets of size.
aoqi@0 234 void clear_to_sets(const int size);
aoqi@0 235 // Smear out partial bits to aligned adjacent bit sets.
aoqi@0 236 void smear_to_sets(const int size);
aoqi@0 237 // Verify that the mask contains only aligned adjacent bit sets
aoqi@0 238 void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); }
aoqi@0 239 // Test that the mask contains only aligned adjacent bit sets
aoqi@0 240 bool is_aligned_sets(const int size) const;
aoqi@0 241
aoqi@0 242 // mask is a set of misaligned registers
aoqi@0 243 bool is_misaligned_set(int size) const { return (int)Size()==size && !is_aligned_sets(size);}
aoqi@0 244
aoqi@0 245 // Test for a single adjacent set
aoqi@0 246 int is_bound_set(const int size) const;
aoqi@0 247
aoqi@0 248 static bool is_vector(uint ireg);
aoqi@0 249 static int num_registers(uint ireg);
aoqi@0 250
aoqi@0 251 // Fast overlap test. Non-zero if any registers in common.
aoqi@0 252 int overlap( const RegMask &rm ) const {
aoqi@0 253 return
aoqi@0 254 # define BODY(I) (_A[I] & rm._A[I]) |
aoqi@0 255 FORALL_BODY
aoqi@0 256 # undef BODY
aoqi@0 257 0 ;
aoqi@0 258 }
aoqi@0 259
aoqi@0 260 // Special test for register pressure based splitting
aoqi@0 261 // UP means register only, Register plus stack, or stack only is DOWN
aoqi@0 262 bool is_UP() const;
aoqi@0 263
aoqi@0 264 // Clear a register mask
aoqi@0 265 void Clear( ) {
aoqi@0 266 # define BODY(I) _A[I] = 0;
aoqi@0 267 FORALL_BODY
aoqi@0 268 # undef BODY
aoqi@0 269 }
aoqi@0 270
aoqi@0 271 // Fill a register mask with 1's
aoqi@0 272 void Set_All( ) {
aoqi@0 273 # define BODY(I) _A[I] = -1;
aoqi@0 274 FORALL_BODY
aoqi@0 275 # undef BODY
aoqi@0 276 }
aoqi@0 277
aoqi@0 278 // Insert register into mask
aoqi@0 279 void Insert( OptoReg::Name reg ) {
aoqi@0 280 assert( reg < CHUNK_SIZE, "" );
aoqi@0 281 _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1)));
aoqi@0 282 }
aoqi@0 283
aoqi@0 284 // Remove register from mask
aoqi@0 285 void Remove( OptoReg::Name reg ) {
aoqi@0 286 assert( reg < CHUNK_SIZE, "" );
aoqi@0 287 _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1)));
aoqi@0 288 }
aoqi@0 289
aoqi@0 290 // OR 'rm' into 'this'
aoqi@0 291 void OR( const RegMask &rm ) {
aoqi@0 292 # define BODY(I) this->_A[I] |= rm._A[I];
aoqi@0 293 FORALL_BODY
aoqi@0 294 # undef BODY
aoqi@0 295 }
aoqi@0 296
aoqi@0 297 // AND 'rm' into 'this'
aoqi@0 298 void AND( const RegMask &rm ) {
aoqi@0 299 # define BODY(I) this->_A[I] &= rm._A[I];
aoqi@0 300 FORALL_BODY
aoqi@0 301 # undef BODY
aoqi@0 302 }
aoqi@0 303
aoqi@0 304 // Subtract 'rm' from 'this'
aoqi@0 305 void SUBTRACT( const RegMask &rm ) {
aoqi@0 306 # define BODY(I) _A[I] &= ~rm._A[I];
aoqi@0 307 FORALL_BODY
aoqi@0 308 # undef BODY
aoqi@0 309 }
aoqi@0 310
aoqi@0 311 // Compute size of register mask: number of bits
aoqi@0 312 uint Size() const;
aoqi@0 313
aoqi@0 314 #ifndef PRODUCT
aoqi@0 315 void print() const { dump(); }
aoqi@0 316 void dump(outputStream *st = tty) const; // Print a mask
aoqi@0 317 #endif
aoqi@0 318
aoqi@0 319 static const RegMask Empty; // Common empty mask
aoqi@0 320
aoqi@0 321 static bool can_represent(OptoReg::Name reg) {
aoqi@0 322 // NOTE: -1 in computation reflects the usage of the last
aoqi@0 323 // bit of the regmask as an infinite stack flag and
aoqi@0 324 // -7 is to keep mask aligned for largest value (VecY).
aoqi@0 325 return (int)reg < (int)(CHUNK_SIZE-1);
aoqi@0 326 }
aoqi@0 327 static bool can_represent_arg(OptoReg::Name reg) {
aoqi@0 328 // NOTE: -SlotsPerVecY in computation reflects the need
aoqi@0 329 // to keep mask aligned for largest value (VecY).
aoqi@0 330 return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecY);
aoqi@0 331 }
aoqi@0 332 };
aoqi@0 333
aoqi@0 334 // Do not use this constant directly in client code!
aoqi@0 335 #undef RM_SIZE
aoqi@0 336
aoqi@0 337 #endif // SHARE_VM_OPTO_REGMASK_HPP

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