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src/cpu/x86/vm/globals_x86.hpp@f90c822e73f8 (annotated)

src/cpu/x86/vm/globals_x86.hpp

Wed, 27 Apr 2016 01:25:04 +0800

author

aoqi

date

Wed, 27 Apr 2016 01:25:04 +0800

changeset 0

f90c822e73f8

child 6876

710a3c8b516e

permissions

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http://hg.openjdk.java.net/jdk8u/jdk8u/hotspot/
changeset: 6782:28b50d07f6f8
tag: jdk8u25-b17

aoqi@0	1	/*
aoqi@0	2	* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
aoqi@0	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0	4	*
aoqi@0	5	* This code is free software; you can redistribute it and/or modify it
aoqi@0	6	* under the terms of the GNU General Public License version 2 only, as
aoqi@0	7	* published by the Free Software Foundation.
aoqi@0	8	*
aoqi@0	9	* This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0	12	* version 2 for more details (a copy is included in the LICENSE file that
aoqi@0	13	* accompanied this code).
aoqi@0	14	*
aoqi@0	15	* You should have received a copy of the GNU General Public License version
aoqi@0	16	* 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0	18	*
aoqi@0	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0	20	* or visit www.oracle.com if you need additional information or have any
aoqi@0	21	* questions.
aoqi@0	22	*
aoqi@0	23	*/
aoqi@0	24
aoqi@0	25	#ifndef CPU_X86_VM_GLOBALS_X86_HPP
aoqi@0	26	#define CPU_X86_VM_GLOBALS_X86_HPP
aoqi@0	27
aoqi@0	28	#include "utilities/globalDefinitions.hpp"
aoqi@0	29	#include "utilities/macros.hpp"
aoqi@0	30
aoqi@0	31	// Sets the default values for platform dependent flags used by the runtime system.
aoqi@0	32	// (see globals.hpp)
aoqi@0	33
aoqi@0	34	define_pd_global(bool, ConvertSleepToYield, true);
aoqi@0	35	define_pd_global(bool, ShareVtableStubs, true);
aoqi@0	36	define_pd_global(bool, CountInterpCalls, true);
aoqi@0	37	define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this
aoqi@0	38
aoqi@0	39	define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks
aoqi@0	40	define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86.
aoqi@0	41	define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast
aoqi@0	42
aoqi@0	43	// See 4827828 for this change. There is no globals_core_i486.hpp. I can't
aoqi@0	44	// assign a different value for C2 without touching a number of files. Use
aoqi@0	45	// #ifdef to minimize the change as it's late in Mantis. -- FIXME.
aoqi@0	46	// c1 doesn't have this problem because the fix to 4858033 assures us
aoqi@0	47	// the the vep is aligned at CodeEntryAlignment whereas c2 only aligns
aoqi@0	48	// the uep and the vep doesn't get real alignment but just slops on by
aoqi@0	49	// only assured that the entry instruction meets the 5 byte size requirement.
aoqi@0	50	#ifdef COMPILER2
aoqi@0	51	define_pd_global(intx, CodeEntryAlignment, 32);
aoqi@0	52	#else
aoqi@0	53	define_pd_global(intx, CodeEntryAlignment, 16);
aoqi@0	54	#endif // COMPILER2
aoqi@0	55	define_pd_global(intx, OptoLoopAlignment, 16);
aoqi@0	56	define_pd_global(intx, InlineFrequencyCount, 100);
aoqi@0	57	define_pd_global(intx, InlineSmallCode, 1000);
aoqi@0	58
aoqi@0	59	define_pd_global(intx, StackYellowPages, NOT_WINDOWS(2) WINDOWS_ONLY(3));
aoqi@0	60	define_pd_global(intx, StackRedPages, 1);
aoqi@0	61	#ifdef AMD64
aoqi@0	62	// Very large C++ stack frames using solaris-amd64 optimized builds
aoqi@0	63	// due to lack of optimization caused by C++ compiler bugs
aoqi@0	64	define_pd_global(intx, StackShadowPages, NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2));
aoqi@0	65	#else
aoqi@0	66	define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5));
aoqi@0	67	#endif // AMD64
aoqi@0	68
aoqi@0	69	define_pd_global(intx, PreInflateSpin, 10);
aoqi@0	70
aoqi@0	71	define_pd_global(bool, RewriteBytecodes, true);
aoqi@0	72	define_pd_global(bool, RewriteFrequentPairs, true);
aoqi@0	73
aoqi@0	74	#ifdef _ALLBSD_SOURCE
aoqi@0	75	define_pd_global(bool, UseMembar, true);
aoqi@0	76	#else
aoqi@0	77	define_pd_global(bool, UseMembar, false);
aoqi@0	78	#endif
aoqi@0	79
aoqi@0	80	// GC Ergo Flags
aoqi@0	81	define_pd_global(uintx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread
aoqi@0	82
aoqi@0	83	define_pd_global(uintx, TypeProfileLevel, 111);
aoqi@0	84
aoqi@0	85	#define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
aoqi@0	86	\
aoqi@0	87	develop(bool, IEEEPrecision, true, \
aoqi@0	88	"Enables IEEE precision (for INTEL only)") \
aoqi@0	89	\
aoqi@0	90	product(intx, FenceInstruction, 0, \
aoqi@0	91	"(Unsafe,Unstable) Experimental") \
aoqi@0	92	\
aoqi@0	93	product(intx, ReadPrefetchInstr, 0, \
aoqi@0	94	"Prefetch instruction to prefetch ahead") \
aoqi@0	95	\
aoqi@0	96	product(bool, UseStoreImmI16, true, \
aoqi@0	97	"Use store immediate 16-bits value instruction on x86") \
aoqi@0	98	\
aoqi@0	99	product(intx, UseAVX, 99, \
aoqi@0	100	"Highest supported AVX instructions set on x86/x64") \
aoqi@0	101	\
aoqi@0	102	product(bool, UseCLMUL, false, \
aoqi@0	103	"Control whether CLMUL instructions can be used on x86/x64") \
aoqi@0	104	\
aoqi@0	105	diagnostic(bool, UseIncDec, true, \
aoqi@0	106	"Use INC, DEC instructions on x86") \
aoqi@0	107	\
aoqi@0	108	product(bool, UseNewLongLShift, false, \
aoqi@0	109	"Use optimized bitwise shift left") \
aoqi@0	110	\
aoqi@0	111	product(bool, UseAddressNop, false, \
aoqi@0	112	"Use '0F 1F [addr]' NOP instructions on x86 cpus") \
aoqi@0	113	\
aoqi@0	114	product(bool, UseXmmLoadAndClearUpper, true, \
aoqi@0	115	"Load low part of XMM register and clear upper part") \
aoqi@0	116	\
aoqi@0	117	product(bool, UseXmmRegToRegMoveAll, false, \
aoqi@0	118	"Copy all XMM register bits when moving value between registers") \
aoqi@0	119	\
aoqi@0	120	product(bool, UseXmmI2D, false, \
aoqi@0	121	"Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
aoqi@0	122	\
aoqi@0	123	product(bool, UseXmmI2F, false, \
aoqi@0	124	"Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
aoqi@0	125	\
aoqi@0	126	product(bool, UseUnalignedLoadStores, false, \
aoqi@0	127	"Use SSE2 MOVDQU instruction for Arraycopy") \
aoqi@0	128	\
aoqi@0	129	product(bool, UseFastStosb, false, \
aoqi@0	130	"Use fast-string operation for zeroing: rep stosb") \
aoqi@0	131	\
aoqi@0	132	/* Use Restricted Transactional Memory for lock eliding */ \
aoqi@0	133	experimental(bool, UseRTMLocking, false, \
aoqi@0	134	"Enable RTM lock eliding for inflated locks in compiled code") \
aoqi@0	135	\
aoqi@0	136	experimental(bool, UseRTMForStackLocks, false, \
aoqi@0	137	"Enable RTM lock eliding for stack locks in compiled code") \
aoqi@0	138	\
aoqi@0	139	experimental(bool, UseRTMDeopt, false, \
aoqi@0	140	"Perform deopt and recompilation based on RTM abort ratio") \
aoqi@0	141	\
aoqi@0	142	experimental(uintx, RTMRetryCount, 5, \
aoqi@0	143	"Number of RTM retries on lock abort or busy") \
aoqi@0	144	\
aoqi@0	145	experimental(intx, RTMSpinLoopCount, 100, \
aoqi@0	146	"Spin count for lock to become free before RTM retry") \
aoqi@0	147	\
aoqi@0	148	experimental(intx, RTMAbortThreshold, 1000, \
aoqi@0	149	"Calculate abort ratio after this number of aborts") \
aoqi@0	150	\
aoqi@0	151	experimental(intx, RTMLockingThreshold, 10000, \
aoqi@0	152	"Lock count at which to do RTM lock eliding without " \
aoqi@0	153	"abort ratio calculation") \
aoqi@0	154	\
aoqi@0	155	experimental(intx, RTMAbortRatio, 50, \
aoqi@0	156	"Lock abort ratio at which to stop use RTM lock eliding") \
aoqi@0	157	\
aoqi@0	158	experimental(intx, RTMTotalCountIncrRate, 64, \
aoqi@0	159	"Increment total RTM attempted lock count once every n times") \
aoqi@0	160	\
aoqi@0	161	experimental(intx, RTMLockingCalculationDelay, 0, \
aoqi@0	162	"Number of milliseconds to wait before start calculating aborts " \
aoqi@0	163	"for RTM locking") \
aoqi@0	164	\
aoqi@0	165	experimental(bool, UseRTMXendForLockBusy, true, \
aoqi@0	166	"Use RTM Xend instead of Xabort when lock busy") \
aoqi@0	167	\
aoqi@0	168	/* assembler */ \
aoqi@0	169	product(bool, Use486InstrsOnly, false, \
aoqi@0	170	"Use 80486 Compliant instruction subset") \
aoqi@0	171	\
aoqi@0	172	product(bool, UseCountLeadingZerosInstruction, false, \
aoqi@0	173	"Use count leading zeros instruction") \
aoqi@0	174	\
aoqi@0	175	product(bool, UseCountTrailingZerosInstruction, false, \
aoqi@0	176	"Use count trailing zeros instruction") \
aoqi@0	177	\
aoqi@0	178	product(bool, UseBMI1Instructions, false, \
aoqi@0	179	"Use BMI instructions")
aoqi@0	180
aoqi@0	181	#endif // CPU_X86_VM_GLOBALS_X86_HPP