aoqi@0: /* aoqi@0: * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. aoqi@0: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. aoqi@0: * aoqi@0: * This code is free software; you can redistribute it and/or modify it aoqi@0: * under the terms of the GNU General Public License version 2 only, as aoqi@0: * published by the Free Software Foundation. aoqi@0: * aoqi@0: * This code is distributed in the hope that it will be useful, but WITHOUT aoqi@0: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or aoqi@0: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License aoqi@0: * version 2 for more details (a copy is included in the LICENSE file that aoqi@0: * accompanied this code). aoqi@0: * aoqi@0: * You should have received a copy of the GNU General Public License version aoqi@0: * 2 along with this work; if not, write to the Free Software Foundation, aoqi@0: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. aoqi@0: * aoqi@0: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA aoqi@0: * or visit www.oracle.com if you need additional information or have any aoqi@0: * questions. aoqi@0: * aoqi@0: */ aoqi@0: aoqi@0: #ifndef CPU_X86_VM_GLOBALS_X86_HPP aoqi@0: #define CPU_X86_VM_GLOBALS_X86_HPP aoqi@0: aoqi@0: #include "utilities/globalDefinitions.hpp" aoqi@0: #include "utilities/macros.hpp" aoqi@0: aoqi@0: // Sets the default values for platform dependent flags used by the runtime system. aoqi@0: // (see globals.hpp) aoqi@0: aoqi@0: define_pd_global(bool, ConvertSleepToYield, true); aoqi@0: define_pd_global(bool, ShareVtableStubs, true); aoqi@0: define_pd_global(bool, CountInterpCalls, true); aoqi@0: define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this aoqi@0: aoqi@0: define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks aoqi@0: define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86. aoqi@0: define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast aoqi@0: aoqi@0: // See 4827828 for this change. There is no globals_core_i486.hpp. I can't aoqi@0: // assign a different value for C2 without touching a number of files. Use aoqi@0: // #ifdef to minimize the change as it's late in Mantis. -- FIXME. aoqi@0: // c1 doesn't have this problem because the fix to 4858033 assures us aoqi@0: // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns aoqi@0: // the uep and the vep doesn't get real alignment but just slops on by aoqi@0: // only assured that the entry instruction meets the 5 byte size requirement. aoqi@0: #ifdef COMPILER2 aoqi@0: define_pd_global(intx, CodeEntryAlignment, 32); aoqi@0: #else aoqi@0: define_pd_global(intx, CodeEntryAlignment, 16); aoqi@0: #endif // COMPILER2 aoqi@0: define_pd_global(intx, OptoLoopAlignment, 16); aoqi@0: define_pd_global(intx, InlineFrequencyCount, 100); aoqi@0: define_pd_global(intx, InlineSmallCode, 1000); aoqi@0: aoqi@0: define_pd_global(intx, StackYellowPages, NOT_WINDOWS(2) WINDOWS_ONLY(3)); aoqi@0: define_pd_global(intx, StackRedPages, 1); aoqi@0: #ifdef AMD64 aoqi@0: // Very large C++ stack frames using solaris-amd64 optimized builds aoqi@0: // due to lack of optimization caused by C++ compiler bugs aoqi@0: define_pd_global(intx, StackShadowPages, NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2)); aoqi@0: #else aoqi@0: define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5)); aoqi@0: #endif // AMD64 aoqi@0: aoqi@0: define_pd_global(intx, PreInflateSpin, 10); aoqi@0: aoqi@0: define_pd_global(bool, RewriteBytecodes, true); aoqi@0: define_pd_global(bool, RewriteFrequentPairs, true); aoqi@0: aoqi@0: #ifdef _ALLBSD_SOURCE aoqi@0: define_pd_global(bool, UseMembar, true); aoqi@0: #else aoqi@0: define_pd_global(bool, UseMembar, false); aoqi@0: #endif aoqi@0: aoqi@0: // GC Ergo Flags aoqi@0: define_pd_global(uintx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread aoqi@0: aoqi@0: define_pd_global(uintx, TypeProfileLevel, 111); aoqi@0: aoqi@0: #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \ aoqi@0: \ aoqi@0: develop(bool, IEEEPrecision, true, \ aoqi@0: "Enables IEEE precision (for INTEL only)") \ aoqi@0: \ aoqi@0: product(intx, FenceInstruction, 0, \ aoqi@0: "(Unsafe,Unstable) Experimental") \ aoqi@0: \ aoqi@0: product(intx, ReadPrefetchInstr, 0, \ aoqi@0: "Prefetch instruction to prefetch ahead") \ aoqi@0: \ aoqi@0: product(bool, UseStoreImmI16, true, \ aoqi@0: "Use store immediate 16-bits value instruction on x86") \ aoqi@0: \ aoqi@0: product(intx, UseAVX, 99, \ aoqi@0: "Highest supported AVX instructions set on x86/x64") \ aoqi@0: \ aoqi@0: product(bool, UseCLMUL, false, \ aoqi@0: "Control whether CLMUL instructions can be used on x86/x64") \ aoqi@0: \ aoqi@0: diagnostic(bool, UseIncDec, true, \ aoqi@0: "Use INC, DEC instructions on x86") \ aoqi@0: \ aoqi@0: product(bool, UseNewLongLShift, false, \ aoqi@0: "Use optimized bitwise shift left") \ aoqi@0: \ aoqi@0: product(bool, UseAddressNop, false, \ aoqi@0: "Use '0F 1F [addr]' NOP instructions on x86 cpus") \ aoqi@0: \ aoqi@0: product(bool, UseXmmLoadAndClearUpper, true, \ aoqi@0: "Load low part of XMM register and clear upper part") \ aoqi@0: \ aoqi@0: product(bool, UseXmmRegToRegMoveAll, false, \ aoqi@0: "Copy all XMM register bits when moving value between registers") \ aoqi@0: \ aoqi@0: product(bool, UseXmmI2D, false, \ aoqi@0: "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \ aoqi@0: \ aoqi@0: product(bool, UseXmmI2F, false, \ aoqi@0: "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \ aoqi@0: \ aoqi@0: product(bool, UseUnalignedLoadStores, false, \ aoqi@0: "Use SSE2 MOVDQU instruction for Arraycopy") \ aoqi@0: \ aoqi@0: product(bool, UseFastStosb, false, \ aoqi@0: "Use fast-string operation for zeroing: rep stosb") \ aoqi@0: \ aoqi@0: /* Use Restricted Transactional Memory for lock eliding */ \ aoqi@0: experimental(bool, UseRTMLocking, false, \ aoqi@0: "Enable RTM lock eliding for inflated locks in compiled code") \ aoqi@0: \ aoqi@0: experimental(bool, UseRTMForStackLocks, false, \ aoqi@0: "Enable RTM lock eliding for stack locks in compiled code") \ aoqi@0: \ aoqi@0: experimental(bool, UseRTMDeopt, false, \ aoqi@0: "Perform deopt and recompilation based on RTM abort ratio") \ aoqi@0: \ aoqi@0: experimental(uintx, RTMRetryCount, 5, \ aoqi@0: "Number of RTM retries on lock abort or busy") \ aoqi@0: \ aoqi@0: experimental(intx, RTMSpinLoopCount, 100, \ aoqi@0: "Spin count for lock to become free before RTM retry") \ aoqi@0: \ aoqi@0: experimental(intx, RTMAbortThreshold, 1000, \ aoqi@0: "Calculate abort ratio after this number of aborts") \ aoqi@0: \ aoqi@0: experimental(intx, RTMLockingThreshold, 10000, \ aoqi@0: "Lock count at which to do RTM lock eliding without " \ aoqi@0: "abort ratio calculation") \ aoqi@0: \ aoqi@0: experimental(intx, RTMAbortRatio, 50, \ aoqi@0: "Lock abort ratio at which to stop use RTM lock eliding") \ aoqi@0: \ aoqi@0: experimental(intx, RTMTotalCountIncrRate, 64, \ aoqi@0: "Increment total RTM attempted lock count once every n times") \ aoqi@0: \ aoqi@0: experimental(intx, RTMLockingCalculationDelay, 0, \ aoqi@0: "Number of milliseconds to wait before start calculating aborts " \ aoqi@0: "for RTM locking") \ aoqi@0: \ aoqi@0: experimental(bool, UseRTMXendForLockBusy, true, \ aoqi@0: "Use RTM Xend instead of Xabort when lock busy") \ aoqi@0: \ aoqi@0: /* assembler */ \ aoqi@0: product(bool, Use486InstrsOnly, false, \ aoqi@0: "Use 80486 Compliant instruction subset") \ aoqi@0: \ aoqi@0: product(bool, UseCountLeadingZerosInstruction, false, \ aoqi@0: "Use count leading zeros instruction") \ aoqi@0: \ aoqi@0: product(bool, UseCountTrailingZerosInstruction, false, \ aoqi@0: "Use count trailing zeros instruction") \ aoqi@0: \ aoqi@0: product(bool, UseBMI1Instructions, false, \ aoqi@0: "Use BMI instructions") aoqi@0: aoqi@0: #endif // CPU_X86_VM_GLOBALS_X86_HPP