src/cpu/sparc/vm/vmreg_sparc.inline.hpp

Wed, 27 Apr 2016 01:25:04 +0800

author
aoqi
date
Wed, 27 Apr 2016 01:25:04 +0800
changeset 0
f90c822e73f8
child 6876
710a3c8b516e
permissions
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http://hg.openjdk.java.net/jdk8u/jdk8u/hotspot/
changeset: 6782:28b50d07f6f8
tag: jdk8u25-b17

aoqi@0 1 /*
aoqi@0 2 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
aoqi@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0 4 *
aoqi@0 5 * This code is free software; you can redistribute it and/or modify it
aoqi@0 6 * under the terms of the GNU General Public License version 2 only, as
aoqi@0 7 * published by the Free Software Foundation.
aoqi@0 8 *
aoqi@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0 12 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0 13 * accompanied this code).
aoqi@0 14 *
aoqi@0 15 * You should have received a copy of the GNU General Public License version
aoqi@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0 18 *
aoqi@0 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0 20 * or visit www.oracle.com if you need additional information or have any
aoqi@0 21 * questions.
aoqi@0 22 *
aoqi@0 23 */
aoqi@0 24
aoqi@0 25 #ifndef CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP
aoqi@0 26 #define CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP
aoqi@0 27
aoqi@0 28 inline VMReg RegisterImpl::as_VMReg() {
aoqi@0 29 if( this==noreg ) return VMRegImpl::Bad();
aoqi@0 30 return VMRegImpl::as_VMReg(encoding() << 1 );
aoqi@0 31 }
aoqi@0 32
aoqi@0 33 inline VMReg FloatRegisterImpl::as_VMReg() { return VMRegImpl::as_VMReg( ConcreteRegisterImpl::max_gpr + encoding() ); }
aoqi@0 34
aoqi@0 35
aoqi@0 36 inline bool VMRegImpl::is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; }
aoqi@0 37 inline bool VMRegImpl::is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr &&
aoqi@0 38 value() < ConcreteRegisterImpl::max_fpr; }
aoqi@0 39 inline Register VMRegImpl::as_Register() {
aoqi@0 40
aoqi@0 41 assert( is_Register() && is_even(value()), "even-aligned GPR name" );
aoqi@0 42 // Yuk
aoqi@0 43 return ::as_Register(value()>>1);
aoqi@0 44 }
aoqi@0 45
aoqi@0 46 inline FloatRegister VMRegImpl::as_FloatRegister() {
aoqi@0 47 assert( is_FloatRegister(), "must be" );
aoqi@0 48 // Yuk
aoqi@0 49 return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr );
aoqi@0 50 }
aoqi@0 51
aoqi@0 52 inline bool VMRegImpl::is_concrete() {
aoqi@0 53 assert(is_reg(), "must be");
aoqi@0 54 int v = value();
aoqi@0 55 if ( v < ConcreteRegisterImpl::max_gpr ) {
aoqi@0 56 return is_even(v);
aoqi@0 57 }
aoqi@0 58 // F0..F31
aoqi@0 59 if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true;
aoqi@0 60 if ( v < ConcreteRegisterImpl::max_fpr) {
aoqi@0 61 return is_even(v);
aoqi@0 62 }
aoqi@0 63 assert(false, "what register?");
aoqi@0 64 return false;
aoqi@0 65 }
aoqi@0 66
aoqi@0 67 #endif // CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP

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