1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/sparc/vm/vmreg_sparc.inline.hpp Wed Apr 27 01:25:04 2016 +0800
1.3 @@ -0,0 +1,67 @@
1.4 +/*
1.5 + * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.7 + *
1.8 + * This code is free software; you can redistribute it and/or modify it
1.9 + * under the terms of the GNU General Public License version 2 only, as
1.10 + * published by the Free Software Foundation.
1.11 + *
1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.14 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.15 + * version 2 for more details (a copy is included in the LICENSE file that
1.16 + * accompanied this code).
1.17 + *
1.18 + * You should have received a copy of the GNU General Public License version
1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.21 + *
1.22 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1.23 + * or visit www.oracle.com if you need additional information or have any
1.24 + * questions.
1.25 + *
1.26 + */
1.27 +
1.28 +#ifndef CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP
1.29 +#define CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP
1.30 +
1.31 +inline VMReg RegisterImpl::as_VMReg() {
1.32 + if( this==noreg ) return VMRegImpl::Bad();
1.33 + return VMRegImpl::as_VMReg(encoding() << 1 );
1.34 +}
1.35 +
1.36 +inline VMReg FloatRegisterImpl::as_VMReg() { return VMRegImpl::as_VMReg( ConcreteRegisterImpl::max_gpr + encoding() ); }
1.37 +
1.38 +
1.39 +inline bool VMRegImpl::is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; }
1.40 +inline bool VMRegImpl::is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr &&
1.41 + value() < ConcreteRegisterImpl::max_fpr; }
1.42 +inline Register VMRegImpl::as_Register() {
1.43 +
1.44 + assert( is_Register() && is_even(value()), "even-aligned GPR name" );
1.45 + // Yuk
1.46 + return ::as_Register(value()>>1);
1.47 +}
1.48 +
1.49 +inline FloatRegister VMRegImpl::as_FloatRegister() {
1.50 + assert( is_FloatRegister(), "must be" );
1.51 + // Yuk
1.52 + return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr );
1.53 +}
1.54 +
1.55 +inline bool VMRegImpl::is_concrete() {
1.56 + assert(is_reg(), "must be");
1.57 + int v = value();
1.58 + if ( v < ConcreteRegisterImpl::max_gpr ) {
1.59 + return is_even(v);
1.60 + }
1.61 + // F0..F31
1.62 + if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true;
1.63 + if ( v < ConcreteRegisterImpl::max_fpr) {
1.64 + return is_even(v);
1.65 + }
1.66 + assert(false, "what register?");
1.67 + return false;
1.68 +}
1.69 +
1.70 +#endif // CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP
