src/cpu/sparc/vm/c1_FrameMap_sparc.hpp

Wed, 27 Apr 2016 01:25:04 +0800

author
aoqi
date
Wed, 27 Apr 2016 01:25:04 +0800
changeset 0
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aoqi@0 1 /*
aoqi@0 2 * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
aoqi@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0 4 *
aoqi@0 5 * This code is free software; you can redistribute it and/or modify it
aoqi@0 6 * under the terms of the GNU General Public License version 2 only, as
aoqi@0 7 * published by the Free Software Foundation.
aoqi@0 8 *
aoqi@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0 12 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0 13 * accompanied this code).
aoqi@0 14 *
aoqi@0 15 * You should have received a copy of the GNU General Public License version
aoqi@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0 18 *
aoqi@0 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0 20 * or visit www.oracle.com if you need additional information or have any
aoqi@0 21 * questions.
aoqi@0 22 *
aoqi@0 23 */
aoqi@0 24
aoqi@0 25 #ifndef CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
aoqi@0 26 #define CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
aoqi@0 27
aoqi@0 28 public:
aoqi@0 29
aoqi@0 30 enum {
aoqi@0 31 nof_reg_args = 6, // registers o0-o5 are available for parameter passing
aoqi@0 32 first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord,
aoqi@0 33 frame_pad_in_bytes = 0
aoqi@0 34 };
aoqi@0 35
aoqi@0 36 static const int pd_c_runtime_reserved_arg_size;
aoqi@0 37
aoqi@0 38 static LIR_Opr G0_opr;
aoqi@0 39 static LIR_Opr G1_opr;
aoqi@0 40 static LIR_Opr G2_opr;
aoqi@0 41 static LIR_Opr G3_opr;
aoqi@0 42 static LIR_Opr G4_opr;
aoqi@0 43 static LIR_Opr G5_opr;
aoqi@0 44 static LIR_Opr G6_opr;
aoqi@0 45 static LIR_Opr G7_opr;
aoqi@0 46 static LIR_Opr O0_opr;
aoqi@0 47 static LIR_Opr O1_opr;
aoqi@0 48 static LIR_Opr O2_opr;
aoqi@0 49 static LIR_Opr O3_opr;
aoqi@0 50 static LIR_Opr O4_opr;
aoqi@0 51 static LIR_Opr O5_opr;
aoqi@0 52 static LIR_Opr O6_opr;
aoqi@0 53 static LIR_Opr O7_opr;
aoqi@0 54 static LIR_Opr L0_opr;
aoqi@0 55 static LIR_Opr L1_opr;
aoqi@0 56 static LIR_Opr L2_opr;
aoqi@0 57 static LIR_Opr L3_opr;
aoqi@0 58 static LIR_Opr L4_opr;
aoqi@0 59 static LIR_Opr L5_opr;
aoqi@0 60 static LIR_Opr L6_opr;
aoqi@0 61 static LIR_Opr L7_opr;
aoqi@0 62 static LIR_Opr I0_opr;
aoqi@0 63 static LIR_Opr I1_opr;
aoqi@0 64 static LIR_Opr I2_opr;
aoqi@0 65 static LIR_Opr I3_opr;
aoqi@0 66 static LIR_Opr I4_opr;
aoqi@0 67 static LIR_Opr I5_opr;
aoqi@0 68 static LIR_Opr I6_opr;
aoqi@0 69 static LIR_Opr I7_opr;
aoqi@0 70
aoqi@0 71 static LIR_Opr SP_opr;
aoqi@0 72 static LIR_Opr FP_opr;
aoqi@0 73
aoqi@0 74 static LIR_Opr G0_oop_opr;
aoqi@0 75 static LIR_Opr G1_oop_opr;
aoqi@0 76 static LIR_Opr G2_oop_opr;
aoqi@0 77 static LIR_Opr G3_oop_opr;
aoqi@0 78 static LIR_Opr G4_oop_opr;
aoqi@0 79 static LIR_Opr G5_oop_opr;
aoqi@0 80 static LIR_Opr G6_oop_opr;
aoqi@0 81 static LIR_Opr G7_oop_opr;
aoqi@0 82 static LIR_Opr O0_oop_opr;
aoqi@0 83 static LIR_Opr O1_oop_opr;
aoqi@0 84 static LIR_Opr O2_oop_opr;
aoqi@0 85 static LIR_Opr O3_oop_opr;
aoqi@0 86 static LIR_Opr O4_oop_opr;
aoqi@0 87 static LIR_Opr O5_oop_opr;
aoqi@0 88 static LIR_Opr O6_oop_opr;
aoqi@0 89 static LIR_Opr O7_oop_opr;
aoqi@0 90 static LIR_Opr L0_oop_opr;
aoqi@0 91 static LIR_Opr L1_oop_opr;
aoqi@0 92 static LIR_Opr L2_oop_opr;
aoqi@0 93 static LIR_Opr L3_oop_opr;
aoqi@0 94 static LIR_Opr L4_oop_opr;
aoqi@0 95 static LIR_Opr L5_oop_opr;
aoqi@0 96 static LIR_Opr L6_oop_opr;
aoqi@0 97 static LIR_Opr L7_oop_opr;
aoqi@0 98 static LIR_Opr I0_oop_opr;
aoqi@0 99 static LIR_Opr I1_oop_opr;
aoqi@0 100 static LIR_Opr I2_oop_opr;
aoqi@0 101 static LIR_Opr I3_oop_opr;
aoqi@0 102 static LIR_Opr I4_oop_opr;
aoqi@0 103 static LIR_Opr I5_oop_opr;
aoqi@0 104 static LIR_Opr I6_oop_opr;
aoqi@0 105 static LIR_Opr I7_oop_opr;
aoqi@0 106
aoqi@0 107 static LIR_Opr G0_metadata_opr;
aoqi@0 108 static LIR_Opr G1_metadata_opr;
aoqi@0 109 static LIR_Opr G2_metadata_opr;
aoqi@0 110 static LIR_Opr G3_metadata_opr;
aoqi@0 111 static LIR_Opr G4_metadata_opr;
aoqi@0 112 static LIR_Opr G5_metadata_opr;
aoqi@0 113 static LIR_Opr G6_metadata_opr;
aoqi@0 114 static LIR_Opr G7_metadata_opr;
aoqi@0 115 static LIR_Opr O0_metadata_opr;
aoqi@0 116 static LIR_Opr O1_metadata_opr;
aoqi@0 117 static LIR_Opr O2_metadata_opr;
aoqi@0 118 static LIR_Opr O3_metadata_opr;
aoqi@0 119 static LIR_Opr O4_metadata_opr;
aoqi@0 120 static LIR_Opr O5_metadata_opr;
aoqi@0 121 static LIR_Opr O6_metadata_opr;
aoqi@0 122 static LIR_Opr O7_metadata_opr;
aoqi@0 123 static LIR_Opr L0_metadata_opr;
aoqi@0 124 static LIR_Opr L1_metadata_opr;
aoqi@0 125 static LIR_Opr L2_metadata_opr;
aoqi@0 126 static LIR_Opr L3_metadata_opr;
aoqi@0 127 static LIR_Opr L4_metadata_opr;
aoqi@0 128 static LIR_Opr L5_metadata_opr;
aoqi@0 129 static LIR_Opr L6_metadata_opr;
aoqi@0 130 static LIR_Opr L7_metadata_opr;
aoqi@0 131 static LIR_Opr I0_metadata_opr;
aoqi@0 132 static LIR_Opr I1_metadata_opr;
aoqi@0 133 static LIR_Opr I2_metadata_opr;
aoqi@0 134 static LIR_Opr I3_metadata_opr;
aoqi@0 135 static LIR_Opr I4_metadata_opr;
aoqi@0 136 static LIR_Opr I5_metadata_opr;
aoqi@0 137 static LIR_Opr I6_metadata_opr;
aoqi@0 138 static LIR_Opr I7_metadata_opr;
aoqi@0 139
aoqi@0 140 static LIR_Opr in_long_opr;
aoqi@0 141 static LIR_Opr out_long_opr;
aoqi@0 142 static LIR_Opr g1_long_single_opr;
aoqi@0 143
aoqi@0 144 static LIR_Opr F0_opr;
aoqi@0 145 static LIR_Opr F0_double_opr;
aoqi@0 146
aoqi@0 147 static LIR_Opr Oexception_opr;
aoqi@0 148 static LIR_Opr Oissuing_pc_opr;
aoqi@0 149
aoqi@0 150 private:
aoqi@0 151 static FloatRegister _fpu_regs [nof_fpu_regs];
aoqi@0 152
aoqi@0 153 static LIR_Opr as_long_single_opr(Register r) {
aoqi@0 154 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
aoqi@0 155 }
aoqi@0 156 static LIR_Opr as_long_pair_opr(Register r) {
aoqi@0 157 return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
aoqi@0 158 }
aoqi@0 159
aoqi@0 160 public:
aoqi@0 161
aoqi@0 162 #ifdef _LP64
aoqi@0 163 static LIR_Opr as_long_opr(Register r) {
aoqi@0 164 return as_long_single_opr(r);
aoqi@0 165 }
aoqi@0 166 static LIR_Opr as_pointer_opr(Register r) {
aoqi@0 167 return as_long_single_opr(r);
aoqi@0 168 }
aoqi@0 169 #else
aoqi@0 170 static LIR_Opr as_long_opr(Register r) {
aoqi@0 171 return as_long_pair_opr(r);
aoqi@0 172 }
aoqi@0 173 static LIR_Opr as_pointer_opr(Register r) {
aoqi@0 174 return as_opr(r);
aoqi@0 175 }
aoqi@0 176 #endif
aoqi@0 177 static LIR_Opr as_float_opr(FloatRegister r) {
aoqi@0 178 return LIR_OprFact::single_fpu(r->encoding());
aoqi@0 179 }
aoqi@0 180 static LIR_Opr as_double_opr(FloatRegister r) {
aoqi@0 181 return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding());
aoqi@0 182 }
aoqi@0 183
aoqi@0 184 static FloatRegister nr2floatreg (int rnr);
aoqi@0 185
aoqi@0 186 static VMReg fpu_regname (int n);
aoqi@0 187
aoqi@0 188 static bool is_caller_save_register (LIR_Opr reg);
aoqi@0 189 static bool is_caller_save_register (Register r);
aoqi@0 190
aoqi@0 191 static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
aoqi@0 192 static int last_cpu_reg() { return pd_last_cpu_reg; }
aoqi@0 193
aoqi@0 194 #endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP

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