1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/sparc/vm/c1_FrameMap_sparc.hpp Wed Apr 27 01:25:04 2016 +0800
1.3 @@ -0,0 +1,194 @@
1.4 +/*
1.5 + * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.7 + *
1.8 + * This code is free software; you can redistribute it and/or modify it
1.9 + * under the terms of the GNU General Public License version 2 only, as
1.10 + * published by the Free Software Foundation.
1.11 + *
1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.14 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.15 + * version 2 for more details (a copy is included in the LICENSE file that
1.16 + * accompanied this code).
1.17 + *
1.18 + * You should have received a copy of the GNU General Public License version
1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.21 + *
1.22 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1.23 + * or visit www.oracle.com if you need additional information or have any
1.24 + * questions.
1.25 + *
1.26 + */
1.27 +
1.28 +#ifndef CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
1.29 +#define CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
1.30 +
1.31 + public:
1.32 +
1.33 + enum {
1.34 + nof_reg_args = 6, // registers o0-o5 are available for parameter passing
1.35 + first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord,
1.36 + frame_pad_in_bytes = 0
1.37 + };
1.38 +
1.39 + static const int pd_c_runtime_reserved_arg_size;
1.40 +
1.41 + static LIR_Opr G0_opr;
1.42 + static LIR_Opr G1_opr;
1.43 + static LIR_Opr G2_opr;
1.44 + static LIR_Opr G3_opr;
1.45 + static LIR_Opr G4_opr;
1.46 + static LIR_Opr G5_opr;
1.47 + static LIR_Opr G6_opr;
1.48 + static LIR_Opr G7_opr;
1.49 + static LIR_Opr O0_opr;
1.50 + static LIR_Opr O1_opr;
1.51 + static LIR_Opr O2_opr;
1.52 + static LIR_Opr O3_opr;
1.53 + static LIR_Opr O4_opr;
1.54 + static LIR_Opr O5_opr;
1.55 + static LIR_Opr O6_opr;
1.56 + static LIR_Opr O7_opr;
1.57 + static LIR_Opr L0_opr;
1.58 + static LIR_Opr L1_opr;
1.59 + static LIR_Opr L2_opr;
1.60 + static LIR_Opr L3_opr;
1.61 + static LIR_Opr L4_opr;
1.62 + static LIR_Opr L5_opr;
1.63 + static LIR_Opr L6_opr;
1.64 + static LIR_Opr L7_opr;
1.65 + static LIR_Opr I0_opr;
1.66 + static LIR_Opr I1_opr;
1.67 + static LIR_Opr I2_opr;
1.68 + static LIR_Opr I3_opr;
1.69 + static LIR_Opr I4_opr;
1.70 + static LIR_Opr I5_opr;
1.71 + static LIR_Opr I6_opr;
1.72 + static LIR_Opr I7_opr;
1.73 +
1.74 + static LIR_Opr SP_opr;
1.75 + static LIR_Opr FP_opr;
1.76 +
1.77 + static LIR_Opr G0_oop_opr;
1.78 + static LIR_Opr G1_oop_opr;
1.79 + static LIR_Opr G2_oop_opr;
1.80 + static LIR_Opr G3_oop_opr;
1.81 + static LIR_Opr G4_oop_opr;
1.82 + static LIR_Opr G5_oop_opr;
1.83 + static LIR_Opr G6_oop_opr;
1.84 + static LIR_Opr G7_oop_opr;
1.85 + static LIR_Opr O0_oop_opr;
1.86 + static LIR_Opr O1_oop_opr;
1.87 + static LIR_Opr O2_oop_opr;
1.88 + static LIR_Opr O3_oop_opr;
1.89 + static LIR_Opr O4_oop_opr;
1.90 + static LIR_Opr O5_oop_opr;
1.91 + static LIR_Opr O6_oop_opr;
1.92 + static LIR_Opr O7_oop_opr;
1.93 + static LIR_Opr L0_oop_opr;
1.94 + static LIR_Opr L1_oop_opr;
1.95 + static LIR_Opr L2_oop_opr;
1.96 + static LIR_Opr L3_oop_opr;
1.97 + static LIR_Opr L4_oop_opr;
1.98 + static LIR_Opr L5_oop_opr;
1.99 + static LIR_Opr L6_oop_opr;
1.100 + static LIR_Opr L7_oop_opr;
1.101 + static LIR_Opr I0_oop_opr;
1.102 + static LIR_Opr I1_oop_opr;
1.103 + static LIR_Opr I2_oop_opr;
1.104 + static LIR_Opr I3_oop_opr;
1.105 + static LIR_Opr I4_oop_opr;
1.106 + static LIR_Opr I5_oop_opr;
1.107 + static LIR_Opr I6_oop_opr;
1.108 + static LIR_Opr I7_oop_opr;
1.109 +
1.110 + static LIR_Opr G0_metadata_opr;
1.111 + static LIR_Opr G1_metadata_opr;
1.112 + static LIR_Opr G2_metadata_opr;
1.113 + static LIR_Opr G3_metadata_opr;
1.114 + static LIR_Opr G4_metadata_opr;
1.115 + static LIR_Opr G5_metadata_opr;
1.116 + static LIR_Opr G6_metadata_opr;
1.117 + static LIR_Opr G7_metadata_opr;
1.118 + static LIR_Opr O0_metadata_opr;
1.119 + static LIR_Opr O1_metadata_opr;
1.120 + static LIR_Opr O2_metadata_opr;
1.121 + static LIR_Opr O3_metadata_opr;
1.122 + static LIR_Opr O4_metadata_opr;
1.123 + static LIR_Opr O5_metadata_opr;
1.124 + static LIR_Opr O6_metadata_opr;
1.125 + static LIR_Opr O7_metadata_opr;
1.126 + static LIR_Opr L0_metadata_opr;
1.127 + static LIR_Opr L1_metadata_opr;
1.128 + static LIR_Opr L2_metadata_opr;
1.129 + static LIR_Opr L3_metadata_opr;
1.130 + static LIR_Opr L4_metadata_opr;
1.131 + static LIR_Opr L5_metadata_opr;
1.132 + static LIR_Opr L6_metadata_opr;
1.133 + static LIR_Opr L7_metadata_opr;
1.134 + static LIR_Opr I0_metadata_opr;
1.135 + static LIR_Opr I1_metadata_opr;
1.136 + static LIR_Opr I2_metadata_opr;
1.137 + static LIR_Opr I3_metadata_opr;
1.138 + static LIR_Opr I4_metadata_opr;
1.139 + static LIR_Opr I5_metadata_opr;
1.140 + static LIR_Opr I6_metadata_opr;
1.141 + static LIR_Opr I7_metadata_opr;
1.142 +
1.143 + static LIR_Opr in_long_opr;
1.144 + static LIR_Opr out_long_opr;
1.145 + static LIR_Opr g1_long_single_opr;
1.146 +
1.147 + static LIR_Opr F0_opr;
1.148 + static LIR_Opr F0_double_opr;
1.149 +
1.150 + static LIR_Opr Oexception_opr;
1.151 + static LIR_Opr Oissuing_pc_opr;
1.152 +
1.153 + private:
1.154 + static FloatRegister _fpu_regs [nof_fpu_regs];
1.155 +
1.156 + static LIR_Opr as_long_single_opr(Register r) {
1.157 + return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
1.158 + }
1.159 + static LIR_Opr as_long_pair_opr(Register r) {
1.160 + return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
1.161 + }
1.162 +
1.163 + public:
1.164 +
1.165 +#ifdef _LP64
1.166 + static LIR_Opr as_long_opr(Register r) {
1.167 + return as_long_single_opr(r);
1.168 + }
1.169 + static LIR_Opr as_pointer_opr(Register r) {
1.170 + return as_long_single_opr(r);
1.171 + }
1.172 +#else
1.173 + static LIR_Opr as_long_opr(Register r) {
1.174 + return as_long_pair_opr(r);
1.175 + }
1.176 + static LIR_Opr as_pointer_opr(Register r) {
1.177 + return as_opr(r);
1.178 + }
1.179 +#endif
1.180 + static LIR_Opr as_float_opr(FloatRegister r) {
1.181 + return LIR_OprFact::single_fpu(r->encoding());
1.182 + }
1.183 + static LIR_Opr as_double_opr(FloatRegister r) {
1.184 + return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding());
1.185 + }
1.186 +
1.187 + static FloatRegister nr2floatreg (int rnr);
1.188 +
1.189 + static VMReg fpu_regname (int n);
1.190 +
1.191 + static bool is_caller_save_register (LIR_Opr reg);
1.192 + static bool is_caller_save_register (Register r);
1.193 +
1.194 + static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
1.195 + static int last_cpu_reg() { return pd_last_cpu_reg; }
1.196 +
1.197 +#endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
