src/cpu/mips/vm/vm_version_mips.hpp

Tue, 28 Nov 2017 15:50:12 +0800

author
aoqi
date
Tue, 28 Nov 2017 15:50:12 +0800
changeset 8016
efbfe5d2d462
parent 8015
2581a5399fb7
child 9251
1ccc5a3b3671
permissions
-rw-r--r--

#6408 cpuinfo support 2K1000 and gs264
Reviewed-by: chenhaoxuan

aoqi@1 1 /*
aoqi@1 2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
aoqi@1 3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
aoqi@1 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@1 5 *
aoqi@1 6 * This code is free software; you can redistribute it and/or modify it
aoqi@1 7 * under the terms of the GNU General Public License version 2 only, as
aoqi@1 8 * published by the Free Software Foundation.
aoqi@1 9 *
aoqi@1 10 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@1 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@1 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@1 13 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@1 14 * accompanied this code).
aoqi@1 15 *
aoqi@1 16 * You should have received a copy of the GNU General Public License version
aoqi@1 17 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@1 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@1 19 *
aoqi@1 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@1 21 * or visit www.oracle.com if you need additional information or have any
aoqi@1 22 * questions.
aoqi@1 23 *
aoqi@1 24 */
aoqi@1 25
aoqi@1 26 #ifndef CPU_MIPS_VM_VM_VERSION_MIPS_HPP
aoqi@1 27 #define CPU_MIPS_VM_VM_VERSION_MIPS_HPP
chenhaoxuan@358 28
aoqi@1 29 #include "runtime/globals_extension.hpp"
aoqi@1 30 #include "runtime/vm_version.hpp"
aoqi@1 31
aoqi@1 32
aoqi@1 33 class VM_Version: public Abstract_VM_Version {
aoqi@1 34 protected:
aoqi@6880 35 enum Feature_Flag {
aoqi@8016 36 with_l2_cache = 0,
aoqi@8016 37 spt_16k_page = 1,
aoqi@8016 38 gs464v = 2,
aoqi@8016 39 gs464e = 3,
aoqi@8016 40 gs464 = 4,
aoqi@8016 41 gs264 = 5,
aoqi@8016 42 with_gs_support = 6,
chenhaoxuan@358 43 //////////////////////add some other feature here//////////////////
aoqi@6880 44 };
aoqi@1 45
aoqi@6880 46 enum Feature_Flag_Set {
aoqi@8016 47 unknown_m = 0,
aoqi@6880 48 all_features_m = -1,
aoqi@8016 49 with_l2_cache_m = 1 << with_l2_cache,
aoqi@8016 50 spt_16k_page_m = 1 << spt_16k_page,
aoqi@6880 51 with_gs_support_m = 1 << with_gs_support,
aoqi@8016 52 gs464_m = 1 << gs464,
aoqi@8016 53 gs464v_m = 1 << gs464v,
aoqi@8016 54 gs464e_m = 1 << gs464e,
aoqi@8016 55 gs264_m = 1 << gs264,
aoqi@1 56
aoqi@6880 57 //////////////////////add some other feature here//////////////////
aoqi@6880 58 };
aoqi@1 59
chenhaoxuan@358 60 static int _features;
chenhaoxuan@358 61 static const char* _features_str;
chenhaoxuan@358 62
chenhaoxuan@358 63 static void print_features();
chenhaoxuan@358 64 static int determine_features();
chenhaoxuan@358 65 static int platform_features(int features);
aoqi@1 66
aoqi@1 67 public:
chenhaoxuan@358 68 // Initialization
chenhaoxuan@358 69 static void initialize();
aoqi@1 70
chenhaoxuan@358 71 //mips has no such instructions, use ll/sc instead
chenhaoxuan@358 72 static bool supports_compare_and_exchange() { return false; }
chenhaoxuan@358 73
chenhaoxuan@358 74 static bool has_l2_cache() { return _features & with_l2_cache_m; }
chenhaoxuan@358 75 static bool has_16k_page() { return _features & spt_16k_page_m; }
aoqi@8016 76 static bool is_gs264() { return _features & gs264_m; }
chenhaoxuan@358 77 static bool is_gs464() { return _features & gs464_m; }
chenhaoxuan@358 78 static bool is_gs464v() { return _features & gs464v_m; }
chenhaoxuan@358 79 static bool is_gs464e() { return _features & gs464e_m; }
chenhaoxuan@358 80 static bool is_loongson() { return _features & with_gs_support_m; }
aoqi@8015 81 static bool supports_dsp() { return 0; /*Loongson CPUs do not support DSP instructions well*/}
aoqi@209 82 static bool supports_ps() { return 1; /*Loongson CPUs support ps instructions*/}
aoqi@209 83 static bool supports_3d() { return 0; /*Loongson CPUs do not support 3d instructions*/}
aoqi@1 84
chenhaoxuan@358 85 //////////////////////add some other feature here//////////////////
chenhaoxuan@358 86
chenhaoxuan@358 87 static const char* cpu_features() { return _features_str; }
chenhaoxuan@358 88
chenhaoxuan@358 89 // Assembler testing
chenhaoxuan@358 90 static void allow_all();
chenhaoxuan@358 91 static void revert();
aoqi@1 92 };
aoqi@1 93
aoqi@1 94 #endif // CPU_MIPS_VM_VM_VERSION_MIPS_HPP

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