Tue, 08 Aug 2017 15:57:29 +0800
merge
aoqi@0 | 1 | /* |
aoqi@0 | 2 | * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved. |
aoqi@0 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@0 | 4 | * |
aoqi@0 | 5 | * This code is free software; you can redistribute it and/or modify it |
aoqi@0 | 6 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@0 | 7 | * published by the Free Software Foundation. |
aoqi@0 | 8 | * |
aoqi@0 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@0 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@0 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@0 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@0 | 13 | * accompanied this code). |
aoqi@0 | 14 | * |
aoqi@0 | 15 | * You should have received a copy of the GNU General Public License version |
aoqi@0 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@0 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@0 | 18 | * |
aoqi@0 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@0 | 20 | * or visit www.oracle.com if you need additional information or have any |
aoqi@0 | 21 | * questions. |
aoqi@0 | 22 | * |
aoqi@0 | 23 | */ |
aoqi@0 | 24 | |
aoqi@1 | 25 | /* |
aoqi@1 | 26 | * This file has been modified by Loongson Technology in 2015. These |
aoqi@1 | 27 | * modifications are Copyright (c) 2015 Loongson Technology, and are made |
aoqi@1 | 28 | * available on the same license terms set forth above. |
aoqi@1 | 29 | */ |
aoqi@1 | 30 | |
aoqi@0 | 31 | #include "precompiled.hpp" |
aoqi@0 | 32 | #include "c1/c1_CFGPrinter.hpp" |
aoqi@0 | 33 | #include "c1/c1_CodeStubs.hpp" |
aoqi@0 | 34 | #include "c1/c1_Compilation.hpp" |
aoqi@0 | 35 | #include "c1/c1_FrameMap.hpp" |
aoqi@0 | 36 | #include "c1/c1_IR.hpp" |
aoqi@0 | 37 | #include "c1/c1_LIRGenerator.hpp" |
aoqi@0 | 38 | #include "c1/c1_LinearScan.hpp" |
aoqi@0 | 39 | #include "c1/c1_ValueStack.hpp" |
aoqi@0 | 40 | #include "utilities/bitMap.inline.hpp" |
aoqi@0 | 41 | #ifdef TARGET_ARCH_x86 |
aoqi@0 | 42 | # include "vmreg_x86.inline.hpp" |
aoqi@0 | 43 | #endif |
aoqi@1 | 44 | #ifdef TARGET_ARCH_mips |
aoqi@1 | 45 | # include "vmreg_mips.inline.hpp" |
aoqi@1 | 46 | #endif |
aoqi@0 | 47 | #ifdef TARGET_ARCH_sparc |
aoqi@0 | 48 | # include "vmreg_sparc.inline.hpp" |
aoqi@0 | 49 | #endif |
aoqi@0 | 50 | #ifdef TARGET_ARCH_zero |
aoqi@0 | 51 | # include "vmreg_zero.inline.hpp" |
aoqi@0 | 52 | #endif |
aoqi@0 | 53 | #ifdef TARGET_ARCH_arm |
aoqi@0 | 54 | # include "vmreg_arm.inline.hpp" |
aoqi@0 | 55 | #endif |
aoqi@0 | 56 | #ifdef TARGET_ARCH_ppc |
aoqi@0 | 57 | # include "vmreg_ppc.inline.hpp" |
aoqi@0 | 58 | #endif |
aoqi@0 | 59 | |
aoqi@0 | 60 | |
aoqi@0 | 61 | #ifndef PRODUCT |
aoqi@0 | 62 | |
aoqi@0 | 63 | static LinearScanStatistic _stat_before_alloc; |
aoqi@0 | 64 | static LinearScanStatistic _stat_after_asign; |
aoqi@0 | 65 | static LinearScanStatistic _stat_final; |
aoqi@0 | 66 | |
aoqi@0 | 67 | static LinearScanTimers _total_timer; |
aoqi@0 | 68 | |
aoqi@0 | 69 | // helper macro for short definition of timer |
aoqi@0 | 70 | #define TIME_LINEAR_SCAN(timer_name) TraceTime _block_timer("", _total_timer.timer(LinearScanTimers::timer_name), TimeLinearScan || TimeEachLinearScan, Verbose); |
aoqi@0 | 71 | |
aoqi@0 | 72 | // helper macro for short definition of trace-output inside code |
aoqi@0 | 73 | #define TRACE_LINEAR_SCAN(level, code) \ |
aoqi@0 | 74 | if (TraceLinearScanLevel >= level) { \ |
aoqi@0 | 75 | code; \ |
aoqi@0 | 76 | } |
aoqi@0 | 77 | |
aoqi@0 | 78 | #else |
aoqi@0 | 79 | |
aoqi@0 | 80 | #define TIME_LINEAR_SCAN(timer_name) |
aoqi@0 | 81 | #define TRACE_LINEAR_SCAN(level, code) |
aoqi@0 | 82 | |
aoqi@0 | 83 | #endif |
aoqi@0 | 84 | |
aoqi@0 | 85 | // Map BasicType to spill size in 32-bit words, matching VMReg's notion of words |
aoqi@0 | 86 | #ifdef _LP64 |
aoqi@0 | 87 | static int type2spill_size[T_CONFLICT+1]={ -1, 0, 0, 0, 1, 1, 1, 2, 1, 1, 1, 2, 2, 2, 0, 2, 1, 2, 1, -1}; |
aoqi@0 | 88 | #else |
aoqi@0 | 89 | static int type2spill_size[T_CONFLICT+1]={ -1, 0, 0, 0, 1, 1, 1, 2, 1, 1, 1, 2, 1, 1, 0, 1, -1, 1, 1, -1}; |
aoqi@0 | 90 | #endif |
aoqi@0 | 91 | |
aoqi@0 | 92 | |
aoqi@0 | 93 | // Implementation of LinearScan |
aoqi@0 | 94 | |
aoqi@0 | 95 | LinearScan::LinearScan(IR* ir, LIRGenerator* gen, FrameMap* frame_map) |
aoqi@0 | 96 | : _compilation(ir->compilation()) |
aoqi@0 | 97 | , _ir(ir) |
aoqi@0 | 98 | , _gen(gen) |
aoqi@0 | 99 | , _frame_map(frame_map) |
aoqi@0 | 100 | , _num_virtual_regs(gen->max_virtual_register_number()) |
aoqi@0 | 101 | , _has_fpu_registers(false) |
aoqi@0 | 102 | , _num_calls(-1) |
aoqi@0 | 103 | , _max_spills(0) |
aoqi@0 | 104 | , _unused_spill_slot(-1) |
aoqi@0 | 105 | , _intervals(0) // initialized later with correct length |
aoqi@0 | 106 | , _new_intervals_from_allocation(new IntervalList()) |
aoqi@0 | 107 | , _sorted_intervals(NULL) |
aoqi@0 | 108 | , _needs_full_resort(false) |
aoqi@0 | 109 | , _lir_ops(0) // initialized later with correct length |
aoqi@0 | 110 | , _block_of_op(0) // initialized later with correct length |
aoqi@0 | 111 | , _has_info(0) |
aoqi@0 | 112 | , _has_call(0) |
aoqi@0 | 113 | , _scope_value_cache(0) // initialized later with correct length |
aoqi@0 | 114 | , _interval_in_loop(0, 0) // initialized later with correct length |
aoqi@0 | 115 | , _cached_blocks(*ir->linear_scan_order()) |
aoqi@0 | 116 | #ifdef X86 |
aoqi@0 | 117 | , _fpu_stack_allocator(NULL) |
aoqi@0 | 118 | #endif |
aoqi@0 | 119 | { |
aoqi@0 | 120 | assert(this->ir() != NULL, "check if valid"); |
aoqi@0 | 121 | assert(this->compilation() != NULL, "check if valid"); |
aoqi@0 | 122 | assert(this->gen() != NULL, "check if valid"); |
aoqi@0 | 123 | assert(this->frame_map() != NULL, "check if valid"); |
aoqi@0 | 124 | } |
aoqi@0 | 125 | |
aoqi@0 | 126 | |
aoqi@0 | 127 | // ********** functions for converting LIR-Operands to register numbers |
aoqi@0 | 128 | // |
aoqi@0 | 129 | // Emulate a flat register file comprising physical integer registers, |
aoqi@0 | 130 | // physical floating-point registers and virtual registers, in that order. |
aoqi@0 | 131 | // Virtual registers already have appropriate numbers, since V0 is |
aoqi@0 | 132 | // the number of physical registers. |
aoqi@0 | 133 | // Returns -1 for hi word if opr is a single word operand. |
aoqi@0 | 134 | // |
aoqi@0 | 135 | // Note: the inverse operation (calculating an operand for register numbers) |
aoqi@0 | 136 | // is done in calc_operand_for_interval() |
aoqi@0 | 137 | |
aoqi@0 | 138 | int LinearScan::reg_num(LIR_Opr opr) { |
aoqi@0 | 139 | assert(opr->is_register(), "should not call this otherwise"); |
aoqi@0 | 140 | |
aoqi@0 | 141 | if (opr->is_virtual_register()) { |
aoqi@0 | 142 | assert(opr->vreg_number() >= nof_regs, "found a virtual register with a fixed-register number"); |
aoqi@0 | 143 | return opr->vreg_number(); |
aoqi@0 | 144 | } else if (opr->is_single_cpu()) { |
aoqi@0 | 145 | return opr->cpu_regnr(); |
aoqi@0 | 146 | } else if (opr->is_double_cpu()) { |
aoqi@0 | 147 | return opr->cpu_regnrLo(); |
aoqi@0 | 148 | #ifdef X86 |
aoqi@0 | 149 | } else if (opr->is_single_xmm()) { |
aoqi@0 | 150 | return opr->fpu_regnr() + pd_first_xmm_reg; |
aoqi@0 | 151 | } else if (opr->is_double_xmm()) { |
aoqi@0 | 152 | return opr->fpu_regnrLo() + pd_first_xmm_reg; |
aoqi@0 | 153 | #endif |
aoqi@0 | 154 | } else if (opr->is_single_fpu()) { |
aoqi@0 | 155 | return opr->fpu_regnr() + pd_first_fpu_reg; |
aoqi@0 | 156 | } else if (opr->is_double_fpu()) { |
aoqi@0 | 157 | return opr->fpu_regnrLo() + pd_first_fpu_reg; |
aoqi@0 | 158 | } else { |
aoqi@0 | 159 | ShouldNotReachHere(); |
aoqi@0 | 160 | return -1; |
aoqi@0 | 161 | } |
aoqi@0 | 162 | } |
aoqi@0 | 163 | |
aoqi@0 | 164 | int LinearScan::reg_numHi(LIR_Opr opr) { |
aoqi@0 | 165 | assert(opr->is_register(), "should not call this otherwise"); |
aoqi@0 | 166 | |
aoqi@0 | 167 | if (opr->is_virtual_register()) { |
aoqi@0 | 168 | return -1; |
aoqi@0 | 169 | } else if (opr->is_single_cpu()) { |
aoqi@0 | 170 | return -1; |
aoqi@0 | 171 | } else if (opr->is_double_cpu()) { |
aoqi@0 | 172 | return opr->cpu_regnrHi(); |
aoqi@0 | 173 | #ifdef X86 |
aoqi@0 | 174 | } else if (opr->is_single_xmm()) { |
aoqi@0 | 175 | return -1; |
aoqi@0 | 176 | } else if (opr->is_double_xmm()) { |
aoqi@0 | 177 | return -1; |
aoqi@0 | 178 | #endif |
aoqi@0 | 179 | } else if (opr->is_single_fpu()) { |
aoqi@0 | 180 | return -1; |
aoqi@0 | 181 | } else if (opr->is_double_fpu()) { |
aoqi@0 | 182 | return opr->fpu_regnrHi() + pd_first_fpu_reg; |
aoqi@0 | 183 | } else { |
aoqi@0 | 184 | ShouldNotReachHere(); |
aoqi@0 | 185 | return -1; |
aoqi@0 | 186 | } |
aoqi@0 | 187 | } |
aoqi@0 | 188 | |
aoqi@0 | 189 | |
aoqi@0 | 190 | // ********** functions for classification of intervals |
aoqi@0 | 191 | |
aoqi@0 | 192 | bool LinearScan::is_precolored_interval(const Interval* i) { |
aoqi@0 | 193 | return i->reg_num() < LinearScan::nof_regs; |
aoqi@0 | 194 | } |
aoqi@0 | 195 | |
aoqi@0 | 196 | bool LinearScan::is_virtual_interval(const Interval* i) { |
aoqi@0 | 197 | return i->reg_num() >= LIR_OprDesc::vreg_base; |
aoqi@0 | 198 | } |
aoqi@0 | 199 | |
aoqi@0 | 200 | bool LinearScan::is_precolored_cpu_interval(const Interval* i) { |
aoqi@0 | 201 | return i->reg_num() < LinearScan::nof_cpu_regs; |
aoqi@0 | 202 | } |
aoqi@0 | 203 | |
aoqi@0 | 204 | bool LinearScan::is_virtual_cpu_interval(const Interval* i) { |
aoqi@0 | 205 | #if defined(__SOFTFP__) || defined(E500V2) |
aoqi@0 | 206 | return i->reg_num() >= LIR_OprDesc::vreg_base; |
aoqi@0 | 207 | #else |
aoqi@0 | 208 | return i->reg_num() >= LIR_OprDesc::vreg_base && (i->type() != T_FLOAT && i->type() != T_DOUBLE); |
aoqi@0 | 209 | #endif // __SOFTFP__ or E500V2 |
aoqi@0 | 210 | } |
aoqi@0 | 211 | |
aoqi@0 | 212 | bool LinearScan::is_precolored_fpu_interval(const Interval* i) { |
aoqi@0 | 213 | return i->reg_num() >= LinearScan::nof_cpu_regs && i->reg_num() < LinearScan::nof_regs; |
aoqi@0 | 214 | } |
aoqi@0 | 215 | |
aoqi@0 | 216 | bool LinearScan::is_virtual_fpu_interval(const Interval* i) { |
aoqi@0 | 217 | #if defined(__SOFTFP__) || defined(E500V2) |
aoqi@0 | 218 | return false; |
aoqi@0 | 219 | #else |
aoqi@0 | 220 | return i->reg_num() >= LIR_OprDesc::vreg_base && (i->type() == T_FLOAT || i->type() == T_DOUBLE); |
aoqi@0 | 221 | #endif // __SOFTFP__ or E500V2 |
aoqi@0 | 222 | } |
aoqi@0 | 223 | |
aoqi@0 | 224 | bool LinearScan::is_in_fpu_register(const Interval* i) { |
aoqi@0 | 225 | // fixed intervals not needed for FPU stack allocation |
aoqi@0 | 226 | return i->reg_num() >= nof_regs && pd_first_fpu_reg <= i->assigned_reg() && i->assigned_reg() <= pd_last_fpu_reg; |
aoqi@0 | 227 | } |
aoqi@0 | 228 | |
aoqi@0 | 229 | bool LinearScan::is_oop_interval(const Interval* i) { |
aoqi@0 | 230 | // fixed intervals never contain oops |
aoqi@0 | 231 | return i->reg_num() >= nof_regs && i->type() == T_OBJECT; |
aoqi@0 | 232 | } |
aoqi@0 | 233 | |
aoqi@0 | 234 | |
aoqi@0 | 235 | // ********** General helper functions |
aoqi@0 | 236 | |
aoqi@0 | 237 | // compute next unused stack index that can be used for spilling |
aoqi@0 | 238 | int LinearScan::allocate_spill_slot(bool double_word) { |
aoqi@0 | 239 | int spill_slot; |
aoqi@0 | 240 | if (double_word) { |
aoqi@0 | 241 | if ((_max_spills & 1) == 1) { |
aoqi@0 | 242 | // alignment of double-word values |
aoqi@0 | 243 | // the hole because of the alignment is filled with the next single-word value |
aoqi@0 | 244 | assert(_unused_spill_slot == -1, "wasting a spill slot"); |
aoqi@0 | 245 | _unused_spill_slot = _max_spills; |
aoqi@0 | 246 | _max_spills++; |
aoqi@0 | 247 | } |
aoqi@0 | 248 | spill_slot = _max_spills; |
aoqi@0 | 249 | _max_spills += 2; |
aoqi@0 | 250 | |
aoqi@0 | 251 | } else if (_unused_spill_slot != -1) { |
aoqi@0 | 252 | // re-use hole that was the result of a previous double-word alignment |
aoqi@0 | 253 | spill_slot = _unused_spill_slot; |
aoqi@0 | 254 | _unused_spill_slot = -1; |
aoqi@0 | 255 | |
aoqi@0 | 256 | } else { |
aoqi@0 | 257 | spill_slot = _max_spills; |
aoqi@0 | 258 | _max_spills++; |
aoqi@0 | 259 | } |
aoqi@0 | 260 | |
aoqi@0 | 261 | int result = spill_slot + LinearScan::nof_regs + frame_map()->argcount(); |
aoqi@0 | 262 | |
aoqi@0 | 263 | // the class OopMapValue uses only 11 bits for storing the name of the |
aoqi@0 | 264 | // oop location. So a stack slot bigger than 2^11 leads to an overflow |
aoqi@0 | 265 | // that is not reported in product builds. Prevent this by checking the |
aoqi@0 | 266 | // spill slot here (altough this value and the later used location name |
aoqi@0 | 267 | // are slightly different) |
aoqi@0 | 268 | if (result > 2000) { |
aoqi@0 | 269 | bailout("too many stack slots used"); |
aoqi@0 | 270 | } |
aoqi@0 | 271 | |
aoqi@0 | 272 | return result; |
aoqi@0 | 273 | } |
aoqi@0 | 274 | |
aoqi@0 | 275 | void LinearScan::assign_spill_slot(Interval* it) { |
aoqi@0 | 276 | // assign the canonical spill slot of the parent (if a part of the interval |
aoqi@0 | 277 | // is already spilled) or allocate a new spill slot |
aoqi@0 | 278 | if (it->canonical_spill_slot() >= 0) { |
aoqi@0 | 279 | it->assign_reg(it->canonical_spill_slot()); |
aoqi@0 | 280 | } else { |
aoqi@0 | 281 | int spill = allocate_spill_slot(type2spill_size[it->type()] == 2); |
aoqi@0 | 282 | it->set_canonical_spill_slot(spill); |
aoqi@0 | 283 | it->assign_reg(spill); |
aoqi@0 | 284 | } |
aoqi@0 | 285 | } |
aoqi@0 | 286 | |
aoqi@0 | 287 | void LinearScan::propagate_spill_slots() { |
aoqi@0 | 288 | if (!frame_map()->finalize_frame(max_spills())) { |
aoqi@0 | 289 | bailout("frame too large"); |
aoqi@0 | 290 | } |
aoqi@0 | 291 | } |
aoqi@0 | 292 | |
aoqi@0 | 293 | // create a new interval with a predefined reg_num |
aoqi@0 | 294 | // (only used for parent intervals that are created during the building phase) |
aoqi@0 | 295 | Interval* LinearScan::create_interval(int reg_num) { |
aoqi@0 | 296 | assert(_intervals.at(reg_num) == NULL, "overwriting exisiting interval"); |
aoqi@0 | 297 | |
aoqi@0 | 298 | Interval* interval = new Interval(reg_num); |
aoqi@0 | 299 | _intervals.at_put(reg_num, interval); |
aoqi@0 | 300 | |
aoqi@0 | 301 | // assign register number for precolored intervals |
aoqi@0 | 302 | if (reg_num < LIR_OprDesc::vreg_base) { |
aoqi@0 | 303 | interval->assign_reg(reg_num); |
aoqi@0 | 304 | } |
aoqi@0 | 305 | return interval; |
aoqi@0 | 306 | } |
aoqi@0 | 307 | |
aoqi@0 | 308 | // assign a new reg_num to the interval and append it to the list of intervals |
aoqi@0 | 309 | // (only used for child intervals that are created during register allocation) |
aoqi@0 | 310 | void LinearScan::append_interval(Interval* it) { |
aoqi@0 | 311 | it->set_reg_num(_intervals.length()); |
aoqi@0 | 312 | _intervals.append(it); |
aoqi@0 | 313 | _new_intervals_from_allocation->append(it); |
aoqi@0 | 314 | } |
aoqi@0 | 315 | |
aoqi@0 | 316 | // copy the vreg-flags if an interval is split |
aoqi@0 | 317 | void LinearScan::copy_register_flags(Interval* from, Interval* to) { |
aoqi@0 | 318 | if (gen()->is_vreg_flag_set(from->reg_num(), LIRGenerator::byte_reg)) { |
aoqi@0 | 319 | gen()->set_vreg_flag(to->reg_num(), LIRGenerator::byte_reg); |
aoqi@0 | 320 | } |
aoqi@0 | 321 | if (gen()->is_vreg_flag_set(from->reg_num(), LIRGenerator::callee_saved)) { |
aoqi@0 | 322 | gen()->set_vreg_flag(to->reg_num(), LIRGenerator::callee_saved); |
aoqi@0 | 323 | } |
aoqi@0 | 324 | |
aoqi@0 | 325 | // Note: do not copy the must_start_in_memory flag because it is not necessary for child |
aoqi@0 | 326 | // intervals (only the very beginning of the interval must be in memory) |
aoqi@0 | 327 | } |
aoqi@0 | 328 | |
aoqi@0 | 329 | |
aoqi@0 | 330 | // ********** spill move optimization |
aoqi@0 | 331 | // eliminate moves from register to stack if stack slot is known to be correct |
aoqi@0 | 332 | |
aoqi@0 | 333 | // called during building of intervals |
aoqi@0 | 334 | void LinearScan::change_spill_definition_pos(Interval* interval, int def_pos) { |
aoqi@0 | 335 | assert(interval->is_split_parent(), "can only be called for split parents"); |
aoqi@0 | 336 | |
aoqi@0 | 337 | switch (interval->spill_state()) { |
aoqi@0 | 338 | case noDefinitionFound: |
aoqi@0 | 339 | assert(interval->spill_definition_pos() == -1, "must no be set before"); |
aoqi@0 | 340 | interval->set_spill_definition_pos(def_pos); |
aoqi@0 | 341 | interval->set_spill_state(oneDefinitionFound); |
aoqi@0 | 342 | break; |
aoqi@0 | 343 | |
aoqi@0 | 344 | case oneDefinitionFound: |
aoqi@0 | 345 | assert(def_pos <= interval->spill_definition_pos(), "positions are processed in reverse order when intervals are created"); |
aoqi@0 | 346 | if (def_pos < interval->spill_definition_pos() - 2) { |
aoqi@0 | 347 | // second definition found, so no spill optimization possible for this interval |
aoqi@0 | 348 | interval->set_spill_state(noOptimization); |
aoqi@0 | 349 | } else { |
aoqi@0 | 350 | // two consecutive definitions (because of two-operand LIR form) |
aoqi@0 | 351 | assert(block_of_op_with_id(def_pos) == block_of_op_with_id(interval->spill_definition_pos()), "block must be equal"); |
aoqi@0 | 352 | } |
aoqi@0 | 353 | break; |
aoqi@0 | 354 | |
aoqi@0 | 355 | case noOptimization: |
aoqi@0 | 356 | // nothing to do |
aoqi@0 | 357 | break; |
aoqi@0 | 358 | |
aoqi@0 | 359 | default: |
aoqi@0 | 360 | assert(false, "other states not allowed at this time"); |
aoqi@0 | 361 | } |
aoqi@0 | 362 | } |
aoqi@0 | 363 | |
aoqi@0 | 364 | // called during register allocation |
aoqi@0 | 365 | void LinearScan::change_spill_state(Interval* interval, int spill_pos) { |
aoqi@0 | 366 | switch (interval->spill_state()) { |
aoqi@0 | 367 | case oneDefinitionFound: { |
aoqi@0 | 368 | int def_loop_depth = block_of_op_with_id(interval->spill_definition_pos())->loop_depth(); |
aoqi@0 | 369 | int spill_loop_depth = block_of_op_with_id(spill_pos)->loop_depth(); |
aoqi@0 | 370 | |
aoqi@0 | 371 | if (def_loop_depth < spill_loop_depth) { |
aoqi@0 | 372 | // the loop depth of the spilling position is higher then the loop depth |
aoqi@0 | 373 | // at the definition of the interval -> move write to memory out of loop |
aoqi@0 | 374 | // by storing at definitin of the interval |
aoqi@0 | 375 | interval->set_spill_state(storeAtDefinition); |
aoqi@0 | 376 | } else { |
aoqi@0 | 377 | // the interval is currently spilled only once, so for now there is no |
aoqi@0 | 378 | // reason to store the interval at the definition |
aoqi@0 | 379 | interval->set_spill_state(oneMoveInserted); |
aoqi@0 | 380 | } |
aoqi@0 | 381 | break; |
aoqi@0 | 382 | } |
aoqi@0 | 383 | |
aoqi@0 | 384 | case oneMoveInserted: { |
aoqi@0 | 385 | // the interval is spilled more then once, so it is better to store it to |
aoqi@0 | 386 | // memory at the definition |
aoqi@0 | 387 | interval->set_spill_state(storeAtDefinition); |
aoqi@0 | 388 | break; |
aoqi@0 | 389 | } |
aoqi@0 | 390 | |
aoqi@0 | 391 | case storeAtDefinition: |
aoqi@0 | 392 | case startInMemory: |
aoqi@0 | 393 | case noOptimization: |
aoqi@0 | 394 | case noDefinitionFound: |
aoqi@0 | 395 | // nothing to do |
aoqi@0 | 396 | break; |
aoqi@0 | 397 | |
aoqi@0 | 398 | default: |
aoqi@0 | 399 | assert(false, "other states not allowed at this time"); |
aoqi@0 | 400 | } |
aoqi@0 | 401 | } |
aoqi@0 | 402 | |
aoqi@0 | 403 | |
aoqi@0 | 404 | bool LinearScan::must_store_at_definition(const Interval* i) { |
aoqi@0 | 405 | return i->is_split_parent() && i->spill_state() == storeAtDefinition; |
aoqi@0 | 406 | } |
aoqi@0 | 407 | |
aoqi@0 | 408 | // called once before asignment of register numbers |
aoqi@0 | 409 | void LinearScan::eliminate_spill_moves() { |
aoqi@0 | 410 | TIME_LINEAR_SCAN(timer_eliminate_spill_moves); |
aoqi@0 | 411 | TRACE_LINEAR_SCAN(3, tty->print_cr("***** Eliminating unnecessary spill moves")); |
aoqi@0 | 412 | |
aoqi@0 | 413 | // collect all intervals that must be stored after their definion. |
aoqi@0 | 414 | // the list is sorted by Interval::spill_definition_pos |
aoqi@0 | 415 | Interval* interval; |
aoqi@0 | 416 | Interval* temp_list; |
aoqi@0 | 417 | create_unhandled_lists(&interval, &temp_list, must_store_at_definition, NULL); |
aoqi@0 | 418 | |
aoqi@0 | 419 | #ifdef ASSERT |
aoqi@0 | 420 | Interval* prev = NULL; |
aoqi@0 | 421 | Interval* temp = interval; |
aoqi@0 | 422 | while (temp != Interval::end()) { |
aoqi@0 | 423 | assert(temp->spill_definition_pos() > 0, "invalid spill definition pos"); |
aoqi@0 | 424 | if (prev != NULL) { |
aoqi@0 | 425 | assert(temp->from() >= prev->from(), "intervals not sorted"); |
aoqi@0 | 426 | assert(temp->spill_definition_pos() >= prev->spill_definition_pos(), "when intervals are sorted by from, then they must also be sorted by spill_definition_pos"); |
aoqi@0 | 427 | } |
aoqi@0 | 428 | |
aoqi@0 | 429 | assert(temp->canonical_spill_slot() >= LinearScan::nof_regs, "interval has no spill slot assigned"); |
aoqi@0 | 430 | assert(temp->spill_definition_pos() >= temp->from(), "invalid order"); |
aoqi@0 | 431 | assert(temp->spill_definition_pos() <= temp->from() + 2, "only intervals defined once at their start-pos can be optimized"); |
aoqi@0 | 432 | |
aoqi@0 | 433 | TRACE_LINEAR_SCAN(4, tty->print_cr("interval %d (from %d to %d) must be stored at %d", temp->reg_num(), temp->from(), temp->to(), temp->spill_definition_pos())); |
aoqi@0 | 434 | |
aoqi@0 | 435 | temp = temp->next(); |
aoqi@0 | 436 | } |
aoqi@0 | 437 | #endif |
aoqi@0 | 438 | |
aoqi@0 | 439 | LIR_InsertionBuffer insertion_buffer; |
aoqi@0 | 440 | int num_blocks = block_count(); |
aoqi@0 | 441 | for (int i = 0; i < num_blocks; i++) { |
aoqi@0 | 442 | BlockBegin* block = block_at(i); |
aoqi@0 | 443 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 444 | int num_inst = instructions->length(); |
aoqi@0 | 445 | bool has_new = false; |
aoqi@0 | 446 | |
aoqi@0 | 447 | // iterate all instructions of the block. skip the first because it is always a label |
aoqi@0 | 448 | for (int j = 1; j < num_inst; j++) { |
aoqi@0 | 449 | LIR_Op* op = instructions->at(j); |
aoqi@0 | 450 | int op_id = op->id(); |
aoqi@0 | 451 | |
aoqi@0 | 452 | if (op_id == -1) { |
aoqi@0 | 453 | // remove move from register to stack if the stack slot is guaranteed to be correct. |
aoqi@0 | 454 | // only moves that have been inserted by LinearScan can be removed. |
aoqi@0 | 455 | assert(op->code() == lir_move, "only moves can have a op_id of -1"); |
aoqi@0 | 456 | assert(op->as_Op1() != NULL, "move must be LIR_Op1"); |
aoqi@0 | 457 | assert(op->as_Op1()->result_opr()->is_virtual(), "LinearScan inserts only moves to virtual registers"); |
aoqi@0 | 458 | |
aoqi@0 | 459 | LIR_Op1* op1 = (LIR_Op1*)op; |
aoqi@0 | 460 | Interval* interval = interval_at(op1->result_opr()->vreg_number()); |
aoqi@0 | 461 | |
aoqi@0 | 462 | if (interval->assigned_reg() >= LinearScan::nof_regs && interval->always_in_memory()) { |
aoqi@0 | 463 | // move target is a stack slot that is always correct, so eliminate instruction |
aoqi@0 | 464 | TRACE_LINEAR_SCAN(4, tty->print_cr("eliminating move from interval %d to %d", op1->in_opr()->vreg_number(), op1->result_opr()->vreg_number())); |
aoqi@0 | 465 | instructions->at_put(j, NULL); // NULL-instructions are deleted by assign_reg_num |
aoqi@0 | 466 | } |
aoqi@0 | 467 | |
aoqi@0 | 468 | } else { |
aoqi@0 | 469 | // insert move from register to stack just after the beginning of the interval |
aoqi@0 | 470 | assert(interval == Interval::end() || interval->spill_definition_pos() >= op_id, "invalid order"); |
aoqi@0 | 471 | assert(interval == Interval::end() || (interval->is_split_parent() && interval->spill_state() == storeAtDefinition), "invalid interval"); |
aoqi@0 | 472 | |
aoqi@0 | 473 | while (interval != Interval::end() && interval->spill_definition_pos() == op_id) { |
aoqi@0 | 474 | if (!has_new) { |
aoqi@0 | 475 | // prepare insertion buffer (appended when all instructions of the block are processed) |
aoqi@0 | 476 | insertion_buffer.init(block->lir()); |
aoqi@0 | 477 | has_new = true; |
aoqi@0 | 478 | } |
aoqi@0 | 479 | |
aoqi@0 | 480 | LIR_Opr from_opr = operand_for_interval(interval); |
aoqi@0 | 481 | LIR_Opr to_opr = canonical_spill_opr(interval); |
aoqi@0 | 482 | assert(from_opr->is_fixed_cpu() || from_opr->is_fixed_fpu(), "from operand must be a register"); |
aoqi@0 | 483 | assert(to_opr->is_stack(), "to operand must be a stack slot"); |
aoqi@0 | 484 | |
aoqi@0 | 485 | insertion_buffer.move(j, from_opr, to_opr); |
aoqi@0 | 486 | TRACE_LINEAR_SCAN(4, tty->print_cr("inserting move after definition of interval %d to stack slot %d at op_id %d", interval->reg_num(), interval->canonical_spill_slot() - LinearScan::nof_regs, op_id)); |
aoqi@0 | 487 | |
aoqi@0 | 488 | interval = interval->next(); |
aoqi@0 | 489 | } |
aoqi@0 | 490 | } |
aoqi@0 | 491 | } // end of instruction iteration |
aoqi@0 | 492 | |
aoqi@0 | 493 | if (has_new) { |
aoqi@0 | 494 | block->lir()->append(&insertion_buffer); |
aoqi@0 | 495 | } |
aoqi@0 | 496 | } // end of block iteration |
aoqi@0 | 497 | |
aoqi@0 | 498 | assert(interval == Interval::end(), "missed an interval"); |
aoqi@0 | 499 | } |
aoqi@0 | 500 | |
aoqi@0 | 501 | |
aoqi@0 | 502 | // ********** Phase 1: number all instructions in all blocks |
aoqi@0 | 503 | // Compute depth-first and linear scan block orders, and number LIR_Op nodes for linear scan. |
aoqi@0 | 504 | |
aoqi@0 | 505 | void LinearScan::number_instructions() { |
aoqi@0 | 506 | { |
aoqi@0 | 507 | // dummy-timer to measure the cost of the timer itself |
aoqi@0 | 508 | // (this time is then subtracted from all other timers to get the real value) |
aoqi@0 | 509 | TIME_LINEAR_SCAN(timer_do_nothing); |
aoqi@0 | 510 | } |
aoqi@0 | 511 | TIME_LINEAR_SCAN(timer_number_instructions); |
aoqi@0 | 512 | |
aoqi@0 | 513 | // Assign IDs to LIR nodes and build a mapping, lir_ops, from ID to LIR_Op node. |
aoqi@0 | 514 | int num_blocks = block_count(); |
aoqi@0 | 515 | int num_instructions = 0; |
aoqi@0 | 516 | int i; |
aoqi@0 | 517 | for (i = 0; i < num_blocks; i++) { |
aoqi@0 | 518 | num_instructions += block_at(i)->lir()->instructions_list()->length(); |
aoqi@0 | 519 | } |
aoqi@0 | 520 | |
aoqi@0 | 521 | // initialize with correct length |
aoqi@0 | 522 | _lir_ops = LIR_OpArray(num_instructions); |
aoqi@0 | 523 | _block_of_op = BlockBeginArray(num_instructions); |
aoqi@0 | 524 | |
aoqi@0 | 525 | int op_id = 0; |
aoqi@0 | 526 | int idx = 0; |
aoqi@0 | 527 | |
aoqi@0 | 528 | for (i = 0; i < num_blocks; i++) { |
aoqi@0 | 529 | BlockBegin* block = block_at(i); |
aoqi@0 | 530 | block->set_first_lir_instruction_id(op_id); |
aoqi@0 | 531 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 532 | |
aoqi@0 | 533 | int num_inst = instructions->length(); |
aoqi@0 | 534 | for (int j = 0; j < num_inst; j++) { |
aoqi@0 | 535 | LIR_Op* op = instructions->at(j); |
aoqi@0 | 536 | op->set_id(op_id); |
aoqi@0 | 537 | |
aoqi@0 | 538 | _lir_ops.at_put(idx, op); |
aoqi@0 | 539 | _block_of_op.at_put(idx, block); |
aoqi@0 | 540 | assert(lir_op_with_id(op_id) == op, "must match"); |
aoqi@0 | 541 | |
aoqi@0 | 542 | idx++; |
aoqi@0 | 543 | op_id += 2; // numbering of lir_ops by two |
aoqi@0 | 544 | } |
aoqi@0 | 545 | block->set_last_lir_instruction_id(op_id - 2); |
aoqi@0 | 546 | } |
aoqi@0 | 547 | assert(idx == num_instructions, "must match"); |
aoqi@0 | 548 | assert(idx * 2 == op_id, "must match"); |
aoqi@0 | 549 | |
aoqi@0 | 550 | _has_call = BitMap(num_instructions); _has_call.clear(); |
aoqi@0 | 551 | _has_info = BitMap(num_instructions); _has_info.clear(); |
aoqi@0 | 552 | } |
aoqi@0 | 553 | |
aoqi@0 | 554 | |
aoqi@0 | 555 | // ********** Phase 2: compute local live sets separately for each block |
aoqi@0 | 556 | // (sets live_gen and live_kill for each block) |
aoqi@0 | 557 | |
aoqi@0 | 558 | void LinearScan::set_live_gen_kill(Value value, LIR_Op* op, BitMap& live_gen, BitMap& live_kill) { |
aoqi@0 | 559 | LIR_Opr opr = value->operand(); |
aoqi@0 | 560 | Constant* con = value->as_Constant(); |
aoqi@0 | 561 | |
aoqi@0 | 562 | // check some asumptions about debug information |
aoqi@0 | 563 | assert(!value->type()->is_illegal(), "if this local is used by the interpreter it shouldn't be of indeterminate type"); |
aoqi@0 | 564 | assert(con == NULL || opr->is_virtual() || opr->is_constant() || opr->is_illegal(), "asumption: Constant instructions have only constant operands"); |
aoqi@0 | 565 | assert(con != NULL || opr->is_virtual(), "asumption: non-Constant instructions have only virtual operands"); |
aoqi@0 | 566 | |
aoqi@0 | 567 | if ((con == NULL || con->is_pinned()) && opr->is_register()) { |
aoqi@0 | 568 | assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); |
aoqi@0 | 569 | int reg = opr->vreg_number(); |
aoqi@0 | 570 | if (!live_kill.at(reg)) { |
aoqi@0 | 571 | live_gen.set_bit(reg); |
aoqi@0 | 572 | TRACE_LINEAR_SCAN(4, tty->print_cr(" Setting live_gen for value %c%d, LIR op_id %d, register number %d", value->type()->tchar(), value->id(), op->id(), reg)); |
aoqi@0 | 573 | } |
aoqi@0 | 574 | } |
aoqi@0 | 575 | } |
aoqi@0 | 576 | |
aoqi@0 | 577 | |
aoqi@0 | 578 | void LinearScan::compute_local_live_sets() { |
aoqi@0 | 579 | TIME_LINEAR_SCAN(timer_compute_local_live_sets); |
aoqi@0 | 580 | |
aoqi@0 | 581 | int num_blocks = block_count(); |
aoqi@0 | 582 | int live_size = live_set_size(); |
aoqi@0 | 583 | bool local_has_fpu_registers = false; |
aoqi@0 | 584 | int local_num_calls = 0; |
aoqi@0 | 585 | LIR_OpVisitState visitor; |
aoqi@0 | 586 | |
aoqi@0 | 587 | BitMap2D local_interval_in_loop = BitMap2D(_num_virtual_regs, num_loops()); |
aoqi@0 | 588 | local_interval_in_loop.clear(); |
aoqi@0 | 589 | |
aoqi@0 | 590 | // iterate all blocks |
aoqi@0 | 591 | for (int i = 0; i < num_blocks; i++) { |
aoqi@0 | 592 | BlockBegin* block = block_at(i); |
aoqi@0 | 593 | |
aoqi@0 | 594 | BitMap live_gen(live_size); live_gen.clear(); |
aoqi@0 | 595 | BitMap live_kill(live_size); live_kill.clear(); |
aoqi@0 | 596 | |
aoqi@0 | 597 | if (block->is_set(BlockBegin::exception_entry_flag)) { |
aoqi@0 | 598 | // Phi functions at the begin of an exception handler are |
aoqi@0 | 599 | // implicitly defined (= killed) at the beginning of the block. |
aoqi@0 | 600 | for_each_phi_fun(block, phi, |
aoqi@0 | 601 | live_kill.set_bit(phi->operand()->vreg_number()) |
aoqi@0 | 602 | ); |
aoqi@0 | 603 | } |
aoqi@0 | 604 | |
aoqi@0 | 605 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 606 | int num_inst = instructions->length(); |
aoqi@0 | 607 | |
aoqi@0 | 608 | // iterate all instructions of the block. skip the first because it is always a label |
aoqi@0 | 609 | assert(visitor.no_operands(instructions->at(0)), "first operation must always be a label"); |
aoqi@0 | 610 | for (int j = 1; j < num_inst; j++) { |
aoqi@0 | 611 | LIR_Op* op = instructions->at(j); |
aoqi@0 | 612 | |
aoqi@0 | 613 | // visit operation to collect all operands |
aoqi@0 | 614 | visitor.visit(op); |
aoqi@0 | 615 | |
aoqi@0 | 616 | if (visitor.has_call()) { |
aoqi@0 | 617 | _has_call.set_bit(op->id() >> 1); |
aoqi@0 | 618 | local_num_calls++; |
aoqi@0 | 619 | } |
aoqi@0 | 620 | if (visitor.info_count() > 0) { |
aoqi@0 | 621 | _has_info.set_bit(op->id() >> 1); |
aoqi@0 | 622 | } |
aoqi@0 | 623 | |
aoqi@0 | 624 | // iterate input operands of instruction |
aoqi@0 | 625 | int k, n, reg; |
aoqi@0 | 626 | n = visitor.opr_count(LIR_OpVisitState::inputMode); |
aoqi@0 | 627 | for (k = 0; k < n; k++) { |
aoqi@0 | 628 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::inputMode, k); |
aoqi@0 | 629 | assert(opr->is_register(), "visitor should only return register operands"); |
aoqi@0 | 630 | |
aoqi@0 | 631 | if (opr->is_virtual_register()) { |
aoqi@0 | 632 | assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); |
aoqi@0 | 633 | reg = opr->vreg_number(); |
aoqi@0 | 634 | if (!live_kill.at(reg)) { |
aoqi@0 | 635 | live_gen.set_bit(reg); |
aoqi@0 | 636 | TRACE_LINEAR_SCAN(4, tty->print_cr(" Setting live_gen for register %d at instruction %d", reg, op->id())); |
aoqi@0 | 637 | } |
aoqi@0 | 638 | if (block->loop_index() >= 0) { |
aoqi@0 | 639 | local_interval_in_loop.set_bit(reg, block->loop_index()); |
aoqi@0 | 640 | } |
aoqi@0 | 641 | local_has_fpu_registers = local_has_fpu_registers || opr->is_virtual_fpu(); |
aoqi@0 | 642 | } |
aoqi@0 | 643 | |
aoqi@0 | 644 | #ifdef ASSERT |
aoqi@0 | 645 | // fixed intervals are never live at block boundaries, so |
aoqi@0 | 646 | // they need not be processed in live sets. |
aoqi@0 | 647 | // this is checked by these assertions to be sure about it. |
aoqi@0 | 648 | // the entry block may have incoming values in registers, which is ok. |
aoqi@0 | 649 | if (!opr->is_virtual_register() && block != ir()->start()) { |
aoqi@0 | 650 | reg = reg_num(opr); |
aoqi@0 | 651 | if (is_processed_reg_num(reg)) { |
aoqi@0 | 652 | assert(live_kill.at(reg), "using fixed register that is not defined in this block"); |
aoqi@0 | 653 | } |
aoqi@0 | 654 | reg = reg_numHi(opr); |
aoqi@0 | 655 | if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) { |
aoqi@0 | 656 | assert(live_kill.at(reg), "using fixed register that is not defined in this block"); |
aoqi@0 | 657 | } |
aoqi@0 | 658 | } |
aoqi@0 | 659 | #endif |
aoqi@0 | 660 | } |
aoqi@0 | 661 | |
aoqi@0 | 662 | // Add uses of live locals from interpreter's point of view for proper debug information generation |
aoqi@0 | 663 | n = visitor.info_count(); |
aoqi@0 | 664 | for (k = 0; k < n; k++) { |
aoqi@0 | 665 | CodeEmitInfo* info = visitor.info_at(k); |
aoqi@0 | 666 | ValueStack* stack = info->stack(); |
aoqi@0 | 667 | for_each_state_value(stack, value, |
aoqi@0 | 668 | set_live_gen_kill(value, op, live_gen, live_kill) |
aoqi@0 | 669 | ); |
aoqi@0 | 670 | } |
aoqi@0 | 671 | |
aoqi@0 | 672 | // iterate temp operands of instruction |
aoqi@0 | 673 | n = visitor.opr_count(LIR_OpVisitState::tempMode); |
aoqi@0 | 674 | for (k = 0; k < n; k++) { |
aoqi@0 | 675 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::tempMode, k); |
aoqi@0 | 676 | assert(opr->is_register(), "visitor should only return register operands"); |
aoqi@0 | 677 | |
aoqi@0 | 678 | if (opr->is_virtual_register()) { |
aoqi@0 | 679 | assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); |
aoqi@0 | 680 | reg = opr->vreg_number(); |
aoqi@0 | 681 | live_kill.set_bit(reg); |
aoqi@0 | 682 | if (block->loop_index() >= 0) { |
aoqi@0 | 683 | local_interval_in_loop.set_bit(reg, block->loop_index()); |
aoqi@0 | 684 | } |
aoqi@0 | 685 | local_has_fpu_registers = local_has_fpu_registers || opr->is_virtual_fpu(); |
aoqi@0 | 686 | } |
aoqi@0 | 687 | |
aoqi@0 | 688 | #ifdef ASSERT |
aoqi@0 | 689 | // fixed intervals are never live at block boundaries, so |
aoqi@0 | 690 | // they need not be processed in live sets |
aoqi@0 | 691 | // process them only in debug mode so that this can be checked |
aoqi@0 | 692 | if (!opr->is_virtual_register()) { |
aoqi@0 | 693 | reg = reg_num(opr); |
aoqi@0 | 694 | if (is_processed_reg_num(reg)) { |
aoqi@0 | 695 | live_kill.set_bit(reg_num(opr)); |
aoqi@0 | 696 | } |
aoqi@0 | 697 | reg = reg_numHi(opr); |
aoqi@0 | 698 | if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) { |
aoqi@0 | 699 | live_kill.set_bit(reg); |
aoqi@0 | 700 | } |
aoqi@0 | 701 | } |
aoqi@0 | 702 | #endif |
aoqi@0 | 703 | } |
aoqi@0 | 704 | |
aoqi@0 | 705 | // iterate output operands of instruction |
aoqi@0 | 706 | n = visitor.opr_count(LIR_OpVisitState::outputMode); |
aoqi@0 | 707 | for (k = 0; k < n; k++) { |
aoqi@0 | 708 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::outputMode, k); |
aoqi@0 | 709 | assert(opr->is_register(), "visitor should only return register operands"); |
aoqi@0 | 710 | |
aoqi@0 | 711 | if (opr->is_virtual_register()) { |
aoqi@0 | 712 | assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); |
aoqi@0 | 713 | reg = opr->vreg_number(); |
aoqi@0 | 714 | live_kill.set_bit(reg); |
aoqi@0 | 715 | if (block->loop_index() >= 0) { |
aoqi@0 | 716 | local_interval_in_loop.set_bit(reg, block->loop_index()); |
aoqi@0 | 717 | } |
aoqi@0 | 718 | local_has_fpu_registers = local_has_fpu_registers || opr->is_virtual_fpu(); |
aoqi@0 | 719 | } |
aoqi@0 | 720 | |
aoqi@0 | 721 | #ifdef ASSERT |
aoqi@0 | 722 | // fixed intervals are never live at block boundaries, so |
aoqi@0 | 723 | // they need not be processed in live sets |
aoqi@0 | 724 | // process them only in debug mode so that this can be checked |
aoqi@0 | 725 | if (!opr->is_virtual_register()) { |
aoqi@0 | 726 | reg = reg_num(opr); |
aoqi@0 | 727 | if (is_processed_reg_num(reg)) { |
aoqi@0 | 728 | live_kill.set_bit(reg_num(opr)); |
aoqi@0 | 729 | } |
aoqi@0 | 730 | reg = reg_numHi(opr); |
aoqi@0 | 731 | if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) { |
aoqi@0 | 732 | live_kill.set_bit(reg); |
aoqi@0 | 733 | } |
aoqi@0 | 734 | } |
aoqi@0 | 735 | #endif |
aoqi@0 | 736 | } |
aoqi@0 | 737 | } // end of instruction iteration |
aoqi@0 | 738 | |
aoqi@0 | 739 | block->set_live_gen (live_gen); |
aoqi@0 | 740 | block->set_live_kill(live_kill); |
aoqi@0 | 741 | block->set_live_in (BitMap(live_size)); block->live_in().clear(); |
aoqi@0 | 742 | block->set_live_out (BitMap(live_size)); block->live_out().clear(); |
aoqi@0 | 743 | |
aoqi@0 | 744 | TRACE_LINEAR_SCAN(4, tty->print("live_gen B%d ", block->block_id()); print_bitmap(block->live_gen())); |
aoqi@0 | 745 | TRACE_LINEAR_SCAN(4, tty->print("live_kill B%d ", block->block_id()); print_bitmap(block->live_kill())); |
aoqi@0 | 746 | } // end of block iteration |
aoqi@0 | 747 | |
aoqi@0 | 748 | // propagate local calculated information into LinearScan object |
aoqi@0 | 749 | _has_fpu_registers = local_has_fpu_registers; |
aoqi@0 | 750 | compilation()->set_has_fpu_code(local_has_fpu_registers); |
aoqi@0 | 751 | |
aoqi@0 | 752 | _num_calls = local_num_calls; |
aoqi@0 | 753 | _interval_in_loop = local_interval_in_loop; |
aoqi@0 | 754 | } |
aoqi@0 | 755 | |
aoqi@0 | 756 | |
aoqi@0 | 757 | // ********** Phase 3: perform a backward dataflow analysis to compute global live sets |
aoqi@0 | 758 | // (sets live_in and live_out for each block) |
aoqi@0 | 759 | |
aoqi@0 | 760 | void LinearScan::compute_global_live_sets() { |
aoqi@0 | 761 | TIME_LINEAR_SCAN(timer_compute_global_live_sets); |
aoqi@0 | 762 | |
aoqi@0 | 763 | int num_blocks = block_count(); |
aoqi@0 | 764 | bool change_occurred; |
aoqi@0 | 765 | bool change_occurred_in_block; |
aoqi@0 | 766 | int iteration_count = 0; |
aoqi@0 | 767 | BitMap live_out(live_set_size()); live_out.clear(); // scratch set for calculations |
aoqi@0 | 768 | |
aoqi@0 | 769 | // Perform a backward dataflow analysis to compute live_out and live_in for each block. |
aoqi@0 | 770 | // The loop is executed until a fixpoint is reached (no changes in an iteration) |
aoqi@0 | 771 | // Exception handlers must be processed because not all live values are |
aoqi@0 | 772 | // present in the state array, e.g. because of global value numbering |
aoqi@0 | 773 | do { |
aoqi@0 | 774 | change_occurred = false; |
aoqi@0 | 775 | |
aoqi@0 | 776 | // iterate all blocks in reverse order |
aoqi@0 | 777 | for (int i = num_blocks - 1; i >= 0; i--) { |
aoqi@0 | 778 | BlockBegin* block = block_at(i); |
aoqi@0 | 779 | |
aoqi@0 | 780 | change_occurred_in_block = false; |
aoqi@0 | 781 | |
aoqi@0 | 782 | // live_out(block) is the union of live_in(sux), for successors sux of block |
aoqi@0 | 783 | int n = block->number_of_sux(); |
aoqi@0 | 784 | int e = block->number_of_exception_handlers(); |
aoqi@0 | 785 | if (n + e > 0) { |
aoqi@0 | 786 | // block has successors |
aoqi@0 | 787 | if (n > 0) { |
aoqi@0 | 788 | live_out.set_from(block->sux_at(0)->live_in()); |
aoqi@0 | 789 | for (int j = 1; j < n; j++) { |
aoqi@0 | 790 | live_out.set_union(block->sux_at(j)->live_in()); |
aoqi@0 | 791 | } |
aoqi@0 | 792 | } else { |
aoqi@0 | 793 | live_out.clear(); |
aoqi@0 | 794 | } |
aoqi@0 | 795 | for (int j = 0; j < e; j++) { |
aoqi@0 | 796 | live_out.set_union(block->exception_handler_at(j)->live_in()); |
aoqi@0 | 797 | } |
aoqi@0 | 798 | |
aoqi@0 | 799 | if (!block->live_out().is_same(live_out)) { |
aoqi@0 | 800 | // A change occurred. Swap the old and new live out sets to avoid copying. |
aoqi@0 | 801 | BitMap temp = block->live_out(); |
aoqi@0 | 802 | block->set_live_out(live_out); |
aoqi@0 | 803 | live_out = temp; |
aoqi@0 | 804 | |
aoqi@0 | 805 | change_occurred = true; |
aoqi@0 | 806 | change_occurred_in_block = true; |
aoqi@0 | 807 | } |
aoqi@0 | 808 | } |
aoqi@0 | 809 | |
aoqi@0 | 810 | if (iteration_count == 0 || change_occurred_in_block) { |
aoqi@0 | 811 | // live_in(block) is the union of live_gen(block) with (live_out(block) & !live_kill(block)) |
aoqi@0 | 812 | // note: live_in has to be computed only in first iteration or if live_out has changed! |
aoqi@0 | 813 | BitMap live_in = block->live_in(); |
aoqi@0 | 814 | live_in.set_from(block->live_out()); |
aoqi@0 | 815 | live_in.set_difference(block->live_kill()); |
aoqi@0 | 816 | live_in.set_union(block->live_gen()); |
aoqi@0 | 817 | } |
aoqi@0 | 818 | |
aoqi@0 | 819 | #ifndef PRODUCT |
aoqi@0 | 820 | if (TraceLinearScanLevel >= 4) { |
aoqi@0 | 821 | char c = ' '; |
aoqi@0 | 822 | if (iteration_count == 0 || change_occurred_in_block) { |
aoqi@0 | 823 | c = '*'; |
aoqi@0 | 824 | } |
aoqi@0 | 825 | tty->print("(%d) live_in%c B%d ", iteration_count, c, block->block_id()); print_bitmap(block->live_in()); |
aoqi@0 | 826 | tty->print("(%d) live_out%c B%d ", iteration_count, c, block->block_id()); print_bitmap(block->live_out()); |
aoqi@0 | 827 | } |
aoqi@0 | 828 | #endif |
aoqi@0 | 829 | } |
aoqi@0 | 830 | iteration_count++; |
aoqi@0 | 831 | |
aoqi@0 | 832 | if (change_occurred && iteration_count > 50) { |
aoqi@0 | 833 | BAILOUT("too many iterations in compute_global_live_sets"); |
aoqi@0 | 834 | } |
aoqi@0 | 835 | } while (change_occurred); |
aoqi@0 | 836 | |
aoqi@0 | 837 | |
aoqi@0 | 838 | #ifdef ASSERT |
aoqi@0 | 839 | // check that fixed intervals are not live at block boundaries |
aoqi@0 | 840 | // (live set must be empty at fixed intervals) |
aoqi@0 | 841 | for (int i = 0; i < num_blocks; i++) { |
aoqi@0 | 842 | BlockBegin* block = block_at(i); |
aoqi@0 | 843 | for (int j = 0; j < LIR_OprDesc::vreg_base; j++) { |
aoqi@0 | 844 | assert(block->live_in().at(j) == false, "live_in set of fixed register must be empty"); |
aoqi@0 | 845 | assert(block->live_out().at(j) == false, "live_out set of fixed register must be empty"); |
aoqi@0 | 846 | assert(block->live_gen().at(j) == false, "live_gen set of fixed register must be empty"); |
aoqi@0 | 847 | } |
aoqi@0 | 848 | } |
aoqi@0 | 849 | #endif |
aoqi@0 | 850 | |
aoqi@0 | 851 | // check that the live_in set of the first block is empty |
aoqi@0 | 852 | BitMap live_in_args(ir()->start()->live_in().size()); |
aoqi@0 | 853 | live_in_args.clear(); |
aoqi@0 | 854 | if (!ir()->start()->live_in().is_same(live_in_args)) { |
aoqi@0 | 855 | #ifdef ASSERT |
aoqi@0 | 856 | tty->print_cr("Error: live_in set of first block must be empty (when this fails, virtual registers are used before they are defined)"); |
aoqi@0 | 857 | tty->print_cr("affected registers:"); |
aoqi@0 | 858 | print_bitmap(ir()->start()->live_in()); |
aoqi@0 | 859 | |
aoqi@0 | 860 | // print some additional information to simplify debugging |
aoqi@0 | 861 | for (unsigned int i = 0; i < ir()->start()->live_in().size(); i++) { |
aoqi@0 | 862 | if (ir()->start()->live_in().at(i)) { |
aoqi@0 | 863 | Instruction* instr = gen()->instruction_for_vreg(i); |
aoqi@0 | 864 | tty->print_cr("* vreg %d (HIR instruction %c%d)", i, instr == NULL ? ' ' : instr->type()->tchar(), instr == NULL ? 0 : instr->id()); |
aoqi@0 | 865 | |
aoqi@0 | 866 | for (int j = 0; j < num_blocks; j++) { |
aoqi@0 | 867 | BlockBegin* block = block_at(j); |
aoqi@0 | 868 | if (block->live_gen().at(i)) { |
aoqi@0 | 869 | tty->print_cr(" used in block B%d", block->block_id()); |
aoqi@0 | 870 | } |
aoqi@0 | 871 | if (block->live_kill().at(i)) { |
aoqi@0 | 872 | tty->print_cr(" defined in block B%d", block->block_id()); |
aoqi@0 | 873 | } |
aoqi@0 | 874 | } |
aoqi@0 | 875 | } |
aoqi@0 | 876 | } |
aoqi@0 | 877 | |
aoqi@0 | 878 | #endif |
aoqi@0 | 879 | // when this fails, virtual registers are used before they are defined. |
aoqi@0 | 880 | assert(false, "live_in set of first block must be empty"); |
aoqi@0 | 881 | // bailout of if this occurs in product mode. |
aoqi@0 | 882 | bailout("live_in set of first block not empty"); |
aoqi@0 | 883 | } |
aoqi@0 | 884 | } |
aoqi@0 | 885 | |
aoqi@0 | 886 | |
aoqi@0 | 887 | // ********** Phase 4: build intervals |
aoqi@0 | 888 | // (fills the list _intervals) |
aoqi@0 | 889 | |
aoqi@0 | 890 | void LinearScan::add_use(Value value, int from, int to, IntervalUseKind use_kind) { |
aoqi@0 | 891 | assert(!value->type()->is_illegal(), "if this value is used by the interpreter it shouldn't be of indeterminate type"); |
aoqi@0 | 892 | LIR_Opr opr = value->operand(); |
aoqi@0 | 893 | Constant* con = value->as_Constant(); |
aoqi@0 | 894 | |
aoqi@0 | 895 | if ((con == NULL || con->is_pinned()) && opr->is_register()) { |
aoqi@0 | 896 | assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); |
aoqi@0 | 897 | add_use(opr, from, to, use_kind); |
aoqi@0 | 898 | } |
aoqi@0 | 899 | } |
aoqi@0 | 900 | |
aoqi@0 | 901 | |
aoqi@0 | 902 | void LinearScan::add_def(LIR_Opr opr, int def_pos, IntervalUseKind use_kind) { |
aoqi@0 | 903 | TRACE_LINEAR_SCAN(2, tty->print(" def "); opr->print(tty); tty->print_cr(" def_pos %d (%d)", def_pos, use_kind)); |
aoqi@0 | 904 | assert(opr->is_register(), "should not be called otherwise"); |
aoqi@0 | 905 | |
aoqi@0 | 906 | if (opr->is_virtual_register()) { |
aoqi@0 | 907 | assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); |
aoqi@0 | 908 | add_def(opr->vreg_number(), def_pos, use_kind, opr->type_register()); |
aoqi@0 | 909 | |
aoqi@0 | 910 | } else { |
aoqi@0 | 911 | int reg = reg_num(opr); |
aoqi@0 | 912 | if (is_processed_reg_num(reg)) { |
aoqi@0 | 913 | add_def(reg, def_pos, use_kind, opr->type_register()); |
aoqi@0 | 914 | } |
aoqi@0 | 915 | reg = reg_numHi(opr); |
aoqi@0 | 916 | if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) { |
aoqi@0 | 917 | add_def(reg, def_pos, use_kind, opr->type_register()); |
aoqi@0 | 918 | } |
aoqi@0 | 919 | } |
aoqi@0 | 920 | } |
aoqi@0 | 921 | |
aoqi@0 | 922 | void LinearScan::add_use(LIR_Opr opr, int from, int to, IntervalUseKind use_kind) { |
aoqi@0 | 923 | TRACE_LINEAR_SCAN(2, tty->print(" use "); opr->print(tty); tty->print_cr(" from %d to %d (%d)", from, to, use_kind)); |
aoqi@0 | 924 | assert(opr->is_register(), "should not be called otherwise"); |
aoqi@0 | 925 | |
aoqi@0 | 926 | if (opr->is_virtual_register()) { |
aoqi@0 | 927 | assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); |
aoqi@0 | 928 | add_use(opr->vreg_number(), from, to, use_kind, opr->type_register()); |
aoqi@0 | 929 | |
aoqi@0 | 930 | } else { |
aoqi@0 | 931 | int reg = reg_num(opr); |
aoqi@0 | 932 | if (is_processed_reg_num(reg)) { |
aoqi@0 | 933 | add_use(reg, from, to, use_kind, opr->type_register()); |
aoqi@0 | 934 | } |
aoqi@0 | 935 | reg = reg_numHi(opr); |
aoqi@0 | 936 | if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) { |
aoqi@0 | 937 | add_use(reg, from, to, use_kind, opr->type_register()); |
aoqi@0 | 938 | } |
aoqi@0 | 939 | } |
aoqi@0 | 940 | } |
aoqi@0 | 941 | |
aoqi@0 | 942 | void LinearScan::add_temp(LIR_Opr opr, int temp_pos, IntervalUseKind use_kind) { |
aoqi@0 | 943 | TRACE_LINEAR_SCAN(2, tty->print(" temp "); opr->print(tty); tty->print_cr(" temp_pos %d (%d)", temp_pos, use_kind)); |
aoqi@0 | 944 | assert(opr->is_register(), "should not be called otherwise"); |
aoqi@0 | 945 | |
aoqi@0 | 946 | if (opr->is_virtual_register()) { |
aoqi@0 | 947 | assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); |
aoqi@0 | 948 | add_temp(opr->vreg_number(), temp_pos, use_kind, opr->type_register()); |
aoqi@0 | 949 | |
aoqi@0 | 950 | } else { |
aoqi@0 | 951 | int reg = reg_num(opr); |
aoqi@0 | 952 | if (is_processed_reg_num(reg)) { |
aoqi@0 | 953 | add_temp(reg, temp_pos, use_kind, opr->type_register()); |
aoqi@0 | 954 | } |
aoqi@0 | 955 | reg = reg_numHi(opr); |
aoqi@0 | 956 | if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) { |
aoqi@0 | 957 | add_temp(reg, temp_pos, use_kind, opr->type_register()); |
aoqi@0 | 958 | } |
aoqi@0 | 959 | } |
aoqi@0 | 960 | } |
aoqi@0 | 961 | |
aoqi@0 | 962 | |
aoqi@0 | 963 | void LinearScan::add_def(int reg_num, int def_pos, IntervalUseKind use_kind, BasicType type) { |
aoqi@0 | 964 | Interval* interval = interval_at(reg_num); |
aoqi@0 | 965 | if (interval != NULL) { |
aoqi@0 | 966 | assert(interval->reg_num() == reg_num, "wrong interval"); |
aoqi@0 | 967 | |
aoqi@0 | 968 | if (type != T_ILLEGAL) { |
aoqi@0 | 969 | interval->set_type(type); |
aoqi@0 | 970 | } |
aoqi@0 | 971 | |
aoqi@0 | 972 | Range* r = interval->first(); |
aoqi@0 | 973 | if (r->from() <= def_pos) { |
aoqi@0 | 974 | // Update the starting point (when a range is first created for a use, its |
aoqi@0 | 975 | // start is the beginning of the current block until a def is encountered.) |
aoqi@0 | 976 | r->set_from(def_pos); |
aoqi@0 | 977 | interval->add_use_pos(def_pos, use_kind); |
aoqi@0 | 978 | |
aoqi@0 | 979 | } else { |
aoqi@0 | 980 | // Dead value - make vacuous interval |
aoqi@0 | 981 | // also add use_kind for dead intervals |
aoqi@0 | 982 | interval->add_range(def_pos, def_pos + 1); |
aoqi@0 | 983 | interval->add_use_pos(def_pos, use_kind); |
aoqi@0 | 984 | TRACE_LINEAR_SCAN(2, tty->print_cr("Warning: def of reg %d at %d occurs without use", reg_num, def_pos)); |
aoqi@0 | 985 | } |
aoqi@0 | 986 | |
aoqi@0 | 987 | } else { |
aoqi@0 | 988 | // Dead value - make vacuous interval |
aoqi@0 | 989 | // also add use_kind for dead intervals |
aoqi@0 | 990 | interval = create_interval(reg_num); |
aoqi@0 | 991 | if (type != T_ILLEGAL) { |
aoqi@0 | 992 | interval->set_type(type); |
aoqi@0 | 993 | } |
aoqi@0 | 994 | |
aoqi@0 | 995 | interval->add_range(def_pos, def_pos + 1); |
aoqi@0 | 996 | interval->add_use_pos(def_pos, use_kind); |
aoqi@0 | 997 | TRACE_LINEAR_SCAN(2, tty->print_cr("Warning: dead value %d at %d in live intervals", reg_num, def_pos)); |
aoqi@0 | 998 | } |
aoqi@0 | 999 | |
aoqi@0 | 1000 | change_spill_definition_pos(interval, def_pos); |
aoqi@0 | 1001 | if (use_kind == noUse && interval->spill_state() <= startInMemory) { |
aoqi@0 | 1002 | // detection of method-parameters and roundfp-results |
aoqi@0 | 1003 | // TODO: move this directly to position where use-kind is computed |
aoqi@0 | 1004 | interval->set_spill_state(startInMemory); |
aoqi@0 | 1005 | } |
aoqi@0 | 1006 | } |
aoqi@0 | 1007 | |
aoqi@0 | 1008 | void LinearScan::add_use(int reg_num, int from, int to, IntervalUseKind use_kind, BasicType type) { |
aoqi@0 | 1009 | Interval* interval = interval_at(reg_num); |
aoqi@0 | 1010 | if (interval == NULL) { |
aoqi@0 | 1011 | interval = create_interval(reg_num); |
aoqi@0 | 1012 | } |
aoqi@0 | 1013 | assert(interval->reg_num() == reg_num, "wrong interval"); |
aoqi@0 | 1014 | |
aoqi@0 | 1015 | if (type != T_ILLEGAL) { |
aoqi@0 | 1016 | interval->set_type(type); |
aoqi@0 | 1017 | } |
aoqi@0 | 1018 | |
aoqi@0 | 1019 | interval->add_range(from, to); |
aoqi@0 | 1020 | interval->add_use_pos(to, use_kind); |
aoqi@0 | 1021 | } |
aoqi@0 | 1022 | |
aoqi@0 | 1023 | void LinearScan::add_temp(int reg_num, int temp_pos, IntervalUseKind use_kind, BasicType type) { |
aoqi@0 | 1024 | Interval* interval = interval_at(reg_num); |
aoqi@0 | 1025 | if (interval == NULL) { |
aoqi@0 | 1026 | interval = create_interval(reg_num); |
aoqi@0 | 1027 | } |
aoqi@0 | 1028 | assert(interval->reg_num() == reg_num, "wrong interval"); |
aoqi@0 | 1029 | |
aoqi@0 | 1030 | if (type != T_ILLEGAL) { |
aoqi@0 | 1031 | interval->set_type(type); |
aoqi@0 | 1032 | } |
aoqi@0 | 1033 | |
aoqi@0 | 1034 | interval->add_range(temp_pos, temp_pos + 1); |
aoqi@0 | 1035 | interval->add_use_pos(temp_pos, use_kind); |
aoqi@0 | 1036 | } |
aoqi@0 | 1037 | |
aoqi@0 | 1038 | |
aoqi@0 | 1039 | // the results of this functions are used for optimizing spilling and reloading |
aoqi@0 | 1040 | // if the functions return shouldHaveRegister and the interval is spilled, |
aoqi@0 | 1041 | // it is not reloaded to a register. |
aoqi@0 | 1042 | IntervalUseKind LinearScan::use_kind_of_output_operand(LIR_Op* op, LIR_Opr opr) { |
aoqi@0 | 1043 | if (op->code() == lir_move) { |
aoqi@0 | 1044 | assert(op->as_Op1() != NULL, "lir_move must be LIR_Op1"); |
aoqi@0 | 1045 | LIR_Op1* move = (LIR_Op1*)op; |
aoqi@0 | 1046 | LIR_Opr res = move->result_opr(); |
aoqi@0 | 1047 | bool result_in_memory = res->is_virtual() && gen()->is_vreg_flag_set(res->vreg_number(), LIRGenerator::must_start_in_memory); |
aoqi@0 | 1048 | |
aoqi@0 | 1049 | if (result_in_memory) { |
aoqi@0 | 1050 | // Begin of an interval with must_start_in_memory set. |
aoqi@0 | 1051 | // This interval will always get a stack slot first, so return noUse. |
aoqi@0 | 1052 | return noUse; |
aoqi@0 | 1053 | |
aoqi@0 | 1054 | } else if (move->in_opr()->is_stack()) { |
aoqi@0 | 1055 | // method argument (condition must be equal to handle_method_arguments) |
aoqi@0 | 1056 | return noUse; |
aoqi@0 | 1057 | |
aoqi@0 | 1058 | } else if (move->in_opr()->is_register() && move->result_opr()->is_register()) { |
aoqi@0 | 1059 | // Move from register to register |
aoqi@0 | 1060 | if (block_of_op_with_id(op->id())->is_set(BlockBegin::osr_entry_flag)) { |
aoqi@0 | 1061 | // special handling of phi-function moves inside osr-entry blocks |
aoqi@0 | 1062 | // input operand must have a register instead of output operand (leads to better register allocation) |
aoqi@0 | 1063 | return shouldHaveRegister; |
aoqi@0 | 1064 | } |
aoqi@0 | 1065 | } |
aoqi@0 | 1066 | } |
aoqi@0 | 1067 | |
aoqi@0 | 1068 | if (opr->is_virtual() && |
aoqi@0 | 1069 | gen()->is_vreg_flag_set(opr->vreg_number(), LIRGenerator::must_start_in_memory)) { |
aoqi@0 | 1070 | // result is a stack-slot, so prevent immediate reloading |
aoqi@0 | 1071 | return noUse; |
aoqi@0 | 1072 | } |
aoqi@0 | 1073 | |
aoqi@0 | 1074 | // all other operands require a register |
aoqi@0 | 1075 | return mustHaveRegister; |
aoqi@0 | 1076 | } |
aoqi@0 | 1077 | |
aoqi@0 | 1078 | IntervalUseKind LinearScan::use_kind_of_input_operand(LIR_Op* op, LIR_Opr opr) { |
aoqi@0 | 1079 | if (op->code() == lir_move) { |
aoqi@0 | 1080 | assert(op->as_Op1() != NULL, "lir_move must be LIR_Op1"); |
aoqi@0 | 1081 | LIR_Op1* move = (LIR_Op1*)op; |
aoqi@0 | 1082 | LIR_Opr res = move->result_opr(); |
aoqi@0 | 1083 | bool result_in_memory = res->is_virtual() && gen()->is_vreg_flag_set(res->vreg_number(), LIRGenerator::must_start_in_memory); |
aoqi@0 | 1084 | |
aoqi@0 | 1085 | if (result_in_memory) { |
aoqi@0 | 1086 | // Move to an interval with must_start_in_memory set. |
aoqi@0 | 1087 | // To avoid moves from stack to stack (not allowed) force the input operand to a register |
aoqi@0 | 1088 | return mustHaveRegister; |
aoqi@0 | 1089 | |
aoqi@0 | 1090 | } else if (move->in_opr()->is_register() && move->result_opr()->is_register()) { |
aoqi@0 | 1091 | // Move from register to register |
aoqi@0 | 1092 | if (block_of_op_with_id(op->id())->is_set(BlockBegin::osr_entry_flag)) { |
aoqi@0 | 1093 | // special handling of phi-function moves inside osr-entry blocks |
aoqi@0 | 1094 | // input operand must have a register instead of output operand (leads to better register allocation) |
aoqi@0 | 1095 | return mustHaveRegister; |
aoqi@0 | 1096 | } |
aoqi@0 | 1097 | |
aoqi@0 | 1098 | // The input operand is not forced to a register (moves from stack to register are allowed), |
aoqi@0 | 1099 | // but it is faster if the input operand is in a register |
aoqi@0 | 1100 | return shouldHaveRegister; |
aoqi@0 | 1101 | } |
aoqi@0 | 1102 | } |
aoqi@0 | 1103 | |
aoqi@0 | 1104 | |
aoqi@0 | 1105 | #ifdef X86 |
aoqi@0 | 1106 | if (op->code() == lir_cmove) { |
aoqi@0 | 1107 | // conditional moves can handle stack operands |
aoqi@0 | 1108 | assert(op->result_opr()->is_register(), "result must always be in a register"); |
aoqi@0 | 1109 | return shouldHaveRegister; |
aoqi@0 | 1110 | } |
aoqi@0 | 1111 | |
aoqi@0 | 1112 | // optimizations for second input operand of arithmehtic operations on Intel |
aoqi@0 | 1113 | // this operand is allowed to be on the stack in some cases |
aoqi@0 | 1114 | BasicType opr_type = opr->type_register(); |
aoqi@0 | 1115 | if (opr_type == T_FLOAT || opr_type == T_DOUBLE) { |
aoqi@0 | 1116 | if ((UseSSE == 1 && opr_type == T_FLOAT) || UseSSE >= 2) { |
aoqi@0 | 1117 | // SSE float instruction (T_DOUBLE only supported with SSE2) |
aoqi@0 | 1118 | switch (op->code()) { |
aoqi@0 | 1119 | case lir_cmp: |
aoqi@0 | 1120 | case lir_add: |
aoqi@0 | 1121 | case lir_sub: |
aoqi@0 | 1122 | case lir_mul: |
aoqi@0 | 1123 | case lir_div: |
aoqi@0 | 1124 | { |
aoqi@0 | 1125 | assert(op->as_Op2() != NULL, "must be LIR_Op2"); |
aoqi@0 | 1126 | LIR_Op2* op2 = (LIR_Op2*)op; |
aoqi@0 | 1127 | if (op2->in_opr1() != op2->in_opr2() && op2->in_opr2() == opr) { |
aoqi@0 | 1128 | assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register"); |
aoqi@0 | 1129 | return shouldHaveRegister; |
aoqi@0 | 1130 | } |
aoqi@0 | 1131 | } |
aoqi@0 | 1132 | } |
aoqi@0 | 1133 | } else { |
aoqi@0 | 1134 | // FPU stack float instruction |
aoqi@0 | 1135 | switch (op->code()) { |
aoqi@0 | 1136 | case lir_add: |
aoqi@0 | 1137 | case lir_sub: |
aoqi@0 | 1138 | case lir_mul: |
aoqi@0 | 1139 | case lir_div: |
aoqi@0 | 1140 | { |
aoqi@0 | 1141 | assert(op->as_Op2() != NULL, "must be LIR_Op2"); |
aoqi@0 | 1142 | LIR_Op2* op2 = (LIR_Op2*)op; |
aoqi@0 | 1143 | if (op2->in_opr1() != op2->in_opr2() && op2->in_opr2() == opr) { |
aoqi@0 | 1144 | assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register"); |
aoqi@0 | 1145 | return shouldHaveRegister; |
aoqi@0 | 1146 | } |
aoqi@0 | 1147 | } |
aoqi@0 | 1148 | } |
aoqi@0 | 1149 | } |
aoqi@0 | 1150 | // We want to sometimes use logical operations on pointers, in particular in GC barriers. |
aoqi@0 | 1151 | // Since 64bit logical operations do not current support operands on stack, we have to make sure |
aoqi@0 | 1152 | // T_OBJECT doesn't get spilled along with T_LONG. |
aoqi@0 | 1153 | } else if (opr_type != T_LONG LP64_ONLY(&& opr_type != T_OBJECT)) { |
aoqi@0 | 1154 | // integer instruction (note: long operands must always be in register) |
aoqi@0 | 1155 | switch (op->code()) { |
aoqi@0 | 1156 | case lir_cmp: |
aoqi@0 | 1157 | case lir_add: |
aoqi@0 | 1158 | case lir_sub: |
aoqi@0 | 1159 | case lir_logic_and: |
aoqi@0 | 1160 | case lir_logic_or: |
aoqi@0 | 1161 | case lir_logic_xor: |
aoqi@0 | 1162 | { |
aoqi@0 | 1163 | assert(op->as_Op2() != NULL, "must be LIR_Op2"); |
aoqi@0 | 1164 | LIR_Op2* op2 = (LIR_Op2*)op; |
aoqi@0 | 1165 | if (op2->in_opr1() != op2->in_opr2() && op2->in_opr2() == opr) { |
aoqi@0 | 1166 | assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register"); |
aoqi@0 | 1167 | return shouldHaveRegister; |
aoqi@0 | 1168 | } |
aoqi@0 | 1169 | } |
aoqi@0 | 1170 | } |
aoqi@0 | 1171 | } |
aoqi@0 | 1172 | #endif // X86 |
aoqi@0 | 1173 | |
aoqi@0 | 1174 | // all other operands require a register |
aoqi@0 | 1175 | return mustHaveRegister; |
aoqi@0 | 1176 | } |
aoqi@0 | 1177 | |
aoqi@0 | 1178 | |
aoqi@0 | 1179 | void LinearScan::handle_method_arguments(LIR_Op* op) { |
aoqi@0 | 1180 | // special handling for method arguments (moves from stack to virtual register): |
aoqi@0 | 1181 | // the interval gets no register assigned, but the stack slot. |
aoqi@0 | 1182 | // it is split before the first use by the register allocator. |
aoqi@0 | 1183 | |
aoqi@0 | 1184 | if (op->code() == lir_move) { |
aoqi@0 | 1185 | assert(op->as_Op1() != NULL, "must be LIR_Op1"); |
aoqi@0 | 1186 | LIR_Op1* move = (LIR_Op1*)op; |
aoqi@0 | 1187 | |
aoqi@0 | 1188 | if (move->in_opr()->is_stack()) { |
aoqi@0 | 1189 | #ifdef ASSERT |
aoqi@0 | 1190 | int arg_size = compilation()->method()->arg_size(); |
aoqi@0 | 1191 | LIR_Opr o = move->in_opr(); |
aoqi@0 | 1192 | if (o->is_single_stack()) { |
aoqi@0 | 1193 | assert(o->single_stack_ix() >= 0 && o->single_stack_ix() < arg_size, "out of range"); |
aoqi@0 | 1194 | } else if (o->is_double_stack()) { |
aoqi@0 | 1195 | assert(o->double_stack_ix() >= 0 && o->double_stack_ix() < arg_size, "out of range"); |
aoqi@0 | 1196 | } else { |
aoqi@0 | 1197 | ShouldNotReachHere(); |
aoqi@0 | 1198 | } |
aoqi@0 | 1199 | |
aoqi@0 | 1200 | assert(move->id() > 0, "invalid id"); |
aoqi@0 | 1201 | assert(block_of_op_with_id(move->id())->number_of_preds() == 0, "move from stack must be in first block"); |
aoqi@0 | 1202 | assert(move->result_opr()->is_virtual(), "result of move must be a virtual register"); |
aoqi@0 | 1203 | |
aoqi@0 | 1204 | TRACE_LINEAR_SCAN(4, tty->print_cr("found move from stack slot %d to vreg %d", o->is_single_stack() ? o->single_stack_ix() : o->double_stack_ix(), reg_num(move->result_opr()))); |
aoqi@0 | 1205 | #endif |
aoqi@0 | 1206 | |
aoqi@0 | 1207 | Interval* interval = interval_at(reg_num(move->result_opr())); |
aoqi@0 | 1208 | |
aoqi@0 | 1209 | int stack_slot = LinearScan::nof_regs + (move->in_opr()->is_single_stack() ? move->in_opr()->single_stack_ix() : move->in_opr()->double_stack_ix()); |
aoqi@0 | 1210 | interval->set_canonical_spill_slot(stack_slot); |
aoqi@0 | 1211 | interval->assign_reg(stack_slot); |
aoqi@0 | 1212 | } |
aoqi@0 | 1213 | } |
aoqi@0 | 1214 | } |
aoqi@0 | 1215 | |
aoqi@0 | 1216 | void LinearScan::handle_doubleword_moves(LIR_Op* op) { |
aoqi@0 | 1217 | // special handling for doubleword move from memory to register: |
aoqi@0 | 1218 | // in this case the registers of the input address and the result |
aoqi@0 | 1219 | // registers must not overlap -> add a temp range for the input registers |
aoqi@0 | 1220 | if (op->code() == lir_move) { |
aoqi@0 | 1221 | assert(op->as_Op1() != NULL, "must be LIR_Op1"); |
aoqi@0 | 1222 | LIR_Op1* move = (LIR_Op1*)op; |
aoqi@0 | 1223 | |
aoqi@0 | 1224 | if (move->result_opr()->is_double_cpu() && move->in_opr()->is_pointer()) { |
aoqi@0 | 1225 | LIR_Address* address = move->in_opr()->as_address_ptr(); |
aoqi@0 | 1226 | if (address != NULL) { |
aoqi@0 | 1227 | if (address->base()->is_valid()) { |
aoqi@0 | 1228 | add_temp(address->base(), op->id(), noUse); |
aoqi@0 | 1229 | } |
aoqi@0 | 1230 | if (address->index()->is_valid()) { |
aoqi@0 | 1231 | add_temp(address->index(), op->id(), noUse); |
aoqi@0 | 1232 | } |
aoqi@0 | 1233 | } |
aoqi@0 | 1234 | } |
aoqi@0 | 1235 | } |
aoqi@0 | 1236 | } |
aoqi@0 | 1237 | |
aoqi@0 | 1238 | void LinearScan::add_register_hints(LIR_Op* op) { |
aoqi@0 | 1239 | switch (op->code()) { |
aoqi@0 | 1240 | case lir_move: // fall through |
aoqi@0 | 1241 | case lir_convert: { |
aoqi@0 | 1242 | assert(op->as_Op1() != NULL, "lir_move, lir_convert must be LIR_Op1"); |
aoqi@0 | 1243 | LIR_Op1* move = (LIR_Op1*)op; |
aoqi@0 | 1244 | |
aoqi@0 | 1245 | LIR_Opr move_from = move->in_opr(); |
aoqi@0 | 1246 | LIR_Opr move_to = move->result_opr(); |
aoqi@0 | 1247 | |
aoqi@0 | 1248 | if (move_to->is_register() && move_from->is_register()) { |
aoqi@0 | 1249 | Interval* from = interval_at(reg_num(move_from)); |
aoqi@0 | 1250 | Interval* to = interval_at(reg_num(move_to)); |
aoqi@0 | 1251 | if (from != NULL && to != NULL) { |
aoqi@0 | 1252 | to->set_register_hint(from); |
aoqi@0 | 1253 | TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", move->id(), from->reg_num(), to->reg_num())); |
aoqi@0 | 1254 | } |
aoqi@0 | 1255 | } |
aoqi@0 | 1256 | break; |
aoqi@0 | 1257 | } |
aoqi@0 | 1258 | case lir_cmove: { |
aoqi@0 | 1259 | assert(op->as_Op2() != NULL, "lir_cmove must be LIR_Op2"); |
aoqi@0 | 1260 | LIR_Op2* cmove = (LIR_Op2*)op; |
aoqi@0 | 1261 | |
aoqi@0 | 1262 | LIR_Opr move_from = cmove->in_opr1(); |
aoqi@0 | 1263 | LIR_Opr move_to = cmove->result_opr(); |
aoqi@0 | 1264 | |
aoqi@0 | 1265 | if (move_to->is_register() && move_from->is_register()) { |
aoqi@0 | 1266 | Interval* from = interval_at(reg_num(move_from)); |
aoqi@0 | 1267 | Interval* to = interval_at(reg_num(move_to)); |
aoqi@0 | 1268 | if (from != NULL && to != NULL) { |
aoqi@0 | 1269 | to->set_register_hint(from); |
aoqi@0 | 1270 | TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", cmove->id(), from->reg_num(), to->reg_num())); |
aoqi@0 | 1271 | } |
aoqi@0 | 1272 | } |
aoqi@0 | 1273 | break; |
aoqi@0 | 1274 | } |
aoqi@0 | 1275 | } |
aoqi@0 | 1276 | } |
aoqi@0 | 1277 | |
aoqi@0 | 1278 | |
aoqi@0 | 1279 | void LinearScan::build_intervals() { |
aoqi@0 | 1280 | TIME_LINEAR_SCAN(timer_build_intervals); |
aoqi@0 | 1281 | |
aoqi@0 | 1282 | // initialize interval list with expected number of intervals |
aoqi@0 | 1283 | // (32 is added to have some space for split children without having to resize the list) |
aoqi@0 | 1284 | _intervals = IntervalList(num_virtual_regs() + 32); |
aoqi@0 | 1285 | // initialize all slots that are used by build_intervals |
aoqi@0 | 1286 | _intervals.at_put_grow(num_virtual_regs() - 1, NULL, NULL); |
aoqi@0 | 1287 | |
aoqi@0 | 1288 | // create a list with all caller-save registers (cpu, fpu, xmm) |
aoqi@0 | 1289 | // when an instruction is a call, a temp range is created for all these registers |
aoqi@0 | 1290 | int num_caller_save_registers = 0; |
aoqi@0 | 1291 | int caller_save_registers[LinearScan::nof_regs]; |
aoqi@0 | 1292 | |
aoqi@0 | 1293 | int i; |
aoqi@0 | 1294 | for (i = 0; i < FrameMap::nof_caller_save_cpu_regs(); i++) { |
aoqi@0 | 1295 | LIR_Opr opr = FrameMap::caller_save_cpu_reg_at(i); |
aoqi@0 | 1296 | assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands"); |
aoqi@0 | 1297 | assert(reg_numHi(opr) == -1, "missing addition of range for hi-register"); |
aoqi@0 | 1298 | caller_save_registers[num_caller_save_registers++] = reg_num(opr); |
aoqi@0 | 1299 | } |
aoqi@0 | 1300 | |
aoqi@0 | 1301 | // temp ranges for fpu registers are only created when the method has |
aoqi@0 | 1302 | // virtual fpu operands. Otherwise no allocation for fpu registers is |
aoqi@0 | 1303 | // perfomed and so the temp ranges would be useless |
aoqi@0 | 1304 | if (has_fpu_registers()) { |
aoqi@0 | 1305 | #ifdef X86 |
aoqi@0 | 1306 | if (UseSSE < 2) { |
aoqi@0 | 1307 | #endif |
aoqi@0 | 1308 | for (i = 0; i < FrameMap::nof_caller_save_fpu_regs; i++) { |
aoqi@0 | 1309 | LIR_Opr opr = FrameMap::caller_save_fpu_reg_at(i); |
aoqi@0 | 1310 | assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands"); |
aoqi@0 | 1311 | assert(reg_numHi(opr) == -1, "missing addition of range for hi-register"); |
aoqi@0 | 1312 | caller_save_registers[num_caller_save_registers++] = reg_num(opr); |
aoqi@0 | 1313 | } |
aoqi@0 | 1314 | #ifdef X86 |
aoqi@0 | 1315 | } |
aoqi@0 | 1316 | if (UseSSE > 0) { |
aoqi@0 | 1317 | for (i = 0; i < FrameMap::nof_caller_save_xmm_regs; i++) { |
aoqi@0 | 1318 | LIR_Opr opr = FrameMap::caller_save_xmm_reg_at(i); |
aoqi@0 | 1319 | assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands"); |
aoqi@0 | 1320 | assert(reg_numHi(opr) == -1, "missing addition of range for hi-register"); |
aoqi@0 | 1321 | caller_save_registers[num_caller_save_registers++] = reg_num(opr); |
aoqi@0 | 1322 | } |
aoqi@0 | 1323 | } |
aoqi@0 | 1324 | #endif |
aoqi@0 | 1325 | } |
aoqi@0 | 1326 | assert(num_caller_save_registers <= LinearScan::nof_regs, "out of bounds"); |
aoqi@0 | 1327 | |
aoqi@0 | 1328 | |
aoqi@0 | 1329 | LIR_OpVisitState visitor; |
aoqi@0 | 1330 | |
aoqi@0 | 1331 | // iterate all blocks in reverse order |
aoqi@0 | 1332 | for (i = block_count() - 1; i >= 0; i--) { |
aoqi@0 | 1333 | BlockBegin* block = block_at(i); |
aoqi@0 | 1334 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 1335 | int block_from = block->first_lir_instruction_id(); |
aoqi@0 | 1336 | int block_to = block->last_lir_instruction_id(); |
aoqi@0 | 1337 | |
aoqi@0 | 1338 | assert(block_from == instructions->at(0)->id(), "must be"); |
aoqi@0 | 1339 | assert(block_to == instructions->at(instructions->length() - 1)->id(), "must be"); |
aoqi@0 | 1340 | |
aoqi@0 | 1341 | // Update intervals for registers live at the end of this block; |
aoqi@0 | 1342 | BitMap live = block->live_out(); |
aoqi@0 | 1343 | int size = (int)live.size(); |
aoqi@0 | 1344 | for (int number = (int)live.get_next_one_offset(0, size); number < size; number = (int)live.get_next_one_offset(number + 1, size)) { |
aoqi@0 | 1345 | assert(live.at(number), "should not stop here otherwise"); |
aoqi@0 | 1346 | assert(number >= LIR_OprDesc::vreg_base, "fixed intervals must not be live on block bounds"); |
aoqi@0 | 1347 | TRACE_LINEAR_SCAN(2, tty->print_cr("live in %d to %d", number, block_to + 2)); |
aoqi@0 | 1348 | |
aoqi@0 | 1349 | add_use(number, block_from, block_to + 2, noUse, T_ILLEGAL); |
aoqi@0 | 1350 | |
aoqi@0 | 1351 | // add special use positions for loop-end blocks when the |
aoqi@0 | 1352 | // interval is used anywhere inside this loop. It's possible |
aoqi@0 | 1353 | // that the block was part of a non-natural loop, so it might |
aoqi@0 | 1354 | // have an invalid loop index. |
aoqi@0 | 1355 | if (block->is_set(BlockBegin::linear_scan_loop_end_flag) && |
aoqi@0 | 1356 | block->loop_index() != -1 && |
aoqi@0 | 1357 | is_interval_in_loop(number, block->loop_index())) { |
aoqi@0 | 1358 | interval_at(number)->add_use_pos(block_to + 1, loopEndMarker); |
aoqi@0 | 1359 | } |
aoqi@0 | 1360 | } |
aoqi@0 | 1361 | |
aoqi@0 | 1362 | // iterate all instructions of the block in reverse order. |
aoqi@0 | 1363 | // skip the first instruction because it is always a label |
aoqi@0 | 1364 | // definitions of intervals are processed before uses |
aoqi@0 | 1365 | assert(visitor.no_operands(instructions->at(0)), "first operation must always be a label"); |
aoqi@0 | 1366 | for (int j = instructions->length() - 1; j >= 1; j--) { |
aoqi@0 | 1367 | LIR_Op* op = instructions->at(j); |
aoqi@0 | 1368 | int op_id = op->id(); |
aoqi@0 | 1369 | |
aoqi@0 | 1370 | // visit operation to collect all operands |
aoqi@0 | 1371 | visitor.visit(op); |
aoqi@0 | 1372 | |
aoqi@0 | 1373 | // add a temp range for each register if operation destroys caller-save registers |
aoqi@0 | 1374 | if (visitor.has_call()) { |
aoqi@0 | 1375 | for (int k = 0; k < num_caller_save_registers; k++) { |
aoqi@0 | 1376 | add_temp(caller_save_registers[k], op_id, noUse, T_ILLEGAL); |
aoqi@0 | 1377 | } |
aoqi@0 | 1378 | TRACE_LINEAR_SCAN(4, tty->print_cr("operation destroys all caller-save registers")); |
aoqi@0 | 1379 | } |
aoqi@0 | 1380 | |
aoqi@0 | 1381 | // Add any platform dependent temps |
aoqi@0 | 1382 | pd_add_temps(op); |
aoqi@0 | 1383 | |
aoqi@0 | 1384 | // visit definitions (output and temp operands) |
aoqi@0 | 1385 | int k, n; |
aoqi@0 | 1386 | n = visitor.opr_count(LIR_OpVisitState::outputMode); |
aoqi@0 | 1387 | for (k = 0; k < n; k++) { |
aoqi@0 | 1388 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::outputMode, k); |
aoqi@0 | 1389 | assert(opr->is_register(), "visitor should only return register operands"); |
aoqi@0 | 1390 | add_def(opr, op_id, use_kind_of_output_operand(op, opr)); |
aoqi@0 | 1391 | } |
aoqi@0 | 1392 | |
aoqi@0 | 1393 | n = visitor.opr_count(LIR_OpVisitState::tempMode); |
aoqi@0 | 1394 | for (k = 0; k < n; k++) { |
aoqi@0 | 1395 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::tempMode, k); |
aoqi@0 | 1396 | assert(opr->is_register(), "visitor should only return register operands"); |
aoqi@0 | 1397 | add_temp(opr, op_id, mustHaveRegister); |
aoqi@0 | 1398 | } |
aoqi@0 | 1399 | |
aoqi@0 | 1400 | // visit uses (input operands) |
aoqi@0 | 1401 | n = visitor.opr_count(LIR_OpVisitState::inputMode); |
aoqi@0 | 1402 | for (k = 0; k < n; k++) { |
aoqi@0 | 1403 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::inputMode, k); |
aoqi@0 | 1404 | assert(opr->is_register(), "visitor should only return register operands"); |
aoqi@0 | 1405 | add_use(opr, block_from, op_id, use_kind_of_input_operand(op, opr)); |
aoqi@0 | 1406 | } |
aoqi@0 | 1407 | |
aoqi@0 | 1408 | // Add uses of live locals from interpreter's point of view for proper |
aoqi@0 | 1409 | // debug information generation |
aoqi@0 | 1410 | // Treat these operands as temp values (if the life range is extended |
aoqi@0 | 1411 | // to a call site, the value would be in a register at the call otherwise) |
aoqi@0 | 1412 | n = visitor.info_count(); |
aoqi@0 | 1413 | for (k = 0; k < n; k++) { |
aoqi@0 | 1414 | CodeEmitInfo* info = visitor.info_at(k); |
aoqi@0 | 1415 | ValueStack* stack = info->stack(); |
aoqi@0 | 1416 | for_each_state_value(stack, value, |
aoqi@0 | 1417 | add_use(value, block_from, op_id + 1, noUse); |
aoqi@0 | 1418 | ); |
aoqi@0 | 1419 | } |
aoqi@0 | 1420 | |
aoqi@0 | 1421 | // special steps for some instructions (especially moves) |
aoqi@0 | 1422 | handle_method_arguments(op); |
aoqi@0 | 1423 | handle_doubleword_moves(op); |
aoqi@0 | 1424 | add_register_hints(op); |
aoqi@0 | 1425 | |
aoqi@0 | 1426 | } // end of instruction iteration |
aoqi@0 | 1427 | } // end of block iteration |
aoqi@0 | 1428 | |
aoqi@0 | 1429 | |
aoqi@0 | 1430 | // add the range [0, 1[ to all fixed intervals |
aoqi@0 | 1431 | // -> the register allocator need not handle unhandled fixed intervals |
aoqi@0 | 1432 | for (int n = 0; n < LinearScan::nof_regs; n++) { |
aoqi@0 | 1433 | Interval* interval = interval_at(n); |
aoqi@0 | 1434 | if (interval != NULL) { |
aoqi@0 | 1435 | interval->add_range(0, 1); |
aoqi@0 | 1436 | } |
aoqi@0 | 1437 | } |
aoqi@0 | 1438 | } |
aoqi@0 | 1439 | |
aoqi@0 | 1440 | |
aoqi@0 | 1441 | // ********** Phase 5: actual register allocation |
aoqi@0 | 1442 | |
aoqi@0 | 1443 | int LinearScan::interval_cmp(Interval** a, Interval** b) { |
aoqi@0 | 1444 | if (*a != NULL) { |
aoqi@0 | 1445 | if (*b != NULL) { |
aoqi@0 | 1446 | return (*a)->from() - (*b)->from(); |
aoqi@0 | 1447 | } else { |
aoqi@0 | 1448 | return -1; |
aoqi@0 | 1449 | } |
aoqi@0 | 1450 | } else { |
aoqi@0 | 1451 | if (*b != NULL) { |
aoqi@0 | 1452 | return 1; |
aoqi@0 | 1453 | } else { |
aoqi@0 | 1454 | return 0; |
aoqi@0 | 1455 | } |
aoqi@0 | 1456 | } |
aoqi@0 | 1457 | } |
aoqi@0 | 1458 | |
aoqi@0 | 1459 | #ifndef PRODUCT |
aoqi@0 | 1460 | bool LinearScan::is_sorted(IntervalArray* intervals) { |
aoqi@0 | 1461 | int from = -1; |
aoqi@0 | 1462 | int i, j; |
aoqi@0 | 1463 | for (i = 0; i < intervals->length(); i ++) { |
aoqi@0 | 1464 | Interval* it = intervals->at(i); |
aoqi@0 | 1465 | if (it != NULL) { |
aoqi@0 | 1466 | if (from > it->from()) { |
aoqi@0 | 1467 | assert(false, ""); |
aoqi@0 | 1468 | return false; |
aoqi@0 | 1469 | } |
aoqi@0 | 1470 | from = it->from(); |
aoqi@0 | 1471 | } |
aoqi@0 | 1472 | } |
aoqi@0 | 1473 | |
aoqi@0 | 1474 | // check in both directions if sorted list and unsorted list contain same intervals |
aoqi@0 | 1475 | for (i = 0; i < interval_count(); i++) { |
aoqi@0 | 1476 | if (interval_at(i) != NULL) { |
aoqi@0 | 1477 | int num_found = 0; |
aoqi@0 | 1478 | for (j = 0; j < intervals->length(); j++) { |
aoqi@0 | 1479 | if (interval_at(i) == intervals->at(j)) { |
aoqi@0 | 1480 | num_found++; |
aoqi@0 | 1481 | } |
aoqi@0 | 1482 | } |
aoqi@0 | 1483 | assert(num_found == 1, "lists do not contain same intervals"); |
aoqi@0 | 1484 | } |
aoqi@0 | 1485 | } |
aoqi@0 | 1486 | for (j = 0; j < intervals->length(); j++) { |
aoqi@0 | 1487 | int num_found = 0; |
aoqi@0 | 1488 | for (i = 0; i < interval_count(); i++) { |
aoqi@0 | 1489 | if (interval_at(i) == intervals->at(j)) { |
aoqi@0 | 1490 | num_found++; |
aoqi@0 | 1491 | } |
aoqi@0 | 1492 | } |
aoqi@0 | 1493 | assert(num_found == 1, "lists do not contain same intervals"); |
aoqi@0 | 1494 | } |
aoqi@0 | 1495 | |
aoqi@0 | 1496 | return true; |
aoqi@0 | 1497 | } |
aoqi@0 | 1498 | #endif |
aoqi@0 | 1499 | |
aoqi@0 | 1500 | void LinearScan::add_to_list(Interval** first, Interval** prev, Interval* interval) { |
aoqi@0 | 1501 | if (*prev != NULL) { |
aoqi@0 | 1502 | (*prev)->set_next(interval); |
aoqi@0 | 1503 | } else { |
aoqi@0 | 1504 | *first = interval; |
aoqi@0 | 1505 | } |
aoqi@0 | 1506 | *prev = interval; |
aoqi@0 | 1507 | } |
aoqi@0 | 1508 | |
aoqi@0 | 1509 | void LinearScan::create_unhandled_lists(Interval** list1, Interval** list2, bool (is_list1)(const Interval* i), bool (is_list2)(const Interval* i)) { |
aoqi@0 | 1510 | assert(is_sorted(_sorted_intervals), "interval list is not sorted"); |
aoqi@0 | 1511 | |
aoqi@0 | 1512 | *list1 = *list2 = Interval::end(); |
aoqi@0 | 1513 | |
aoqi@0 | 1514 | Interval* list1_prev = NULL; |
aoqi@0 | 1515 | Interval* list2_prev = NULL; |
aoqi@0 | 1516 | Interval* v; |
aoqi@0 | 1517 | |
aoqi@0 | 1518 | const int n = _sorted_intervals->length(); |
aoqi@0 | 1519 | for (int i = 0; i < n; i++) { |
aoqi@0 | 1520 | v = _sorted_intervals->at(i); |
aoqi@0 | 1521 | if (v == NULL) continue; |
aoqi@0 | 1522 | |
aoqi@0 | 1523 | if (is_list1(v)) { |
aoqi@0 | 1524 | add_to_list(list1, &list1_prev, v); |
aoqi@0 | 1525 | } else if (is_list2 == NULL || is_list2(v)) { |
aoqi@0 | 1526 | add_to_list(list2, &list2_prev, v); |
aoqi@0 | 1527 | } |
aoqi@0 | 1528 | } |
aoqi@0 | 1529 | |
aoqi@0 | 1530 | if (list1_prev != NULL) list1_prev->set_next(Interval::end()); |
aoqi@0 | 1531 | if (list2_prev != NULL) list2_prev->set_next(Interval::end()); |
aoqi@0 | 1532 | |
aoqi@0 | 1533 | assert(list1_prev == NULL || list1_prev->next() == Interval::end(), "linear list ends not with sentinel"); |
aoqi@0 | 1534 | assert(list2_prev == NULL || list2_prev->next() == Interval::end(), "linear list ends not with sentinel"); |
aoqi@0 | 1535 | } |
aoqi@0 | 1536 | |
aoqi@0 | 1537 | |
aoqi@0 | 1538 | void LinearScan::sort_intervals_before_allocation() { |
aoqi@0 | 1539 | TIME_LINEAR_SCAN(timer_sort_intervals_before); |
aoqi@0 | 1540 | |
aoqi@0 | 1541 | if (_needs_full_resort) { |
aoqi@0 | 1542 | // There is no known reason why this should occur but just in case... |
aoqi@0 | 1543 | assert(false, "should never occur"); |
aoqi@0 | 1544 | // Re-sort existing interval list because an Interval::from() has changed |
aoqi@0 | 1545 | _sorted_intervals->sort(interval_cmp); |
aoqi@0 | 1546 | _needs_full_resort = false; |
aoqi@0 | 1547 | } |
aoqi@0 | 1548 | |
aoqi@0 | 1549 | IntervalList* unsorted_list = &_intervals; |
aoqi@0 | 1550 | int unsorted_len = unsorted_list->length(); |
aoqi@0 | 1551 | int sorted_len = 0; |
aoqi@0 | 1552 | int unsorted_idx; |
aoqi@0 | 1553 | int sorted_idx = 0; |
aoqi@0 | 1554 | int sorted_from_max = -1; |
aoqi@0 | 1555 | |
aoqi@0 | 1556 | // calc number of items for sorted list (sorted list must not contain NULL values) |
aoqi@0 | 1557 | for (unsorted_idx = 0; unsorted_idx < unsorted_len; unsorted_idx++) { |
aoqi@0 | 1558 | if (unsorted_list->at(unsorted_idx) != NULL) { |
aoqi@0 | 1559 | sorted_len++; |
aoqi@0 | 1560 | } |
aoqi@0 | 1561 | } |
aoqi@0 | 1562 | IntervalArray* sorted_list = new IntervalArray(sorted_len); |
aoqi@0 | 1563 | |
aoqi@0 | 1564 | // special sorting algorithm: the original interval-list is almost sorted, |
aoqi@0 | 1565 | // only some intervals are swapped. So this is much faster than a complete QuickSort |
aoqi@0 | 1566 | for (unsorted_idx = 0; unsorted_idx < unsorted_len; unsorted_idx++) { |
aoqi@0 | 1567 | Interval* cur_interval = unsorted_list->at(unsorted_idx); |
aoqi@0 | 1568 | |
aoqi@0 | 1569 | if (cur_interval != NULL) { |
aoqi@0 | 1570 | int cur_from = cur_interval->from(); |
aoqi@0 | 1571 | |
aoqi@0 | 1572 | if (sorted_from_max <= cur_from) { |
aoqi@0 | 1573 | sorted_list->at_put(sorted_idx++, cur_interval); |
aoqi@0 | 1574 | sorted_from_max = cur_interval->from(); |
aoqi@0 | 1575 | } else { |
aoqi@0 | 1576 | // the asumption that the intervals are already sorted failed, |
aoqi@0 | 1577 | // so this interval must be sorted in manually |
aoqi@0 | 1578 | int j; |
aoqi@0 | 1579 | for (j = sorted_idx - 1; j >= 0 && cur_from < sorted_list->at(j)->from(); j--) { |
aoqi@0 | 1580 | sorted_list->at_put(j + 1, sorted_list->at(j)); |
aoqi@0 | 1581 | } |
aoqi@0 | 1582 | sorted_list->at_put(j + 1, cur_interval); |
aoqi@0 | 1583 | sorted_idx++; |
aoqi@0 | 1584 | } |
aoqi@0 | 1585 | } |
aoqi@0 | 1586 | } |
aoqi@0 | 1587 | _sorted_intervals = sorted_list; |
aoqi@0 | 1588 | assert(is_sorted(_sorted_intervals), "intervals unsorted"); |
aoqi@0 | 1589 | } |
aoqi@0 | 1590 | |
aoqi@0 | 1591 | void LinearScan::sort_intervals_after_allocation() { |
aoqi@0 | 1592 | TIME_LINEAR_SCAN(timer_sort_intervals_after); |
aoqi@0 | 1593 | |
aoqi@0 | 1594 | if (_needs_full_resort) { |
aoqi@0 | 1595 | // Re-sort existing interval list because an Interval::from() has changed |
aoqi@0 | 1596 | _sorted_intervals->sort(interval_cmp); |
aoqi@0 | 1597 | _needs_full_resort = false; |
aoqi@0 | 1598 | } |
aoqi@0 | 1599 | |
aoqi@0 | 1600 | IntervalArray* old_list = _sorted_intervals; |
aoqi@0 | 1601 | IntervalList* new_list = _new_intervals_from_allocation; |
aoqi@0 | 1602 | int old_len = old_list->length(); |
aoqi@0 | 1603 | int new_len = new_list->length(); |
aoqi@0 | 1604 | |
aoqi@0 | 1605 | if (new_len == 0) { |
aoqi@0 | 1606 | // no intervals have been added during allocation, so sorted list is already up to date |
aoqi@0 | 1607 | assert(is_sorted(_sorted_intervals), "intervals unsorted"); |
aoqi@0 | 1608 | return; |
aoqi@0 | 1609 | } |
aoqi@0 | 1610 | |
aoqi@0 | 1611 | // conventional sort-algorithm for new intervals |
aoqi@0 | 1612 | new_list->sort(interval_cmp); |
aoqi@0 | 1613 | |
aoqi@0 | 1614 | // merge old and new list (both already sorted) into one combined list |
aoqi@0 | 1615 | IntervalArray* combined_list = new IntervalArray(old_len + new_len); |
aoqi@0 | 1616 | int old_idx = 0; |
aoqi@0 | 1617 | int new_idx = 0; |
aoqi@0 | 1618 | |
aoqi@0 | 1619 | while (old_idx + new_idx < old_len + new_len) { |
aoqi@0 | 1620 | if (new_idx >= new_len || (old_idx < old_len && old_list->at(old_idx)->from() <= new_list->at(new_idx)->from())) { |
aoqi@0 | 1621 | combined_list->at_put(old_idx + new_idx, old_list->at(old_idx)); |
aoqi@0 | 1622 | old_idx++; |
aoqi@0 | 1623 | } else { |
aoqi@0 | 1624 | combined_list->at_put(old_idx + new_idx, new_list->at(new_idx)); |
aoqi@0 | 1625 | new_idx++; |
aoqi@0 | 1626 | } |
aoqi@0 | 1627 | } |
aoqi@0 | 1628 | |
aoqi@0 | 1629 | _sorted_intervals = combined_list; |
aoqi@0 | 1630 | assert(is_sorted(_sorted_intervals), "intervals unsorted"); |
aoqi@0 | 1631 | } |
aoqi@0 | 1632 | |
aoqi@0 | 1633 | |
aoqi@0 | 1634 | void LinearScan::allocate_registers() { |
aoqi@0 | 1635 | TIME_LINEAR_SCAN(timer_allocate_registers); |
aoqi@0 | 1636 | |
aoqi@0 | 1637 | Interval* precolored_cpu_intervals, *not_precolored_cpu_intervals; |
aoqi@0 | 1638 | Interval* precolored_fpu_intervals, *not_precolored_fpu_intervals; |
aoqi@0 | 1639 | |
aoqi@0 | 1640 | create_unhandled_lists(&precolored_cpu_intervals, ¬_precolored_cpu_intervals, is_precolored_cpu_interval, is_virtual_cpu_interval); |
aoqi@0 | 1641 | if (has_fpu_registers()) { |
aoqi@0 | 1642 | create_unhandled_lists(&precolored_fpu_intervals, ¬_precolored_fpu_intervals, is_precolored_fpu_interval, is_virtual_fpu_interval); |
aoqi@0 | 1643 | #ifdef ASSERT |
aoqi@0 | 1644 | } else { |
aoqi@0 | 1645 | // fpu register allocation is omitted because no virtual fpu registers are present |
aoqi@0 | 1646 | // just check this again... |
aoqi@0 | 1647 | create_unhandled_lists(&precolored_fpu_intervals, ¬_precolored_fpu_intervals, is_precolored_fpu_interval, is_virtual_fpu_interval); |
aoqi@0 | 1648 | assert(not_precolored_fpu_intervals == Interval::end(), "missed an uncolored fpu interval"); |
aoqi@0 | 1649 | #endif |
aoqi@0 | 1650 | } |
aoqi@0 | 1651 | |
aoqi@0 | 1652 | // allocate cpu registers |
aoqi@0 | 1653 | LinearScanWalker cpu_lsw(this, precolored_cpu_intervals, not_precolored_cpu_intervals); |
aoqi@0 | 1654 | cpu_lsw.walk(); |
aoqi@0 | 1655 | cpu_lsw.finish_allocation(); |
aoqi@0 | 1656 | |
aoqi@0 | 1657 | if (has_fpu_registers()) { |
aoqi@0 | 1658 | // allocate fpu registers |
aoqi@0 | 1659 | LinearScanWalker fpu_lsw(this, precolored_fpu_intervals, not_precolored_fpu_intervals); |
aoqi@0 | 1660 | fpu_lsw.walk(); |
aoqi@0 | 1661 | fpu_lsw.finish_allocation(); |
aoqi@0 | 1662 | } |
aoqi@0 | 1663 | } |
aoqi@0 | 1664 | |
aoqi@0 | 1665 | |
aoqi@0 | 1666 | // ********** Phase 6: resolve data flow |
aoqi@0 | 1667 | // (insert moves at edges between blocks if intervals have been split) |
aoqi@0 | 1668 | |
aoqi@0 | 1669 | // wrapper for Interval::split_child_at_op_id that performs a bailout in product mode |
aoqi@0 | 1670 | // instead of returning NULL |
aoqi@0 | 1671 | Interval* LinearScan::split_child_at_op_id(Interval* interval, int op_id, LIR_OpVisitState::OprMode mode) { |
aoqi@0 | 1672 | Interval* result = interval->split_child_at_op_id(op_id, mode); |
aoqi@0 | 1673 | if (result != NULL) { |
aoqi@0 | 1674 | return result; |
aoqi@0 | 1675 | } |
aoqi@0 | 1676 | |
aoqi@0 | 1677 | assert(false, "must find an interval, but do a clean bailout in product mode"); |
aoqi@0 | 1678 | result = new Interval(LIR_OprDesc::vreg_base); |
aoqi@0 | 1679 | result->assign_reg(0); |
aoqi@0 | 1680 | result->set_type(T_INT); |
aoqi@0 | 1681 | BAILOUT_("LinearScan: interval is NULL", result); |
aoqi@0 | 1682 | } |
aoqi@0 | 1683 | |
aoqi@0 | 1684 | |
aoqi@0 | 1685 | Interval* LinearScan::interval_at_block_begin(BlockBegin* block, int reg_num) { |
aoqi@0 | 1686 | assert(LinearScan::nof_regs <= reg_num && reg_num < num_virtual_regs(), "register number out of bounds"); |
aoqi@0 | 1687 | assert(interval_at(reg_num) != NULL, "no interval found"); |
aoqi@0 | 1688 | |
aoqi@0 | 1689 | return split_child_at_op_id(interval_at(reg_num), block->first_lir_instruction_id(), LIR_OpVisitState::outputMode); |
aoqi@0 | 1690 | } |
aoqi@0 | 1691 | |
aoqi@0 | 1692 | Interval* LinearScan::interval_at_block_end(BlockBegin* block, int reg_num) { |
aoqi@0 | 1693 | assert(LinearScan::nof_regs <= reg_num && reg_num < num_virtual_regs(), "register number out of bounds"); |
aoqi@0 | 1694 | assert(interval_at(reg_num) != NULL, "no interval found"); |
aoqi@0 | 1695 | |
aoqi@0 | 1696 | return split_child_at_op_id(interval_at(reg_num), block->last_lir_instruction_id() + 1, LIR_OpVisitState::outputMode); |
aoqi@0 | 1697 | } |
aoqi@0 | 1698 | |
aoqi@0 | 1699 | Interval* LinearScan::interval_at_op_id(int reg_num, int op_id) { |
aoqi@0 | 1700 | assert(LinearScan::nof_regs <= reg_num && reg_num < num_virtual_regs(), "register number out of bounds"); |
aoqi@0 | 1701 | assert(interval_at(reg_num) != NULL, "no interval found"); |
aoqi@0 | 1702 | |
aoqi@0 | 1703 | return split_child_at_op_id(interval_at(reg_num), op_id, LIR_OpVisitState::inputMode); |
aoqi@0 | 1704 | } |
aoqi@0 | 1705 | |
aoqi@0 | 1706 | |
aoqi@0 | 1707 | void LinearScan::resolve_collect_mappings(BlockBegin* from_block, BlockBegin* to_block, MoveResolver &move_resolver) { |
aoqi@0 | 1708 | DEBUG_ONLY(move_resolver.check_empty()); |
aoqi@0 | 1709 | |
aoqi@0 | 1710 | const int num_regs = num_virtual_regs(); |
aoqi@0 | 1711 | const int size = live_set_size(); |
aoqi@0 | 1712 | const BitMap live_at_edge = to_block->live_in(); |
aoqi@0 | 1713 | |
aoqi@0 | 1714 | // visit all registers where the live_at_edge bit is set |
aoqi@0 | 1715 | for (int r = (int)live_at_edge.get_next_one_offset(0, size); r < size; r = (int)live_at_edge.get_next_one_offset(r + 1, size)) { |
aoqi@0 | 1716 | assert(r < num_regs, "live information set for not exisiting interval"); |
aoqi@0 | 1717 | assert(from_block->live_out().at(r) && to_block->live_in().at(r), "interval not live at this edge"); |
aoqi@0 | 1718 | |
aoqi@0 | 1719 | Interval* from_interval = interval_at_block_end(from_block, r); |
aoqi@0 | 1720 | Interval* to_interval = interval_at_block_begin(to_block, r); |
aoqi@0 | 1721 | |
aoqi@0 | 1722 | if (from_interval != to_interval && (from_interval->assigned_reg() != to_interval->assigned_reg() || from_interval->assigned_regHi() != to_interval->assigned_regHi())) { |
aoqi@0 | 1723 | // need to insert move instruction |
aoqi@0 | 1724 | move_resolver.add_mapping(from_interval, to_interval); |
aoqi@0 | 1725 | } |
aoqi@0 | 1726 | } |
aoqi@0 | 1727 | } |
aoqi@0 | 1728 | |
aoqi@0 | 1729 | |
aoqi@0 | 1730 | void LinearScan::resolve_find_insert_pos(BlockBegin* from_block, BlockBegin* to_block, MoveResolver &move_resolver) { |
aoqi@0 | 1731 | if (from_block->number_of_sux() <= 1) { |
aoqi@0 | 1732 | TRACE_LINEAR_SCAN(4, tty->print_cr("inserting moves at end of from_block B%d", from_block->block_id())); |
aoqi@0 | 1733 | |
aoqi@0 | 1734 | LIR_OpList* instructions = from_block->lir()->instructions_list(); |
aoqi@0 | 1735 | LIR_OpBranch* branch = instructions->last()->as_OpBranch(); |
aoqi@0 | 1736 | if (branch != NULL) { |
aoqi@0 | 1737 | // insert moves before branch |
aoqi@0 | 1738 | assert(branch->cond() == lir_cond_always, "block does not end with an unconditional jump"); |
aoqi@0 | 1739 | move_resolver.set_insert_position(from_block->lir(), instructions->length() - 2); |
aoqi@0 | 1740 | } else { |
aoqi@0 | 1741 | move_resolver.set_insert_position(from_block->lir(), instructions->length() - 1); |
aoqi@0 | 1742 | } |
aoqi@0 | 1743 | |
aoqi@0 | 1744 | } else { |
aoqi@0 | 1745 | TRACE_LINEAR_SCAN(4, tty->print_cr("inserting moves at beginning of to_block B%d", to_block->block_id())); |
aoqi@0 | 1746 | #ifdef ASSERT |
aoqi@0 | 1747 | assert(from_block->lir()->instructions_list()->at(0)->as_OpLabel() != NULL, "block does not start with a label"); |
aoqi@0 | 1748 | |
aoqi@0 | 1749 | // because the number of predecessor edges matches the number of |
aoqi@0 | 1750 | // successor edges, blocks which are reached by switch statements |
aoqi@0 | 1751 | // may have be more than one predecessor but it will be guaranteed |
aoqi@0 | 1752 | // that all predecessors will be the same. |
aoqi@0 | 1753 | for (int i = 0; i < to_block->number_of_preds(); i++) { |
aoqi@0 | 1754 | assert(from_block == to_block->pred_at(i), "all critical edges must be broken"); |
aoqi@0 | 1755 | } |
aoqi@0 | 1756 | #endif |
aoqi@0 | 1757 | |
aoqi@0 | 1758 | move_resolver.set_insert_position(to_block->lir(), 0); |
aoqi@0 | 1759 | } |
aoqi@0 | 1760 | } |
aoqi@0 | 1761 | |
aoqi@0 | 1762 | |
aoqi@0 | 1763 | // insert necessary moves (spilling or reloading) at edges between blocks if interval has been split |
aoqi@0 | 1764 | void LinearScan::resolve_data_flow() { |
aoqi@0 | 1765 | TIME_LINEAR_SCAN(timer_resolve_data_flow); |
aoqi@0 | 1766 | |
aoqi@0 | 1767 | int num_blocks = block_count(); |
aoqi@0 | 1768 | MoveResolver move_resolver(this); |
aoqi@0 | 1769 | BitMap block_completed(num_blocks); block_completed.clear(); |
aoqi@0 | 1770 | BitMap already_resolved(num_blocks); already_resolved.clear(); |
aoqi@0 | 1771 | |
aoqi@0 | 1772 | int i; |
aoqi@0 | 1773 | for (i = 0; i < num_blocks; i++) { |
aoqi@0 | 1774 | BlockBegin* block = block_at(i); |
aoqi@0 | 1775 | |
aoqi@0 | 1776 | // check if block has only one predecessor and only one successor |
aoqi@0 | 1777 | if (block->number_of_preds() == 1 && block->number_of_sux() == 1 && block->number_of_exception_handlers() == 0) { |
aoqi@0 | 1778 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 1779 | assert(instructions->at(0)->code() == lir_label, "block must start with label"); |
aoqi@0 | 1780 | assert(instructions->last()->code() == lir_branch, "block with successors must end with branch"); |
aoqi@0 | 1781 | assert(instructions->last()->as_OpBranch()->cond() == lir_cond_always, "block with successor must end with unconditional branch"); |
aoqi@0 | 1782 | |
aoqi@0 | 1783 | // check if block is empty (only label and branch) |
aoqi@0 | 1784 | if (instructions->length() == 2) { |
aoqi@0 | 1785 | BlockBegin* pred = block->pred_at(0); |
aoqi@0 | 1786 | BlockBegin* sux = block->sux_at(0); |
aoqi@0 | 1787 | |
aoqi@0 | 1788 | // prevent optimization of two consecutive blocks |
aoqi@0 | 1789 | if (!block_completed.at(pred->linear_scan_number()) && !block_completed.at(sux->linear_scan_number())) { |
aoqi@0 | 1790 | TRACE_LINEAR_SCAN(3, tty->print_cr("**** optimizing empty block B%d (pred: B%d, sux: B%d)", block->block_id(), pred->block_id(), sux->block_id())); |
aoqi@0 | 1791 | block_completed.set_bit(block->linear_scan_number()); |
aoqi@0 | 1792 | |
aoqi@0 | 1793 | // directly resolve between pred and sux (without looking at the empty block between) |
aoqi@0 | 1794 | resolve_collect_mappings(pred, sux, move_resolver); |
aoqi@0 | 1795 | if (move_resolver.has_mappings()) { |
aoqi@0 | 1796 | move_resolver.set_insert_position(block->lir(), 0); |
aoqi@0 | 1797 | move_resolver.resolve_and_append_moves(); |
aoqi@0 | 1798 | } |
aoqi@0 | 1799 | } |
aoqi@0 | 1800 | } |
aoqi@0 | 1801 | } |
aoqi@0 | 1802 | } |
aoqi@0 | 1803 | |
aoqi@0 | 1804 | |
aoqi@0 | 1805 | for (i = 0; i < num_blocks; i++) { |
aoqi@0 | 1806 | if (!block_completed.at(i)) { |
aoqi@0 | 1807 | BlockBegin* from_block = block_at(i); |
aoqi@0 | 1808 | already_resolved.set_from(block_completed); |
aoqi@0 | 1809 | |
aoqi@0 | 1810 | int num_sux = from_block->number_of_sux(); |
aoqi@0 | 1811 | for (int s = 0; s < num_sux; s++) { |
aoqi@0 | 1812 | BlockBegin* to_block = from_block->sux_at(s); |
aoqi@0 | 1813 | |
aoqi@0 | 1814 | // check for duplicate edges between the same blocks (can happen with switch blocks) |
aoqi@0 | 1815 | if (!already_resolved.at(to_block->linear_scan_number())) { |
aoqi@0 | 1816 | TRACE_LINEAR_SCAN(3, tty->print_cr("**** processing edge between B%d and B%d", from_block->block_id(), to_block->block_id())); |
aoqi@0 | 1817 | already_resolved.set_bit(to_block->linear_scan_number()); |
aoqi@0 | 1818 | |
aoqi@0 | 1819 | // collect all intervals that have been split between from_block and to_block |
aoqi@0 | 1820 | resolve_collect_mappings(from_block, to_block, move_resolver); |
aoqi@0 | 1821 | if (move_resolver.has_mappings()) { |
aoqi@0 | 1822 | resolve_find_insert_pos(from_block, to_block, move_resolver); |
aoqi@0 | 1823 | move_resolver.resolve_and_append_moves(); |
aoqi@0 | 1824 | } |
aoqi@0 | 1825 | } |
aoqi@0 | 1826 | } |
aoqi@0 | 1827 | } |
aoqi@0 | 1828 | } |
aoqi@0 | 1829 | } |
aoqi@0 | 1830 | |
aoqi@0 | 1831 | |
aoqi@0 | 1832 | void LinearScan::resolve_exception_entry(BlockBegin* block, int reg_num, MoveResolver &move_resolver) { |
aoqi@0 | 1833 | if (interval_at(reg_num) == NULL) { |
aoqi@0 | 1834 | // if a phi function is never used, no interval is created -> ignore this |
aoqi@0 | 1835 | return; |
aoqi@0 | 1836 | } |
aoqi@0 | 1837 | |
aoqi@0 | 1838 | Interval* interval = interval_at_block_begin(block, reg_num); |
aoqi@0 | 1839 | int reg = interval->assigned_reg(); |
aoqi@0 | 1840 | int regHi = interval->assigned_regHi(); |
aoqi@0 | 1841 | |
aoqi@0 | 1842 | if ((reg < nof_regs && interval->always_in_memory()) || |
aoqi@0 | 1843 | (use_fpu_stack_allocation() && reg >= pd_first_fpu_reg && reg <= pd_last_fpu_reg)) { |
aoqi@0 | 1844 | // the interval is split to get a short range that is located on the stack |
aoqi@0 | 1845 | // in the following two cases: |
aoqi@0 | 1846 | // * the interval started in memory (e.g. method parameter), but is currently in a register |
aoqi@0 | 1847 | // this is an optimization for exception handling that reduces the number of moves that |
aoqi@0 | 1848 | // are necessary for resolving the states when an exception uses this exception handler |
aoqi@0 | 1849 | // * the interval would be on the fpu stack at the begin of the exception handler |
aoqi@0 | 1850 | // this is not allowed because of the complicated fpu stack handling on Intel |
aoqi@0 | 1851 | |
aoqi@0 | 1852 | // range that will be spilled to memory |
aoqi@0 | 1853 | int from_op_id = block->first_lir_instruction_id(); |
aoqi@0 | 1854 | int to_op_id = from_op_id + 1; // short live range of length 1 |
aoqi@0 | 1855 | assert(interval->from() <= from_op_id && interval->to() >= to_op_id, |
aoqi@0 | 1856 | "no split allowed between exception entry and first instruction"); |
aoqi@0 | 1857 | |
aoqi@0 | 1858 | if (interval->from() != from_op_id) { |
aoqi@0 | 1859 | // the part before from_op_id is unchanged |
aoqi@0 | 1860 | interval = interval->split(from_op_id); |
aoqi@0 | 1861 | interval->assign_reg(reg, regHi); |
aoqi@0 | 1862 | append_interval(interval); |
aoqi@0 | 1863 | } else { |
aoqi@0 | 1864 | _needs_full_resort = true; |
aoqi@0 | 1865 | } |
aoqi@0 | 1866 | assert(interval->from() == from_op_id, "must be true now"); |
aoqi@0 | 1867 | |
aoqi@0 | 1868 | Interval* spilled_part = interval; |
aoqi@0 | 1869 | if (interval->to() != to_op_id) { |
aoqi@0 | 1870 | // the part after to_op_id is unchanged |
aoqi@0 | 1871 | spilled_part = interval->split_from_start(to_op_id); |
aoqi@0 | 1872 | append_interval(spilled_part); |
aoqi@0 | 1873 | move_resolver.add_mapping(spilled_part, interval); |
aoqi@0 | 1874 | } |
aoqi@0 | 1875 | assign_spill_slot(spilled_part); |
aoqi@0 | 1876 | |
aoqi@0 | 1877 | assert(spilled_part->from() == from_op_id && spilled_part->to() == to_op_id, "just checking"); |
aoqi@0 | 1878 | } |
aoqi@0 | 1879 | } |
aoqi@0 | 1880 | |
aoqi@0 | 1881 | void LinearScan::resolve_exception_entry(BlockBegin* block, MoveResolver &move_resolver) { |
aoqi@0 | 1882 | assert(block->is_set(BlockBegin::exception_entry_flag), "should not call otherwise"); |
aoqi@0 | 1883 | DEBUG_ONLY(move_resolver.check_empty()); |
aoqi@0 | 1884 | |
aoqi@0 | 1885 | // visit all registers where the live_in bit is set |
aoqi@0 | 1886 | int size = live_set_size(); |
aoqi@0 | 1887 | for (int r = (int)block->live_in().get_next_one_offset(0, size); r < size; r = (int)block->live_in().get_next_one_offset(r + 1, size)) { |
aoqi@0 | 1888 | resolve_exception_entry(block, r, move_resolver); |
aoqi@0 | 1889 | } |
aoqi@0 | 1890 | |
aoqi@0 | 1891 | // the live_in bits are not set for phi functions of the xhandler entry, so iterate them separately |
aoqi@0 | 1892 | for_each_phi_fun(block, phi, |
aoqi@0 | 1893 | resolve_exception_entry(block, phi->operand()->vreg_number(), move_resolver) |
aoqi@0 | 1894 | ); |
aoqi@0 | 1895 | |
aoqi@0 | 1896 | if (move_resolver.has_mappings()) { |
aoqi@0 | 1897 | // insert moves after first instruction |
aoqi@0 | 1898 | move_resolver.set_insert_position(block->lir(), 0); |
aoqi@0 | 1899 | move_resolver.resolve_and_append_moves(); |
aoqi@0 | 1900 | } |
aoqi@0 | 1901 | } |
aoqi@0 | 1902 | |
aoqi@0 | 1903 | |
aoqi@0 | 1904 | void LinearScan::resolve_exception_edge(XHandler* handler, int throwing_op_id, int reg_num, Phi* phi, MoveResolver &move_resolver) { |
aoqi@0 | 1905 | if (interval_at(reg_num) == NULL) { |
aoqi@0 | 1906 | // if a phi function is never used, no interval is created -> ignore this |
aoqi@0 | 1907 | return; |
aoqi@0 | 1908 | } |
aoqi@0 | 1909 | |
aoqi@0 | 1910 | // the computation of to_interval is equal to resolve_collect_mappings, |
aoqi@0 | 1911 | // but from_interval is more complicated because of phi functions |
aoqi@0 | 1912 | BlockBegin* to_block = handler->entry_block(); |
aoqi@0 | 1913 | Interval* to_interval = interval_at_block_begin(to_block, reg_num); |
aoqi@0 | 1914 | |
aoqi@0 | 1915 | if (phi != NULL) { |
aoqi@0 | 1916 | // phi function of the exception entry block |
aoqi@0 | 1917 | // no moves are created for this phi function in the LIR_Generator, so the |
aoqi@0 | 1918 | // interval at the throwing instruction must be searched using the operands |
aoqi@0 | 1919 | // of the phi function |
aoqi@0 | 1920 | Value from_value = phi->operand_at(handler->phi_operand()); |
aoqi@0 | 1921 | |
aoqi@0 | 1922 | // with phi functions it can happen that the same from_value is used in |
aoqi@0 | 1923 | // multiple mappings, so notify move-resolver that this is allowed |
aoqi@0 | 1924 | move_resolver.set_multiple_reads_allowed(); |
aoqi@0 | 1925 | |
aoqi@0 | 1926 | Constant* con = from_value->as_Constant(); |
aoqi@0 | 1927 | if (con != NULL && !con->is_pinned()) { |
aoqi@0 | 1928 | // unpinned constants may have no register, so add mapping from constant to interval |
aoqi@0 | 1929 | move_resolver.add_mapping(LIR_OprFact::value_type(con->type()), to_interval); |
aoqi@0 | 1930 | } else { |
aoqi@0 | 1931 | // search split child at the throwing op_id |
aoqi@0 | 1932 | Interval* from_interval = interval_at_op_id(from_value->operand()->vreg_number(), throwing_op_id); |
aoqi@0 | 1933 | move_resolver.add_mapping(from_interval, to_interval); |
aoqi@0 | 1934 | } |
aoqi@0 | 1935 | |
aoqi@0 | 1936 | } else { |
aoqi@0 | 1937 | // no phi function, so use reg_num also for from_interval |
aoqi@0 | 1938 | // search split child at the throwing op_id |
aoqi@0 | 1939 | Interval* from_interval = interval_at_op_id(reg_num, throwing_op_id); |
aoqi@0 | 1940 | if (from_interval != to_interval) { |
aoqi@0 | 1941 | // optimization to reduce number of moves: when to_interval is on stack and |
aoqi@0 | 1942 | // the stack slot is known to be always correct, then no move is necessary |
aoqi@0 | 1943 | if (!from_interval->always_in_memory() || from_interval->canonical_spill_slot() != to_interval->assigned_reg()) { |
aoqi@0 | 1944 | move_resolver.add_mapping(from_interval, to_interval); |
aoqi@0 | 1945 | } |
aoqi@0 | 1946 | } |
aoqi@0 | 1947 | } |
aoqi@0 | 1948 | } |
aoqi@0 | 1949 | |
aoqi@0 | 1950 | void LinearScan::resolve_exception_edge(XHandler* handler, int throwing_op_id, MoveResolver &move_resolver) { |
aoqi@0 | 1951 | TRACE_LINEAR_SCAN(4, tty->print_cr("resolving exception handler B%d: throwing_op_id=%d", handler->entry_block()->block_id(), throwing_op_id)); |
aoqi@0 | 1952 | |
aoqi@0 | 1953 | DEBUG_ONLY(move_resolver.check_empty()); |
aoqi@0 | 1954 | assert(handler->lir_op_id() == -1, "already processed this xhandler"); |
aoqi@0 | 1955 | DEBUG_ONLY(handler->set_lir_op_id(throwing_op_id)); |
aoqi@0 | 1956 | assert(handler->entry_code() == NULL, "code already present"); |
aoqi@0 | 1957 | |
aoqi@0 | 1958 | // visit all registers where the live_in bit is set |
aoqi@0 | 1959 | BlockBegin* block = handler->entry_block(); |
aoqi@0 | 1960 | int size = live_set_size(); |
aoqi@0 | 1961 | for (int r = (int)block->live_in().get_next_one_offset(0, size); r < size; r = (int)block->live_in().get_next_one_offset(r + 1, size)) { |
aoqi@0 | 1962 | resolve_exception_edge(handler, throwing_op_id, r, NULL, move_resolver); |
aoqi@0 | 1963 | } |
aoqi@0 | 1964 | |
aoqi@0 | 1965 | // the live_in bits are not set for phi functions of the xhandler entry, so iterate them separately |
aoqi@0 | 1966 | for_each_phi_fun(block, phi, |
aoqi@0 | 1967 | resolve_exception_edge(handler, throwing_op_id, phi->operand()->vreg_number(), phi, move_resolver) |
aoqi@0 | 1968 | ); |
aoqi@0 | 1969 | |
aoqi@0 | 1970 | if (move_resolver.has_mappings()) { |
aoqi@0 | 1971 | LIR_List* entry_code = new LIR_List(compilation()); |
aoqi@0 | 1972 | move_resolver.set_insert_position(entry_code, 0); |
aoqi@0 | 1973 | move_resolver.resolve_and_append_moves(); |
aoqi@0 | 1974 | |
aoqi@0 | 1975 | entry_code->jump(handler->entry_block()); |
aoqi@0 | 1976 | handler->set_entry_code(entry_code); |
aoqi@0 | 1977 | } |
aoqi@0 | 1978 | } |
aoqi@0 | 1979 | |
aoqi@0 | 1980 | |
aoqi@0 | 1981 | void LinearScan::resolve_exception_handlers() { |
aoqi@0 | 1982 | MoveResolver move_resolver(this); |
aoqi@0 | 1983 | LIR_OpVisitState visitor; |
aoqi@0 | 1984 | int num_blocks = block_count(); |
aoqi@0 | 1985 | |
aoqi@0 | 1986 | int i; |
aoqi@0 | 1987 | for (i = 0; i < num_blocks; i++) { |
aoqi@0 | 1988 | BlockBegin* block = block_at(i); |
aoqi@0 | 1989 | if (block->is_set(BlockBegin::exception_entry_flag)) { |
aoqi@0 | 1990 | resolve_exception_entry(block, move_resolver); |
aoqi@0 | 1991 | } |
aoqi@0 | 1992 | } |
aoqi@0 | 1993 | |
aoqi@0 | 1994 | for (i = 0; i < num_blocks; i++) { |
aoqi@0 | 1995 | BlockBegin* block = block_at(i); |
aoqi@0 | 1996 | LIR_List* ops = block->lir(); |
aoqi@0 | 1997 | int num_ops = ops->length(); |
aoqi@0 | 1998 | |
aoqi@0 | 1999 | // iterate all instructions of the block. skip the first because it is always a label |
aoqi@0 | 2000 | assert(visitor.no_operands(ops->at(0)), "first operation must always be a label"); |
aoqi@0 | 2001 | for (int j = 1; j < num_ops; j++) { |
aoqi@0 | 2002 | LIR_Op* op = ops->at(j); |
aoqi@0 | 2003 | int op_id = op->id(); |
aoqi@0 | 2004 | |
aoqi@0 | 2005 | if (op_id != -1 && has_info(op_id)) { |
aoqi@0 | 2006 | // visit operation to collect all operands |
aoqi@0 | 2007 | visitor.visit(op); |
aoqi@0 | 2008 | assert(visitor.info_count() > 0, "should not visit otherwise"); |
aoqi@0 | 2009 | |
aoqi@0 | 2010 | XHandlers* xhandlers = visitor.all_xhandler(); |
aoqi@0 | 2011 | int n = xhandlers->length(); |
aoqi@0 | 2012 | for (int k = 0; k < n; k++) { |
aoqi@0 | 2013 | resolve_exception_edge(xhandlers->handler_at(k), op_id, move_resolver); |
aoqi@0 | 2014 | } |
aoqi@0 | 2015 | |
aoqi@0 | 2016 | #ifdef ASSERT |
aoqi@0 | 2017 | } else { |
aoqi@0 | 2018 | visitor.visit(op); |
aoqi@0 | 2019 | assert(visitor.all_xhandler()->length() == 0, "missed exception handler"); |
aoqi@0 | 2020 | #endif |
aoqi@0 | 2021 | } |
aoqi@0 | 2022 | } |
aoqi@0 | 2023 | } |
aoqi@0 | 2024 | } |
aoqi@0 | 2025 | |
aoqi@0 | 2026 | |
aoqi@0 | 2027 | // ********** Phase 7: assign register numbers back to LIR |
aoqi@0 | 2028 | // (includes computation of debug information and oop maps) |
aoqi@0 | 2029 | |
aoqi@0 | 2030 | VMReg LinearScan::vm_reg_for_interval(Interval* interval) { |
aoqi@0 | 2031 | VMReg reg = interval->cached_vm_reg(); |
aoqi@0 | 2032 | if (!reg->is_valid() ) { |
aoqi@0 | 2033 | reg = vm_reg_for_operand(operand_for_interval(interval)); |
aoqi@0 | 2034 | interval->set_cached_vm_reg(reg); |
aoqi@0 | 2035 | } |
aoqi@0 | 2036 | assert(reg == vm_reg_for_operand(operand_for_interval(interval)), "wrong cached value"); |
aoqi@0 | 2037 | return reg; |
aoqi@0 | 2038 | } |
aoqi@0 | 2039 | |
aoqi@0 | 2040 | VMReg LinearScan::vm_reg_for_operand(LIR_Opr opr) { |
aoqi@0 | 2041 | assert(opr->is_oop(), "currently only implemented for oop operands"); |
aoqi@0 | 2042 | return frame_map()->regname(opr); |
aoqi@0 | 2043 | } |
aoqi@0 | 2044 | |
aoqi@0 | 2045 | |
aoqi@0 | 2046 | LIR_Opr LinearScan::operand_for_interval(Interval* interval) { |
aoqi@0 | 2047 | LIR_Opr opr = interval->cached_opr(); |
aoqi@0 | 2048 | if (opr->is_illegal()) { |
aoqi@0 | 2049 | opr = calc_operand_for_interval(interval); |
aoqi@0 | 2050 | interval->set_cached_opr(opr); |
aoqi@0 | 2051 | } |
aoqi@0 | 2052 | |
aoqi@0 | 2053 | assert(opr == calc_operand_for_interval(interval), "wrong cached value"); |
aoqi@0 | 2054 | return opr; |
aoqi@0 | 2055 | } |
aoqi@0 | 2056 | |
aoqi@0 | 2057 | LIR_Opr LinearScan::calc_operand_for_interval(const Interval* interval) { |
aoqi@0 | 2058 | int assigned_reg = interval->assigned_reg(); |
aoqi@0 | 2059 | BasicType type = interval->type(); |
aoqi@0 | 2060 | |
aoqi@0 | 2061 | if (assigned_reg >= nof_regs) { |
aoqi@0 | 2062 | // stack slot |
aoqi@0 | 2063 | assert(interval->assigned_regHi() == any_reg, "must not have hi register"); |
aoqi@0 | 2064 | return LIR_OprFact::stack(assigned_reg - nof_regs, type); |
aoqi@0 | 2065 | |
aoqi@0 | 2066 | } else { |
aoqi@0 | 2067 | // register |
aoqi@0 | 2068 | switch (type) { |
aoqi@0 | 2069 | case T_OBJECT: { |
aoqi@0 | 2070 | assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register"); |
aoqi@0 | 2071 | assert(interval->assigned_regHi() == any_reg, "must not have hi register"); |
aoqi@0 | 2072 | return LIR_OprFact::single_cpu_oop(assigned_reg); |
aoqi@0 | 2073 | } |
aoqi@0 | 2074 | |
aoqi@0 | 2075 | case T_ADDRESS: { |
aoqi@0 | 2076 | assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register"); |
aoqi@0 | 2077 | assert(interval->assigned_regHi() == any_reg, "must not have hi register"); |
aoqi@0 | 2078 | return LIR_OprFact::single_cpu_address(assigned_reg); |
aoqi@0 | 2079 | } |
aoqi@0 | 2080 | |
aoqi@0 | 2081 | case T_METADATA: { |
aoqi@0 | 2082 | assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register"); |
aoqi@0 | 2083 | assert(interval->assigned_regHi() == any_reg, "must not have hi register"); |
aoqi@0 | 2084 | return LIR_OprFact::single_cpu_metadata(assigned_reg); |
aoqi@0 | 2085 | } |
aoqi@0 | 2086 | |
aoqi@0 | 2087 | #ifdef __SOFTFP__ |
aoqi@0 | 2088 | case T_FLOAT: // fall through |
aoqi@0 | 2089 | #endif // __SOFTFP__ |
aoqi@0 | 2090 | case T_INT: { |
aoqi@0 | 2091 | assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register"); |
aoqi@0 | 2092 | assert(interval->assigned_regHi() == any_reg, "must not have hi register"); |
aoqi@0 | 2093 | return LIR_OprFact::single_cpu(assigned_reg); |
aoqi@0 | 2094 | } |
aoqi@0 | 2095 | |
aoqi@0 | 2096 | #ifdef __SOFTFP__ |
aoqi@0 | 2097 | case T_DOUBLE: // fall through |
aoqi@0 | 2098 | #endif // __SOFTFP__ |
aoqi@0 | 2099 | case T_LONG: { |
aoqi@0 | 2100 | int assigned_regHi = interval->assigned_regHi(); |
aoqi@0 | 2101 | assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register"); |
aoqi@0 | 2102 | assert(num_physical_regs(T_LONG) == 1 || |
aoqi@0 | 2103 | (assigned_regHi >= pd_first_cpu_reg && assigned_regHi <= pd_last_cpu_reg), "no cpu register"); |
aoqi@0 | 2104 | |
aoqi@0 | 2105 | assert(assigned_reg != assigned_regHi, "invalid allocation"); |
aoqi@0 | 2106 | assert(num_physical_regs(T_LONG) == 1 || assigned_reg < assigned_regHi, |
aoqi@0 | 2107 | "register numbers must be sorted (ensure that e.g. a move from eax,ebx to ebx,eax can not occur)"); |
aoqi@0 | 2108 | assert((assigned_regHi != any_reg) ^ (num_physical_regs(T_LONG) == 1), "must be match"); |
aoqi@0 | 2109 | if (requires_adjacent_regs(T_LONG)) { |
aoqi@0 | 2110 | assert(assigned_reg % 2 == 0 && assigned_reg + 1 == assigned_regHi, "must be sequential and even"); |
aoqi@0 | 2111 | } |
aoqi@0 | 2112 | |
aoqi@0 | 2113 | #ifdef _LP64 |
aoqi@0 | 2114 | return LIR_OprFact::double_cpu(assigned_reg, assigned_reg); |
aoqi@0 | 2115 | #else |
aoqi@0 | 2116 | #if defined(SPARC) || defined(PPC) |
aoqi@0 | 2117 | return LIR_OprFact::double_cpu(assigned_regHi, assigned_reg); |
aoqi@0 | 2118 | #else |
aoqi@0 | 2119 | return LIR_OprFact::double_cpu(assigned_reg, assigned_regHi); |
aoqi@0 | 2120 | #endif // SPARC |
aoqi@0 | 2121 | #endif // LP64 |
aoqi@0 | 2122 | } |
aoqi@0 | 2123 | |
aoqi@0 | 2124 | #ifndef __SOFTFP__ |
aoqi@0 | 2125 | case T_FLOAT: { |
aoqi@0 | 2126 | #ifdef X86 |
aoqi@0 | 2127 | if (UseSSE >= 1) { |
aoqi@0 | 2128 | assert(assigned_reg >= pd_first_xmm_reg && assigned_reg <= pd_last_xmm_reg, "no xmm register"); |
aoqi@0 | 2129 | assert(interval->assigned_regHi() == any_reg, "must not have hi register"); |
aoqi@0 | 2130 | return LIR_OprFact::single_xmm(assigned_reg - pd_first_xmm_reg); |
aoqi@0 | 2131 | } |
aoqi@0 | 2132 | #endif |
aoqi@0 | 2133 | |
aoqi@0 | 2134 | assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register"); |
aoqi@0 | 2135 | assert(interval->assigned_regHi() == any_reg, "must not have hi register"); |
aoqi@0 | 2136 | return LIR_OprFact::single_fpu(assigned_reg - pd_first_fpu_reg); |
aoqi@0 | 2137 | } |
aoqi@0 | 2138 | |
aoqi@0 | 2139 | case T_DOUBLE: { |
aoqi@0 | 2140 | #ifdef X86 |
aoqi@0 | 2141 | if (UseSSE >= 2) { |
aoqi@0 | 2142 | assert(assigned_reg >= pd_first_xmm_reg && assigned_reg <= pd_last_xmm_reg, "no xmm register"); |
aoqi@0 | 2143 | assert(interval->assigned_regHi() == any_reg, "must not have hi register (double xmm values are stored in one register)"); |
aoqi@0 | 2144 | return LIR_OprFact::double_xmm(assigned_reg - pd_first_xmm_reg); |
aoqi@0 | 2145 | } |
aoqi@0 | 2146 | #endif |
aoqi@0 | 2147 | |
aoqi@0 | 2148 | #ifdef SPARC |
aoqi@0 | 2149 | assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register"); |
aoqi@0 | 2150 | assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register"); |
aoqi@0 | 2151 | assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even"); |
aoqi@0 | 2152 | LIR_Opr result = LIR_OprFact::double_fpu(interval->assigned_regHi() - pd_first_fpu_reg, assigned_reg - pd_first_fpu_reg); |
aoqi@0 | 2153 | #elif defined(ARM) |
aoqi@0 | 2154 | assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register"); |
aoqi@0 | 2155 | assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register"); |
aoqi@0 | 2156 | assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even"); |
aoqi@0 | 2157 | LIR_Opr result = LIR_OprFact::double_fpu(assigned_reg - pd_first_fpu_reg, interval->assigned_regHi() - pd_first_fpu_reg); |
aoqi@0 | 2158 | #else |
aoqi@0 | 2159 | assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register"); |
aoqi@0 | 2160 | assert(interval->assigned_regHi() == any_reg, "must not have hi register (double fpu values are stored in one register on Intel)"); |
aoqi@0 | 2161 | LIR_Opr result = LIR_OprFact::double_fpu(assigned_reg - pd_first_fpu_reg); |
aoqi@0 | 2162 | #endif |
aoqi@0 | 2163 | return result; |
aoqi@0 | 2164 | } |
aoqi@0 | 2165 | #endif // __SOFTFP__ |
aoqi@0 | 2166 | |
aoqi@0 | 2167 | default: { |
aoqi@0 | 2168 | ShouldNotReachHere(); |
aoqi@0 | 2169 | return LIR_OprFact::illegalOpr; |
aoqi@0 | 2170 | } |
aoqi@0 | 2171 | } |
aoqi@0 | 2172 | } |
aoqi@0 | 2173 | } |
aoqi@0 | 2174 | |
aoqi@0 | 2175 | LIR_Opr LinearScan::canonical_spill_opr(Interval* interval) { |
aoqi@0 | 2176 | assert(interval->canonical_spill_slot() >= nof_regs, "canonical spill slot not set"); |
aoqi@0 | 2177 | return LIR_OprFact::stack(interval->canonical_spill_slot() - nof_regs, interval->type()); |
aoqi@0 | 2178 | } |
aoqi@0 | 2179 | |
aoqi@0 | 2180 | LIR_Opr LinearScan::color_lir_opr(LIR_Opr opr, int op_id, LIR_OpVisitState::OprMode mode) { |
aoqi@0 | 2181 | assert(opr->is_virtual(), "should not call this otherwise"); |
aoqi@0 | 2182 | |
aoqi@0 | 2183 | Interval* interval = interval_at(opr->vreg_number()); |
aoqi@0 | 2184 | assert(interval != NULL, "interval must exist"); |
aoqi@0 | 2185 | |
aoqi@0 | 2186 | if (op_id != -1) { |
aoqi@0 | 2187 | #ifdef ASSERT |
aoqi@0 | 2188 | BlockBegin* block = block_of_op_with_id(op_id); |
aoqi@0 | 2189 | if (block->number_of_sux() <= 1 && op_id == block->last_lir_instruction_id()) { |
aoqi@0 | 2190 | // check if spill moves could have been appended at the end of this block, but |
aoqi@0 | 2191 | // before the branch instruction. So the split child information for this branch would |
aoqi@0 | 2192 | // be incorrect. |
aoqi@0 | 2193 | LIR_OpBranch* branch = block->lir()->instructions_list()->last()->as_OpBranch(); |
aoqi@0 | 2194 | if (branch != NULL) { |
aoqi@0 | 2195 | if (block->live_out().at(opr->vreg_number())) { |
aoqi@0 | 2196 | assert(branch->cond() == lir_cond_always, "block does not end with an unconditional jump"); |
aoqi@0 | 2197 | assert(false, "can't get split child for the last branch of a block because the information would be incorrect (moves are inserted before the branch in resolve_data_flow)"); |
aoqi@0 | 2198 | } |
aoqi@0 | 2199 | } |
aoqi@0 | 2200 | } |
aoqi@0 | 2201 | #endif |
aoqi@0 | 2202 | |
aoqi@0 | 2203 | // operands are not changed when an interval is split during allocation, |
aoqi@0 | 2204 | // so search the right interval here |
aoqi@0 | 2205 | interval = split_child_at_op_id(interval, op_id, mode); |
aoqi@0 | 2206 | } |
aoqi@0 | 2207 | |
aoqi@0 | 2208 | LIR_Opr res = operand_for_interval(interval); |
aoqi@0 | 2209 | |
aoqi@0 | 2210 | #ifdef X86 |
aoqi@0 | 2211 | // new semantic for is_last_use: not only set on definite end of interval, |
aoqi@0 | 2212 | // but also before hole |
aoqi@0 | 2213 | // This may still miss some cases (e.g. for dead values), but it is not necessary that the |
aoqi@0 | 2214 | // last use information is completely correct |
aoqi@0 | 2215 | // information is only needed for fpu stack allocation |
aoqi@0 | 2216 | if (res->is_fpu_register()) { |
aoqi@0 | 2217 | if (opr->is_last_use() || op_id == interval->to() || (op_id != -1 && interval->has_hole_between(op_id, op_id + 1))) { |
aoqi@0 | 2218 | assert(op_id == -1 || !is_block_begin(op_id), "holes at begin of block may also result from control flow"); |
aoqi@0 | 2219 | res = res->make_last_use(); |
aoqi@0 | 2220 | } |
aoqi@0 | 2221 | } |
aoqi@0 | 2222 | #endif |
aoqi@0 | 2223 | |
aoqi@0 | 2224 | assert(!gen()->is_vreg_flag_set(opr->vreg_number(), LIRGenerator::callee_saved) || !FrameMap::is_caller_save_register(res), "bad allocation"); |
aoqi@0 | 2225 | |
aoqi@0 | 2226 | return res; |
aoqi@0 | 2227 | } |
aoqi@0 | 2228 | |
aoqi@0 | 2229 | |
aoqi@0 | 2230 | #ifdef ASSERT |
aoqi@0 | 2231 | // some methods used to check correctness of debug information |
aoqi@0 | 2232 | |
aoqi@0 | 2233 | void assert_no_register_values(GrowableArray<ScopeValue*>* values) { |
aoqi@0 | 2234 | if (values == NULL) { |
aoqi@0 | 2235 | return; |
aoqi@0 | 2236 | } |
aoqi@0 | 2237 | |
aoqi@0 | 2238 | for (int i = 0; i < values->length(); i++) { |
aoqi@0 | 2239 | ScopeValue* value = values->at(i); |
aoqi@0 | 2240 | |
aoqi@0 | 2241 | if (value->is_location()) { |
aoqi@0 | 2242 | Location location = ((LocationValue*)value)->location(); |
aoqi@0 | 2243 | assert(location.where() == Location::on_stack, "value is in register"); |
aoqi@0 | 2244 | } |
aoqi@0 | 2245 | } |
aoqi@0 | 2246 | } |
aoqi@0 | 2247 | |
aoqi@0 | 2248 | void assert_no_register_values(GrowableArray<MonitorValue*>* values) { |
aoqi@0 | 2249 | if (values == NULL) { |
aoqi@0 | 2250 | return; |
aoqi@0 | 2251 | } |
aoqi@0 | 2252 | |
aoqi@0 | 2253 | for (int i = 0; i < values->length(); i++) { |
aoqi@0 | 2254 | MonitorValue* value = values->at(i); |
aoqi@0 | 2255 | |
aoqi@0 | 2256 | if (value->owner()->is_location()) { |
aoqi@0 | 2257 | Location location = ((LocationValue*)value->owner())->location(); |
aoqi@0 | 2258 | assert(location.where() == Location::on_stack, "owner is in register"); |
aoqi@0 | 2259 | } |
aoqi@0 | 2260 | assert(value->basic_lock().where() == Location::on_stack, "basic_lock is in register"); |
aoqi@0 | 2261 | } |
aoqi@0 | 2262 | } |
aoqi@0 | 2263 | |
aoqi@0 | 2264 | void assert_equal(Location l1, Location l2) { |
aoqi@0 | 2265 | assert(l1.where() == l2.where() && l1.type() == l2.type() && l1.offset() == l2.offset(), ""); |
aoqi@0 | 2266 | } |
aoqi@0 | 2267 | |
aoqi@0 | 2268 | void assert_equal(ScopeValue* v1, ScopeValue* v2) { |
aoqi@0 | 2269 | if (v1->is_location()) { |
aoqi@0 | 2270 | assert(v2->is_location(), ""); |
aoqi@0 | 2271 | assert_equal(((LocationValue*)v1)->location(), ((LocationValue*)v2)->location()); |
aoqi@0 | 2272 | } else if (v1->is_constant_int()) { |
aoqi@0 | 2273 | assert(v2->is_constant_int(), ""); |
aoqi@0 | 2274 | assert(((ConstantIntValue*)v1)->value() == ((ConstantIntValue*)v2)->value(), ""); |
aoqi@0 | 2275 | } else if (v1->is_constant_double()) { |
aoqi@0 | 2276 | assert(v2->is_constant_double(), ""); |
aoqi@0 | 2277 | assert(((ConstantDoubleValue*)v1)->value() == ((ConstantDoubleValue*)v2)->value(), ""); |
aoqi@0 | 2278 | } else if (v1->is_constant_long()) { |
aoqi@0 | 2279 | assert(v2->is_constant_long(), ""); |
aoqi@0 | 2280 | assert(((ConstantLongValue*)v1)->value() == ((ConstantLongValue*)v2)->value(), ""); |
aoqi@0 | 2281 | } else if (v1->is_constant_oop()) { |
aoqi@0 | 2282 | assert(v2->is_constant_oop(), ""); |
aoqi@0 | 2283 | assert(((ConstantOopWriteValue*)v1)->value() == ((ConstantOopWriteValue*)v2)->value(), ""); |
aoqi@0 | 2284 | } else { |
aoqi@0 | 2285 | ShouldNotReachHere(); |
aoqi@0 | 2286 | } |
aoqi@0 | 2287 | } |
aoqi@0 | 2288 | |
aoqi@0 | 2289 | void assert_equal(MonitorValue* m1, MonitorValue* m2) { |
aoqi@0 | 2290 | assert_equal(m1->owner(), m2->owner()); |
aoqi@0 | 2291 | assert_equal(m1->basic_lock(), m2->basic_lock()); |
aoqi@0 | 2292 | } |
aoqi@0 | 2293 | |
aoqi@0 | 2294 | void assert_equal(IRScopeDebugInfo* d1, IRScopeDebugInfo* d2) { |
aoqi@0 | 2295 | assert(d1->scope() == d2->scope(), "not equal"); |
aoqi@0 | 2296 | assert(d1->bci() == d2->bci(), "not equal"); |
aoqi@0 | 2297 | |
aoqi@0 | 2298 | if (d1->locals() != NULL) { |
aoqi@0 | 2299 | assert(d1->locals() != NULL && d2->locals() != NULL, "not equal"); |
aoqi@0 | 2300 | assert(d1->locals()->length() == d2->locals()->length(), "not equal"); |
aoqi@0 | 2301 | for (int i = 0; i < d1->locals()->length(); i++) { |
aoqi@0 | 2302 | assert_equal(d1->locals()->at(i), d2->locals()->at(i)); |
aoqi@0 | 2303 | } |
aoqi@0 | 2304 | } else { |
aoqi@0 | 2305 | assert(d1->locals() == NULL && d2->locals() == NULL, "not equal"); |
aoqi@0 | 2306 | } |
aoqi@0 | 2307 | |
aoqi@0 | 2308 | if (d1->expressions() != NULL) { |
aoqi@0 | 2309 | assert(d1->expressions() != NULL && d2->expressions() != NULL, "not equal"); |
aoqi@0 | 2310 | assert(d1->expressions()->length() == d2->expressions()->length(), "not equal"); |
aoqi@0 | 2311 | for (int i = 0; i < d1->expressions()->length(); i++) { |
aoqi@0 | 2312 | assert_equal(d1->expressions()->at(i), d2->expressions()->at(i)); |
aoqi@0 | 2313 | } |
aoqi@0 | 2314 | } else { |
aoqi@0 | 2315 | assert(d1->expressions() == NULL && d2->expressions() == NULL, "not equal"); |
aoqi@0 | 2316 | } |
aoqi@0 | 2317 | |
aoqi@0 | 2318 | if (d1->monitors() != NULL) { |
aoqi@0 | 2319 | assert(d1->monitors() != NULL && d2->monitors() != NULL, "not equal"); |
aoqi@0 | 2320 | assert(d1->monitors()->length() == d2->monitors()->length(), "not equal"); |
aoqi@0 | 2321 | for (int i = 0; i < d1->monitors()->length(); i++) { |
aoqi@0 | 2322 | assert_equal(d1->monitors()->at(i), d2->monitors()->at(i)); |
aoqi@0 | 2323 | } |
aoqi@0 | 2324 | } else { |
aoqi@0 | 2325 | assert(d1->monitors() == NULL && d2->monitors() == NULL, "not equal"); |
aoqi@0 | 2326 | } |
aoqi@0 | 2327 | |
aoqi@0 | 2328 | if (d1->caller() != NULL) { |
aoqi@0 | 2329 | assert(d1->caller() != NULL && d2->caller() != NULL, "not equal"); |
aoqi@0 | 2330 | assert_equal(d1->caller(), d2->caller()); |
aoqi@0 | 2331 | } else { |
aoqi@0 | 2332 | assert(d1->caller() == NULL && d2->caller() == NULL, "not equal"); |
aoqi@0 | 2333 | } |
aoqi@0 | 2334 | } |
aoqi@0 | 2335 | |
aoqi@0 | 2336 | void check_stack_depth(CodeEmitInfo* info, int stack_end) { |
aoqi@0 | 2337 | if (info->stack()->bci() != SynchronizationEntryBCI && !info->scope()->method()->is_native()) { |
aoqi@0 | 2338 | Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci()); |
aoqi@0 | 2339 | switch (code) { |
aoqi@0 | 2340 | case Bytecodes::_ifnull : // fall through |
aoqi@0 | 2341 | case Bytecodes::_ifnonnull : // fall through |
aoqi@0 | 2342 | case Bytecodes::_ifeq : // fall through |
aoqi@0 | 2343 | case Bytecodes::_ifne : // fall through |
aoqi@0 | 2344 | case Bytecodes::_iflt : // fall through |
aoqi@0 | 2345 | case Bytecodes::_ifge : // fall through |
aoqi@0 | 2346 | case Bytecodes::_ifgt : // fall through |
aoqi@0 | 2347 | case Bytecodes::_ifle : // fall through |
aoqi@0 | 2348 | case Bytecodes::_if_icmpeq : // fall through |
aoqi@0 | 2349 | case Bytecodes::_if_icmpne : // fall through |
aoqi@0 | 2350 | case Bytecodes::_if_icmplt : // fall through |
aoqi@0 | 2351 | case Bytecodes::_if_icmpge : // fall through |
aoqi@0 | 2352 | case Bytecodes::_if_icmpgt : // fall through |
aoqi@0 | 2353 | case Bytecodes::_if_icmple : // fall through |
aoqi@0 | 2354 | case Bytecodes::_if_acmpeq : // fall through |
aoqi@0 | 2355 | case Bytecodes::_if_acmpne : |
aoqi@0 | 2356 | assert(stack_end >= -Bytecodes::depth(code), "must have non-empty expression stack at if bytecode"); |
aoqi@0 | 2357 | break; |
aoqi@0 | 2358 | } |
aoqi@0 | 2359 | } |
aoqi@0 | 2360 | } |
aoqi@0 | 2361 | |
aoqi@0 | 2362 | #endif // ASSERT |
aoqi@0 | 2363 | |
aoqi@0 | 2364 | |
aoqi@0 | 2365 | IntervalWalker* LinearScan::init_compute_oop_maps() { |
aoqi@0 | 2366 | // setup lists of potential oops for walking |
aoqi@0 | 2367 | Interval* oop_intervals; |
aoqi@0 | 2368 | Interval* non_oop_intervals; |
aoqi@0 | 2369 | |
aoqi@0 | 2370 | create_unhandled_lists(&oop_intervals, &non_oop_intervals, is_oop_interval, NULL); |
aoqi@0 | 2371 | |
aoqi@0 | 2372 | // intervals that have no oops inside need not to be processed |
aoqi@0 | 2373 | // to ensure a walking until the last instruction id, add a dummy interval |
aoqi@0 | 2374 | // with a high operation id |
aoqi@0 | 2375 | non_oop_intervals = new Interval(any_reg); |
aoqi@0 | 2376 | non_oop_intervals->add_range(max_jint - 2, max_jint - 1); |
aoqi@0 | 2377 | |
aoqi@0 | 2378 | return new IntervalWalker(this, oop_intervals, non_oop_intervals); |
aoqi@0 | 2379 | } |
aoqi@0 | 2380 | |
aoqi@0 | 2381 | |
aoqi@0 | 2382 | OopMap* LinearScan::compute_oop_map(IntervalWalker* iw, LIR_Op* op, CodeEmitInfo* info, bool is_call_site) { |
aoqi@0 | 2383 | TRACE_LINEAR_SCAN(3, tty->print_cr("creating oop map at op_id %d", op->id())); |
aoqi@0 | 2384 | |
aoqi@0 | 2385 | // walk before the current operation -> intervals that start at |
aoqi@0 | 2386 | // the operation (= output operands of the operation) are not |
aoqi@0 | 2387 | // included in the oop map |
aoqi@0 | 2388 | iw->walk_before(op->id()); |
aoqi@0 | 2389 | |
aoqi@0 | 2390 | int frame_size = frame_map()->framesize(); |
aoqi@0 | 2391 | int arg_count = frame_map()->oop_map_arg_count(); |
aoqi@0 | 2392 | OopMap* map = new OopMap(frame_size, arg_count); |
aoqi@0 | 2393 | |
aoqi@0 | 2394 | // Iterate through active intervals |
aoqi@0 | 2395 | for (Interval* interval = iw->active_first(fixedKind); interval != Interval::end(); interval = interval->next()) { |
aoqi@0 | 2396 | int assigned_reg = interval->assigned_reg(); |
aoqi@0 | 2397 | |
aoqi@0 | 2398 | assert(interval->current_from() <= op->id() && op->id() <= interval->current_to(), "interval should not be active otherwise"); |
aoqi@0 | 2399 | assert(interval->assigned_regHi() == any_reg, "oop must be single word"); |
aoqi@0 | 2400 | assert(interval->reg_num() >= LIR_OprDesc::vreg_base, "fixed interval found"); |
aoqi@0 | 2401 | |
aoqi@0 | 2402 | // Check if this range covers the instruction. Intervals that |
aoqi@0 | 2403 | // start or end at the current operation are not included in the |
aoqi@0 | 2404 | // oop map, except in the case of patching moves. For patching |
aoqi@0 | 2405 | // moves, any intervals which end at this instruction are included |
aoqi@0 | 2406 | // in the oop map since we may safepoint while doing the patch |
aoqi@0 | 2407 | // before we've consumed the inputs. |
aoqi@0 | 2408 | if (op->is_patching() || op->id() < interval->current_to()) { |
aoqi@0 | 2409 | |
aoqi@0 | 2410 | // caller-save registers must not be included into oop-maps at calls |
aoqi@0 | 2411 | assert(!is_call_site || assigned_reg >= nof_regs || !is_caller_save(assigned_reg), "interval is in a caller-save register at a call -> register will be overwritten"); |
aoqi@0 | 2412 | |
aoqi@0 | 2413 | VMReg name = vm_reg_for_interval(interval); |
aoqi@0 | 2414 | set_oop(map, name); |
aoqi@0 | 2415 | |
aoqi@0 | 2416 | // Spill optimization: when the stack value is guaranteed to be always correct, |
aoqi@0 | 2417 | // then it must be added to the oop map even if the interval is currently in a register |
aoqi@0 | 2418 | if (interval->always_in_memory() && |
aoqi@0 | 2419 | op->id() > interval->spill_definition_pos() && |
aoqi@0 | 2420 | interval->assigned_reg() != interval->canonical_spill_slot()) { |
aoqi@0 | 2421 | assert(interval->spill_definition_pos() > 0, "position not set correctly"); |
aoqi@0 | 2422 | assert(interval->canonical_spill_slot() >= LinearScan::nof_regs, "no spill slot assigned"); |
aoqi@0 | 2423 | assert(interval->assigned_reg() < LinearScan::nof_regs, "interval is on stack, so stack slot is registered twice"); |
aoqi@0 | 2424 | |
aoqi@0 | 2425 | set_oop(map, frame_map()->slot_regname(interval->canonical_spill_slot() - LinearScan::nof_regs)); |
aoqi@0 | 2426 | } |
aoqi@0 | 2427 | } |
aoqi@0 | 2428 | } |
aoqi@0 | 2429 | |
aoqi@0 | 2430 | // add oops from lock stack |
aoqi@0 | 2431 | assert(info->stack() != NULL, "CodeEmitInfo must always have a stack"); |
aoqi@0 | 2432 | int locks_count = info->stack()->total_locks_size(); |
aoqi@0 | 2433 | for (int i = 0; i < locks_count; i++) { |
aoqi@0 | 2434 | set_oop(map, frame_map()->monitor_object_regname(i)); |
aoqi@0 | 2435 | } |
aoqi@0 | 2436 | |
aoqi@0 | 2437 | return map; |
aoqi@0 | 2438 | } |
aoqi@0 | 2439 | |
aoqi@0 | 2440 | |
aoqi@0 | 2441 | void LinearScan::compute_oop_map(IntervalWalker* iw, const LIR_OpVisitState &visitor, LIR_Op* op) { |
aoqi@0 | 2442 | assert(visitor.info_count() > 0, "no oop map needed"); |
aoqi@0 | 2443 | |
aoqi@0 | 2444 | // compute oop_map only for first CodeEmitInfo |
aoqi@0 | 2445 | // because it is (in most cases) equal for all other infos of the same operation |
aoqi@0 | 2446 | CodeEmitInfo* first_info = visitor.info_at(0); |
aoqi@0 | 2447 | OopMap* first_oop_map = compute_oop_map(iw, op, first_info, visitor.has_call()); |
aoqi@0 | 2448 | |
aoqi@0 | 2449 | for (int i = 0; i < visitor.info_count(); i++) { |
aoqi@0 | 2450 | CodeEmitInfo* info = visitor.info_at(i); |
aoqi@0 | 2451 | OopMap* oop_map = first_oop_map; |
aoqi@0 | 2452 | |
aoqi@0 | 2453 | // compute worst case interpreter size in case of a deoptimization |
aoqi@0 | 2454 | _compilation->update_interpreter_frame_size(info->interpreter_frame_size()); |
aoqi@0 | 2455 | |
aoqi@0 | 2456 | if (info->stack()->locks_size() != first_info->stack()->locks_size()) { |
aoqi@0 | 2457 | // this info has a different number of locks then the precomputed oop map |
aoqi@0 | 2458 | // (possible for lock and unlock instructions) -> compute oop map with |
aoqi@0 | 2459 | // correct lock information |
aoqi@0 | 2460 | oop_map = compute_oop_map(iw, op, info, visitor.has_call()); |
aoqi@0 | 2461 | } |
aoqi@0 | 2462 | |
aoqi@0 | 2463 | if (info->_oop_map == NULL) { |
aoqi@0 | 2464 | info->_oop_map = oop_map; |
aoqi@0 | 2465 | } else { |
aoqi@0 | 2466 | // a CodeEmitInfo can not be shared between different LIR-instructions |
aoqi@0 | 2467 | // because interval splitting can occur anywhere between two instructions |
aoqi@0 | 2468 | // and so the oop maps must be different |
aoqi@0 | 2469 | // -> check if the already set oop_map is exactly the one calculated for this operation |
aoqi@0 | 2470 | assert(info->_oop_map == oop_map, "same CodeEmitInfo used for multiple LIR instructions"); |
aoqi@0 | 2471 | } |
aoqi@0 | 2472 | } |
aoqi@0 | 2473 | } |
aoqi@0 | 2474 | |
aoqi@0 | 2475 | |
aoqi@0 | 2476 | // frequently used constants |
aoqi@0 | 2477 | // Allocate them with new so they are never destroyed (otherwise, a |
aoqi@0 | 2478 | // forced exit could destroy these objects while they are still in |
aoqi@0 | 2479 | // use). |
aoqi@0 | 2480 | ConstantOopWriteValue* LinearScan::_oop_null_scope_value = new (ResourceObj::C_HEAP, mtCompiler) ConstantOopWriteValue(NULL); |
aoqi@0 | 2481 | ConstantIntValue* LinearScan::_int_m1_scope_value = new (ResourceObj::C_HEAP, mtCompiler) ConstantIntValue(-1); |
aoqi@0 | 2482 | ConstantIntValue* LinearScan::_int_0_scope_value = new (ResourceObj::C_HEAP, mtCompiler) ConstantIntValue(0); |
aoqi@0 | 2483 | ConstantIntValue* LinearScan::_int_1_scope_value = new (ResourceObj::C_HEAP, mtCompiler) ConstantIntValue(1); |
aoqi@0 | 2484 | ConstantIntValue* LinearScan::_int_2_scope_value = new (ResourceObj::C_HEAP, mtCompiler) ConstantIntValue(2); |
aoqi@0 | 2485 | LocationValue* _illegal_value = new (ResourceObj::C_HEAP, mtCompiler) LocationValue(Location()); |
aoqi@0 | 2486 | |
aoqi@0 | 2487 | void LinearScan::init_compute_debug_info() { |
aoqi@0 | 2488 | // cache for frequently used scope values |
aoqi@0 | 2489 | // (cpu registers and stack slots) |
aoqi@0 | 2490 | _scope_value_cache = ScopeValueArray((LinearScan::nof_cpu_regs + frame_map()->argcount() + max_spills()) * 2, NULL); |
aoqi@0 | 2491 | } |
aoqi@0 | 2492 | |
aoqi@0 | 2493 | MonitorValue* LinearScan::location_for_monitor_index(int monitor_index) { |
aoqi@0 | 2494 | Location loc; |
aoqi@0 | 2495 | if (!frame_map()->location_for_monitor_object(monitor_index, &loc)) { |
aoqi@0 | 2496 | bailout("too large frame"); |
aoqi@0 | 2497 | } |
aoqi@0 | 2498 | ScopeValue* object_scope_value = new LocationValue(loc); |
aoqi@0 | 2499 | |
aoqi@0 | 2500 | if (!frame_map()->location_for_monitor_lock(monitor_index, &loc)) { |
aoqi@0 | 2501 | bailout("too large frame"); |
aoqi@0 | 2502 | } |
aoqi@0 | 2503 | return new MonitorValue(object_scope_value, loc); |
aoqi@0 | 2504 | } |
aoqi@0 | 2505 | |
aoqi@0 | 2506 | LocationValue* LinearScan::location_for_name(int name, Location::Type loc_type) { |
aoqi@0 | 2507 | Location loc; |
aoqi@0 | 2508 | if (!frame_map()->locations_for_slot(name, loc_type, &loc)) { |
aoqi@0 | 2509 | bailout("too large frame"); |
aoqi@0 | 2510 | } |
aoqi@0 | 2511 | return new LocationValue(loc); |
aoqi@0 | 2512 | } |
aoqi@0 | 2513 | |
aoqi@0 | 2514 | |
aoqi@0 | 2515 | int LinearScan::append_scope_value_for_constant(LIR_Opr opr, GrowableArray<ScopeValue*>* scope_values) { |
aoqi@0 | 2516 | assert(opr->is_constant(), "should not be called otherwise"); |
aoqi@0 | 2517 | |
aoqi@0 | 2518 | LIR_Const* c = opr->as_constant_ptr(); |
aoqi@0 | 2519 | BasicType t = c->type(); |
aoqi@0 | 2520 | switch (t) { |
aoqi@0 | 2521 | case T_OBJECT: { |
aoqi@0 | 2522 | jobject value = c->as_jobject(); |
aoqi@0 | 2523 | if (value == NULL) { |
aoqi@0 | 2524 | scope_values->append(_oop_null_scope_value); |
aoqi@0 | 2525 | } else { |
aoqi@0 | 2526 | scope_values->append(new ConstantOopWriteValue(c->as_jobject())); |
aoqi@0 | 2527 | } |
aoqi@0 | 2528 | return 1; |
aoqi@0 | 2529 | } |
aoqi@0 | 2530 | |
aoqi@0 | 2531 | case T_INT: // fall through |
aoqi@0 | 2532 | case T_FLOAT: { |
aoqi@0 | 2533 | int value = c->as_jint_bits(); |
aoqi@0 | 2534 | switch (value) { |
aoqi@0 | 2535 | case -1: scope_values->append(_int_m1_scope_value); break; |
aoqi@0 | 2536 | case 0: scope_values->append(_int_0_scope_value); break; |
aoqi@0 | 2537 | case 1: scope_values->append(_int_1_scope_value); break; |
aoqi@0 | 2538 | case 2: scope_values->append(_int_2_scope_value); break; |
aoqi@0 | 2539 | default: scope_values->append(new ConstantIntValue(c->as_jint_bits())); break; |
aoqi@0 | 2540 | } |
aoqi@0 | 2541 | return 1; |
aoqi@0 | 2542 | } |
aoqi@0 | 2543 | |
aoqi@0 | 2544 | case T_LONG: // fall through |
aoqi@0 | 2545 | case T_DOUBLE: { |
aoqi@0 | 2546 | #ifdef _LP64 |
aoqi@0 | 2547 | scope_values->append(_int_0_scope_value); |
aoqi@0 | 2548 | scope_values->append(new ConstantLongValue(c->as_jlong_bits())); |
aoqi@0 | 2549 | #else |
aoqi@0 | 2550 | if (hi_word_offset_in_bytes > lo_word_offset_in_bytes) { |
aoqi@0 | 2551 | scope_values->append(new ConstantIntValue(c->as_jint_hi_bits())); |
aoqi@0 | 2552 | scope_values->append(new ConstantIntValue(c->as_jint_lo_bits())); |
aoqi@0 | 2553 | } else { |
aoqi@0 | 2554 | scope_values->append(new ConstantIntValue(c->as_jint_lo_bits())); |
aoqi@0 | 2555 | scope_values->append(new ConstantIntValue(c->as_jint_hi_bits())); |
aoqi@0 | 2556 | } |
aoqi@0 | 2557 | #endif |
aoqi@0 | 2558 | return 2; |
aoqi@0 | 2559 | } |
aoqi@0 | 2560 | |
aoqi@0 | 2561 | case T_ADDRESS: { |
aoqi@0 | 2562 | #ifdef _LP64 |
aoqi@0 | 2563 | scope_values->append(new ConstantLongValue(c->as_jint())); |
aoqi@0 | 2564 | #else |
aoqi@0 | 2565 | scope_values->append(new ConstantIntValue(c->as_jint())); |
aoqi@0 | 2566 | #endif |
aoqi@0 | 2567 | return 1; |
aoqi@0 | 2568 | } |
aoqi@0 | 2569 | |
aoqi@0 | 2570 | default: |
aoqi@0 | 2571 | ShouldNotReachHere(); |
aoqi@0 | 2572 | return -1; |
aoqi@0 | 2573 | } |
aoqi@0 | 2574 | } |
aoqi@0 | 2575 | |
aoqi@0 | 2576 | int LinearScan::append_scope_value_for_operand(LIR_Opr opr, GrowableArray<ScopeValue*>* scope_values) { |
aoqi@0 | 2577 | if (opr->is_single_stack()) { |
aoqi@0 | 2578 | int stack_idx = opr->single_stack_ix(); |
aoqi@0 | 2579 | bool is_oop = opr->is_oop_register(); |
aoqi@0 | 2580 | int cache_idx = (stack_idx + LinearScan::nof_cpu_regs) * 2 + (is_oop ? 1 : 0); |
aoqi@0 | 2581 | |
aoqi@0 | 2582 | ScopeValue* sv = _scope_value_cache.at(cache_idx); |
aoqi@0 | 2583 | if (sv == NULL) { |
aoqi@0 | 2584 | Location::Type loc_type = is_oop ? Location::oop : Location::normal; |
aoqi@0 | 2585 | sv = location_for_name(stack_idx, loc_type); |
aoqi@0 | 2586 | _scope_value_cache.at_put(cache_idx, sv); |
aoqi@0 | 2587 | } |
aoqi@0 | 2588 | |
aoqi@0 | 2589 | // check if cached value is correct |
aoqi@0 | 2590 | DEBUG_ONLY(assert_equal(sv, location_for_name(stack_idx, is_oop ? Location::oop : Location::normal))); |
aoqi@0 | 2591 | |
aoqi@0 | 2592 | scope_values->append(sv); |
aoqi@0 | 2593 | return 1; |
aoqi@0 | 2594 | |
aoqi@0 | 2595 | } else if (opr->is_single_cpu()) { |
aoqi@0 | 2596 | bool is_oop = opr->is_oop_register(); |
aoqi@0 | 2597 | int cache_idx = opr->cpu_regnr() * 2 + (is_oop ? 1 : 0); |
aoqi@0 | 2598 | Location::Type int_loc_type = NOT_LP64(Location::normal) LP64_ONLY(Location::int_in_long); |
aoqi@0 | 2599 | |
aoqi@0 | 2600 | ScopeValue* sv = _scope_value_cache.at(cache_idx); |
aoqi@0 | 2601 | if (sv == NULL) { |
aoqi@0 | 2602 | Location::Type loc_type = is_oop ? Location::oop : int_loc_type; |
aoqi@0 | 2603 | VMReg rname = frame_map()->regname(opr); |
aoqi@0 | 2604 | sv = new LocationValue(Location::new_reg_loc(loc_type, rname)); |
aoqi@0 | 2605 | _scope_value_cache.at_put(cache_idx, sv); |
aoqi@0 | 2606 | } |
aoqi@0 | 2607 | |
aoqi@0 | 2608 | // check if cached value is correct |
aoqi@0 | 2609 | DEBUG_ONLY(assert_equal(sv, new LocationValue(Location::new_reg_loc(is_oop ? Location::oop : int_loc_type, frame_map()->regname(opr))))); |
aoqi@0 | 2610 | |
aoqi@0 | 2611 | scope_values->append(sv); |
aoqi@0 | 2612 | return 1; |
aoqi@0 | 2613 | |
aoqi@0 | 2614 | #ifdef X86 |
aoqi@0 | 2615 | } else if (opr->is_single_xmm()) { |
aoqi@0 | 2616 | VMReg rname = opr->as_xmm_float_reg()->as_VMReg(); |
aoqi@0 | 2617 | LocationValue* sv = new LocationValue(Location::new_reg_loc(Location::normal, rname)); |
aoqi@0 | 2618 | |
aoqi@0 | 2619 | scope_values->append(sv); |
aoqi@0 | 2620 | return 1; |
aoqi@0 | 2621 | #endif |
aoqi@0 | 2622 | |
aoqi@0 | 2623 | } else if (opr->is_single_fpu()) { |
aoqi@0 | 2624 | #ifdef X86 |
aoqi@0 | 2625 | // the exact location of fpu stack values is only known |
aoqi@0 | 2626 | // during fpu stack allocation, so the stack allocator object |
aoqi@0 | 2627 | // must be present |
aoqi@0 | 2628 | assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)"); |
aoqi@0 | 2629 | assert(_fpu_stack_allocator != NULL, "must be present"); |
aoqi@0 | 2630 | opr = _fpu_stack_allocator->to_fpu_stack(opr); |
aoqi@0 | 2631 | #endif |
aoqi@0 | 2632 | |
aoqi@0 | 2633 | Location::Type loc_type = float_saved_as_double ? Location::float_in_dbl : Location::normal; |
aoqi@0 | 2634 | VMReg rname = frame_map()->fpu_regname(opr->fpu_regnr()); |
aoqi@0 | 2635 | #ifndef __SOFTFP__ |
aoqi@0 | 2636 | #ifndef VM_LITTLE_ENDIAN |
aoqi@0 | 2637 | if (! float_saved_as_double) { |
aoqi@0 | 2638 | // On big endian system, we may have an issue if float registers use only |
aoqi@0 | 2639 | // the low half of the (same) double registers. |
aoqi@0 | 2640 | // Both the float and the double could have the same regnr but would correspond |
aoqi@0 | 2641 | // to two different addresses once saved. |
aoqi@0 | 2642 | |
aoqi@0 | 2643 | // get next safely (no assertion checks) |
aoqi@0 | 2644 | VMReg next = VMRegImpl::as_VMReg(1+rname->value()); |
aoqi@0 | 2645 | if (next->is_reg() && |
aoqi@0 | 2646 | (next->as_FloatRegister() == rname->as_FloatRegister())) { |
aoqi@0 | 2647 | // the back-end does use the same numbering for the double and the float |
aoqi@0 | 2648 | rname = next; // VMReg for the low bits, e.g. the real VMReg for the float |
aoqi@0 | 2649 | } |
aoqi@0 | 2650 | } |
aoqi@0 | 2651 | #endif |
aoqi@0 | 2652 | #endif |
aoqi@0 | 2653 | LocationValue* sv = new LocationValue(Location::new_reg_loc(loc_type, rname)); |
aoqi@0 | 2654 | |
aoqi@0 | 2655 | scope_values->append(sv); |
aoqi@0 | 2656 | return 1; |
aoqi@0 | 2657 | |
aoqi@0 | 2658 | } else { |
aoqi@0 | 2659 | // double-size operands |
aoqi@0 | 2660 | |
aoqi@0 | 2661 | ScopeValue* first; |
aoqi@0 | 2662 | ScopeValue* second; |
aoqi@0 | 2663 | |
aoqi@0 | 2664 | if (opr->is_double_stack()) { |
aoqi@0 | 2665 | #ifdef _LP64 |
aoqi@0 | 2666 | Location loc1; |
aoqi@0 | 2667 | Location::Type loc_type = opr->type() == T_LONG ? Location::lng : Location::dbl; |
aoqi@0 | 2668 | if (!frame_map()->locations_for_slot(opr->double_stack_ix(), loc_type, &loc1, NULL)) { |
aoqi@0 | 2669 | bailout("too large frame"); |
aoqi@0 | 2670 | } |
aoqi@0 | 2671 | // Does this reverse on x86 vs. sparc? |
aoqi@0 | 2672 | first = new LocationValue(loc1); |
aoqi@0 | 2673 | second = _int_0_scope_value; |
aoqi@0 | 2674 | #else |
aoqi@0 | 2675 | Location loc1, loc2; |
aoqi@0 | 2676 | if (!frame_map()->locations_for_slot(opr->double_stack_ix(), Location::normal, &loc1, &loc2)) { |
aoqi@0 | 2677 | bailout("too large frame"); |
aoqi@0 | 2678 | } |
aoqi@0 | 2679 | first = new LocationValue(loc1); |
aoqi@0 | 2680 | second = new LocationValue(loc2); |
aoqi@0 | 2681 | #endif // _LP64 |
aoqi@0 | 2682 | |
aoqi@0 | 2683 | } else if (opr->is_double_cpu()) { |
aoqi@0 | 2684 | #ifdef _LP64 |
aoqi@0 | 2685 | VMReg rname_first = opr->as_register_lo()->as_VMReg(); |
aoqi@0 | 2686 | first = new LocationValue(Location::new_reg_loc(Location::lng, rname_first)); |
aoqi@0 | 2687 | second = _int_0_scope_value; |
aoqi@0 | 2688 | #else |
aoqi@0 | 2689 | VMReg rname_first = opr->as_register_lo()->as_VMReg(); |
aoqi@0 | 2690 | VMReg rname_second = opr->as_register_hi()->as_VMReg(); |
aoqi@0 | 2691 | |
aoqi@0 | 2692 | if (hi_word_offset_in_bytes < lo_word_offset_in_bytes) { |
aoqi@0 | 2693 | // lo/hi and swapped relative to first and second, so swap them |
aoqi@0 | 2694 | VMReg tmp = rname_first; |
aoqi@0 | 2695 | rname_first = rname_second; |
aoqi@0 | 2696 | rname_second = tmp; |
aoqi@0 | 2697 | } |
aoqi@0 | 2698 | |
aoqi@0 | 2699 | first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first)); |
aoqi@0 | 2700 | second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second)); |
aoqi@0 | 2701 | #endif //_LP64 |
aoqi@0 | 2702 | |
aoqi@0 | 2703 | |
aoqi@0 | 2704 | #ifdef X86 |
aoqi@0 | 2705 | } else if (opr->is_double_xmm()) { |
aoqi@0 | 2706 | assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation"); |
aoqi@0 | 2707 | VMReg rname_first = opr->as_xmm_double_reg()->as_VMReg(); |
aoqi@0 | 2708 | # ifdef _LP64 |
aoqi@0 | 2709 | first = new LocationValue(Location::new_reg_loc(Location::dbl, rname_first)); |
aoqi@0 | 2710 | second = _int_0_scope_value; |
aoqi@0 | 2711 | # else |
aoqi@0 | 2712 | first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first)); |
aoqi@0 | 2713 | // %%% This is probably a waste but we'll keep things as they were for now |
aoqi@0 | 2714 | if (true) { |
aoqi@0 | 2715 | VMReg rname_second = rname_first->next(); |
aoqi@0 | 2716 | second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second)); |
aoqi@0 | 2717 | } |
aoqi@0 | 2718 | # endif |
aoqi@0 | 2719 | #endif |
aoqi@0 | 2720 | |
aoqi@0 | 2721 | } else if (opr->is_double_fpu()) { |
aoqi@0 | 2722 | // On SPARC, fpu_regnrLo/fpu_regnrHi represents the two halves of |
aoqi@0 | 2723 | // the double as float registers in the native ordering. On X86, |
aoqi@0 | 2724 | // fpu_regnrLo is a FPU stack slot whose VMReg represents |
aoqi@0 | 2725 | // the low-order word of the double and fpu_regnrLo + 1 is the |
aoqi@0 | 2726 | // name for the other half. *first and *second must represent the |
aoqi@0 | 2727 | // least and most significant words, respectively. |
aoqi@0 | 2728 | |
aoqi@0 | 2729 | #ifdef X86 |
aoqi@0 | 2730 | // the exact location of fpu stack values is only known |
aoqi@0 | 2731 | // during fpu stack allocation, so the stack allocator object |
aoqi@0 | 2732 | // must be present |
aoqi@0 | 2733 | assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)"); |
aoqi@0 | 2734 | assert(_fpu_stack_allocator != NULL, "must be present"); |
aoqi@0 | 2735 | opr = _fpu_stack_allocator->to_fpu_stack(opr); |
aoqi@0 | 2736 | |
aoqi@0 | 2737 | assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrLo is used)"); |
aoqi@0 | 2738 | #endif |
aoqi@0 | 2739 | #ifdef SPARC |
aoqi@0 | 2740 | assert(opr->fpu_regnrLo() == opr->fpu_regnrHi() + 1, "assumed in calculation (only fpu_regnrHi is used)"); |
aoqi@0 | 2741 | #endif |
aoqi@0 | 2742 | #ifdef ARM |
aoqi@0 | 2743 | assert(opr->fpu_regnrHi() == opr->fpu_regnrLo() + 1, "assumed in calculation (only fpu_regnrLo is used)"); |
aoqi@0 | 2744 | #endif |
aoqi@0 | 2745 | #ifdef PPC |
aoqi@0 | 2746 | assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrHi is used)"); |
aoqi@0 | 2747 | #endif |
aoqi@0 | 2748 | |
aoqi@0 | 2749 | #ifdef VM_LITTLE_ENDIAN |
aoqi@0 | 2750 | VMReg rname_first = frame_map()->fpu_regname(opr->fpu_regnrLo()); |
aoqi@0 | 2751 | #else |
aoqi@0 | 2752 | VMReg rname_first = frame_map()->fpu_regname(opr->fpu_regnrHi()); |
aoqi@0 | 2753 | #endif |
aoqi@0 | 2754 | |
aoqi@0 | 2755 | #ifdef _LP64 |
aoqi@0 | 2756 | first = new LocationValue(Location::new_reg_loc(Location::dbl, rname_first)); |
aoqi@0 | 2757 | second = _int_0_scope_value; |
aoqi@0 | 2758 | #else |
aoqi@0 | 2759 | first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first)); |
aoqi@0 | 2760 | // %%% This is probably a waste but we'll keep things as they were for now |
aoqi@0 | 2761 | if (true) { |
aoqi@0 | 2762 | VMReg rname_second = rname_first->next(); |
aoqi@0 | 2763 | second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second)); |
aoqi@0 | 2764 | } |
aoqi@0 | 2765 | #endif |
aoqi@0 | 2766 | |
aoqi@0 | 2767 | } else { |
aoqi@0 | 2768 | ShouldNotReachHere(); |
aoqi@0 | 2769 | first = NULL; |
aoqi@0 | 2770 | second = NULL; |
aoqi@0 | 2771 | } |
aoqi@0 | 2772 | |
aoqi@0 | 2773 | assert(first != NULL && second != NULL, "must be set"); |
aoqi@0 | 2774 | // The convention the interpreter uses is that the second local |
aoqi@0 | 2775 | // holds the first raw word of the native double representation. |
aoqi@0 | 2776 | // This is actually reasonable, since locals and stack arrays |
aoqi@0 | 2777 | // grow downwards in all implementations. |
aoqi@0 | 2778 | // (If, on some machine, the interpreter's Java locals or stack |
aoqi@0 | 2779 | // were to grow upwards, the embedded doubles would be word-swapped.) |
aoqi@0 | 2780 | scope_values->append(second); |
aoqi@0 | 2781 | scope_values->append(first); |
aoqi@0 | 2782 | return 2; |
aoqi@0 | 2783 | } |
aoqi@0 | 2784 | } |
aoqi@0 | 2785 | |
aoqi@0 | 2786 | |
aoqi@0 | 2787 | int LinearScan::append_scope_value(int op_id, Value value, GrowableArray<ScopeValue*>* scope_values) { |
aoqi@0 | 2788 | if (value != NULL) { |
aoqi@0 | 2789 | LIR_Opr opr = value->operand(); |
aoqi@0 | 2790 | Constant* con = value->as_Constant(); |
aoqi@0 | 2791 | |
aoqi@0 | 2792 | assert(con == NULL || opr->is_virtual() || opr->is_constant() || opr->is_illegal(), "asumption: Constant instructions have only constant operands (or illegal if constant is optimized away)"); |
aoqi@0 | 2793 | assert(con != NULL || opr->is_virtual(), "asumption: non-Constant instructions have only virtual operands"); |
aoqi@0 | 2794 | |
aoqi@0 | 2795 | if (con != NULL && !con->is_pinned() && !opr->is_constant()) { |
aoqi@0 | 2796 | // Unpinned constants may have a virtual operand for a part of the lifetime |
aoqi@0 | 2797 | // or may be illegal when it was optimized away, |
aoqi@0 | 2798 | // so always use a constant operand |
aoqi@0 | 2799 | opr = LIR_OprFact::value_type(con->type()); |
aoqi@0 | 2800 | } |
aoqi@0 | 2801 | assert(opr->is_virtual() || opr->is_constant(), "other cases not allowed here"); |
aoqi@0 | 2802 | |
aoqi@0 | 2803 | if (opr->is_virtual()) { |
aoqi@0 | 2804 | LIR_OpVisitState::OprMode mode = LIR_OpVisitState::inputMode; |
aoqi@0 | 2805 | |
aoqi@0 | 2806 | BlockBegin* block = block_of_op_with_id(op_id); |
aoqi@0 | 2807 | if (block->number_of_sux() == 1 && op_id == block->last_lir_instruction_id()) { |
aoqi@0 | 2808 | // generating debug information for the last instruction of a block. |
aoqi@0 | 2809 | // if this instruction is a branch, spill moves are inserted before this branch |
aoqi@0 | 2810 | // and so the wrong operand would be returned (spill moves at block boundaries are not |
aoqi@0 | 2811 | // considered in the live ranges of intervals) |
aoqi@0 | 2812 | // Solution: use the first op_id of the branch target block instead. |
aoqi@0 | 2813 | if (block->lir()->instructions_list()->last()->as_OpBranch() != NULL) { |
aoqi@0 | 2814 | if (block->live_out().at(opr->vreg_number())) { |
aoqi@0 | 2815 | op_id = block->sux_at(0)->first_lir_instruction_id(); |
aoqi@0 | 2816 | mode = LIR_OpVisitState::outputMode; |
aoqi@0 | 2817 | } |
aoqi@0 | 2818 | } |
aoqi@0 | 2819 | } |
aoqi@0 | 2820 | |
aoqi@0 | 2821 | // Get current location of operand |
aoqi@0 | 2822 | // The operand must be live because debug information is considered when building the intervals |
aoqi@0 | 2823 | // if the interval is not live, color_lir_opr will cause an assertion failure |
aoqi@0 | 2824 | opr = color_lir_opr(opr, op_id, mode); |
aoqi@0 | 2825 | assert(!has_call(op_id) || opr->is_stack() || !is_caller_save(reg_num(opr)), "can not have caller-save register operands at calls"); |
aoqi@0 | 2826 | |
aoqi@0 | 2827 | // Append to ScopeValue array |
aoqi@0 | 2828 | return append_scope_value_for_operand(opr, scope_values); |
aoqi@0 | 2829 | |
aoqi@0 | 2830 | } else { |
aoqi@0 | 2831 | assert(value->as_Constant() != NULL, "all other instructions have only virtual operands"); |
aoqi@0 | 2832 | assert(opr->is_constant(), "operand must be constant"); |
aoqi@0 | 2833 | |
aoqi@0 | 2834 | return append_scope_value_for_constant(opr, scope_values); |
aoqi@0 | 2835 | } |
aoqi@0 | 2836 | } else { |
aoqi@0 | 2837 | // append a dummy value because real value not needed |
aoqi@0 | 2838 | scope_values->append(_illegal_value); |
aoqi@0 | 2839 | return 1; |
aoqi@0 | 2840 | } |
aoqi@0 | 2841 | } |
aoqi@0 | 2842 | |
aoqi@0 | 2843 | |
aoqi@0 | 2844 | IRScopeDebugInfo* LinearScan::compute_debug_info_for_scope(int op_id, IRScope* cur_scope, ValueStack* cur_state, ValueStack* innermost_state) { |
aoqi@0 | 2845 | IRScopeDebugInfo* caller_debug_info = NULL; |
aoqi@0 | 2846 | |
aoqi@0 | 2847 | ValueStack* caller_state = cur_state->caller_state(); |
aoqi@0 | 2848 | if (caller_state != NULL) { |
aoqi@0 | 2849 | // process recursively to compute outermost scope first |
aoqi@0 | 2850 | caller_debug_info = compute_debug_info_for_scope(op_id, cur_scope->caller(), caller_state, innermost_state); |
aoqi@0 | 2851 | } |
aoqi@0 | 2852 | |
aoqi@0 | 2853 | // initialize these to null. |
aoqi@0 | 2854 | // If we don't need deopt info or there are no locals, expressions or monitors, |
aoqi@0 | 2855 | // then these get recorded as no information and avoids the allocation of 0 length arrays. |
aoqi@0 | 2856 | GrowableArray<ScopeValue*>* locals = NULL; |
aoqi@0 | 2857 | GrowableArray<ScopeValue*>* expressions = NULL; |
aoqi@0 | 2858 | GrowableArray<MonitorValue*>* monitors = NULL; |
aoqi@0 | 2859 | |
aoqi@0 | 2860 | // describe local variable values |
aoqi@0 | 2861 | int nof_locals = cur_state->locals_size(); |
aoqi@0 | 2862 | if (nof_locals > 0) { |
aoqi@0 | 2863 | locals = new GrowableArray<ScopeValue*>(nof_locals); |
aoqi@0 | 2864 | |
aoqi@0 | 2865 | int pos = 0; |
aoqi@0 | 2866 | while (pos < nof_locals) { |
aoqi@0 | 2867 | assert(pos < cur_state->locals_size(), "why not?"); |
aoqi@0 | 2868 | |
aoqi@0 | 2869 | Value local = cur_state->local_at(pos); |
aoqi@0 | 2870 | pos += append_scope_value(op_id, local, locals); |
aoqi@0 | 2871 | |
aoqi@0 | 2872 | assert(locals->length() == pos, "must match"); |
aoqi@0 | 2873 | } |
aoqi@0 | 2874 | assert(locals->length() == cur_scope->method()->max_locals(), "wrong number of locals"); |
aoqi@0 | 2875 | assert(locals->length() == cur_state->locals_size(), "wrong number of locals"); |
aoqi@0 | 2876 | } else if (cur_scope->method()->max_locals() > 0) { |
aoqi@0 | 2877 | assert(cur_state->kind() == ValueStack::EmptyExceptionState, "should be"); |
aoqi@0 | 2878 | nof_locals = cur_scope->method()->max_locals(); |
aoqi@0 | 2879 | locals = new GrowableArray<ScopeValue*>(nof_locals); |
aoqi@0 | 2880 | for(int i = 0; i < nof_locals; i++) { |
aoqi@0 | 2881 | locals->append(_illegal_value); |
aoqi@0 | 2882 | } |
aoqi@0 | 2883 | } |
aoqi@0 | 2884 | |
aoqi@0 | 2885 | // describe expression stack |
aoqi@0 | 2886 | int nof_stack = cur_state->stack_size(); |
aoqi@0 | 2887 | if (nof_stack > 0) { |
aoqi@0 | 2888 | expressions = new GrowableArray<ScopeValue*>(nof_stack); |
aoqi@0 | 2889 | |
aoqi@0 | 2890 | int pos = 0; |
aoqi@0 | 2891 | while (pos < nof_stack) { |
aoqi@0 | 2892 | Value expression = cur_state->stack_at_inc(pos); |
aoqi@0 | 2893 | append_scope_value(op_id, expression, expressions); |
aoqi@0 | 2894 | |
aoqi@0 | 2895 | assert(expressions->length() == pos, "must match"); |
aoqi@0 | 2896 | } |
aoqi@0 | 2897 | assert(expressions->length() == cur_state->stack_size(), "wrong number of stack entries"); |
aoqi@0 | 2898 | } |
aoqi@0 | 2899 | |
aoqi@0 | 2900 | // describe monitors |
aoqi@0 | 2901 | int nof_locks = cur_state->locks_size(); |
aoqi@0 | 2902 | if (nof_locks > 0) { |
aoqi@0 | 2903 | int lock_offset = cur_state->caller_state() != NULL ? cur_state->caller_state()->total_locks_size() : 0; |
aoqi@0 | 2904 | monitors = new GrowableArray<MonitorValue*>(nof_locks); |
aoqi@0 | 2905 | for (int i = 0; i < nof_locks; i++) { |
aoqi@0 | 2906 | monitors->append(location_for_monitor_index(lock_offset + i)); |
aoqi@0 | 2907 | } |
aoqi@0 | 2908 | } |
aoqi@0 | 2909 | |
aoqi@0 | 2910 | return new IRScopeDebugInfo(cur_scope, cur_state->bci(), locals, expressions, monitors, caller_debug_info); |
aoqi@0 | 2911 | } |
aoqi@0 | 2912 | |
aoqi@0 | 2913 | |
aoqi@0 | 2914 | void LinearScan::compute_debug_info(CodeEmitInfo* info, int op_id) { |
aoqi@0 | 2915 | TRACE_LINEAR_SCAN(3, tty->print_cr("creating debug information at op_id %d", op_id)); |
aoqi@0 | 2916 | |
aoqi@0 | 2917 | IRScope* innermost_scope = info->scope(); |
aoqi@0 | 2918 | ValueStack* innermost_state = info->stack(); |
aoqi@0 | 2919 | |
aoqi@0 | 2920 | assert(innermost_scope != NULL && innermost_state != NULL, "why is it missing?"); |
aoqi@0 | 2921 | |
aoqi@0 | 2922 | DEBUG_ONLY(check_stack_depth(info, innermost_state->stack_size())); |
aoqi@0 | 2923 | |
aoqi@0 | 2924 | if (info->_scope_debug_info == NULL) { |
aoqi@0 | 2925 | // compute debug information |
aoqi@0 | 2926 | info->_scope_debug_info = compute_debug_info_for_scope(op_id, innermost_scope, innermost_state, innermost_state); |
aoqi@0 | 2927 | } else { |
aoqi@0 | 2928 | // debug information already set. Check that it is correct from the current point of view |
aoqi@0 | 2929 | DEBUG_ONLY(assert_equal(info->_scope_debug_info, compute_debug_info_for_scope(op_id, innermost_scope, innermost_state, innermost_state))); |
aoqi@0 | 2930 | } |
aoqi@0 | 2931 | } |
aoqi@0 | 2932 | |
aoqi@0 | 2933 | |
aoqi@0 | 2934 | void LinearScan::assign_reg_num(LIR_OpList* instructions, IntervalWalker* iw) { |
aoqi@0 | 2935 | LIR_OpVisitState visitor; |
aoqi@0 | 2936 | int num_inst = instructions->length(); |
aoqi@0 | 2937 | bool has_dead = false; |
aoqi@0 | 2938 | |
aoqi@0 | 2939 | for (int j = 0; j < num_inst; j++) { |
aoqi@0 | 2940 | LIR_Op* op = instructions->at(j); |
aoqi@0 | 2941 | if (op == NULL) { // this can happen when spill-moves are removed in eliminate_spill_moves |
aoqi@0 | 2942 | has_dead = true; |
aoqi@0 | 2943 | continue; |
aoqi@0 | 2944 | } |
aoqi@0 | 2945 | int op_id = op->id(); |
aoqi@0 | 2946 | |
aoqi@0 | 2947 | // visit instruction to get list of operands |
aoqi@0 | 2948 | visitor.visit(op); |
aoqi@0 | 2949 | |
aoqi@0 | 2950 | // iterate all modes of the visitor and process all virtual operands |
aoqi@0 | 2951 | for_each_visitor_mode(mode) { |
aoqi@0 | 2952 | int n = visitor.opr_count(mode); |
aoqi@0 | 2953 | for (int k = 0; k < n; k++) { |
aoqi@0 | 2954 | LIR_Opr opr = visitor.opr_at(mode, k); |
aoqi@0 | 2955 | if (opr->is_virtual_register()) { |
aoqi@0 | 2956 | visitor.set_opr_at(mode, k, color_lir_opr(opr, op_id, mode)); |
aoqi@0 | 2957 | } |
aoqi@0 | 2958 | } |
aoqi@0 | 2959 | } |
aoqi@0 | 2960 | |
aoqi@0 | 2961 | if (visitor.info_count() > 0) { |
aoqi@0 | 2962 | // exception handling |
aoqi@0 | 2963 | if (compilation()->has_exception_handlers()) { |
aoqi@0 | 2964 | XHandlers* xhandlers = visitor.all_xhandler(); |
aoqi@0 | 2965 | int n = xhandlers->length(); |
aoqi@0 | 2966 | for (int k = 0; k < n; k++) { |
aoqi@0 | 2967 | XHandler* handler = xhandlers->handler_at(k); |
aoqi@0 | 2968 | if (handler->entry_code() != NULL) { |
aoqi@0 | 2969 | assign_reg_num(handler->entry_code()->instructions_list(), NULL); |
aoqi@0 | 2970 | } |
aoqi@0 | 2971 | } |
aoqi@0 | 2972 | } else { |
aoqi@0 | 2973 | assert(visitor.all_xhandler()->length() == 0, "missed exception handler"); |
aoqi@0 | 2974 | } |
aoqi@0 | 2975 | |
aoqi@0 | 2976 | // compute oop map |
aoqi@0 | 2977 | assert(iw != NULL, "needed for compute_oop_map"); |
aoqi@0 | 2978 | compute_oop_map(iw, visitor, op); |
aoqi@0 | 2979 | |
aoqi@0 | 2980 | // compute debug information |
aoqi@0 | 2981 | if (!use_fpu_stack_allocation()) { |
aoqi@0 | 2982 | // compute debug information if fpu stack allocation is not needed. |
aoqi@0 | 2983 | // when fpu stack allocation is needed, the debug information can not |
aoqi@0 | 2984 | // be computed here because the exact location of fpu operands is not known |
aoqi@0 | 2985 | // -> debug information is created inside the fpu stack allocator |
aoqi@0 | 2986 | int n = visitor.info_count(); |
aoqi@0 | 2987 | for (int k = 0; k < n; k++) { |
aoqi@0 | 2988 | compute_debug_info(visitor.info_at(k), op_id); |
aoqi@0 | 2989 | } |
aoqi@0 | 2990 | } |
aoqi@0 | 2991 | } |
aoqi@0 | 2992 | |
aoqi@0 | 2993 | #ifdef ASSERT |
aoqi@0 | 2994 | // make sure we haven't made the op invalid. |
aoqi@0 | 2995 | op->verify(); |
aoqi@0 | 2996 | #endif |
aoqi@0 | 2997 | |
aoqi@0 | 2998 | // remove useless moves |
aoqi@0 | 2999 | if (op->code() == lir_move) { |
aoqi@0 | 3000 | assert(op->as_Op1() != NULL, "move must be LIR_Op1"); |
aoqi@0 | 3001 | LIR_Op1* move = (LIR_Op1*)op; |
aoqi@0 | 3002 | LIR_Opr src = move->in_opr(); |
aoqi@0 | 3003 | LIR_Opr dst = move->result_opr(); |
aoqi@0 | 3004 | if (dst == src || |
aoqi@0 | 3005 | !dst->is_pointer() && !src->is_pointer() && |
aoqi@0 | 3006 | src->is_same_register(dst)) { |
aoqi@0 | 3007 | instructions->at_put(j, NULL); |
aoqi@0 | 3008 | has_dead = true; |
aoqi@0 | 3009 | } |
aoqi@0 | 3010 | } |
aoqi@0 | 3011 | } |
aoqi@0 | 3012 | |
aoqi@0 | 3013 | if (has_dead) { |
aoqi@0 | 3014 | // iterate all instructions of the block and remove all null-values. |
aoqi@0 | 3015 | int insert_point = 0; |
aoqi@0 | 3016 | for (int j = 0; j < num_inst; j++) { |
aoqi@0 | 3017 | LIR_Op* op = instructions->at(j); |
aoqi@0 | 3018 | if (op != NULL) { |
aoqi@0 | 3019 | if (insert_point != j) { |
aoqi@0 | 3020 | instructions->at_put(insert_point, op); |
aoqi@0 | 3021 | } |
aoqi@0 | 3022 | insert_point++; |
aoqi@0 | 3023 | } |
aoqi@0 | 3024 | } |
aoqi@0 | 3025 | instructions->truncate(insert_point); |
aoqi@0 | 3026 | } |
aoqi@0 | 3027 | } |
aoqi@0 | 3028 | |
aoqi@0 | 3029 | void LinearScan::assign_reg_num() { |
aoqi@0 | 3030 | TIME_LINEAR_SCAN(timer_assign_reg_num); |
aoqi@0 | 3031 | |
aoqi@0 | 3032 | init_compute_debug_info(); |
aoqi@0 | 3033 | IntervalWalker* iw = init_compute_oop_maps(); |
aoqi@0 | 3034 | |
aoqi@0 | 3035 | int num_blocks = block_count(); |
aoqi@0 | 3036 | for (int i = 0; i < num_blocks; i++) { |
aoqi@0 | 3037 | BlockBegin* block = block_at(i); |
aoqi@0 | 3038 | assign_reg_num(block->lir()->instructions_list(), iw); |
aoqi@0 | 3039 | } |
aoqi@0 | 3040 | } |
aoqi@0 | 3041 | |
aoqi@0 | 3042 | |
aoqi@0 | 3043 | void LinearScan::do_linear_scan() { |
aoqi@0 | 3044 | NOT_PRODUCT(_total_timer.begin_method()); |
aoqi@0 | 3045 | |
aoqi@0 | 3046 | number_instructions(); |
aoqi@0 | 3047 | |
aoqi@0 | 3048 | NOT_PRODUCT(print_lir(1, "Before Register Allocation")); |
aoqi@0 | 3049 | |
aoqi@0 | 3050 | compute_local_live_sets(); |
aoqi@0 | 3051 | compute_global_live_sets(); |
aoqi@0 | 3052 | CHECK_BAILOUT(); |
aoqi@0 | 3053 | |
aoqi@0 | 3054 | build_intervals(); |
aoqi@0 | 3055 | CHECK_BAILOUT(); |
aoqi@0 | 3056 | sort_intervals_before_allocation(); |
aoqi@0 | 3057 | |
aoqi@0 | 3058 | NOT_PRODUCT(print_intervals("Before Register Allocation")); |
aoqi@0 | 3059 | NOT_PRODUCT(LinearScanStatistic::compute(this, _stat_before_alloc)); |
aoqi@0 | 3060 | |
aoqi@0 | 3061 | allocate_registers(); |
aoqi@0 | 3062 | CHECK_BAILOUT(); |
aoqi@0 | 3063 | |
aoqi@0 | 3064 | resolve_data_flow(); |
aoqi@0 | 3065 | if (compilation()->has_exception_handlers()) { |
aoqi@0 | 3066 | resolve_exception_handlers(); |
aoqi@0 | 3067 | } |
aoqi@0 | 3068 | // fill in number of spill slots into frame_map |
aoqi@0 | 3069 | propagate_spill_slots(); |
aoqi@0 | 3070 | CHECK_BAILOUT(); |
aoqi@0 | 3071 | |
aoqi@0 | 3072 | NOT_PRODUCT(print_intervals("After Register Allocation")); |
aoqi@0 | 3073 | NOT_PRODUCT(print_lir(2, "LIR after register allocation:")); |
aoqi@0 | 3074 | |
aoqi@0 | 3075 | sort_intervals_after_allocation(); |
aoqi@0 | 3076 | |
aoqi@0 | 3077 | DEBUG_ONLY(verify()); |
aoqi@0 | 3078 | |
aoqi@0 | 3079 | eliminate_spill_moves(); |
aoqi@0 | 3080 | assign_reg_num(); |
aoqi@0 | 3081 | CHECK_BAILOUT(); |
aoqi@0 | 3082 | |
aoqi@0 | 3083 | NOT_PRODUCT(print_lir(2, "LIR after assignment of register numbers:")); |
aoqi@0 | 3084 | NOT_PRODUCT(LinearScanStatistic::compute(this, _stat_after_asign)); |
aoqi@0 | 3085 | |
aoqi@0 | 3086 | { TIME_LINEAR_SCAN(timer_allocate_fpu_stack); |
aoqi@0 | 3087 | |
aoqi@0 | 3088 | if (use_fpu_stack_allocation()) { |
aoqi@0 | 3089 | allocate_fpu_stack(); // Only has effect on Intel |
aoqi@0 | 3090 | NOT_PRODUCT(print_lir(2, "LIR after FPU stack allocation:")); |
aoqi@0 | 3091 | } |
aoqi@0 | 3092 | } |
aoqi@0 | 3093 | |
aoqi@0 | 3094 | { TIME_LINEAR_SCAN(timer_optimize_lir); |
aoqi@0 | 3095 | |
aoqi@0 | 3096 | EdgeMoveOptimizer::optimize(ir()->code()); |
aoqi@0 | 3097 | ControlFlowOptimizer::optimize(ir()->code()); |
aoqi@0 | 3098 | // check that cfg is still correct after optimizations |
aoqi@0 | 3099 | ir()->verify(); |
aoqi@0 | 3100 | } |
aoqi@0 | 3101 | |
aoqi@0 | 3102 | NOT_PRODUCT(print_lir(1, "Before Code Generation", false)); |
aoqi@0 | 3103 | NOT_PRODUCT(LinearScanStatistic::compute(this, _stat_final)); |
aoqi@0 | 3104 | NOT_PRODUCT(_total_timer.end_method(this)); |
aoqi@0 | 3105 | } |
aoqi@0 | 3106 | |
aoqi@0 | 3107 | |
aoqi@0 | 3108 | // ********** Printing functions |
aoqi@0 | 3109 | |
aoqi@0 | 3110 | #ifndef PRODUCT |
aoqi@0 | 3111 | |
aoqi@0 | 3112 | void LinearScan::print_timers(double total) { |
aoqi@0 | 3113 | _total_timer.print(total); |
aoqi@0 | 3114 | } |
aoqi@0 | 3115 | |
aoqi@0 | 3116 | void LinearScan::print_statistics() { |
aoqi@0 | 3117 | _stat_before_alloc.print("before allocation"); |
aoqi@0 | 3118 | _stat_after_asign.print("after assignment of register"); |
aoqi@0 | 3119 | _stat_final.print("after optimization"); |
aoqi@0 | 3120 | } |
aoqi@0 | 3121 | |
aoqi@0 | 3122 | void LinearScan::print_bitmap(BitMap& b) { |
aoqi@0 | 3123 | for (unsigned int i = 0; i < b.size(); i++) { |
aoqi@0 | 3124 | if (b.at(i)) tty->print("%d ", i); |
aoqi@0 | 3125 | } |
aoqi@0 | 3126 | tty->cr(); |
aoqi@0 | 3127 | } |
aoqi@0 | 3128 | |
aoqi@0 | 3129 | void LinearScan::print_intervals(const char* label) { |
aoqi@0 | 3130 | if (TraceLinearScanLevel >= 1) { |
aoqi@0 | 3131 | int i; |
aoqi@0 | 3132 | tty->cr(); |
aoqi@0 | 3133 | tty->print_cr("%s", label); |
aoqi@0 | 3134 | |
aoqi@0 | 3135 | for (i = 0; i < interval_count(); i++) { |
aoqi@0 | 3136 | Interval* interval = interval_at(i); |
aoqi@0 | 3137 | if (interval != NULL) { |
aoqi@0 | 3138 | interval->print(); |
aoqi@0 | 3139 | } |
aoqi@0 | 3140 | } |
aoqi@0 | 3141 | |
aoqi@0 | 3142 | tty->cr(); |
aoqi@0 | 3143 | tty->print_cr("--- Basic Blocks ---"); |
aoqi@0 | 3144 | for (i = 0; i < block_count(); i++) { |
aoqi@0 | 3145 | BlockBegin* block = block_at(i); |
aoqi@0 | 3146 | tty->print("B%d [%d, %d, %d, %d] ", block->block_id(), block->first_lir_instruction_id(), block->last_lir_instruction_id(), block->loop_index(), block->loop_depth()); |
aoqi@0 | 3147 | } |
aoqi@0 | 3148 | tty->cr(); |
aoqi@0 | 3149 | tty->cr(); |
aoqi@0 | 3150 | } |
aoqi@0 | 3151 | |
aoqi@0 | 3152 | if (PrintCFGToFile) { |
aoqi@0 | 3153 | CFGPrinter::print_intervals(&_intervals, label); |
aoqi@0 | 3154 | } |
aoqi@0 | 3155 | } |
aoqi@0 | 3156 | |
aoqi@0 | 3157 | void LinearScan::print_lir(int level, const char* label, bool hir_valid) { |
aoqi@0 | 3158 | if (TraceLinearScanLevel >= level) { |
aoqi@0 | 3159 | tty->cr(); |
aoqi@0 | 3160 | tty->print_cr("%s", label); |
aoqi@0 | 3161 | print_LIR(ir()->linear_scan_order()); |
aoqi@0 | 3162 | tty->cr(); |
aoqi@0 | 3163 | } |
aoqi@0 | 3164 | |
aoqi@0 | 3165 | if (level == 1 && PrintCFGToFile) { |
aoqi@0 | 3166 | CFGPrinter::print_cfg(ir()->linear_scan_order(), label, hir_valid, true); |
aoqi@0 | 3167 | } |
aoqi@0 | 3168 | } |
aoqi@0 | 3169 | |
aoqi@0 | 3170 | #endif //PRODUCT |
aoqi@0 | 3171 | |
aoqi@0 | 3172 | |
aoqi@0 | 3173 | // ********** verification functions for allocation |
aoqi@0 | 3174 | // (check that all intervals have a correct register and that no registers are overwritten) |
aoqi@0 | 3175 | #ifdef ASSERT |
aoqi@0 | 3176 | |
aoqi@0 | 3177 | void LinearScan::verify() { |
aoqi@0 | 3178 | TRACE_LINEAR_SCAN(2, tty->print_cr("********* verifying intervals ******************************************")); |
aoqi@0 | 3179 | verify_intervals(); |
aoqi@0 | 3180 | |
aoqi@0 | 3181 | TRACE_LINEAR_SCAN(2, tty->print_cr("********* verifying that no oops are in fixed intervals ****************")); |
aoqi@0 | 3182 | verify_no_oops_in_fixed_intervals(); |
aoqi@0 | 3183 | |
aoqi@0 | 3184 | TRACE_LINEAR_SCAN(2, tty->print_cr("********* verifying that unpinned constants are not alive across block boundaries")); |
aoqi@0 | 3185 | verify_constants(); |
aoqi@0 | 3186 | |
aoqi@0 | 3187 | TRACE_LINEAR_SCAN(2, tty->print_cr("********* verifying register allocation ********************************")); |
aoqi@0 | 3188 | verify_registers(); |
aoqi@0 | 3189 | |
aoqi@0 | 3190 | TRACE_LINEAR_SCAN(2, tty->print_cr("********* no errors found **********************************************")); |
aoqi@0 | 3191 | } |
aoqi@0 | 3192 | |
aoqi@0 | 3193 | void LinearScan::verify_intervals() { |
aoqi@0 | 3194 | int len = interval_count(); |
aoqi@0 | 3195 | bool has_error = false; |
aoqi@0 | 3196 | |
aoqi@0 | 3197 | for (int i = 0; i < len; i++) { |
aoqi@0 | 3198 | Interval* i1 = interval_at(i); |
aoqi@0 | 3199 | if (i1 == NULL) continue; |
aoqi@0 | 3200 | |
aoqi@0 | 3201 | i1->check_split_children(); |
aoqi@0 | 3202 | |
aoqi@0 | 3203 | if (i1->reg_num() != i) { |
aoqi@0 | 3204 | tty->print_cr("Interval %d is on position %d in list", i1->reg_num(), i); i1->print(); tty->cr(); |
aoqi@0 | 3205 | has_error = true; |
aoqi@0 | 3206 | } |
aoqi@0 | 3207 | |
aoqi@0 | 3208 | if (i1->reg_num() >= LIR_OprDesc::vreg_base && i1->type() == T_ILLEGAL) { |
aoqi@0 | 3209 | tty->print_cr("Interval %d has no type assigned", i1->reg_num()); i1->print(); tty->cr(); |
aoqi@0 | 3210 | has_error = true; |
aoqi@0 | 3211 | } |
aoqi@0 | 3212 | |
aoqi@0 | 3213 | if (i1->assigned_reg() == any_reg) { |
aoqi@0 | 3214 | tty->print_cr("Interval %d has no register assigned", i1->reg_num()); i1->print(); tty->cr(); |
aoqi@0 | 3215 | has_error = true; |
aoqi@0 | 3216 | } |
aoqi@0 | 3217 | |
aoqi@0 | 3218 | if (i1->assigned_reg() == i1->assigned_regHi()) { |
aoqi@0 | 3219 | tty->print_cr("Interval %d: low and high register equal", i1->reg_num()); i1->print(); tty->cr(); |
aoqi@0 | 3220 | has_error = true; |
aoqi@0 | 3221 | } |
aoqi@0 | 3222 | |
aoqi@0 | 3223 | if (!is_processed_reg_num(i1->assigned_reg())) { |
aoqi@0 | 3224 | tty->print_cr("Can not have an Interval for an ignored register"); i1->print(); tty->cr(); |
aoqi@0 | 3225 | has_error = true; |
aoqi@0 | 3226 | } |
aoqi@0 | 3227 | |
aoqi@0 | 3228 | if (i1->first() == Range::end()) { |
aoqi@0 | 3229 | tty->print_cr("Interval %d has no Range", i1->reg_num()); i1->print(); tty->cr(); |
aoqi@0 | 3230 | has_error = true; |
aoqi@0 | 3231 | } |
aoqi@0 | 3232 | |
aoqi@0 | 3233 | for (Range* r = i1->first(); r != Range::end(); r = r->next()) { |
aoqi@0 | 3234 | if (r->from() >= r->to()) { |
aoqi@0 | 3235 | tty->print_cr("Interval %d has zero length range", i1->reg_num()); i1->print(); tty->cr(); |
aoqi@0 | 3236 | has_error = true; |
aoqi@0 | 3237 | } |
aoqi@0 | 3238 | } |
aoqi@0 | 3239 | |
aoqi@0 | 3240 | for (int j = i + 1; j < len; j++) { |
aoqi@0 | 3241 | Interval* i2 = interval_at(j); |
aoqi@0 | 3242 | if (i2 == NULL) continue; |
aoqi@0 | 3243 | |
aoqi@0 | 3244 | // special intervals that are created in MoveResolver |
aoqi@0 | 3245 | // -> ignore them because the range information has no meaning there |
aoqi@0 | 3246 | if (i1->from() == 1 && i1->to() == 2) continue; |
aoqi@0 | 3247 | if (i2->from() == 1 && i2->to() == 2) continue; |
aoqi@0 | 3248 | |
aoqi@0 | 3249 | int r1 = i1->assigned_reg(); |
aoqi@0 | 3250 | int r1Hi = i1->assigned_regHi(); |
aoqi@0 | 3251 | int r2 = i2->assigned_reg(); |
aoqi@0 | 3252 | int r2Hi = i2->assigned_regHi(); |
aoqi@0 | 3253 | if (i1->intersects(i2) && (r1 == r2 || r1 == r2Hi || (r1Hi != any_reg && (r1Hi == r2 || r1Hi == r2Hi)))) { |
aoqi@0 | 3254 | tty->print_cr("Intervals %d and %d overlap and have the same register assigned", i1->reg_num(), i2->reg_num()); |
aoqi@0 | 3255 | i1->print(); tty->cr(); |
aoqi@0 | 3256 | i2->print(); tty->cr(); |
aoqi@0 | 3257 | has_error = true; |
aoqi@0 | 3258 | } |
aoqi@0 | 3259 | } |
aoqi@0 | 3260 | } |
aoqi@0 | 3261 | |
aoqi@0 | 3262 | assert(has_error == false, "register allocation invalid"); |
aoqi@0 | 3263 | } |
aoqi@0 | 3264 | |
aoqi@0 | 3265 | |
aoqi@0 | 3266 | void LinearScan::verify_no_oops_in_fixed_intervals() { |
aoqi@0 | 3267 | Interval* fixed_intervals; |
aoqi@0 | 3268 | Interval* other_intervals; |
aoqi@0 | 3269 | create_unhandled_lists(&fixed_intervals, &other_intervals, is_precolored_cpu_interval, NULL); |
aoqi@0 | 3270 | |
aoqi@0 | 3271 | // to ensure a walking until the last instruction id, add a dummy interval |
aoqi@0 | 3272 | // with a high operation id |
aoqi@0 | 3273 | other_intervals = new Interval(any_reg); |
aoqi@0 | 3274 | other_intervals->add_range(max_jint - 2, max_jint - 1); |
aoqi@0 | 3275 | IntervalWalker* iw = new IntervalWalker(this, fixed_intervals, other_intervals); |
aoqi@0 | 3276 | |
aoqi@0 | 3277 | LIR_OpVisitState visitor; |
aoqi@0 | 3278 | for (int i = 0; i < block_count(); i++) { |
aoqi@0 | 3279 | BlockBegin* block = block_at(i); |
aoqi@0 | 3280 | |
aoqi@0 | 3281 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 3282 | |
aoqi@0 | 3283 | for (int j = 0; j < instructions->length(); j++) { |
aoqi@0 | 3284 | LIR_Op* op = instructions->at(j); |
aoqi@0 | 3285 | int op_id = op->id(); |
aoqi@0 | 3286 | |
aoqi@0 | 3287 | visitor.visit(op); |
aoqi@0 | 3288 | |
aoqi@0 | 3289 | if (visitor.info_count() > 0) { |
aoqi@0 | 3290 | iw->walk_before(op->id()); |
aoqi@0 | 3291 | bool check_live = true; |
aoqi@0 | 3292 | if (op->code() == lir_move) { |
aoqi@0 | 3293 | LIR_Op1* move = (LIR_Op1*)op; |
aoqi@0 | 3294 | check_live = (move->patch_code() == lir_patch_none); |
aoqi@0 | 3295 | } |
aoqi@0 | 3296 | LIR_OpBranch* branch = op->as_OpBranch(); |
aoqi@0 | 3297 | if (branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) { |
aoqi@0 | 3298 | // Don't bother checking the stub in this case since the |
aoqi@0 | 3299 | // exception stub will never return to normal control flow. |
aoqi@0 | 3300 | check_live = false; |
aoqi@0 | 3301 | } |
aoqi@0 | 3302 | |
aoqi@0 | 3303 | // Make sure none of the fixed registers is live across an |
aoqi@0 | 3304 | // oopmap since we can't handle that correctly. |
aoqi@0 | 3305 | if (check_live) { |
aoqi@0 | 3306 | for (Interval* interval = iw->active_first(fixedKind); |
aoqi@0 | 3307 | interval != Interval::end(); |
aoqi@0 | 3308 | interval = interval->next()) { |
aoqi@0 | 3309 | if (interval->current_to() > op->id() + 1) { |
aoqi@0 | 3310 | // This interval is live out of this op so make sure |
aoqi@0 | 3311 | // that this interval represents some value that's |
aoqi@0 | 3312 | // referenced by this op either as an input or output. |
aoqi@0 | 3313 | bool ok = false; |
aoqi@0 | 3314 | for_each_visitor_mode(mode) { |
aoqi@0 | 3315 | int n = visitor.opr_count(mode); |
aoqi@0 | 3316 | for (int k = 0; k < n; k++) { |
aoqi@0 | 3317 | LIR_Opr opr = visitor.opr_at(mode, k); |
aoqi@0 | 3318 | if (opr->is_fixed_cpu()) { |
aoqi@0 | 3319 | if (interval_at(reg_num(opr)) == interval) { |
aoqi@0 | 3320 | ok = true; |
aoqi@0 | 3321 | break; |
aoqi@0 | 3322 | } |
aoqi@0 | 3323 | int hi = reg_numHi(opr); |
aoqi@0 | 3324 | if (hi != -1 && interval_at(hi) == interval) { |
aoqi@0 | 3325 | ok = true; |
aoqi@0 | 3326 | break; |
aoqi@0 | 3327 | } |
aoqi@0 | 3328 | } |
aoqi@0 | 3329 | } |
aoqi@0 | 3330 | } |
aoqi@0 | 3331 | assert(ok, "fixed intervals should never be live across an oopmap point"); |
aoqi@0 | 3332 | } |
aoqi@0 | 3333 | } |
aoqi@0 | 3334 | } |
aoqi@0 | 3335 | } |
aoqi@0 | 3336 | |
aoqi@0 | 3337 | // oop-maps at calls do not contain registers, so check is not needed |
aoqi@0 | 3338 | if (!visitor.has_call()) { |
aoqi@0 | 3339 | |
aoqi@0 | 3340 | for_each_visitor_mode(mode) { |
aoqi@0 | 3341 | int n = visitor.opr_count(mode); |
aoqi@0 | 3342 | for (int k = 0; k < n; k++) { |
aoqi@0 | 3343 | LIR_Opr opr = visitor.opr_at(mode, k); |
aoqi@0 | 3344 | |
aoqi@0 | 3345 | if (opr->is_fixed_cpu() && opr->is_oop()) { |
aoqi@0 | 3346 | // operand is a non-virtual cpu register and contains an oop |
aoqi@0 | 3347 | TRACE_LINEAR_SCAN(4, op->print_on(tty); tty->print("checking operand "); opr->print(); tty->cr()); |
aoqi@0 | 3348 | |
aoqi@0 | 3349 | Interval* interval = interval_at(reg_num(opr)); |
aoqi@0 | 3350 | assert(interval != NULL, "no interval"); |
aoqi@0 | 3351 | |
aoqi@0 | 3352 | if (mode == LIR_OpVisitState::inputMode) { |
aoqi@0 | 3353 | if (interval->to() >= op_id + 1) { |
aoqi@0 | 3354 | assert(interval->to() < op_id + 2 || |
aoqi@0 | 3355 | interval->has_hole_between(op_id, op_id + 2), |
aoqi@0 | 3356 | "oop input operand live after instruction"); |
aoqi@0 | 3357 | } |
aoqi@0 | 3358 | } else if (mode == LIR_OpVisitState::outputMode) { |
aoqi@0 | 3359 | if (interval->from() <= op_id - 1) { |
aoqi@0 | 3360 | assert(interval->has_hole_between(op_id - 1, op_id), |
aoqi@0 | 3361 | "oop input operand live after instruction"); |
aoqi@0 | 3362 | } |
aoqi@0 | 3363 | } |
aoqi@0 | 3364 | } |
aoqi@0 | 3365 | } |
aoqi@0 | 3366 | } |
aoqi@0 | 3367 | } |
aoqi@0 | 3368 | } |
aoqi@0 | 3369 | } |
aoqi@0 | 3370 | } |
aoqi@0 | 3371 | |
aoqi@0 | 3372 | |
aoqi@0 | 3373 | void LinearScan::verify_constants() { |
aoqi@0 | 3374 | int num_regs = num_virtual_regs(); |
aoqi@0 | 3375 | int size = live_set_size(); |
aoqi@0 | 3376 | int num_blocks = block_count(); |
aoqi@0 | 3377 | |
aoqi@0 | 3378 | for (int i = 0; i < num_blocks; i++) { |
aoqi@0 | 3379 | BlockBegin* block = block_at(i); |
aoqi@0 | 3380 | BitMap live_at_edge = block->live_in(); |
aoqi@0 | 3381 | |
aoqi@0 | 3382 | // visit all registers where the live_at_edge bit is set |
aoqi@0 | 3383 | for (int r = (int)live_at_edge.get_next_one_offset(0, size); r < size; r = (int)live_at_edge.get_next_one_offset(r + 1, size)) { |
aoqi@0 | 3384 | TRACE_LINEAR_SCAN(4, tty->print("checking interval %d of block B%d", r, block->block_id())); |
aoqi@0 | 3385 | |
aoqi@0 | 3386 | Value value = gen()->instruction_for_vreg(r); |
aoqi@0 | 3387 | |
aoqi@0 | 3388 | assert(value != NULL, "all intervals live across block boundaries must have Value"); |
aoqi@0 | 3389 | assert(value->operand()->is_register() && value->operand()->is_virtual(), "value must have virtual operand"); |
aoqi@0 | 3390 | assert(value->operand()->vreg_number() == r, "register number must match"); |
aoqi@0 | 3391 | // TKR assert(value->as_Constant() == NULL || value->is_pinned(), "only pinned constants can be alive accross block boundaries"); |
aoqi@0 | 3392 | } |
aoqi@0 | 3393 | } |
aoqi@0 | 3394 | } |
aoqi@0 | 3395 | |
aoqi@0 | 3396 | |
aoqi@0 | 3397 | class RegisterVerifier: public StackObj { |
aoqi@0 | 3398 | private: |
aoqi@0 | 3399 | LinearScan* _allocator; |
aoqi@0 | 3400 | BlockList _work_list; // all blocks that must be processed |
aoqi@0 | 3401 | IntervalsList _saved_states; // saved information of previous check |
aoqi@0 | 3402 | |
aoqi@0 | 3403 | // simplified access to methods of LinearScan |
aoqi@0 | 3404 | Compilation* compilation() const { return _allocator->compilation(); } |
aoqi@0 | 3405 | Interval* interval_at(int reg_num) const { return _allocator->interval_at(reg_num); } |
aoqi@0 | 3406 | int reg_num(LIR_Opr opr) const { return _allocator->reg_num(opr); } |
aoqi@0 | 3407 | |
aoqi@0 | 3408 | // currently, only registers are processed |
aoqi@0 | 3409 | int state_size() { return LinearScan::nof_regs; } |
aoqi@0 | 3410 | |
aoqi@0 | 3411 | // accessors |
aoqi@0 | 3412 | IntervalList* state_for_block(BlockBegin* block) { return _saved_states.at(block->block_id()); } |
aoqi@0 | 3413 | void set_state_for_block(BlockBegin* block, IntervalList* saved_state) { _saved_states.at_put(block->block_id(), saved_state); } |
aoqi@0 | 3414 | void add_to_work_list(BlockBegin* block) { if (!_work_list.contains(block)) _work_list.append(block); } |
aoqi@0 | 3415 | |
aoqi@0 | 3416 | // helper functions |
aoqi@0 | 3417 | IntervalList* copy(IntervalList* input_state); |
aoqi@0 | 3418 | void state_put(IntervalList* input_state, int reg, Interval* interval); |
aoqi@0 | 3419 | bool check_state(IntervalList* input_state, int reg, Interval* interval); |
aoqi@0 | 3420 | |
aoqi@0 | 3421 | void process_block(BlockBegin* block); |
aoqi@0 | 3422 | void process_xhandler(XHandler* xhandler, IntervalList* input_state); |
aoqi@0 | 3423 | void process_successor(BlockBegin* block, IntervalList* input_state); |
aoqi@0 | 3424 | void process_operations(LIR_List* ops, IntervalList* input_state); |
aoqi@0 | 3425 | |
aoqi@0 | 3426 | public: |
aoqi@0 | 3427 | RegisterVerifier(LinearScan* allocator) |
aoqi@0 | 3428 | : _allocator(allocator) |
aoqi@0 | 3429 | , _work_list(16) |
aoqi@0 | 3430 | , _saved_states(BlockBegin::number_of_blocks(), NULL) |
aoqi@0 | 3431 | { } |
aoqi@0 | 3432 | |
aoqi@0 | 3433 | void verify(BlockBegin* start); |
aoqi@0 | 3434 | }; |
aoqi@0 | 3435 | |
aoqi@0 | 3436 | |
aoqi@0 | 3437 | // entry function from LinearScan that starts the verification |
aoqi@0 | 3438 | void LinearScan::verify_registers() { |
aoqi@0 | 3439 | RegisterVerifier verifier(this); |
aoqi@0 | 3440 | verifier.verify(block_at(0)); |
aoqi@0 | 3441 | } |
aoqi@0 | 3442 | |
aoqi@0 | 3443 | |
aoqi@0 | 3444 | void RegisterVerifier::verify(BlockBegin* start) { |
aoqi@0 | 3445 | // setup input registers (method arguments) for first block |
aoqi@0 | 3446 | IntervalList* input_state = new IntervalList(state_size(), NULL); |
aoqi@0 | 3447 | CallingConvention* args = compilation()->frame_map()->incoming_arguments(); |
aoqi@0 | 3448 | for (int n = 0; n < args->length(); n++) { |
aoqi@0 | 3449 | LIR_Opr opr = args->at(n); |
aoqi@0 | 3450 | if (opr->is_register()) { |
aoqi@0 | 3451 | Interval* interval = interval_at(reg_num(opr)); |
aoqi@0 | 3452 | |
aoqi@0 | 3453 | if (interval->assigned_reg() < state_size()) { |
aoqi@0 | 3454 | input_state->at_put(interval->assigned_reg(), interval); |
aoqi@0 | 3455 | } |
aoqi@0 | 3456 | if (interval->assigned_regHi() != LinearScan::any_reg && interval->assigned_regHi() < state_size()) { |
aoqi@0 | 3457 | input_state->at_put(interval->assigned_regHi(), interval); |
aoqi@0 | 3458 | } |
aoqi@0 | 3459 | } |
aoqi@0 | 3460 | } |
aoqi@0 | 3461 | |
aoqi@0 | 3462 | set_state_for_block(start, input_state); |
aoqi@0 | 3463 | add_to_work_list(start); |
aoqi@0 | 3464 | |
aoqi@0 | 3465 | // main loop for verification |
aoqi@0 | 3466 | do { |
aoqi@0 | 3467 | BlockBegin* block = _work_list.at(0); |
aoqi@0 | 3468 | _work_list.remove_at(0); |
aoqi@0 | 3469 | |
aoqi@0 | 3470 | process_block(block); |
aoqi@0 | 3471 | } while (!_work_list.is_empty()); |
aoqi@0 | 3472 | } |
aoqi@0 | 3473 | |
aoqi@0 | 3474 | void RegisterVerifier::process_block(BlockBegin* block) { |
aoqi@0 | 3475 | TRACE_LINEAR_SCAN(2, tty->cr(); tty->print_cr("process_block B%d", block->block_id())); |
aoqi@0 | 3476 | |
aoqi@0 | 3477 | // must copy state because it is modified |
aoqi@0 | 3478 | IntervalList* input_state = copy(state_for_block(block)); |
aoqi@0 | 3479 | |
aoqi@0 | 3480 | if (TraceLinearScanLevel >= 4) { |
aoqi@0 | 3481 | tty->print_cr("Input-State of intervals:"); |
aoqi@0 | 3482 | tty->print(" "); |
aoqi@0 | 3483 | for (int i = 0; i < state_size(); i++) { |
aoqi@0 | 3484 | if (input_state->at(i) != NULL) { |
aoqi@0 | 3485 | tty->print(" %4d", input_state->at(i)->reg_num()); |
aoqi@0 | 3486 | } else { |
aoqi@0 | 3487 | tty->print(" __"); |
aoqi@0 | 3488 | } |
aoqi@0 | 3489 | } |
aoqi@0 | 3490 | tty->cr(); |
aoqi@0 | 3491 | tty->cr(); |
aoqi@0 | 3492 | } |
aoqi@0 | 3493 | |
aoqi@0 | 3494 | // process all operations of the block |
aoqi@0 | 3495 | process_operations(block->lir(), input_state); |
aoqi@0 | 3496 | |
aoqi@0 | 3497 | // iterate all successors |
aoqi@0 | 3498 | for (int i = 0; i < block->number_of_sux(); i++) { |
aoqi@0 | 3499 | process_successor(block->sux_at(i), input_state); |
aoqi@0 | 3500 | } |
aoqi@0 | 3501 | } |
aoqi@0 | 3502 | |
aoqi@0 | 3503 | void RegisterVerifier::process_xhandler(XHandler* xhandler, IntervalList* input_state) { |
aoqi@0 | 3504 | TRACE_LINEAR_SCAN(2, tty->print_cr("process_xhandler B%d", xhandler->entry_block()->block_id())); |
aoqi@0 | 3505 | |
aoqi@0 | 3506 | // must copy state because it is modified |
aoqi@0 | 3507 | input_state = copy(input_state); |
aoqi@0 | 3508 | |
aoqi@0 | 3509 | if (xhandler->entry_code() != NULL) { |
aoqi@0 | 3510 | process_operations(xhandler->entry_code(), input_state); |
aoqi@0 | 3511 | } |
aoqi@0 | 3512 | process_successor(xhandler->entry_block(), input_state); |
aoqi@0 | 3513 | } |
aoqi@0 | 3514 | |
aoqi@0 | 3515 | void RegisterVerifier::process_successor(BlockBegin* block, IntervalList* input_state) { |
aoqi@0 | 3516 | IntervalList* saved_state = state_for_block(block); |
aoqi@0 | 3517 | |
aoqi@0 | 3518 | if (saved_state != NULL) { |
aoqi@0 | 3519 | // this block was already processed before. |
aoqi@0 | 3520 | // check if new input_state is consistent with saved_state |
aoqi@0 | 3521 | |
aoqi@0 | 3522 | bool saved_state_correct = true; |
aoqi@0 | 3523 | for (int i = 0; i < state_size(); i++) { |
aoqi@0 | 3524 | if (input_state->at(i) != saved_state->at(i)) { |
aoqi@0 | 3525 | // current input_state and previous saved_state assume a different |
aoqi@0 | 3526 | // interval in this register -> assume that this register is invalid |
aoqi@0 | 3527 | if (saved_state->at(i) != NULL) { |
aoqi@0 | 3528 | // invalidate old calculation only if it assumed that |
aoqi@0 | 3529 | // register was valid. when the register was already invalid, |
aoqi@0 | 3530 | // then the old calculation was correct. |
aoqi@0 | 3531 | saved_state_correct = false; |
aoqi@0 | 3532 | saved_state->at_put(i, NULL); |
aoqi@0 | 3533 | |
aoqi@0 | 3534 | TRACE_LINEAR_SCAN(4, tty->print_cr("process_successor B%d: invalidating slot %d", block->block_id(), i)); |
aoqi@0 | 3535 | } |
aoqi@0 | 3536 | } |
aoqi@0 | 3537 | } |
aoqi@0 | 3538 | |
aoqi@0 | 3539 | if (saved_state_correct) { |
aoqi@0 | 3540 | // already processed block with correct input_state |
aoqi@0 | 3541 | TRACE_LINEAR_SCAN(2, tty->print_cr("process_successor B%d: previous visit already correct", block->block_id())); |
aoqi@0 | 3542 | } else { |
aoqi@0 | 3543 | // must re-visit this block |
aoqi@0 | 3544 | TRACE_LINEAR_SCAN(2, tty->print_cr("process_successor B%d: must re-visit because input state changed", block->block_id())); |
aoqi@0 | 3545 | add_to_work_list(block); |
aoqi@0 | 3546 | } |
aoqi@0 | 3547 | |
aoqi@0 | 3548 | } else { |
aoqi@0 | 3549 | // block was not processed before, so set initial input_state |
aoqi@0 | 3550 | TRACE_LINEAR_SCAN(2, tty->print_cr("process_successor B%d: initial visit", block->block_id())); |
aoqi@0 | 3551 | |
aoqi@0 | 3552 | set_state_for_block(block, copy(input_state)); |
aoqi@0 | 3553 | add_to_work_list(block); |
aoqi@0 | 3554 | } |
aoqi@0 | 3555 | } |
aoqi@0 | 3556 | |
aoqi@0 | 3557 | |
aoqi@0 | 3558 | IntervalList* RegisterVerifier::copy(IntervalList* input_state) { |
aoqi@0 | 3559 | IntervalList* copy_state = new IntervalList(input_state->length()); |
aoqi@0 | 3560 | copy_state->push_all(input_state); |
aoqi@0 | 3561 | return copy_state; |
aoqi@0 | 3562 | } |
aoqi@0 | 3563 | |
aoqi@0 | 3564 | void RegisterVerifier::state_put(IntervalList* input_state, int reg, Interval* interval) { |
aoqi@0 | 3565 | if (reg != LinearScan::any_reg && reg < state_size()) { |
aoqi@0 | 3566 | if (interval != NULL) { |
aoqi@0 | 3567 | TRACE_LINEAR_SCAN(4, tty->print_cr(" reg[%d] = %d", reg, interval->reg_num())); |
aoqi@0 | 3568 | } else if (input_state->at(reg) != NULL) { |
aoqi@0 | 3569 | TRACE_LINEAR_SCAN(4, tty->print_cr(" reg[%d] = NULL", reg)); |
aoqi@0 | 3570 | } |
aoqi@0 | 3571 | |
aoqi@0 | 3572 | input_state->at_put(reg, interval); |
aoqi@0 | 3573 | } |
aoqi@0 | 3574 | } |
aoqi@0 | 3575 | |
aoqi@0 | 3576 | bool RegisterVerifier::check_state(IntervalList* input_state, int reg, Interval* interval) { |
aoqi@0 | 3577 | if (reg != LinearScan::any_reg && reg < state_size()) { |
aoqi@0 | 3578 | if (input_state->at(reg) != interval) { |
aoqi@0 | 3579 | tty->print_cr("!! Error in register allocation: register %d does not contain interval %d", reg, interval->reg_num()); |
aoqi@0 | 3580 | return true; |
aoqi@0 | 3581 | } |
aoqi@0 | 3582 | } |
aoqi@0 | 3583 | return false; |
aoqi@0 | 3584 | } |
aoqi@0 | 3585 | |
aoqi@0 | 3586 | void RegisterVerifier::process_operations(LIR_List* ops, IntervalList* input_state) { |
aoqi@0 | 3587 | // visit all instructions of the block |
aoqi@0 | 3588 | LIR_OpVisitState visitor; |
aoqi@0 | 3589 | bool has_error = false; |
aoqi@0 | 3590 | |
aoqi@0 | 3591 | for (int i = 0; i < ops->length(); i++) { |
aoqi@0 | 3592 | LIR_Op* op = ops->at(i); |
aoqi@0 | 3593 | visitor.visit(op); |
aoqi@0 | 3594 | |
aoqi@0 | 3595 | TRACE_LINEAR_SCAN(4, op->print_on(tty)); |
aoqi@0 | 3596 | |
aoqi@0 | 3597 | // check if input operands are correct |
aoqi@0 | 3598 | int j; |
aoqi@0 | 3599 | int n = visitor.opr_count(LIR_OpVisitState::inputMode); |
aoqi@0 | 3600 | for (j = 0; j < n; j++) { |
aoqi@0 | 3601 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::inputMode, j); |
aoqi@0 | 3602 | if (opr->is_register() && LinearScan::is_processed_reg_num(reg_num(opr))) { |
aoqi@0 | 3603 | Interval* interval = interval_at(reg_num(opr)); |
aoqi@0 | 3604 | if (op->id() != -1) { |
aoqi@0 | 3605 | interval = interval->split_child_at_op_id(op->id(), LIR_OpVisitState::inputMode); |
aoqi@0 | 3606 | } |
aoqi@0 | 3607 | |
aoqi@0 | 3608 | has_error |= check_state(input_state, interval->assigned_reg(), interval->split_parent()); |
aoqi@0 | 3609 | has_error |= check_state(input_state, interval->assigned_regHi(), interval->split_parent()); |
aoqi@0 | 3610 | |
aoqi@0 | 3611 | // When an operand is marked with is_last_use, then the fpu stack allocator |
aoqi@0 | 3612 | // removes the register from the fpu stack -> the register contains no value |
aoqi@0 | 3613 | if (opr->is_last_use()) { |
aoqi@0 | 3614 | state_put(input_state, interval->assigned_reg(), NULL); |
aoqi@0 | 3615 | state_put(input_state, interval->assigned_regHi(), NULL); |
aoqi@0 | 3616 | } |
aoqi@0 | 3617 | } |
aoqi@0 | 3618 | } |
aoqi@0 | 3619 | |
aoqi@0 | 3620 | // invalidate all caller save registers at calls |
aoqi@0 | 3621 | if (visitor.has_call()) { |
aoqi@0 | 3622 | for (j = 0; j < FrameMap::nof_caller_save_cpu_regs(); j++) { |
aoqi@0 | 3623 | state_put(input_state, reg_num(FrameMap::caller_save_cpu_reg_at(j)), NULL); |
aoqi@0 | 3624 | } |
aoqi@0 | 3625 | for (j = 0; j < FrameMap::nof_caller_save_fpu_regs; j++) { |
aoqi@0 | 3626 | state_put(input_state, reg_num(FrameMap::caller_save_fpu_reg_at(j)), NULL); |
aoqi@0 | 3627 | } |
aoqi@0 | 3628 | |
aoqi@0 | 3629 | #ifdef X86 |
aoqi@0 | 3630 | for (j = 0; j < FrameMap::nof_caller_save_xmm_regs; j++) { |
aoqi@0 | 3631 | state_put(input_state, reg_num(FrameMap::caller_save_xmm_reg_at(j)), NULL); |
aoqi@0 | 3632 | } |
aoqi@0 | 3633 | #endif |
aoqi@0 | 3634 | } |
aoqi@0 | 3635 | |
aoqi@0 | 3636 | // process xhandler before output and temp operands |
aoqi@0 | 3637 | XHandlers* xhandlers = visitor.all_xhandler(); |
aoqi@0 | 3638 | n = xhandlers->length(); |
aoqi@0 | 3639 | for (int k = 0; k < n; k++) { |
aoqi@0 | 3640 | process_xhandler(xhandlers->handler_at(k), input_state); |
aoqi@0 | 3641 | } |
aoqi@0 | 3642 | |
aoqi@0 | 3643 | // set temp operands (some operations use temp operands also as output operands, so can't set them NULL) |
aoqi@0 | 3644 | n = visitor.opr_count(LIR_OpVisitState::tempMode); |
aoqi@0 | 3645 | for (j = 0; j < n; j++) { |
aoqi@0 | 3646 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::tempMode, j); |
aoqi@0 | 3647 | if (opr->is_register() && LinearScan::is_processed_reg_num(reg_num(opr))) { |
aoqi@0 | 3648 | Interval* interval = interval_at(reg_num(opr)); |
aoqi@0 | 3649 | if (op->id() != -1) { |
aoqi@0 | 3650 | interval = interval->split_child_at_op_id(op->id(), LIR_OpVisitState::tempMode); |
aoqi@0 | 3651 | } |
aoqi@0 | 3652 | |
aoqi@0 | 3653 | state_put(input_state, interval->assigned_reg(), interval->split_parent()); |
aoqi@0 | 3654 | state_put(input_state, interval->assigned_regHi(), interval->split_parent()); |
aoqi@0 | 3655 | } |
aoqi@0 | 3656 | } |
aoqi@0 | 3657 | |
aoqi@0 | 3658 | // set output operands |
aoqi@0 | 3659 | n = visitor.opr_count(LIR_OpVisitState::outputMode); |
aoqi@0 | 3660 | for (j = 0; j < n; j++) { |
aoqi@0 | 3661 | LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::outputMode, j); |
aoqi@0 | 3662 | if (opr->is_register() && LinearScan::is_processed_reg_num(reg_num(opr))) { |
aoqi@0 | 3663 | Interval* interval = interval_at(reg_num(opr)); |
aoqi@0 | 3664 | if (op->id() != -1) { |
aoqi@0 | 3665 | interval = interval->split_child_at_op_id(op->id(), LIR_OpVisitState::outputMode); |
aoqi@0 | 3666 | } |
aoqi@0 | 3667 | |
aoqi@0 | 3668 | state_put(input_state, interval->assigned_reg(), interval->split_parent()); |
aoqi@0 | 3669 | state_put(input_state, interval->assigned_regHi(), interval->split_parent()); |
aoqi@0 | 3670 | } |
aoqi@0 | 3671 | } |
aoqi@0 | 3672 | } |
aoqi@0 | 3673 | assert(has_error == false, "Error in register allocation"); |
aoqi@0 | 3674 | } |
aoqi@0 | 3675 | |
aoqi@0 | 3676 | #endif // ASSERT |
aoqi@0 | 3677 | |
aoqi@0 | 3678 | |
aoqi@0 | 3679 | |
aoqi@0 | 3680 | // **** Implementation of MoveResolver ****************************** |
aoqi@0 | 3681 | |
aoqi@0 | 3682 | MoveResolver::MoveResolver(LinearScan* allocator) : |
aoqi@0 | 3683 | _allocator(allocator), |
aoqi@0 | 3684 | _multiple_reads_allowed(false), |
aoqi@0 | 3685 | _mapping_from(8), |
aoqi@0 | 3686 | _mapping_from_opr(8), |
aoqi@0 | 3687 | _mapping_to(8), |
aoqi@0 | 3688 | _insert_list(NULL), |
aoqi@0 | 3689 | _insert_idx(-1), |
aoqi@0 | 3690 | _insertion_buffer() |
aoqi@0 | 3691 | { |
aoqi@0 | 3692 | for (int i = 0; i < LinearScan::nof_regs; i++) { |
aoqi@0 | 3693 | _register_blocked[i] = 0; |
aoqi@0 | 3694 | } |
aoqi@0 | 3695 | DEBUG_ONLY(check_empty()); |
aoqi@0 | 3696 | } |
aoqi@0 | 3697 | |
aoqi@0 | 3698 | |
aoqi@0 | 3699 | #ifdef ASSERT |
aoqi@0 | 3700 | |
aoqi@0 | 3701 | void MoveResolver::check_empty() { |
aoqi@0 | 3702 | assert(_mapping_from.length() == 0 && _mapping_from_opr.length() == 0 && _mapping_to.length() == 0, "list must be empty before and after processing"); |
aoqi@0 | 3703 | for (int i = 0; i < LinearScan::nof_regs; i++) { |
aoqi@0 | 3704 | assert(register_blocked(i) == 0, "register map must be empty before and after processing"); |
aoqi@0 | 3705 | } |
aoqi@0 | 3706 | assert(_multiple_reads_allowed == false, "must have default value"); |
aoqi@0 | 3707 | } |
aoqi@0 | 3708 | |
aoqi@0 | 3709 | void MoveResolver::verify_before_resolve() { |
aoqi@0 | 3710 | assert(_mapping_from.length() == _mapping_from_opr.length(), "length must be equal"); |
aoqi@0 | 3711 | assert(_mapping_from.length() == _mapping_to.length(), "length must be equal"); |
aoqi@0 | 3712 | assert(_insert_list != NULL && _insert_idx != -1, "insert position not set"); |
aoqi@0 | 3713 | |
aoqi@0 | 3714 | int i, j; |
aoqi@0 | 3715 | if (!_multiple_reads_allowed) { |
aoqi@0 | 3716 | for (i = 0; i < _mapping_from.length(); i++) { |
aoqi@0 | 3717 | for (j = i + 1; j < _mapping_from.length(); j++) { |
aoqi@0 | 3718 | assert(_mapping_from.at(i) == NULL || _mapping_from.at(i) != _mapping_from.at(j), "cannot read from same interval twice"); |
aoqi@0 | 3719 | } |
aoqi@0 | 3720 | } |
aoqi@0 | 3721 | } |
aoqi@0 | 3722 | |
aoqi@0 | 3723 | for (i = 0; i < _mapping_to.length(); i++) { |
aoqi@0 | 3724 | for (j = i + 1; j < _mapping_to.length(); j++) { |
aoqi@0 | 3725 | assert(_mapping_to.at(i) != _mapping_to.at(j), "cannot write to same interval twice"); |
aoqi@0 | 3726 | } |
aoqi@0 | 3727 | } |
aoqi@0 | 3728 | |
aoqi@0 | 3729 | |
aoqi@0 | 3730 | BitMap used_regs(LinearScan::nof_regs + allocator()->frame_map()->argcount() + allocator()->max_spills()); |
aoqi@0 | 3731 | used_regs.clear(); |
aoqi@0 | 3732 | if (!_multiple_reads_allowed) { |
aoqi@0 | 3733 | for (i = 0; i < _mapping_from.length(); i++) { |
aoqi@0 | 3734 | Interval* it = _mapping_from.at(i); |
aoqi@0 | 3735 | if (it != NULL) { |
aoqi@0 | 3736 | assert(!used_regs.at(it->assigned_reg()), "cannot read from same register twice"); |
aoqi@0 | 3737 | used_regs.set_bit(it->assigned_reg()); |
aoqi@0 | 3738 | |
aoqi@0 | 3739 | if (it->assigned_regHi() != LinearScan::any_reg) { |
aoqi@0 | 3740 | assert(!used_regs.at(it->assigned_regHi()), "cannot read from same register twice"); |
aoqi@0 | 3741 | used_regs.set_bit(it->assigned_regHi()); |
aoqi@0 | 3742 | } |
aoqi@0 | 3743 | } |
aoqi@0 | 3744 | } |
aoqi@0 | 3745 | } |
aoqi@0 | 3746 | |
aoqi@0 | 3747 | used_regs.clear(); |
aoqi@0 | 3748 | for (i = 0; i < _mapping_to.length(); i++) { |
aoqi@0 | 3749 | Interval* it = _mapping_to.at(i); |
aoqi@0 | 3750 | assert(!used_regs.at(it->assigned_reg()), "cannot write to same register twice"); |
aoqi@0 | 3751 | used_regs.set_bit(it->assigned_reg()); |
aoqi@0 | 3752 | |
aoqi@0 | 3753 | if (it->assigned_regHi() != LinearScan::any_reg) { |
aoqi@0 | 3754 | assert(!used_regs.at(it->assigned_regHi()), "cannot write to same register twice"); |
aoqi@0 | 3755 | used_regs.set_bit(it->assigned_regHi()); |
aoqi@0 | 3756 | } |
aoqi@0 | 3757 | } |
aoqi@0 | 3758 | |
aoqi@0 | 3759 | used_regs.clear(); |
aoqi@0 | 3760 | for (i = 0; i < _mapping_from.length(); i++) { |
aoqi@0 | 3761 | Interval* it = _mapping_from.at(i); |
aoqi@0 | 3762 | if (it != NULL && it->assigned_reg() >= LinearScan::nof_regs) { |
aoqi@0 | 3763 | used_regs.set_bit(it->assigned_reg()); |
aoqi@0 | 3764 | } |
aoqi@0 | 3765 | } |
aoqi@0 | 3766 | for (i = 0; i < _mapping_to.length(); i++) { |
aoqi@0 | 3767 | Interval* it = _mapping_to.at(i); |
aoqi@0 | 3768 | assert(!used_regs.at(it->assigned_reg()) || it->assigned_reg() == _mapping_from.at(i)->assigned_reg(), "stack slots used in _mapping_from must be disjoint to _mapping_to"); |
aoqi@0 | 3769 | } |
aoqi@0 | 3770 | } |
aoqi@0 | 3771 | |
aoqi@0 | 3772 | #endif // ASSERT |
aoqi@0 | 3773 | |
aoqi@0 | 3774 | |
aoqi@0 | 3775 | // mark assigned_reg and assigned_regHi of the interval as blocked |
aoqi@0 | 3776 | void MoveResolver::block_registers(Interval* it) { |
aoqi@0 | 3777 | int reg = it->assigned_reg(); |
aoqi@0 | 3778 | if (reg < LinearScan::nof_regs) { |
aoqi@0 | 3779 | assert(_multiple_reads_allowed || register_blocked(reg) == 0, "register already marked as used"); |
aoqi@0 | 3780 | set_register_blocked(reg, 1); |
aoqi@0 | 3781 | } |
aoqi@0 | 3782 | reg = it->assigned_regHi(); |
aoqi@0 | 3783 | if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) { |
aoqi@0 | 3784 | assert(_multiple_reads_allowed || register_blocked(reg) == 0, "register already marked as used"); |
aoqi@0 | 3785 | set_register_blocked(reg, 1); |
aoqi@0 | 3786 | } |
aoqi@0 | 3787 | } |
aoqi@0 | 3788 | |
aoqi@0 | 3789 | // mark assigned_reg and assigned_regHi of the interval as unblocked |
aoqi@0 | 3790 | void MoveResolver::unblock_registers(Interval* it) { |
aoqi@0 | 3791 | int reg = it->assigned_reg(); |
aoqi@0 | 3792 | if (reg < LinearScan::nof_regs) { |
aoqi@0 | 3793 | assert(register_blocked(reg) > 0, "register already marked as unused"); |
aoqi@0 | 3794 | set_register_blocked(reg, -1); |
aoqi@0 | 3795 | } |
aoqi@0 | 3796 | reg = it->assigned_regHi(); |
aoqi@0 | 3797 | if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) { |
aoqi@0 | 3798 | assert(register_blocked(reg) > 0, "register already marked as unused"); |
aoqi@0 | 3799 | set_register_blocked(reg, -1); |
aoqi@0 | 3800 | } |
aoqi@0 | 3801 | } |
aoqi@0 | 3802 | |
aoqi@0 | 3803 | // check if assigned_reg and assigned_regHi of the to-interval are not blocked (or only blocked by from) |
aoqi@0 | 3804 | bool MoveResolver::save_to_process_move(Interval* from, Interval* to) { |
aoqi@0 | 3805 | int from_reg = -1; |
aoqi@0 | 3806 | int from_regHi = -1; |
aoqi@0 | 3807 | if (from != NULL) { |
aoqi@0 | 3808 | from_reg = from->assigned_reg(); |
aoqi@0 | 3809 | from_regHi = from->assigned_regHi(); |
aoqi@0 | 3810 | } |
aoqi@0 | 3811 | |
aoqi@0 | 3812 | int reg = to->assigned_reg(); |
aoqi@0 | 3813 | if (reg < LinearScan::nof_regs) { |
aoqi@0 | 3814 | if (register_blocked(reg) > 1 || (register_blocked(reg) == 1 && reg != from_reg && reg != from_regHi)) { |
aoqi@0 | 3815 | return false; |
aoqi@0 | 3816 | } |
aoqi@0 | 3817 | } |
aoqi@0 | 3818 | reg = to->assigned_regHi(); |
aoqi@0 | 3819 | if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) { |
aoqi@0 | 3820 | if (register_blocked(reg) > 1 || (register_blocked(reg) == 1 && reg != from_reg && reg != from_regHi)) { |
aoqi@0 | 3821 | return false; |
aoqi@0 | 3822 | } |
aoqi@0 | 3823 | } |
aoqi@0 | 3824 | |
aoqi@0 | 3825 | return true; |
aoqi@0 | 3826 | } |
aoqi@0 | 3827 | |
aoqi@0 | 3828 | |
aoqi@0 | 3829 | void MoveResolver::create_insertion_buffer(LIR_List* list) { |
aoqi@0 | 3830 | assert(!_insertion_buffer.initialized(), "overwriting existing buffer"); |
aoqi@0 | 3831 | _insertion_buffer.init(list); |
aoqi@0 | 3832 | } |
aoqi@0 | 3833 | |
aoqi@0 | 3834 | void MoveResolver::append_insertion_buffer() { |
aoqi@0 | 3835 | if (_insertion_buffer.initialized()) { |
aoqi@0 | 3836 | _insertion_buffer.lir_list()->append(&_insertion_buffer); |
aoqi@0 | 3837 | } |
aoqi@0 | 3838 | assert(!_insertion_buffer.initialized(), "must be uninitialized now"); |
aoqi@0 | 3839 | |
aoqi@0 | 3840 | _insert_list = NULL; |
aoqi@0 | 3841 | _insert_idx = -1; |
aoqi@0 | 3842 | } |
aoqi@0 | 3843 | |
aoqi@0 | 3844 | void MoveResolver::insert_move(Interval* from_interval, Interval* to_interval) { |
aoqi@0 | 3845 | assert(from_interval->reg_num() != to_interval->reg_num(), "from and to interval equal"); |
aoqi@0 | 3846 | assert(from_interval->type() == to_interval->type(), "move between different types"); |
aoqi@0 | 3847 | assert(_insert_list != NULL && _insert_idx != -1, "must setup insert position first"); |
aoqi@0 | 3848 | assert(_insertion_buffer.lir_list() == _insert_list, "wrong insertion buffer"); |
aoqi@0 | 3849 | |
aoqi@0 | 3850 | LIR_Opr from_opr = LIR_OprFact::virtual_register(from_interval->reg_num(), from_interval->type()); |
aoqi@0 | 3851 | LIR_Opr to_opr = LIR_OprFact::virtual_register(to_interval->reg_num(), to_interval->type()); |
aoqi@0 | 3852 | |
aoqi@0 | 3853 | if (!_multiple_reads_allowed) { |
aoqi@0 | 3854 | // the last_use flag is an optimization for FPU stack allocation. When the same |
aoqi@0 | 3855 | // input interval is used in more than one move, then it is too difficult to determine |
aoqi@0 | 3856 | // if this move is really the last use. |
aoqi@0 | 3857 | from_opr = from_opr->make_last_use(); |
aoqi@0 | 3858 | } |
aoqi@0 | 3859 | _insertion_buffer.move(_insert_idx, from_opr, to_opr); |
aoqi@0 | 3860 | |
aoqi@0 | 3861 | TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: inserted move from register %d (%d, %d) to %d (%d, %d)", from_interval->reg_num(), from_interval->assigned_reg(), from_interval->assigned_regHi(), to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi())); |
aoqi@0 | 3862 | } |
aoqi@0 | 3863 | |
aoqi@0 | 3864 | void MoveResolver::insert_move(LIR_Opr from_opr, Interval* to_interval) { |
aoqi@0 | 3865 | assert(from_opr->type() == to_interval->type(), "move between different types"); |
aoqi@0 | 3866 | assert(_insert_list != NULL && _insert_idx != -1, "must setup insert position first"); |
aoqi@0 | 3867 | assert(_insertion_buffer.lir_list() == _insert_list, "wrong insertion buffer"); |
aoqi@0 | 3868 | |
aoqi@0 | 3869 | LIR_Opr to_opr = LIR_OprFact::virtual_register(to_interval->reg_num(), to_interval->type()); |
aoqi@0 | 3870 | _insertion_buffer.move(_insert_idx, from_opr, to_opr); |
aoqi@0 | 3871 | |
aoqi@0 | 3872 | TRACE_LINEAR_SCAN(4, tty->print("MoveResolver: inserted move from constant "); from_opr->print(); tty->print_cr(" to %d (%d, %d)", to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi())); |
aoqi@0 | 3873 | } |
aoqi@0 | 3874 | |
aoqi@0 | 3875 | |
aoqi@0 | 3876 | void MoveResolver::resolve_mappings() { |
aoqi@0 | 3877 | TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: resolving mappings for Block B%d, index %d", _insert_list->block() != NULL ? _insert_list->block()->block_id() : -1, _insert_idx)); |
aoqi@0 | 3878 | DEBUG_ONLY(verify_before_resolve()); |
aoqi@0 | 3879 | |
aoqi@0 | 3880 | // Block all registers that are used as input operands of a move. |
aoqi@0 | 3881 | // When a register is blocked, no move to this register is emitted. |
aoqi@0 | 3882 | // This is necessary for detecting cycles in moves. |
aoqi@0 | 3883 | int i; |
aoqi@0 | 3884 | for (i = _mapping_from.length() - 1; i >= 0; i--) { |
aoqi@0 | 3885 | Interval* from_interval = _mapping_from.at(i); |
aoqi@0 | 3886 | if (from_interval != NULL) { |
aoqi@0 | 3887 | block_registers(from_interval); |
aoqi@0 | 3888 | } |
aoqi@0 | 3889 | } |
aoqi@0 | 3890 | |
aoqi@0 | 3891 | int spill_candidate = -1; |
aoqi@0 | 3892 | while (_mapping_from.length() > 0) { |
aoqi@0 | 3893 | bool processed_interval = false; |
aoqi@0 | 3894 | |
aoqi@0 | 3895 | for (i = _mapping_from.length() - 1; i >= 0; i--) { |
aoqi@0 | 3896 | Interval* from_interval = _mapping_from.at(i); |
aoqi@0 | 3897 | Interval* to_interval = _mapping_to.at(i); |
aoqi@0 | 3898 | |
aoqi@0 | 3899 | if (save_to_process_move(from_interval, to_interval)) { |
aoqi@0 | 3900 | // this inverval can be processed because target is free |
aoqi@0 | 3901 | if (from_interval != NULL) { |
aoqi@0 | 3902 | insert_move(from_interval, to_interval); |
aoqi@0 | 3903 | unblock_registers(from_interval); |
aoqi@0 | 3904 | } else { |
aoqi@0 | 3905 | insert_move(_mapping_from_opr.at(i), to_interval); |
aoqi@0 | 3906 | } |
aoqi@0 | 3907 | _mapping_from.remove_at(i); |
aoqi@0 | 3908 | _mapping_from_opr.remove_at(i); |
aoqi@0 | 3909 | _mapping_to.remove_at(i); |
aoqi@0 | 3910 | |
aoqi@0 | 3911 | processed_interval = true; |
aoqi@0 | 3912 | } else if (from_interval != NULL && from_interval->assigned_reg() < LinearScan::nof_regs) { |
aoqi@0 | 3913 | // this interval cannot be processed now because target is not free |
aoqi@0 | 3914 | // it starts in a register, so it is a possible candidate for spilling |
aoqi@0 | 3915 | spill_candidate = i; |
aoqi@0 | 3916 | } |
aoqi@0 | 3917 | } |
aoqi@0 | 3918 | |
aoqi@0 | 3919 | if (!processed_interval) { |
aoqi@0 | 3920 | // no move could be processed because there is a cycle in the move list |
aoqi@0 | 3921 | // (e.g. r1 -> r2, r2 -> r1), so one interval must be spilled to memory |
aoqi@0 | 3922 | assert(spill_candidate != -1, "no interval in register for spilling found"); |
aoqi@0 | 3923 | |
aoqi@0 | 3924 | // create a new spill interval and assign a stack slot to it |
aoqi@0 | 3925 | Interval* from_interval = _mapping_from.at(spill_candidate); |
aoqi@0 | 3926 | Interval* spill_interval = new Interval(-1); |
aoqi@0 | 3927 | spill_interval->set_type(from_interval->type()); |
aoqi@0 | 3928 | |
aoqi@0 | 3929 | // add a dummy range because real position is difficult to calculate |
aoqi@0 | 3930 | // Note: this range is a special case when the integrity of the allocation is checked |
aoqi@0 | 3931 | spill_interval->add_range(1, 2); |
aoqi@0 | 3932 | |
aoqi@0 | 3933 | // do not allocate a new spill slot for temporary interval, but |
aoqi@0 | 3934 | // use spill slot assigned to from_interval. Otherwise moves from |
aoqi@0 | 3935 | // one stack slot to another can happen (not allowed by LIR_Assembler |
aoqi@0 | 3936 | int spill_slot = from_interval->canonical_spill_slot(); |
aoqi@0 | 3937 | if (spill_slot < 0) { |
aoqi@0 | 3938 | spill_slot = allocator()->allocate_spill_slot(type2spill_size[spill_interval->type()] == 2); |
aoqi@0 | 3939 | from_interval->set_canonical_spill_slot(spill_slot); |
aoqi@0 | 3940 | } |
aoqi@0 | 3941 | spill_interval->assign_reg(spill_slot); |
aoqi@0 | 3942 | allocator()->append_interval(spill_interval); |
aoqi@0 | 3943 | |
aoqi@0 | 3944 | TRACE_LINEAR_SCAN(4, tty->print_cr("created new Interval %d for spilling", spill_interval->reg_num())); |
aoqi@0 | 3945 | |
aoqi@0 | 3946 | // insert a move from register to stack and update the mapping |
aoqi@0 | 3947 | insert_move(from_interval, spill_interval); |
aoqi@0 | 3948 | _mapping_from.at_put(spill_candidate, spill_interval); |
aoqi@0 | 3949 | unblock_registers(from_interval); |
aoqi@0 | 3950 | } |
aoqi@0 | 3951 | } |
aoqi@0 | 3952 | |
aoqi@0 | 3953 | // reset to default value |
aoqi@0 | 3954 | _multiple_reads_allowed = false; |
aoqi@0 | 3955 | |
aoqi@0 | 3956 | // check that all intervals have been processed |
aoqi@0 | 3957 | DEBUG_ONLY(check_empty()); |
aoqi@0 | 3958 | } |
aoqi@0 | 3959 | |
aoqi@0 | 3960 | |
aoqi@0 | 3961 | void MoveResolver::set_insert_position(LIR_List* insert_list, int insert_idx) { |
aoqi@0 | 3962 | TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: setting insert position to Block B%d, index %d", insert_list->block() != NULL ? insert_list->block()->block_id() : -1, insert_idx)); |
aoqi@0 | 3963 | assert(_insert_list == NULL && _insert_idx == -1, "use move_insert_position instead of set_insert_position when data already set"); |
aoqi@0 | 3964 | |
aoqi@0 | 3965 | create_insertion_buffer(insert_list); |
aoqi@0 | 3966 | _insert_list = insert_list; |
aoqi@0 | 3967 | _insert_idx = insert_idx; |
aoqi@0 | 3968 | } |
aoqi@0 | 3969 | |
aoqi@0 | 3970 | void MoveResolver::move_insert_position(LIR_List* insert_list, int insert_idx) { |
aoqi@0 | 3971 | TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: moving insert position to Block B%d, index %d", insert_list->block() != NULL ? insert_list->block()->block_id() : -1, insert_idx)); |
aoqi@0 | 3972 | |
aoqi@0 | 3973 | if (_insert_list != NULL && (insert_list != _insert_list || insert_idx != _insert_idx)) { |
aoqi@0 | 3974 | // insert position changed -> resolve current mappings |
aoqi@0 | 3975 | resolve_mappings(); |
aoqi@0 | 3976 | } |
aoqi@0 | 3977 | |
aoqi@0 | 3978 | if (insert_list != _insert_list) { |
aoqi@0 | 3979 | // block changed -> append insertion_buffer because it is |
aoqi@0 | 3980 | // bound to a specific block and create a new insertion_buffer |
aoqi@0 | 3981 | append_insertion_buffer(); |
aoqi@0 | 3982 | create_insertion_buffer(insert_list); |
aoqi@0 | 3983 | } |
aoqi@0 | 3984 | |
aoqi@0 | 3985 | _insert_list = insert_list; |
aoqi@0 | 3986 | _insert_idx = insert_idx; |
aoqi@0 | 3987 | } |
aoqi@0 | 3988 | |
aoqi@0 | 3989 | void MoveResolver::add_mapping(Interval* from_interval, Interval* to_interval) { |
aoqi@0 | 3990 | TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: adding mapping from %d (%d, %d) to %d (%d, %d)", from_interval->reg_num(), from_interval->assigned_reg(), from_interval->assigned_regHi(), to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi())); |
aoqi@0 | 3991 | |
aoqi@0 | 3992 | _mapping_from.append(from_interval); |
aoqi@0 | 3993 | _mapping_from_opr.append(LIR_OprFact::illegalOpr); |
aoqi@0 | 3994 | _mapping_to.append(to_interval); |
aoqi@0 | 3995 | } |
aoqi@0 | 3996 | |
aoqi@0 | 3997 | |
aoqi@0 | 3998 | void MoveResolver::add_mapping(LIR_Opr from_opr, Interval* to_interval) { |
aoqi@0 | 3999 | TRACE_LINEAR_SCAN(4, tty->print("MoveResolver: adding mapping from "); from_opr->print(); tty->print_cr(" to %d (%d, %d)", to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi())); |
aoqi@0 | 4000 | assert(from_opr->is_constant(), "only for constants"); |
aoqi@0 | 4001 | |
aoqi@0 | 4002 | _mapping_from.append(NULL); |
aoqi@0 | 4003 | _mapping_from_opr.append(from_opr); |
aoqi@0 | 4004 | _mapping_to.append(to_interval); |
aoqi@0 | 4005 | } |
aoqi@0 | 4006 | |
aoqi@0 | 4007 | void MoveResolver::resolve_and_append_moves() { |
aoqi@0 | 4008 | if (has_mappings()) { |
aoqi@0 | 4009 | resolve_mappings(); |
aoqi@0 | 4010 | } |
aoqi@0 | 4011 | append_insertion_buffer(); |
aoqi@0 | 4012 | } |
aoqi@0 | 4013 | |
aoqi@0 | 4014 | |
aoqi@0 | 4015 | |
aoqi@0 | 4016 | // **** Implementation of Range ************************************* |
aoqi@0 | 4017 | |
aoqi@0 | 4018 | Range::Range(int from, int to, Range* next) : |
aoqi@0 | 4019 | _from(from), |
aoqi@0 | 4020 | _to(to), |
aoqi@0 | 4021 | _next(next) |
aoqi@0 | 4022 | { |
aoqi@0 | 4023 | } |
aoqi@0 | 4024 | |
aoqi@0 | 4025 | // initialize sentinel |
aoqi@0 | 4026 | Range* Range::_end = NULL; |
aoqi@0 | 4027 | void Range::initialize(Arena* arena) { |
aoqi@0 | 4028 | _end = new (arena) Range(max_jint, max_jint, NULL); |
aoqi@0 | 4029 | } |
aoqi@0 | 4030 | |
aoqi@0 | 4031 | int Range::intersects_at(Range* r2) const { |
aoqi@0 | 4032 | const Range* r1 = this; |
aoqi@0 | 4033 | |
aoqi@0 | 4034 | assert(r1 != NULL && r2 != NULL, "null ranges not allowed"); |
aoqi@0 | 4035 | assert(r1 != _end && r2 != _end, "empty ranges not allowed"); |
aoqi@0 | 4036 | |
aoqi@0 | 4037 | do { |
aoqi@0 | 4038 | if (r1->from() < r2->from()) { |
aoqi@0 | 4039 | if (r1->to() <= r2->from()) { |
aoqi@0 | 4040 | r1 = r1->next(); if (r1 == _end) return -1; |
aoqi@0 | 4041 | } else { |
aoqi@0 | 4042 | return r2->from(); |
aoqi@0 | 4043 | } |
aoqi@0 | 4044 | } else if (r2->from() < r1->from()) { |
aoqi@0 | 4045 | if (r2->to() <= r1->from()) { |
aoqi@0 | 4046 | r2 = r2->next(); if (r2 == _end) return -1; |
aoqi@0 | 4047 | } else { |
aoqi@0 | 4048 | return r1->from(); |
aoqi@0 | 4049 | } |
aoqi@0 | 4050 | } else { // r1->from() == r2->from() |
aoqi@0 | 4051 | if (r1->from() == r1->to()) { |
aoqi@0 | 4052 | r1 = r1->next(); if (r1 == _end) return -1; |
aoqi@0 | 4053 | } else if (r2->from() == r2->to()) { |
aoqi@0 | 4054 | r2 = r2->next(); if (r2 == _end) return -1; |
aoqi@0 | 4055 | } else { |
aoqi@0 | 4056 | return r1->from(); |
aoqi@0 | 4057 | } |
aoqi@0 | 4058 | } |
aoqi@0 | 4059 | } while (true); |
aoqi@0 | 4060 | } |
aoqi@0 | 4061 | |
aoqi@0 | 4062 | #ifndef PRODUCT |
aoqi@0 | 4063 | void Range::print(outputStream* out) const { |
aoqi@0 | 4064 | out->print("[%d, %d[ ", _from, _to); |
aoqi@0 | 4065 | } |
aoqi@0 | 4066 | #endif |
aoqi@0 | 4067 | |
aoqi@0 | 4068 | |
aoqi@0 | 4069 | |
aoqi@0 | 4070 | // **** Implementation of Interval ********************************** |
aoqi@0 | 4071 | |
aoqi@0 | 4072 | // initialize sentinel |
aoqi@0 | 4073 | Interval* Interval::_end = NULL; |
aoqi@0 | 4074 | void Interval::initialize(Arena* arena) { |
aoqi@0 | 4075 | Range::initialize(arena); |
aoqi@0 | 4076 | _end = new (arena) Interval(-1); |
aoqi@0 | 4077 | } |
aoqi@0 | 4078 | |
aoqi@0 | 4079 | Interval::Interval(int reg_num) : |
aoqi@0 | 4080 | _reg_num(reg_num), |
aoqi@0 | 4081 | _type(T_ILLEGAL), |
aoqi@0 | 4082 | _first(Range::end()), |
aoqi@0 | 4083 | _use_pos_and_kinds(12), |
aoqi@0 | 4084 | _current(Range::end()), |
aoqi@0 | 4085 | _next(_end), |
aoqi@0 | 4086 | _state(invalidState), |
aoqi@0 | 4087 | _assigned_reg(LinearScan::any_reg), |
aoqi@0 | 4088 | _assigned_regHi(LinearScan::any_reg), |
aoqi@0 | 4089 | _cached_to(-1), |
aoqi@0 | 4090 | _cached_opr(LIR_OprFact::illegalOpr), |
aoqi@0 | 4091 | _cached_vm_reg(VMRegImpl::Bad()), |
aoqi@0 | 4092 | _split_children(0), |
aoqi@0 | 4093 | _canonical_spill_slot(-1), |
aoqi@0 | 4094 | _insert_move_when_activated(false), |
aoqi@0 | 4095 | _register_hint(NULL), |
aoqi@0 | 4096 | _spill_state(noDefinitionFound), |
aoqi@0 | 4097 | _spill_definition_pos(-1) |
aoqi@0 | 4098 | { |
aoqi@0 | 4099 | _split_parent = this; |
aoqi@0 | 4100 | _current_split_child = this; |
aoqi@0 | 4101 | } |
aoqi@0 | 4102 | |
aoqi@0 | 4103 | int Interval::calc_to() { |
aoqi@0 | 4104 | assert(_first != Range::end(), "interval has no range"); |
aoqi@0 | 4105 | |
aoqi@0 | 4106 | Range* r = _first; |
aoqi@0 | 4107 | while (r->next() != Range::end()) { |
aoqi@0 | 4108 | r = r->next(); |
aoqi@0 | 4109 | } |
aoqi@0 | 4110 | return r->to(); |
aoqi@0 | 4111 | } |
aoqi@0 | 4112 | |
aoqi@0 | 4113 | |
aoqi@0 | 4114 | #ifdef ASSERT |
aoqi@0 | 4115 | // consistency check of split-children |
aoqi@0 | 4116 | void Interval::check_split_children() { |
aoqi@0 | 4117 | if (_split_children.length() > 0) { |
aoqi@0 | 4118 | assert(is_split_parent(), "only split parents can have children"); |
aoqi@0 | 4119 | |
aoqi@0 | 4120 | for (int i = 0; i < _split_children.length(); i++) { |
aoqi@0 | 4121 | Interval* i1 = _split_children.at(i); |
aoqi@0 | 4122 | |
aoqi@0 | 4123 | assert(i1->split_parent() == this, "not a split child of this interval"); |
aoqi@0 | 4124 | assert(i1->type() == type(), "must be equal for all split children"); |
aoqi@0 | 4125 | assert(i1->canonical_spill_slot() == canonical_spill_slot(), "must be equal for all split children"); |
aoqi@0 | 4126 | |
aoqi@0 | 4127 | for (int j = i + 1; j < _split_children.length(); j++) { |
aoqi@0 | 4128 | Interval* i2 = _split_children.at(j); |
aoqi@0 | 4129 | |
aoqi@0 | 4130 | assert(i1->reg_num() != i2->reg_num(), "same register number"); |
aoqi@0 | 4131 | |
aoqi@0 | 4132 | if (i1->from() < i2->from()) { |
aoqi@0 | 4133 | assert(i1->to() <= i2->from() && i1->to() < i2->to(), "intervals overlapping"); |
aoqi@0 | 4134 | } else { |
aoqi@0 | 4135 | assert(i2->from() < i1->from(), "intervals start at same op_id"); |
aoqi@0 | 4136 | assert(i2->to() <= i1->from() && i2->to() < i1->to(), "intervals overlapping"); |
aoqi@0 | 4137 | } |
aoqi@0 | 4138 | } |
aoqi@0 | 4139 | } |
aoqi@0 | 4140 | } |
aoqi@0 | 4141 | } |
aoqi@0 | 4142 | #endif // ASSERT |
aoqi@0 | 4143 | |
aoqi@0 | 4144 | Interval* Interval::register_hint(bool search_split_child) const { |
aoqi@0 | 4145 | if (!search_split_child) { |
aoqi@0 | 4146 | return _register_hint; |
aoqi@0 | 4147 | } |
aoqi@0 | 4148 | |
aoqi@0 | 4149 | if (_register_hint != NULL) { |
aoqi@0 | 4150 | assert(_register_hint->is_split_parent(), "ony split parents are valid hint registers"); |
aoqi@0 | 4151 | |
aoqi@0 | 4152 | if (_register_hint->assigned_reg() >= 0 && _register_hint->assigned_reg() < LinearScan::nof_regs) { |
aoqi@0 | 4153 | return _register_hint; |
aoqi@0 | 4154 | |
aoqi@0 | 4155 | } else if (_register_hint->_split_children.length() > 0) { |
aoqi@0 | 4156 | // search the first split child that has a register assigned |
aoqi@0 | 4157 | int len = _register_hint->_split_children.length(); |
aoqi@0 | 4158 | for (int i = 0; i < len; i++) { |
aoqi@0 | 4159 | Interval* cur = _register_hint->_split_children.at(i); |
aoqi@0 | 4160 | |
aoqi@0 | 4161 | if (cur->assigned_reg() >= 0 && cur->assigned_reg() < LinearScan::nof_regs) { |
aoqi@0 | 4162 | return cur; |
aoqi@0 | 4163 | } |
aoqi@0 | 4164 | } |
aoqi@0 | 4165 | } |
aoqi@0 | 4166 | } |
aoqi@0 | 4167 | |
aoqi@0 | 4168 | // no hint interval found that has a register assigned |
aoqi@0 | 4169 | return NULL; |
aoqi@0 | 4170 | } |
aoqi@0 | 4171 | |
aoqi@0 | 4172 | |
aoqi@0 | 4173 | Interval* Interval::split_child_at_op_id(int op_id, LIR_OpVisitState::OprMode mode) { |
aoqi@0 | 4174 | assert(is_split_parent(), "can only be called for split parents"); |
aoqi@0 | 4175 | assert(op_id >= 0, "invalid op_id (method can not be called for spill moves)"); |
aoqi@0 | 4176 | |
aoqi@0 | 4177 | Interval* result; |
aoqi@0 | 4178 | if (_split_children.length() == 0) { |
aoqi@0 | 4179 | result = this; |
aoqi@0 | 4180 | } else { |
aoqi@0 | 4181 | result = NULL; |
aoqi@0 | 4182 | int len = _split_children.length(); |
aoqi@0 | 4183 | |
aoqi@0 | 4184 | // in outputMode, the end of the interval (op_id == cur->to()) is not valid |
aoqi@0 | 4185 | int to_offset = (mode == LIR_OpVisitState::outputMode ? 0 : 1); |
aoqi@0 | 4186 | |
aoqi@0 | 4187 | int i; |
aoqi@0 | 4188 | for (i = 0; i < len; i++) { |
aoqi@0 | 4189 | Interval* cur = _split_children.at(i); |
aoqi@0 | 4190 | if (cur->from() <= op_id && op_id < cur->to() + to_offset) { |
aoqi@0 | 4191 | if (i > 0) { |
aoqi@0 | 4192 | // exchange current split child to start of list (faster access for next call) |
aoqi@0 | 4193 | _split_children.at_put(i, _split_children.at(0)); |
aoqi@0 | 4194 | _split_children.at_put(0, cur); |
aoqi@0 | 4195 | } |
aoqi@0 | 4196 | |
aoqi@0 | 4197 | // interval found |
aoqi@0 | 4198 | result = cur; |
aoqi@0 | 4199 | break; |
aoqi@0 | 4200 | } |
aoqi@0 | 4201 | } |
aoqi@0 | 4202 | |
aoqi@0 | 4203 | #ifdef ASSERT |
aoqi@0 | 4204 | for (i = 0; i < len; i++) { |
aoqi@0 | 4205 | Interval* tmp = _split_children.at(i); |
aoqi@0 | 4206 | if (tmp != result && tmp->from() <= op_id && op_id < tmp->to() + to_offset) { |
aoqi@0 | 4207 | tty->print_cr("two valid result intervals found for op_id %d: %d and %d", op_id, result->reg_num(), tmp->reg_num()); |
aoqi@0 | 4208 | result->print(); |
aoqi@0 | 4209 | tmp->print(); |
aoqi@0 | 4210 | assert(false, "two valid result intervals found"); |
aoqi@0 | 4211 | } |
aoqi@0 | 4212 | } |
aoqi@0 | 4213 | #endif |
aoqi@0 | 4214 | } |
aoqi@0 | 4215 | |
aoqi@0 | 4216 | assert(result != NULL, "no matching interval found"); |
aoqi@0 | 4217 | assert(result->covers(op_id, mode), "op_id not covered by interval"); |
aoqi@0 | 4218 | |
aoqi@0 | 4219 | return result; |
aoqi@0 | 4220 | } |
aoqi@0 | 4221 | |
aoqi@0 | 4222 | |
aoqi@0 | 4223 | // returns the last split child that ends before the given op_id |
aoqi@0 | 4224 | Interval* Interval::split_child_before_op_id(int op_id) { |
aoqi@0 | 4225 | assert(op_id >= 0, "invalid op_id"); |
aoqi@0 | 4226 | |
aoqi@0 | 4227 | Interval* parent = split_parent(); |
aoqi@0 | 4228 | Interval* result = NULL; |
aoqi@0 | 4229 | |
aoqi@0 | 4230 | int len = parent->_split_children.length(); |
aoqi@0 | 4231 | assert(len > 0, "no split children available"); |
aoqi@0 | 4232 | |
aoqi@0 | 4233 | for (int i = len - 1; i >= 0; i--) { |
aoqi@0 | 4234 | Interval* cur = parent->_split_children.at(i); |
aoqi@0 | 4235 | if (cur->to() <= op_id && (result == NULL || result->to() < cur->to())) { |
aoqi@0 | 4236 | result = cur; |
aoqi@0 | 4237 | } |
aoqi@0 | 4238 | } |
aoqi@0 | 4239 | |
aoqi@0 | 4240 | assert(result != NULL, "no split child found"); |
aoqi@0 | 4241 | return result; |
aoqi@0 | 4242 | } |
aoqi@0 | 4243 | |
aoqi@0 | 4244 | |
aoqi@0 | 4245 | // checks if op_id is covered by any split child |
aoqi@0 | 4246 | bool Interval::split_child_covers(int op_id, LIR_OpVisitState::OprMode mode) { |
aoqi@0 | 4247 | assert(is_split_parent(), "can only be called for split parents"); |
aoqi@0 | 4248 | assert(op_id >= 0, "invalid op_id (method can not be called for spill moves)"); |
aoqi@0 | 4249 | |
aoqi@0 | 4250 | if (_split_children.length() == 0) { |
aoqi@0 | 4251 | // simple case if interval was not split |
aoqi@0 | 4252 | return covers(op_id, mode); |
aoqi@0 | 4253 | |
aoqi@0 | 4254 | } else { |
aoqi@0 | 4255 | // extended case: check all split children |
aoqi@0 | 4256 | int len = _split_children.length(); |
aoqi@0 | 4257 | for (int i = 0; i < len; i++) { |
aoqi@0 | 4258 | Interval* cur = _split_children.at(i); |
aoqi@0 | 4259 | if (cur->covers(op_id, mode)) { |
aoqi@0 | 4260 | return true; |
aoqi@0 | 4261 | } |
aoqi@0 | 4262 | } |
aoqi@0 | 4263 | return false; |
aoqi@0 | 4264 | } |
aoqi@0 | 4265 | } |
aoqi@0 | 4266 | |
aoqi@0 | 4267 | |
aoqi@0 | 4268 | // Note: use positions are sorted descending -> first use has highest index |
aoqi@0 | 4269 | int Interval::first_usage(IntervalUseKind min_use_kind) const { |
aoqi@0 | 4270 | assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals"); |
aoqi@0 | 4271 | |
aoqi@0 | 4272 | for (int i = _use_pos_and_kinds.length() - 2; i >= 0; i -= 2) { |
aoqi@0 | 4273 | if (_use_pos_and_kinds.at(i + 1) >= min_use_kind) { |
aoqi@0 | 4274 | return _use_pos_and_kinds.at(i); |
aoqi@0 | 4275 | } |
aoqi@0 | 4276 | } |
aoqi@0 | 4277 | return max_jint; |
aoqi@0 | 4278 | } |
aoqi@0 | 4279 | |
aoqi@0 | 4280 | int Interval::next_usage(IntervalUseKind min_use_kind, int from) const { |
aoqi@0 | 4281 | assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals"); |
aoqi@0 | 4282 | |
aoqi@0 | 4283 | for (int i = _use_pos_and_kinds.length() - 2; i >= 0; i -= 2) { |
aoqi@0 | 4284 | if (_use_pos_and_kinds.at(i) >= from && _use_pos_and_kinds.at(i + 1) >= min_use_kind) { |
aoqi@0 | 4285 | return _use_pos_and_kinds.at(i); |
aoqi@0 | 4286 | } |
aoqi@0 | 4287 | } |
aoqi@0 | 4288 | return max_jint; |
aoqi@0 | 4289 | } |
aoqi@0 | 4290 | |
aoqi@0 | 4291 | int Interval::next_usage_exact(IntervalUseKind exact_use_kind, int from) const { |
aoqi@0 | 4292 | assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals"); |
aoqi@0 | 4293 | |
aoqi@0 | 4294 | for (int i = _use_pos_and_kinds.length() - 2; i >= 0; i -= 2) { |
aoqi@0 | 4295 | if (_use_pos_and_kinds.at(i) >= from && _use_pos_and_kinds.at(i + 1) == exact_use_kind) { |
aoqi@0 | 4296 | return _use_pos_and_kinds.at(i); |
aoqi@0 | 4297 | } |
aoqi@0 | 4298 | } |
aoqi@0 | 4299 | return max_jint; |
aoqi@0 | 4300 | } |
aoqi@0 | 4301 | |
aoqi@0 | 4302 | int Interval::previous_usage(IntervalUseKind min_use_kind, int from) const { |
aoqi@0 | 4303 | assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals"); |
aoqi@0 | 4304 | |
aoqi@0 | 4305 | int prev = 0; |
aoqi@0 | 4306 | for (int i = _use_pos_and_kinds.length() - 2; i >= 0; i -= 2) { |
aoqi@0 | 4307 | if (_use_pos_and_kinds.at(i) > from) { |
aoqi@0 | 4308 | return prev; |
aoqi@0 | 4309 | } |
aoqi@0 | 4310 | if (_use_pos_and_kinds.at(i + 1) >= min_use_kind) { |
aoqi@0 | 4311 | prev = _use_pos_and_kinds.at(i); |
aoqi@0 | 4312 | } |
aoqi@0 | 4313 | } |
aoqi@0 | 4314 | return prev; |
aoqi@0 | 4315 | } |
aoqi@0 | 4316 | |
aoqi@0 | 4317 | void Interval::add_use_pos(int pos, IntervalUseKind use_kind) { |
aoqi@0 | 4318 | assert(covers(pos, LIR_OpVisitState::inputMode), "use position not covered by live range"); |
aoqi@0 | 4319 | |
aoqi@0 | 4320 | // do not add use positions for precolored intervals because |
aoqi@0 | 4321 | // they are never used |
aoqi@0 | 4322 | if (use_kind != noUse && reg_num() >= LIR_OprDesc::vreg_base) { |
aoqi@0 | 4323 | #ifdef ASSERT |
aoqi@0 | 4324 | assert(_use_pos_and_kinds.length() % 2 == 0, "must be"); |
aoqi@0 | 4325 | for (int i = 0; i < _use_pos_and_kinds.length(); i += 2) { |
aoqi@0 | 4326 | assert(pos <= _use_pos_and_kinds.at(i), "already added a use-position with lower position"); |
aoqi@0 | 4327 | assert(_use_pos_and_kinds.at(i + 1) >= firstValidKind && _use_pos_and_kinds.at(i + 1) <= lastValidKind, "invalid use kind"); |
aoqi@0 | 4328 | if (i > 0) { |
aoqi@0 | 4329 | assert(_use_pos_and_kinds.at(i) < _use_pos_and_kinds.at(i - 2), "not sorted descending"); |
aoqi@0 | 4330 | } |
aoqi@0 | 4331 | } |
aoqi@0 | 4332 | #endif |
aoqi@0 | 4333 | |
aoqi@0 | 4334 | // Note: add_use is called in descending order, so list gets sorted |
aoqi@0 | 4335 | // automatically by just appending new use positions |
aoqi@0 | 4336 | int len = _use_pos_and_kinds.length(); |
aoqi@0 | 4337 | if (len == 0 || _use_pos_and_kinds.at(len - 2) > pos) { |
aoqi@0 | 4338 | _use_pos_and_kinds.append(pos); |
aoqi@0 | 4339 | _use_pos_and_kinds.append(use_kind); |
aoqi@0 | 4340 | } else if (_use_pos_and_kinds.at(len - 1) < use_kind) { |
aoqi@0 | 4341 | assert(_use_pos_and_kinds.at(len - 2) == pos, "list not sorted correctly"); |
aoqi@0 | 4342 | _use_pos_and_kinds.at_put(len - 1, use_kind); |
aoqi@0 | 4343 | } |
aoqi@0 | 4344 | } |
aoqi@0 | 4345 | } |
aoqi@0 | 4346 | |
aoqi@0 | 4347 | void Interval::add_range(int from, int to) { |
aoqi@0 | 4348 | assert(from < to, "invalid range"); |
aoqi@0 | 4349 | assert(first() == Range::end() || to < first()->next()->from(), "not inserting at begin of interval"); |
aoqi@0 | 4350 | assert(from <= first()->to(), "not inserting at begin of interval"); |
aoqi@0 | 4351 | |
aoqi@0 | 4352 | if (first()->from() <= to) { |
aoqi@0 | 4353 | // join intersecting ranges |
aoqi@0 | 4354 | first()->set_from(MIN2(from, first()->from())); |
aoqi@0 | 4355 | first()->set_to (MAX2(to, first()->to())); |
aoqi@0 | 4356 | } else { |
aoqi@0 | 4357 | // insert new range |
aoqi@0 | 4358 | _first = new Range(from, to, first()); |
aoqi@0 | 4359 | } |
aoqi@0 | 4360 | } |
aoqi@0 | 4361 | |
aoqi@0 | 4362 | Interval* Interval::new_split_child() { |
aoqi@0 | 4363 | // allocate new interval |
aoqi@0 | 4364 | Interval* result = new Interval(-1); |
aoqi@0 | 4365 | result->set_type(type()); |
aoqi@0 | 4366 | |
aoqi@0 | 4367 | Interval* parent = split_parent(); |
aoqi@0 | 4368 | result->_split_parent = parent; |
aoqi@0 | 4369 | result->set_register_hint(parent); |
aoqi@0 | 4370 | |
aoqi@0 | 4371 | // insert new interval in children-list of parent |
aoqi@0 | 4372 | if (parent->_split_children.length() == 0) { |
aoqi@0 | 4373 | assert(is_split_parent(), "list must be initialized at first split"); |
aoqi@0 | 4374 | |
aoqi@0 | 4375 | parent->_split_children = IntervalList(4); |
aoqi@0 | 4376 | parent->_split_children.append(this); |
aoqi@0 | 4377 | } |
aoqi@0 | 4378 | parent->_split_children.append(result); |
aoqi@0 | 4379 | |
aoqi@0 | 4380 | return result; |
aoqi@0 | 4381 | } |
aoqi@0 | 4382 | |
aoqi@0 | 4383 | // split this interval at the specified position and return |
aoqi@0 | 4384 | // the remainder as a new interval. |
aoqi@0 | 4385 | // |
aoqi@0 | 4386 | // when an interval is split, a bi-directional link is established between the original interval |
aoqi@0 | 4387 | // (the split parent) and the intervals that are split off this interval (the split children) |
aoqi@0 | 4388 | // When a split child is split again, the new created interval is also a direct child |
aoqi@0 | 4389 | // of the original parent (there is no tree of split children stored, but a flat list) |
aoqi@0 | 4390 | // All split children are spilled to the same stack slot (stored in _canonical_spill_slot) |
aoqi@0 | 4391 | // |
aoqi@0 | 4392 | // Note: The new interval has no valid reg_num |
aoqi@0 | 4393 | Interval* Interval::split(int split_pos) { |
aoqi@0 | 4394 | assert(LinearScan::is_virtual_interval(this), "cannot split fixed intervals"); |
aoqi@0 | 4395 | |
aoqi@0 | 4396 | // allocate new interval |
aoqi@0 | 4397 | Interval* result = new_split_child(); |
aoqi@0 | 4398 | |
aoqi@0 | 4399 | // split the ranges |
aoqi@0 | 4400 | Range* prev = NULL; |
aoqi@0 | 4401 | Range* cur = _first; |
aoqi@0 | 4402 | while (cur != Range::end() && cur->to() <= split_pos) { |
aoqi@0 | 4403 | prev = cur; |
aoqi@0 | 4404 | cur = cur->next(); |
aoqi@0 | 4405 | } |
aoqi@0 | 4406 | assert(cur != Range::end(), "split interval after end of last range"); |
aoqi@0 | 4407 | |
aoqi@0 | 4408 | if (cur->from() < split_pos) { |
aoqi@0 | 4409 | result->_first = new Range(split_pos, cur->to(), cur->next()); |
aoqi@0 | 4410 | cur->set_to(split_pos); |
aoqi@0 | 4411 | cur->set_next(Range::end()); |
aoqi@0 | 4412 | |
aoqi@0 | 4413 | } else { |
aoqi@0 | 4414 | assert(prev != NULL, "split before start of first range"); |
aoqi@0 | 4415 | result->_first = cur; |
aoqi@0 | 4416 | prev->set_next(Range::end()); |
aoqi@0 | 4417 | } |
aoqi@0 | 4418 | result->_current = result->_first; |
aoqi@0 | 4419 | _cached_to = -1; // clear cached value |
aoqi@0 | 4420 | |
aoqi@0 | 4421 | // split list of use positions |
aoqi@0 | 4422 | int total_len = _use_pos_and_kinds.length(); |
aoqi@0 | 4423 | int start_idx = total_len - 2; |
aoqi@0 | 4424 | while (start_idx >= 0 && _use_pos_and_kinds.at(start_idx) < split_pos) { |
aoqi@0 | 4425 | start_idx -= 2; |
aoqi@0 | 4426 | } |
aoqi@0 | 4427 | |
aoqi@0 | 4428 | intStack new_use_pos_and_kinds(total_len - start_idx); |
aoqi@0 | 4429 | int i; |
aoqi@0 | 4430 | for (i = start_idx + 2; i < total_len; i++) { |
aoqi@0 | 4431 | new_use_pos_and_kinds.append(_use_pos_and_kinds.at(i)); |
aoqi@0 | 4432 | } |
aoqi@0 | 4433 | |
aoqi@0 | 4434 | _use_pos_and_kinds.truncate(start_idx + 2); |
aoqi@0 | 4435 | result->_use_pos_and_kinds = _use_pos_and_kinds; |
aoqi@0 | 4436 | _use_pos_and_kinds = new_use_pos_and_kinds; |
aoqi@0 | 4437 | |
aoqi@0 | 4438 | #ifdef ASSERT |
aoqi@0 | 4439 | assert(_use_pos_and_kinds.length() % 2 == 0, "must have use kind for each use pos"); |
aoqi@0 | 4440 | assert(result->_use_pos_and_kinds.length() % 2 == 0, "must have use kind for each use pos"); |
aoqi@0 | 4441 | assert(_use_pos_and_kinds.length() + result->_use_pos_and_kinds.length() == total_len, "missed some entries"); |
aoqi@0 | 4442 | |
aoqi@0 | 4443 | for (i = 0; i < _use_pos_and_kinds.length(); i += 2) { |
aoqi@0 | 4444 | assert(_use_pos_and_kinds.at(i) < split_pos, "must be"); |
aoqi@0 | 4445 | assert(_use_pos_and_kinds.at(i + 1) >= firstValidKind && _use_pos_and_kinds.at(i + 1) <= lastValidKind, "invalid use kind"); |
aoqi@0 | 4446 | } |
aoqi@0 | 4447 | for (i = 0; i < result->_use_pos_and_kinds.length(); i += 2) { |
aoqi@0 | 4448 | assert(result->_use_pos_and_kinds.at(i) >= split_pos, "must be"); |
aoqi@0 | 4449 | assert(result->_use_pos_and_kinds.at(i + 1) >= firstValidKind && result->_use_pos_and_kinds.at(i + 1) <= lastValidKind, "invalid use kind"); |
aoqi@0 | 4450 | } |
aoqi@0 | 4451 | #endif |
aoqi@0 | 4452 | |
aoqi@0 | 4453 | return result; |
aoqi@0 | 4454 | } |
aoqi@0 | 4455 | |
aoqi@0 | 4456 | // split this interval at the specified position and return |
aoqi@0 | 4457 | // the head as a new interval (the original interval is the tail) |
aoqi@0 | 4458 | // |
aoqi@0 | 4459 | // Currently, only the first range can be split, and the new interval |
aoqi@0 | 4460 | // must not have split positions |
aoqi@0 | 4461 | Interval* Interval::split_from_start(int split_pos) { |
aoqi@0 | 4462 | assert(LinearScan::is_virtual_interval(this), "cannot split fixed intervals"); |
aoqi@0 | 4463 | assert(split_pos > from() && split_pos < to(), "can only split inside interval"); |
aoqi@0 | 4464 | assert(split_pos > _first->from() && split_pos <= _first->to(), "can only split inside first range"); |
aoqi@0 | 4465 | assert(first_usage(noUse) > split_pos, "can not split when use positions are present"); |
aoqi@0 | 4466 | |
aoqi@0 | 4467 | // allocate new interval |
aoqi@0 | 4468 | Interval* result = new_split_child(); |
aoqi@0 | 4469 | |
aoqi@0 | 4470 | // the new created interval has only one range (checked by assertion above), |
aoqi@0 | 4471 | // so the splitting of the ranges is very simple |
aoqi@0 | 4472 | result->add_range(_first->from(), split_pos); |
aoqi@0 | 4473 | |
aoqi@0 | 4474 | if (split_pos == _first->to()) { |
aoqi@0 | 4475 | assert(_first->next() != Range::end(), "must not be at end"); |
aoqi@0 | 4476 | _first = _first->next(); |
aoqi@0 | 4477 | } else { |
aoqi@0 | 4478 | _first->set_from(split_pos); |
aoqi@0 | 4479 | } |
aoqi@0 | 4480 | |
aoqi@0 | 4481 | return result; |
aoqi@0 | 4482 | } |
aoqi@0 | 4483 | |
aoqi@0 | 4484 | |
aoqi@0 | 4485 | // returns true if the op_id is inside the interval |
aoqi@0 | 4486 | bool Interval::covers(int op_id, LIR_OpVisitState::OprMode mode) const { |
aoqi@0 | 4487 | Range* cur = _first; |
aoqi@0 | 4488 | |
aoqi@0 | 4489 | while (cur != Range::end() && cur->to() < op_id) { |
aoqi@0 | 4490 | cur = cur->next(); |
aoqi@0 | 4491 | } |
aoqi@0 | 4492 | if (cur != Range::end()) { |
aoqi@0 | 4493 | assert(cur->to() != cur->next()->from(), "ranges not separated"); |
aoqi@0 | 4494 | |
aoqi@0 | 4495 | if (mode == LIR_OpVisitState::outputMode) { |
aoqi@0 | 4496 | return cur->from() <= op_id && op_id < cur->to(); |
aoqi@0 | 4497 | } else { |
aoqi@0 | 4498 | return cur->from() <= op_id && op_id <= cur->to(); |
aoqi@0 | 4499 | } |
aoqi@0 | 4500 | } |
aoqi@0 | 4501 | return false; |
aoqi@0 | 4502 | } |
aoqi@0 | 4503 | |
aoqi@0 | 4504 | // returns true if the interval has any hole between hole_from and hole_to |
aoqi@0 | 4505 | // (even if the hole has only the length 1) |
aoqi@0 | 4506 | bool Interval::has_hole_between(int hole_from, int hole_to) { |
aoqi@0 | 4507 | assert(hole_from < hole_to, "check"); |
aoqi@0 | 4508 | assert(from() <= hole_from && hole_to <= to(), "index out of interval"); |
aoqi@0 | 4509 | |
aoqi@0 | 4510 | Range* cur = _first; |
aoqi@0 | 4511 | while (cur != Range::end()) { |
aoqi@0 | 4512 | assert(cur->to() < cur->next()->from(), "no space between ranges"); |
aoqi@0 | 4513 | |
aoqi@0 | 4514 | // hole-range starts before this range -> hole |
aoqi@0 | 4515 | if (hole_from < cur->from()) { |
aoqi@0 | 4516 | return true; |
aoqi@0 | 4517 | |
aoqi@0 | 4518 | // hole-range completely inside this range -> no hole |
aoqi@0 | 4519 | } else if (hole_to <= cur->to()) { |
aoqi@0 | 4520 | return false; |
aoqi@0 | 4521 | |
aoqi@0 | 4522 | // overlapping of hole-range with this range -> hole |
aoqi@0 | 4523 | } else if (hole_from <= cur->to()) { |
aoqi@0 | 4524 | return true; |
aoqi@0 | 4525 | } |
aoqi@0 | 4526 | |
aoqi@0 | 4527 | cur = cur->next(); |
aoqi@0 | 4528 | } |
aoqi@0 | 4529 | |
aoqi@0 | 4530 | return false; |
aoqi@0 | 4531 | } |
aoqi@0 | 4532 | |
aoqi@0 | 4533 | |
aoqi@0 | 4534 | #ifndef PRODUCT |
aoqi@0 | 4535 | void Interval::print(outputStream* out) const { |
aoqi@0 | 4536 | const char* SpillState2Name[] = { "no definition", "no spill store", "one spill store", "store at definition", "start in memory", "no optimization" }; |
aoqi@0 | 4537 | const char* UseKind2Name[] = { "N", "L", "S", "M" }; |
aoqi@0 | 4538 | |
aoqi@0 | 4539 | const char* type_name; |
aoqi@0 | 4540 | LIR_Opr opr = LIR_OprFact::illegal(); |
aoqi@0 | 4541 | if (reg_num() < LIR_OprDesc::vreg_base) { |
aoqi@0 | 4542 | type_name = "fixed"; |
aoqi@0 | 4543 | // need a temporary operand for fixed intervals because type() cannot be called |
aoqi@0 | 4544 | if (assigned_reg() >= pd_first_cpu_reg && assigned_reg() <= pd_last_cpu_reg) { |
aoqi@0 | 4545 | opr = LIR_OprFact::single_cpu(assigned_reg()); |
aoqi@0 | 4546 | } else if (assigned_reg() >= pd_first_fpu_reg && assigned_reg() <= pd_last_fpu_reg) { |
aoqi@0 | 4547 | opr = LIR_OprFact::single_fpu(assigned_reg() - pd_first_fpu_reg); |
aoqi@0 | 4548 | #ifdef X86 |
aoqi@0 | 4549 | } else if (assigned_reg() >= pd_first_xmm_reg && assigned_reg() <= pd_last_xmm_reg) { |
aoqi@0 | 4550 | opr = LIR_OprFact::single_xmm(assigned_reg() - pd_first_xmm_reg); |
aoqi@0 | 4551 | #endif |
aoqi@0 | 4552 | } else { |
aoqi@0 | 4553 | ShouldNotReachHere(); |
aoqi@0 | 4554 | } |
aoqi@0 | 4555 | } else { |
aoqi@0 | 4556 | type_name = type2name(type()); |
aoqi@0 | 4557 | if (assigned_reg() != -1 && |
aoqi@0 | 4558 | (LinearScan::num_physical_regs(type()) == 1 || assigned_regHi() != -1)) { |
aoqi@0 | 4559 | opr = LinearScan::calc_operand_for_interval(this); |
aoqi@0 | 4560 | } |
aoqi@0 | 4561 | } |
aoqi@0 | 4562 | |
aoqi@0 | 4563 | out->print("%d %s ", reg_num(), type_name); |
aoqi@0 | 4564 | if (opr->is_valid()) { |
aoqi@0 | 4565 | out->print("\""); |
aoqi@0 | 4566 | opr->print(out); |
aoqi@0 | 4567 | out->print("\" "); |
aoqi@0 | 4568 | } |
aoqi@0 | 4569 | out->print("%d %d ", split_parent()->reg_num(), (register_hint(false) != NULL ? register_hint(false)->reg_num() : -1)); |
aoqi@0 | 4570 | |
aoqi@0 | 4571 | // print ranges |
aoqi@0 | 4572 | Range* cur = _first; |
aoqi@0 | 4573 | while (cur != Range::end()) { |
aoqi@0 | 4574 | cur->print(out); |
aoqi@0 | 4575 | cur = cur->next(); |
aoqi@0 | 4576 | assert(cur != NULL, "range list not closed with range sentinel"); |
aoqi@0 | 4577 | } |
aoqi@0 | 4578 | |
aoqi@0 | 4579 | // print use positions |
aoqi@0 | 4580 | int prev = 0; |
aoqi@0 | 4581 | assert(_use_pos_and_kinds.length() % 2 == 0, "must be"); |
aoqi@0 | 4582 | for (int i =_use_pos_and_kinds.length() - 2; i >= 0; i -= 2) { |
aoqi@0 | 4583 | assert(_use_pos_and_kinds.at(i + 1) >= firstValidKind && _use_pos_and_kinds.at(i + 1) <= lastValidKind, "invalid use kind"); |
aoqi@0 | 4584 | assert(prev < _use_pos_and_kinds.at(i), "use positions not sorted"); |
aoqi@0 | 4585 | |
aoqi@0 | 4586 | out->print("%d %s ", _use_pos_and_kinds.at(i), UseKind2Name[_use_pos_and_kinds.at(i + 1)]); |
aoqi@0 | 4587 | prev = _use_pos_and_kinds.at(i); |
aoqi@0 | 4588 | } |
aoqi@0 | 4589 | |
aoqi@0 | 4590 | out->print(" \"%s\"", SpillState2Name[spill_state()]); |
aoqi@0 | 4591 | out->cr(); |
aoqi@0 | 4592 | } |
aoqi@0 | 4593 | #endif |
aoqi@0 | 4594 | |
aoqi@0 | 4595 | |
aoqi@0 | 4596 | |
aoqi@0 | 4597 | // **** Implementation of IntervalWalker **************************** |
aoqi@0 | 4598 | |
aoqi@0 | 4599 | IntervalWalker::IntervalWalker(LinearScan* allocator, Interval* unhandled_fixed_first, Interval* unhandled_any_first) |
aoqi@0 | 4600 | : _compilation(allocator->compilation()) |
aoqi@0 | 4601 | , _allocator(allocator) |
aoqi@0 | 4602 | { |
aoqi@0 | 4603 | _unhandled_first[fixedKind] = unhandled_fixed_first; |
aoqi@0 | 4604 | _unhandled_first[anyKind] = unhandled_any_first; |
aoqi@0 | 4605 | _active_first[fixedKind] = Interval::end(); |
aoqi@0 | 4606 | _inactive_first[fixedKind] = Interval::end(); |
aoqi@0 | 4607 | _active_first[anyKind] = Interval::end(); |
aoqi@0 | 4608 | _inactive_first[anyKind] = Interval::end(); |
aoqi@0 | 4609 | _current_position = -1; |
aoqi@0 | 4610 | _current = NULL; |
aoqi@0 | 4611 | next_interval(); |
aoqi@0 | 4612 | } |
aoqi@0 | 4613 | |
aoqi@0 | 4614 | |
aoqi@0 | 4615 | // append interval at top of list |
aoqi@0 | 4616 | void IntervalWalker::append_unsorted(Interval** list, Interval* interval) { |
aoqi@0 | 4617 | interval->set_next(*list); *list = interval; |
aoqi@0 | 4618 | } |
aoqi@0 | 4619 | |
aoqi@0 | 4620 | |
aoqi@0 | 4621 | // append interval in order of current range from() |
aoqi@0 | 4622 | void IntervalWalker::append_sorted(Interval** list, Interval* interval) { |
aoqi@0 | 4623 | Interval* prev = NULL; |
aoqi@0 | 4624 | Interval* cur = *list; |
aoqi@0 | 4625 | while (cur->current_from() < interval->current_from()) { |
aoqi@0 | 4626 | prev = cur; cur = cur->next(); |
aoqi@0 | 4627 | } |
aoqi@0 | 4628 | if (prev == NULL) { |
aoqi@0 | 4629 | *list = interval; |
aoqi@0 | 4630 | } else { |
aoqi@0 | 4631 | prev->set_next(interval); |
aoqi@0 | 4632 | } |
aoqi@0 | 4633 | interval->set_next(cur); |
aoqi@0 | 4634 | } |
aoqi@0 | 4635 | |
aoqi@0 | 4636 | void IntervalWalker::append_to_unhandled(Interval** list, Interval* interval) { |
aoqi@0 | 4637 | assert(interval->from() >= current()->current_from(), "cannot append new interval before current walk position"); |
aoqi@0 | 4638 | |
aoqi@0 | 4639 | Interval* prev = NULL; |
aoqi@0 | 4640 | Interval* cur = *list; |
aoqi@0 | 4641 | while (cur->from() < interval->from() || (cur->from() == interval->from() && cur->first_usage(noUse) < interval->first_usage(noUse))) { |
aoqi@0 | 4642 | prev = cur; cur = cur->next(); |
aoqi@0 | 4643 | } |
aoqi@0 | 4644 | if (prev == NULL) { |
aoqi@0 | 4645 | *list = interval; |
aoqi@0 | 4646 | } else { |
aoqi@0 | 4647 | prev->set_next(interval); |
aoqi@0 | 4648 | } |
aoqi@0 | 4649 | interval->set_next(cur); |
aoqi@0 | 4650 | } |
aoqi@0 | 4651 | |
aoqi@0 | 4652 | |
aoqi@0 | 4653 | inline bool IntervalWalker::remove_from_list(Interval** list, Interval* i) { |
aoqi@0 | 4654 | while (*list != Interval::end() && *list != i) { |
aoqi@0 | 4655 | list = (*list)->next_addr(); |
aoqi@0 | 4656 | } |
aoqi@0 | 4657 | if (*list != Interval::end()) { |
aoqi@0 | 4658 | assert(*list == i, "check"); |
aoqi@0 | 4659 | *list = (*list)->next(); |
aoqi@0 | 4660 | return true; |
aoqi@0 | 4661 | } else { |
aoqi@0 | 4662 | return false; |
aoqi@0 | 4663 | } |
aoqi@0 | 4664 | } |
aoqi@0 | 4665 | |
aoqi@0 | 4666 | void IntervalWalker::remove_from_list(Interval* i) { |
aoqi@0 | 4667 | bool deleted; |
aoqi@0 | 4668 | |
aoqi@0 | 4669 | if (i->state() == activeState) { |
aoqi@0 | 4670 | deleted = remove_from_list(active_first_addr(anyKind), i); |
aoqi@0 | 4671 | } else { |
aoqi@0 | 4672 | assert(i->state() == inactiveState, "invalid state"); |
aoqi@0 | 4673 | deleted = remove_from_list(inactive_first_addr(anyKind), i); |
aoqi@0 | 4674 | } |
aoqi@0 | 4675 | |
aoqi@0 | 4676 | assert(deleted, "interval has not been found in list"); |
aoqi@0 | 4677 | } |
aoqi@0 | 4678 | |
aoqi@0 | 4679 | |
aoqi@0 | 4680 | void IntervalWalker::walk_to(IntervalState state, int from) { |
aoqi@0 | 4681 | assert (state == activeState || state == inactiveState, "wrong state"); |
aoqi@0 | 4682 | for_each_interval_kind(kind) { |
aoqi@0 | 4683 | Interval** prev = state == activeState ? active_first_addr(kind) : inactive_first_addr(kind); |
aoqi@0 | 4684 | Interval* next = *prev; |
aoqi@0 | 4685 | while (next->current_from() <= from) { |
aoqi@0 | 4686 | Interval* cur = next; |
aoqi@0 | 4687 | next = cur->next(); |
aoqi@0 | 4688 | |
aoqi@0 | 4689 | bool range_has_changed = false; |
aoqi@0 | 4690 | while (cur->current_to() <= from) { |
aoqi@0 | 4691 | cur->next_range(); |
aoqi@0 | 4692 | range_has_changed = true; |
aoqi@0 | 4693 | } |
aoqi@0 | 4694 | |
aoqi@0 | 4695 | // also handle move from inactive list to active list |
aoqi@0 | 4696 | range_has_changed = range_has_changed || (state == inactiveState && cur->current_from() <= from); |
aoqi@0 | 4697 | |
aoqi@0 | 4698 | if (range_has_changed) { |
aoqi@0 | 4699 | // remove cur from list |
aoqi@0 | 4700 | *prev = next; |
aoqi@0 | 4701 | if (cur->current_at_end()) { |
aoqi@0 | 4702 | // move to handled state (not maintained as a list) |
aoqi@0 | 4703 | cur->set_state(handledState); |
aoqi@0 | 4704 | interval_moved(cur, kind, state, handledState); |
aoqi@0 | 4705 | } else if (cur->current_from() <= from){ |
aoqi@0 | 4706 | // sort into active list |
aoqi@0 | 4707 | append_sorted(active_first_addr(kind), cur); |
aoqi@0 | 4708 | cur->set_state(activeState); |
aoqi@0 | 4709 | if (*prev == cur) { |
aoqi@0 | 4710 | assert(state == activeState, "check"); |
aoqi@0 | 4711 | prev = cur->next_addr(); |
aoqi@0 | 4712 | } |
aoqi@0 | 4713 | interval_moved(cur, kind, state, activeState); |
aoqi@0 | 4714 | } else { |
aoqi@0 | 4715 | // sort into inactive list |
aoqi@0 | 4716 | append_sorted(inactive_first_addr(kind), cur); |
aoqi@0 | 4717 | cur->set_state(inactiveState); |
aoqi@0 | 4718 | if (*prev == cur) { |
aoqi@0 | 4719 | assert(state == inactiveState, "check"); |
aoqi@0 | 4720 | prev = cur->next_addr(); |
aoqi@0 | 4721 | } |
aoqi@0 | 4722 | interval_moved(cur, kind, state, inactiveState); |
aoqi@0 | 4723 | } |
aoqi@0 | 4724 | } else { |
aoqi@0 | 4725 | prev = cur->next_addr(); |
aoqi@0 | 4726 | continue; |
aoqi@0 | 4727 | } |
aoqi@0 | 4728 | } |
aoqi@0 | 4729 | } |
aoqi@0 | 4730 | } |
aoqi@0 | 4731 | |
aoqi@0 | 4732 | |
aoqi@0 | 4733 | void IntervalWalker::next_interval() { |
aoqi@0 | 4734 | IntervalKind kind; |
aoqi@0 | 4735 | Interval* any = _unhandled_first[anyKind]; |
aoqi@0 | 4736 | Interval* fixed = _unhandled_first[fixedKind]; |
aoqi@0 | 4737 | |
aoqi@0 | 4738 | if (any != Interval::end()) { |
aoqi@0 | 4739 | // intervals may start at same position -> prefer fixed interval |
aoqi@0 | 4740 | kind = fixed != Interval::end() && fixed->from() <= any->from() ? fixedKind : anyKind; |
aoqi@0 | 4741 | |
aoqi@0 | 4742 | assert (kind == fixedKind && fixed->from() <= any->from() || |
aoqi@0 | 4743 | kind == anyKind && any->from() <= fixed->from(), "wrong interval!!!"); |
aoqi@0 | 4744 | assert(any == Interval::end() || fixed == Interval::end() || any->from() != fixed->from() || kind == fixedKind, "if fixed and any-Interval start at same position, fixed must be processed first"); |
aoqi@0 | 4745 | |
aoqi@0 | 4746 | } else if (fixed != Interval::end()) { |
aoqi@0 | 4747 | kind = fixedKind; |
aoqi@0 | 4748 | } else { |
aoqi@0 | 4749 | _current = NULL; return; |
aoqi@0 | 4750 | } |
aoqi@0 | 4751 | _current_kind = kind; |
aoqi@0 | 4752 | _current = _unhandled_first[kind]; |
aoqi@0 | 4753 | _unhandled_first[kind] = _current->next(); |
aoqi@0 | 4754 | _current->set_next(Interval::end()); |
aoqi@0 | 4755 | _current->rewind_range(); |
aoqi@0 | 4756 | } |
aoqi@0 | 4757 | |
aoqi@0 | 4758 | |
aoqi@0 | 4759 | void IntervalWalker::walk_to(int lir_op_id) { |
aoqi@0 | 4760 | assert(_current_position <= lir_op_id, "can not walk backwards"); |
aoqi@0 | 4761 | while (current() != NULL) { |
aoqi@0 | 4762 | bool is_active = current()->from() <= lir_op_id; |
aoqi@0 | 4763 | int id = is_active ? current()->from() : lir_op_id; |
aoqi@0 | 4764 | |
aoqi@0 | 4765 | TRACE_LINEAR_SCAN(2, if (_current_position < id) { tty->cr(); tty->print_cr("walk_to(%d) **************************************************************", id); }) |
aoqi@0 | 4766 | |
aoqi@0 | 4767 | // set _current_position prior to call of walk_to |
aoqi@0 | 4768 | _current_position = id; |
aoqi@0 | 4769 | |
aoqi@0 | 4770 | // call walk_to even if _current_position == id |
aoqi@0 | 4771 | walk_to(activeState, id); |
aoqi@0 | 4772 | walk_to(inactiveState, id); |
aoqi@0 | 4773 | |
aoqi@0 | 4774 | if (is_active) { |
aoqi@0 | 4775 | current()->set_state(activeState); |
aoqi@0 | 4776 | if (activate_current()) { |
aoqi@0 | 4777 | append_sorted(active_first_addr(current_kind()), current()); |
aoqi@0 | 4778 | interval_moved(current(), current_kind(), unhandledState, activeState); |
aoqi@0 | 4779 | } |
aoqi@0 | 4780 | |
aoqi@0 | 4781 | next_interval(); |
aoqi@0 | 4782 | } else { |
aoqi@0 | 4783 | return; |
aoqi@0 | 4784 | } |
aoqi@0 | 4785 | } |
aoqi@0 | 4786 | } |
aoqi@0 | 4787 | |
aoqi@0 | 4788 | void IntervalWalker::interval_moved(Interval* interval, IntervalKind kind, IntervalState from, IntervalState to) { |
aoqi@0 | 4789 | #ifndef PRODUCT |
aoqi@0 | 4790 | if (TraceLinearScanLevel >= 4) { |
aoqi@0 | 4791 | #define print_state(state) \ |
aoqi@0 | 4792 | switch(state) {\ |
aoqi@0 | 4793 | case unhandledState: tty->print("unhandled"); break;\ |
aoqi@0 | 4794 | case activeState: tty->print("active"); break;\ |
aoqi@0 | 4795 | case inactiveState: tty->print("inactive"); break;\ |
aoqi@0 | 4796 | case handledState: tty->print("handled"); break;\ |
aoqi@0 | 4797 | default: ShouldNotReachHere(); \ |
aoqi@0 | 4798 | } |
aoqi@0 | 4799 | |
aoqi@0 | 4800 | print_state(from); tty->print(" to "); print_state(to); |
aoqi@0 | 4801 | tty->fill_to(23); |
aoqi@0 | 4802 | interval->print(); |
aoqi@0 | 4803 | |
aoqi@0 | 4804 | #undef print_state |
aoqi@0 | 4805 | } |
aoqi@0 | 4806 | #endif |
aoqi@0 | 4807 | } |
aoqi@0 | 4808 | |
aoqi@0 | 4809 | |
aoqi@0 | 4810 | |
aoqi@0 | 4811 | // **** Implementation of LinearScanWalker ************************** |
aoqi@0 | 4812 | |
aoqi@0 | 4813 | LinearScanWalker::LinearScanWalker(LinearScan* allocator, Interval* unhandled_fixed_first, Interval* unhandled_any_first) |
aoqi@0 | 4814 | : IntervalWalker(allocator, unhandled_fixed_first, unhandled_any_first) |
aoqi@0 | 4815 | , _move_resolver(allocator) |
aoqi@0 | 4816 | { |
aoqi@0 | 4817 | for (int i = 0; i < LinearScan::nof_regs; i++) { |
aoqi@0 | 4818 | _spill_intervals[i] = new IntervalList(2); |
aoqi@0 | 4819 | } |
aoqi@0 | 4820 | } |
aoqi@0 | 4821 | |
aoqi@0 | 4822 | |
aoqi@0 | 4823 | inline void LinearScanWalker::init_use_lists(bool only_process_use_pos) { |
aoqi@0 | 4824 | for (int i = _first_reg; i <= _last_reg; i++) { |
aoqi@0 | 4825 | _use_pos[i] = max_jint; |
aoqi@0 | 4826 | |
aoqi@0 | 4827 | if (!only_process_use_pos) { |
aoqi@0 | 4828 | _block_pos[i] = max_jint; |
aoqi@0 | 4829 | _spill_intervals[i]->clear(); |
aoqi@0 | 4830 | } |
aoqi@0 | 4831 | } |
aoqi@0 | 4832 | } |
aoqi@0 | 4833 | |
aoqi@0 | 4834 | inline void LinearScanWalker::exclude_from_use(int reg) { |
aoqi@0 | 4835 | assert(reg < LinearScan::nof_regs, "interval must have a register assigned (stack slots not allowed)"); |
aoqi@0 | 4836 | if (reg >= _first_reg && reg <= _last_reg) { |
aoqi@0 | 4837 | _use_pos[reg] = 0; |
aoqi@0 | 4838 | } |
aoqi@0 | 4839 | } |
aoqi@0 | 4840 | inline void LinearScanWalker::exclude_from_use(Interval* i) { |
aoqi@0 | 4841 | assert(i->assigned_reg() != any_reg, "interval has no register assigned"); |
aoqi@0 | 4842 | |
aoqi@0 | 4843 | exclude_from_use(i->assigned_reg()); |
aoqi@0 | 4844 | exclude_from_use(i->assigned_regHi()); |
aoqi@0 | 4845 | } |
aoqi@0 | 4846 | |
aoqi@0 | 4847 | inline void LinearScanWalker::set_use_pos(int reg, Interval* i, int use_pos, bool only_process_use_pos) { |
aoqi@0 | 4848 | assert(use_pos != 0, "must use exclude_from_use to set use_pos to 0"); |
aoqi@0 | 4849 | |
aoqi@0 | 4850 | if (reg >= _first_reg && reg <= _last_reg) { |
aoqi@0 | 4851 | if (_use_pos[reg] > use_pos) { |
aoqi@0 | 4852 | _use_pos[reg] = use_pos; |
aoqi@0 | 4853 | } |
aoqi@0 | 4854 | if (!only_process_use_pos) { |
aoqi@0 | 4855 | _spill_intervals[reg]->append(i); |
aoqi@0 | 4856 | } |
aoqi@0 | 4857 | } |
aoqi@0 | 4858 | } |
aoqi@0 | 4859 | inline void LinearScanWalker::set_use_pos(Interval* i, int use_pos, bool only_process_use_pos) { |
aoqi@0 | 4860 | assert(i->assigned_reg() != any_reg, "interval has no register assigned"); |
aoqi@0 | 4861 | if (use_pos != -1) { |
aoqi@0 | 4862 | set_use_pos(i->assigned_reg(), i, use_pos, only_process_use_pos); |
aoqi@0 | 4863 | set_use_pos(i->assigned_regHi(), i, use_pos, only_process_use_pos); |
aoqi@0 | 4864 | } |
aoqi@0 | 4865 | } |
aoqi@0 | 4866 | |
aoqi@0 | 4867 | inline void LinearScanWalker::set_block_pos(int reg, Interval* i, int block_pos) { |
aoqi@0 | 4868 | if (reg >= _first_reg && reg <= _last_reg) { |
aoqi@0 | 4869 | if (_block_pos[reg] > block_pos) { |
aoqi@0 | 4870 | _block_pos[reg] = block_pos; |
aoqi@0 | 4871 | } |
aoqi@0 | 4872 | if (_use_pos[reg] > block_pos) { |
aoqi@0 | 4873 | _use_pos[reg] = block_pos; |
aoqi@0 | 4874 | } |
aoqi@0 | 4875 | } |
aoqi@0 | 4876 | } |
aoqi@0 | 4877 | inline void LinearScanWalker::set_block_pos(Interval* i, int block_pos) { |
aoqi@0 | 4878 | assert(i->assigned_reg() != any_reg, "interval has no register assigned"); |
aoqi@0 | 4879 | if (block_pos != -1) { |
aoqi@0 | 4880 | set_block_pos(i->assigned_reg(), i, block_pos); |
aoqi@0 | 4881 | set_block_pos(i->assigned_regHi(), i, block_pos); |
aoqi@0 | 4882 | } |
aoqi@0 | 4883 | } |
aoqi@0 | 4884 | |
aoqi@0 | 4885 | |
aoqi@0 | 4886 | void LinearScanWalker::free_exclude_active_fixed() { |
aoqi@0 | 4887 | Interval* list = active_first(fixedKind); |
aoqi@0 | 4888 | while (list != Interval::end()) { |
aoqi@0 | 4889 | assert(list->assigned_reg() < LinearScan::nof_regs, "active interval must have a register assigned"); |
aoqi@0 | 4890 | exclude_from_use(list); |
aoqi@0 | 4891 | list = list->next(); |
aoqi@0 | 4892 | } |
aoqi@0 | 4893 | } |
aoqi@0 | 4894 | |
aoqi@0 | 4895 | void LinearScanWalker::free_exclude_active_any() { |
aoqi@0 | 4896 | Interval* list = active_first(anyKind); |
aoqi@0 | 4897 | while (list != Interval::end()) { |
aoqi@0 | 4898 | exclude_from_use(list); |
aoqi@0 | 4899 | list = list->next(); |
aoqi@0 | 4900 | } |
aoqi@0 | 4901 | } |
aoqi@0 | 4902 | |
aoqi@0 | 4903 | void LinearScanWalker::free_collect_inactive_fixed(Interval* cur) { |
aoqi@0 | 4904 | Interval* list = inactive_first(fixedKind); |
aoqi@0 | 4905 | while (list != Interval::end()) { |
aoqi@0 | 4906 | if (cur->to() <= list->current_from()) { |
aoqi@0 | 4907 | assert(list->current_intersects_at(cur) == -1, "must not intersect"); |
aoqi@0 | 4908 | set_use_pos(list, list->current_from(), true); |
aoqi@0 | 4909 | } else { |
aoqi@0 | 4910 | set_use_pos(list, list->current_intersects_at(cur), true); |
aoqi@0 | 4911 | } |
aoqi@0 | 4912 | list = list->next(); |
aoqi@0 | 4913 | } |
aoqi@0 | 4914 | } |
aoqi@0 | 4915 | |
aoqi@0 | 4916 | void LinearScanWalker::free_collect_inactive_any(Interval* cur) { |
aoqi@0 | 4917 | Interval* list = inactive_first(anyKind); |
aoqi@0 | 4918 | while (list != Interval::end()) { |
aoqi@0 | 4919 | set_use_pos(list, list->current_intersects_at(cur), true); |
aoqi@0 | 4920 | list = list->next(); |
aoqi@0 | 4921 | } |
aoqi@0 | 4922 | } |
aoqi@0 | 4923 | |
aoqi@0 | 4924 | void LinearScanWalker::free_collect_unhandled(IntervalKind kind, Interval* cur) { |
aoqi@0 | 4925 | Interval* list = unhandled_first(kind); |
aoqi@0 | 4926 | while (list != Interval::end()) { |
aoqi@0 | 4927 | set_use_pos(list, list->intersects_at(cur), true); |
aoqi@0 | 4928 | if (kind == fixedKind && cur->to() <= list->from()) { |
aoqi@0 | 4929 | set_use_pos(list, list->from(), true); |
aoqi@0 | 4930 | } |
aoqi@0 | 4931 | list = list->next(); |
aoqi@0 | 4932 | } |
aoqi@0 | 4933 | } |
aoqi@0 | 4934 | |
aoqi@0 | 4935 | void LinearScanWalker::spill_exclude_active_fixed() { |
aoqi@0 | 4936 | Interval* list = active_first(fixedKind); |
aoqi@0 | 4937 | while (list != Interval::end()) { |
aoqi@0 | 4938 | exclude_from_use(list); |
aoqi@0 | 4939 | list = list->next(); |
aoqi@0 | 4940 | } |
aoqi@0 | 4941 | } |
aoqi@0 | 4942 | |
aoqi@0 | 4943 | void LinearScanWalker::spill_block_unhandled_fixed(Interval* cur) { |
aoqi@0 | 4944 | Interval* list = unhandled_first(fixedKind); |
aoqi@0 | 4945 | while (list != Interval::end()) { |
aoqi@0 | 4946 | set_block_pos(list, list->intersects_at(cur)); |
aoqi@0 | 4947 | list = list->next(); |
aoqi@0 | 4948 | } |
aoqi@0 | 4949 | } |
aoqi@0 | 4950 | |
aoqi@0 | 4951 | void LinearScanWalker::spill_block_inactive_fixed(Interval* cur) { |
aoqi@0 | 4952 | Interval* list = inactive_first(fixedKind); |
aoqi@0 | 4953 | while (list != Interval::end()) { |
aoqi@0 | 4954 | if (cur->to() > list->current_from()) { |
aoqi@0 | 4955 | set_block_pos(list, list->current_intersects_at(cur)); |
aoqi@0 | 4956 | } else { |
aoqi@0 | 4957 | assert(list->current_intersects_at(cur) == -1, "invalid optimization: intervals intersect"); |
aoqi@0 | 4958 | } |
aoqi@0 | 4959 | |
aoqi@0 | 4960 | list = list->next(); |
aoqi@0 | 4961 | } |
aoqi@0 | 4962 | } |
aoqi@0 | 4963 | |
aoqi@0 | 4964 | void LinearScanWalker::spill_collect_active_any() { |
aoqi@0 | 4965 | Interval* list = active_first(anyKind); |
aoqi@0 | 4966 | while (list != Interval::end()) { |
aoqi@0 | 4967 | set_use_pos(list, MIN2(list->next_usage(loopEndMarker, _current_position), list->to()), false); |
aoqi@0 | 4968 | list = list->next(); |
aoqi@0 | 4969 | } |
aoqi@0 | 4970 | } |
aoqi@0 | 4971 | |
aoqi@0 | 4972 | void LinearScanWalker::spill_collect_inactive_any(Interval* cur) { |
aoqi@0 | 4973 | Interval* list = inactive_first(anyKind); |
aoqi@0 | 4974 | while (list != Interval::end()) { |
aoqi@0 | 4975 | if (list->current_intersects(cur)) { |
aoqi@0 | 4976 | set_use_pos(list, MIN2(list->next_usage(loopEndMarker, _current_position), list->to()), false); |
aoqi@0 | 4977 | } |
aoqi@0 | 4978 | list = list->next(); |
aoqi@0 | 4979 | } |
aoqi@0 | 4980 | } |
aoqi@0 | 4981 | |
aoqi@0 | 4982 | |
aoqi@0 | 4983 | void LinearScanWalker::insert_move(int op_id, Interval* src_it, Interval* dst_it) { |
aoqi@0 | 4984 | // output all moves here. When source and target are equal, the move is |
aoqi@0 | 4985 | // optimized away later in assign_reg_nums |
aoqi@0 | 4986 | |
aoqi@0 | 4987 | op_id = (op_id + 1) & ~1; |
aoqi@0 | 4988 | BlockBegin* op_block = allocator()->block_of_op_with_id(op_id); |
aoqi@0 | 4989 | assert(op_id > 0 && allocator()->block_of_op_with_id(op_id - 2) == op_block, "cannot insert move at block boundary"); |
aoqi@0 | 4990 | |
aoqi@0 | 4991 | // calculate index of instruction inside instruction list of current block |
aoqi@0 | 4992 | // the minimal index (for a block with no spill moves) can be calculated because the |
aoqi@0 | 4993 | // numbering of instructions is known. |
aoqi@0 | 4994 | // When the block already contains spill moves, the index must be increased until the |
aoqi@0 | 4995 | // correct index is reached. |
aoqi@0 | 4996 | LIR_OpList* list = op_block->lir()->instructions_list(); |
aoqi@0 | 4997 | int index = (op_id - list->at(0)->id()) / 2; |
aoqi@0 | 4998 | assert(list->at(index)->id() <= op_id, "error in calculation"); |
aoqi@0 | 4999 | |
aoqi@0 | 5000 | while (list->at(index)->id() != op_id) { |
aoqi@0 | 5001 | index++; |
aoqi@0 | 5002 | assert(0 <= index && index < list->length(), "index out of bounds"); |
aoqi@0 | 5003 | } |
aoqi@0 | 5004 | assert(1 <= index && index < list->length(), "index out of bounds"); |
aoqi@0 | 5005 | assert(list->at(index)->id() == op_id, "error in calculation"); |
aoqi@0 | 5006 | |
aoqi@0 | 5007 | // insert new instruction before instruction at position index |
aoqi@0 | 5008 | _move_resolver.move_insert_position(op_block->lir(), index - 1); |
aoqi@0 | 5009 | _move_resolver.add_mapping(src_it, dst_it); |
aoqi@0 | 5010 | } |
aoqi@0 | 5011 | |
aoqi@0 | 5012 | |
aoqi@0 | 5013 | int LinearScanWalker::find_optimal_split_pos(BlockBegin* min_block, BlockBegin* max_block, int max_split_pos) { |
aoqi@0 | 5014 | int from_block_nr = min_block->linear_scan_number(); |
aoqi@0 | 5015 | int to_block_nr = max_block->linear_scan_number(); |
aoqi@0 | 5016 | |
aoqi@0 | 5017 | assert(0 <= from_block_nr && from_block_nr < block_count(), "out of range"); |
aoqi@0 | 5018 | assert(0 <= to_block_nr && to_block_nr < block_count(), "out of range"); |
aoqi@0 | 5019 | assert(from_block_nr < to_block_nr, "must cross block boundary"); |
aoqi@0 | 5020 | |
aoqi@0 | 5021 | // Try to split at end of max_block. If this would be after |
aoqi@0 | 5022 | // max_split_pos, then use the begin of max_block |
aoqi@0 | 5023 | int optimal_split_pos = max_block->last_lir_instruction_id() + 2; |
aoqi@0 | 5024 | if (optimal_split_pos > max_split_pos) { |
aoqi@0 | 5025 | optimal_split_pos = max_block->first_lir_instruction_id(); |
aoqi@0 | 5026 | } |
aoqi@0 | 5027 | |
aoqi@0 | 5028 | int min_loop_depth = max_block->loop_depth(); |
aoqi@0 | 5029 | for (int i = to_block_nr - 1; i >= from_block_nr; i--) { |
aoqi@0 | 5030 | BlockBegin* cur = block_at(i); |
aoqi@0 | 5031 | |
aoqi@0 | 5032 | if (cur->loop_depth() < min_loop_depth) { |
aoqi@0 | 5033 | // block with lower loop-depth found -> split at the end of this block |
aoqi@0 | 5034 | min_loop_depth = cur->loop_depth(); |
aoqi@0 | 5035 | optimal_split_pos = cur->last_lir_instruction_id() + 2; |
aoqi@0 | 5036 | } |
aoqi@0 | 5037 | } |
aoqi@0 | 5038 | assert(optimal_split_pos > allocator()->max_lir_op_id() || allocator()->is_block_begin(optimal_split_pos), "algorithm must move split pos to block boundary"); |
aoqi@0 | 5039 | |
aoqi@0 | 5040 | return optimal_split_pos; |
aoqi@0 | 5041 | } |
aoqi@0 | 5042 | |
aoqi@0 | 5043 | |
aoqi@0 | 5044 | int LinearScanWalker::find_optimal_split_pos(Interval* it, int min_split_pos, int max_split_pos, bool do_loop_optimization) { |
aoqi@0 | 5045 | int optimal_split_pos = -1; |
aoqi@0 | 5046 | if (min_split_pos == max_split_pos) { |
aoqi@0 | 5047 | // trivial case, no optimization of split position possible |
aoqi@0 | 5048 | TRACE_LINEAR_SCAN(4, tty->print_cr(" min-pos and max-pos are equal, no optimization possible")); |
aoqi@0 | 5049 | optimal_split_pos = min_split_pos; |
aoqi@0 | 5050 | |
aoqi@0 | 5051 | } else { |
aoqi@0 | 5052 | assert(min_split_pos < max_split_pos, "must be true then"); |
aoqi@0 | 5053 | assert(min_split_pos > 0, "cannot access min_split_pos - 1 otherwise"); |
aoqi@0 | 5054 | |
aoqi@0 | 5055 | // reason for using min_split_pos - 1: when the minimal split pos is exactly at the |
aoqi@0 | 5056 | // beginning of a block, then min_split_pos is also a possible split position. |
aoqi@0 | 5057 | // Use the block before as min_block, because then min_block->last_lir_instruction_id() + 2 == min_split_pos |
aoqi@0 | 5058 | BlockBegin* min_block = allocator()->block_of_op_with_id(min_split_pos - 1); |
aoqi@0 | 5059 | |
aoqi@0 | 5060 | // reason for using max_split_pos - 1: otherwise there would be an assertion failure |
aoqi@0 | 5061 | // when an interval ends at the end of the last block of the method |
aoqi@0 | 5062 | // (in this case, max_split_pos == allocator()->max_lir_op_id() + 2, and there is no |
aoqi@0 | 5063 | // block at this op_id) |
aoqi@0 | 5064 | BlockBegin* max_block = allocator()->block_of_op_with_id(max_split_pos - 1); |
aoqi@0 | 5065 | |
aoqi@0 | 5066 | assert(min_block->linear_scan_number() <= max_block->linear_scan_number(), "invalid order"); |
aoqi@0 | 5067 | if (min_block == max_block) { |
aoqi@0 | 5068 | // split position cannot be moved to block boundary, so split as late as possible |
aoqi@0 | 5069 | TRACE_LINEAR_SCAN(4, tty->print_cr(" cannot move split pos to block boundary because min_pos and max_pos are in same block")); |
aoqi@0 | 5070 | optimal_split_pos = max_split_pos; |
aoqi@0 | 5071 | |
aoqi@0 | 5072 | } else if (it->has_hole_between(max_split_pos - 1, max_split_pos) && !allocator()->is_block_begin(max_split_pos)) { |
aoqi@0 | 5073 | // Do not move split position if the interval has a hole before max_split_pos. |
aoqi@0 | 5074 | // Intervals resulting from Phi-Functions have more than one definition (marked |
aoqi@0 | 5075 | // as mustHaveRegister) with a hole before each definition. When the register is needed |
aoqi@0 | 5076 | // for the second definition, an earlier reloading is unnecessary. |
aoqi@0 | 5077 | TRACE_LINEAR_SCAN(4, tty->print_cr(" interval has hole just before max_split_pos, so splitting at max_split_pos")); |
aoqi@0 | 5078 | optimal_split_pos = max_split_pos; |
aoqi@0 | 5079 | |
aoqi@0 | 5080 | } else { |
aoqi@0 | 5081 | // seach optimal block boundary between min_split_pos and max_split_pos |
aoqi@0 | 5082 | TRACE_LINEAR_SCAN(4, tty->print_cr(" moving split pos to optimal block boundary between block B%d and B%d", min_block->block_id(), max_block->block_id())); |
aoqi@0 | 5083 | |
aoqi@0 | 5084 | if (do_loop_optimization) { |
aoqi@0 | 5085 | // Loop optimization: if a loop-end marker is found between min- and max-position, |
aoqi@0 | 5086 | // then split before this loop |
aoqi@0 | 5087 | int loop_end_pos = it->next_usage_exact(loopEndMarker, min_block->last_lir_instruction_id() + 2); |
aoqi@0 | 5088 | TRACE_LINEAR_SCAN(4, tty->print_cr(" loop optimization: loop end found at pos %d", loop_end_pos)); |
aoqi@0 | 5089 | |
aoqi@0 | 5090 | assert(loop_end_pos > min_split_pos, "invalid order"); |
aoqi@0 | 5091 | if (loop_end_pos < max_split_pos) { |
aoqi@0 | 5092 | // loop-end marker found between min- and max-position |
aoqi@0 | 5093 | // if it is not the end marker for the same loop as the min-position, then move |
aoqi@0 | 5094 | // the max-position to this loop block. |
aoqi@0 | 5095 | // Desired result: uses tagged as shouldHaveRegister inside a loop cause a reloading |
aoqi@0 | 5096 | // of the interval (normally, only mustHaveRegister causes a reloading) |
aoqi@0 | 5097 | BlockBegin* loop_block = allocator()->block_of_op_with_id(loop_end_pos); |
aoqi@0 | 5098 | |
aoqi@0 | 5099 | TRACE_LINEAR_SCAN(4, tty->print_cr(" interval is used in loop that ends in block B%d, so trying to move max_block back from B%d to B%d", loop_block->block_id(), max_block->block_id(), loop_block->block_id())); |
aoqi@0 | 5100 | assert(loop_block != min_block, "loop_block and min_block must be different because block boundary is needed between"); |
aoqi@0 | 5101 | |
aoqi@0 | 5102 | optimal_split_pos = find_optimal_split_pos(min_block, loop_block, loop_block->last_lir_instruction_id() + 2); |
aoqi@0 | 5103 | if (optimal_split_pos == loop_block->last_lir_instruction_id() + 2) { |
aoqi@0 | 5104 | optimal_split_pos = -1; |
aoqi@0 | 5105 | TRACE_LINEAR_SCAN(4, tty->print_cr(" loop optimization not necessary")); |
aoqi@0 | 5106 | } else { |
aoqi@0 | 5107 | TRACE_LINEAR_SCAN(4, tty->print_cr(" loop optimization successful")); |
aoqi@0 | 5108 | } |
aoqi@0 | 5109 | } |
aoqi@0 | 5110 | } |
aoqi@0 | 5111 | |
aoqi@0 | 5112 | if (optimal_split_pos == -1) { |
aoqi@0 | 5113 | // not calculated by loop optimization |
aoqi@0 | 5114 | optimal_split_pos = find_optimal_split_pos(min_block, max_block, max_split_pos); |
aoqi@0 | 5115 | } |
aoqi@0 | 5116 | } |
aoqi@0 | 5117 | } |
aoqi@0 | 5118 | TRACE_LINEAR_SCAN(4, tty->print_cr(" optimal split position: %d", optimal_split_pos)); |
aoqi@0 | 5119 | |
aoqi@0 | 5120 | return optimal_split_pos; |
aoqi@0 | 5121 | } |
aoqi@0 | 5122 | |
aoqi@0 | 5123 | |
aoqi@0 | 5124 | /* |
aoqi@0 | 5125 | split an interval at the optimal position between min_split_pos and |
aoqi@0 | 5126 | max_split_pos in two parts: |
aoqi@0 | 5127 | 1) the left part has already a location assigned |
aoqi@0 | 5128 | 2) the right part is sorted into to the unhandled-list |
aoqi@0 | 5129 | */ |
aoqi@0 | 5130 | void LinearScanWalker::split_before_usage(Interval* it, int min_split_pos, int max_split_pos) { |
aoqi@0 | 5131 | TRACE_LINEAR_SCAN(2, tty->print ("----- splitting interval: "); it->print()); |
aoqi@0 | 5132 | TRACE_LINEAR_SCAN(2, tty->print_cr(" between %d and %d", min_split_pos, max_split_pos)); |
aoqi@0 | 5133 | |
aoqi@0 | 5134 | assert(it->from() < min_split_pos, "cannot split at start of interval"); |
aoqi@0 | 5135 | assert(current_position() < min_split_pos, "cannot split before current position"); |
aoqi@0 | 5136 | assert(min_split_pos <= max_split_pos, "invalid order"); |
aoqi@0 | 5137 | assert(max_split_pos <= it->to(), "cannot split after end of interval"); |
aoqi@0 | 5138 | |
aoqi@0 | 5139 | int optimal_split_pos = find_optimal_split_pos(it, min_split_pos, max_split_pos, true); |
aoqi@0 | 5140 | |
aoqi@0 | 5141 | assert(min_split_pos <= optimal_split_pos && optimal_split_pos <= max_split_pos, "out of range"); |
aoqi@0 | 5142 | assert(optimal_split_pos <= it->to(), "cannot split after end of interval"); |
aoqi@0 | 5143 | assert(optimal_split_pos > it->from(), "cannot split at start of interval"); |
aoqi@0 | 5144 | |
aoqi@0 | 5145 | if (optimal_split_pos == it->to() && it->next_usage(mustHaveRegister, min_split_pos) == max_jint) { |
aoqi@0 | 5146 | // the split position would be just before the end of the interval |
aoqi@0 | 5147 | // -> no split at all necessary |
aoqi@0 | 5148 | TRACE_LINEAR_SCAN(4, tty->print_cr(" no split necessary because optimal split position is at end of interval")); |
aoqi@0 | 5149 | return; |
aoqi@0 | 5150 | } |
aoqi@0 | 5151 | |
aoqi@0 | 5152 | // must calculate this before the actual split is performed and before split position is moved to odd op_id |
aoqi@0 | 5153 | bool move_necessary = !allocator()->is_block_begin(optimal_split_pos) && !it->has_hole_between(optimal_split_pos - 1, optimal_split_pos); |
aoqi@0 | 5154 | |
aoqi@0 | 5155 | if (!allocator()->is_block_begin(optimal_split_pos)) { |
aoqi@0 | 5156 | // move position before actual instruction (odd op_id) |
aoqi@0 | 5157 | optimal_split_pos = (optimal_split_pos - 1) | 1; |
aoqi@0 | 5158 | } |
aoqi@0 | 5159 | |
aoqi@0 | 5160 | TRACE_LINEAR_SCAN(4, tty->print_cr(" splitting at position %d", optimal_split_pos)); |
aoqi@0 | 5161 | assert(allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 1), "split pos must be odd when not on block boundary"); |
aoqi@0 | 5162 | assert(!allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 0), "split pos must be even on block boundary"); |
aoqi@0 | 5163 | |
aoqi@0 | 5164 | Interval* split_part = it->split(optimal_split_pos); |
aoqi@0 | 5165 | |
aoqi@0 | 5166 | allocator()->append_interval(split_part); |
aoqi@0 | 5167 | allocator()->copy_register_flags(it, split_part); |
aoqi@0 | 5168 | split_part->set_insert_move_when_activated(move_necessary); |
aoqi@0 | 5169 | append_to_unhandled(unhandled_first_addr(anyKind), split_part); |
aoqi@0 | 5170 | |
aoqi@0 | 5171 | TRACE_LINEAR_SCAN(2, tty->print_cr(" split interval in two parts (insert_move_when_activated: %d)", move_necessary)); |
aoqi@0 | 5172 | TRACE_LINEAR_SCAN(2, tty->print (" "); it->print()); |
aoqi@0 | 5173 | TRACE_LINEAR_SCAN(2, tty->print (" "); split_part->print()); |
aoqi@0 | 5174 | } |
aoqi@0 | 5175 | |
aoqi@0 | 5176 | /* |
aoqi@0 | 5177 | split an interval at the optimal position between min_split_pos and |
aoqi@0 | 5178 | max_split_pos in two parts: |
aoqi@0 | 5179 | 1) the left part has already a location assigned |
aoqi@0 | 5180 | 2) the right part is always on the stack and therefore ignored in further processing |
aoqi@0 | 5181 | */ |
aoqi@0 | 5182 | void LinearScanWalker::split_for_spilling(Interval* it) { |
aoqi@0 | 5183 | // calculate allowed range of splitting position |
aoqi@0 | 5184 | int max_split_pos = current_position(); |
aoqi@0 | 5185 | int min_split_pos = MAX2(it->previous_usage(shouldHaveRegister, max_split_pos) + 1, it->from()); |
aoqi@0 | 5186 | |
aoqi@0 | 5187 | TRACE_LINEAR_SCAN(2, tty->print ("----- splitting and spilling interval: "); it->print()); |
aoqi@0 | 5188 | TRACE_LINEAR_SCAN(2, tty->print_cr(" between %d and %d", min_split_pos, max_split_pos)); |
aoqi@0 | 5189 | |
aoqi@0 | 5190 | assert(it->state() == activeState, "why spill interval that is not active?"); |
aoqi@0 | 5191 | assert(it->from() <= min_split_pos, "cannot split before start of interval"); |
aoqi@0 | 5192 | assert(min_split_pos <= max_split_pos, "invalid order"); |
aoqi@0 | 5193 | assert(max_split_pos < it->to(), "cannot split at end end of interval"); |
aoqi@0 | 5194 | assert(current_position() < it->to(), "interval must not end before current position"); |
aoqi@0 | 5195 | |
aoqi@0 | 5196 | if (min_split_pos == it->from()) { |
aoqi@0 | 5197 | // the whole interval is never used, so spill it entirely to memory |
aoqi@0 | 5198 | TRACE_LINEAR_SCAN(2, tty->print_cr(" spilling entire interval because split pos is at beginning of interval")); |
aoqi@0 | 5199 | assert(it->first_usage(shouldHaveRegister) > current_position(), "interval must not have use position before current_position"); |
aoqi@0 | 5200 | |
aoqi@0 | 5201 | allocator()->assign_spill_slot(it); |
aoqi@0 | 5202 | allocator()->change_spill_state(it, min_split_pos); |
aoqi@0 | 5203 | |
aoqi@0 | 5204 | // Also kick parent intervals out of register to memory when they have no use |
aoqi@0 | 5205 | // position. This avoids short interval in register surrounded by intervals in |
aoqi@0 | 5206 | // memory -> avoid useless moves from memory to register and back |
aoqi@0 | 5207 | Interval* parent = it; |
aoqi@0 | 5208 | while (parent != NULL && parent->is_split_child()) { |
aoqi@0 | 5209 | parent = parent->split_child_before_op_id(parent->from()); |
aoqi@0 | 5210 | |
aoqi@0 | 5211 | if (parent->assigned_reg() < LinearScan::nof_regs) { |
aoqi@0 | 5212 | if (parent->first_usage(shouldHaveRegister) == max_jint) { |
aoqi@0 | 5213 | // parent is never used, so kick it out of its assigned register |
aoqi@0 | 5214 | TRACE_LINEAR_SCAN(4, tty->print_cr(" kicking out interval %d out of its register because it is never used", parent->reg_num())); |
aoqi@0 | 5215 | allocator()->assign_spill_slot(parent); |
aoqi@0 | 5216 | } else { |
aoqi@0 | 5217 | // do not go further back because the register is actually used by the interval |
aoqi@0 | 5218 | parent = NULL; |
aoqi@0 | 5219 | } |
aoqi@0 | 5220 | } |
aoqi@0 | 5221 | } |
aoqi@0 | 5222 | |
aoqi@0 | 5223 | } else { |
aoqi@0 | 5224 | // search optimal split pos, split interval and spill only the right hand part |
aoqi@0 | 5225 | int optimal_split_pos = find_optimal_split_pos(it, min_split_pos, max_split_pos, false); |
aoqi@0 | 5226 | |
aoqi@0 | 5227 | assert(min_split_pos <= optimal_split_pos && optimal_split_pos <= max_split_pos, "out of range"); |
aoqi@0 | 5228 | assert(optimal_split_pos < it->to(), "cannot split at end of interval"); |
aoqi@0 | 5229 | assert(optimal_split_pos >= it->from(), "cannot split before start of interval"); |
aoqi@0 | 5230 | |
aoqi@0 | 5231 | if (!allocator()->is_block_begin(optimal_split_pos)) { |
aoqi@0 | 5232 | // move position before actual instruction (odd op_id) |
aoqi@0 | 5233 | optimal_split_pos = (optimal_split_pos - 1) | 1; |
aoqi@0 | 5234 | } |
aoqi@0 | 5235 | |
aoqi@0 | 5236 | TRACE_LINEAR_SCAN(4, tty->print_cr(" splitting at position %d", optimal_split_pos)); |
aoqi@0 | 5237 | assert(allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 1), "split pos must be odd when not on block boundary"); |
aoqi@0 | 5238 | assert(!allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 0), "split pos must be even on block boundary"); |
aoqi@0 | 5239 | |
aoqi@0 | 5240 | Interval* spilled_part = it->split(optimal_split_pos); |
aoqi@0 | 5241 | allocator()->append_interval(spilled_part); |
aoqi@0 | 5242 | allocator()->assign_spill_slot(spilled_part); |
aoqi@0 | 5243 | allocator()->change_spill_state(spilled_part, optimal_split_pos); |
aoqi@0 | 5244 | |
aoqi@0 | 5245 | if (!allocator()->is_block_begin(optimal_split_pos)) { |
aoqi@0 | 5246 | TRACE_LINEAR_SCAN(4, tty->print_cr(" inserting move from interval %d to %d", it->reg_num(), spilled_part->reg_num())); |
aoqi@0 | 5247 | insert_move(optimal_split_pos, it, spilled_part); |
aoqi@0 | 5248 | } |
aoqi@0 | 5249 | |
aoqi@0 | 5250 | // the current_split_child is needed later when moves are inserted for reloading |
aoqi@0 | 5251 | assert(spilled_part->current_split_child() == it, "overwriting wrong current_split_child"); |
aoqi@0 | 5252 | spilled_part->make_current_split_child(); |
aoqi@0 | 5253 | |
aoqi@0 | 5254 | TRACE_LINEAR_SCAN(2, tty->print_cr(" split interval in two parts")); |
aoqi@0 | 5255 | TRACE_LINEAR_SCAN(2, tty->print (" "); it->print()); |
aoqi@0 | 5256 | TRACE_LINEAR_SCAN(2, tty->print (" "); spilled_part->print()); |
aoqi@0 | 5257 | } |
aoqi@0 | 5258 | } |
aoqi@0 | 5259 | |
aoqi@0 | 5260 | |
aoqi@0 | 5261 | void LinearScanWalker::split_stack_interval(Interval* it) { |
aoqi@0 | 5262 | int min_split_pos = current_position() + 1; |
aoqi@0 | 5263 | int max_split_pos = MIN2(it->first_usage(shouldHaveRegister), it->to()); |
aoqi@0 | 5264 | |
aoqi@0 | 5265 | split_before_usage(it, min_split_pos, max_split_pos); |
aoqi@0 | 5266 | } |
aoqi@0 | 5267 | |
aoqi@0 | 5268 | void LinearScanWalker::split_when_partial_register_available(Interval* it, int register_available_until) { |
aoqi@0 | 5269 | int min_split_pos = MAX2(it->previous_usage(shouldHaveRegister, register_available_until), it->from() + 1); |
aoqi@0 | 5270 | int max_split_pos = register_available_until; |
aoqi@0 | 5271 | |
aoqi@0 | 5272 | split_before_usage(it, min_split_pos, max_split_pos); |
aoqi@0 | 5273 | } |
aoqi@0 | 5274 | |
aoqi@0 | 5275 | void LinearScanWalker::split_and_spill_interval(Interval* it) { |
aoqi@0 | 5276 | assert(it->state() == activeState || it->state() == inactiveState, "other states not allowed"); |
aoqi@0 | 5277 | |
aoqi@0 | 5278 | int current_pos = current_position(); |
aoqi@0 | 5279 | if (it->state() == inactiveState) { |
aoqi@0 | 5280 | // the interval is currently inactive, so no spill slot is needed for now. |
aoqi@0 | 5281 | // when the split part is activated, the interval has a new chance to get a register, |
aoqi@0 | 5282 | // so in the best case no stack slot is necessary |
aoqi@0 | 5283 | assert(it->has_hole_between(current_pos - 1, current_pos + 1), "interval can not be inactive otherwise"); |
aoqi@0 | 5284 | split_before_usage(it, current_pos + 1, current_pos + 1); |
aoqi@0 | 5285 | |
aoqi@0 | 5286 | } else { |
aoqi@0 | 5287 | // search the position where the interval must have a register and split |
aoqi@0 | 5288 | // at the optimal position before. |
aoqi@0 | 5289 | // The new created part is added to the unhandled list and will get a register |
aoqi@0 | 5290 | // when it is activated |
aoqi@0 | 5291 | int min_split_pos = current_pos + 1; |
aoqi@0 | 5292 | int max_split_pos = MIN2(it->next_usage(mustHaveRegister, min_split_pos), it->to()); |
aoqi@0 | 5293 | |
aoqi@0 | 5294 | split_before_usage(it, min_split_pos, max_split_pos); |
aoqi@0 | 5295 | |
aoqi@0 | 5296 | assert(it->next_usage(mustHaveRegister, current_pos) == max_jint, "the remaining part is spilled to stack and therefore has no register"); |
aoqi@0 | 5297 | split_for_spilling(it); |
aoqi@0 | 5298 | } |
aoqi@0 | 5299 | } |
aoqi@0 | 5300 | |
aoqi@0 | 5301 | |
aoqi@0 | 5302 | int LinearScanWalker::find_free_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split) { |
aoqi@0 | 5303 | int min_full_reg = any_reg; |
aoqi@0 | 5304 | int max_partial_reg = any_reg; |
aoqi@0 | 5305 | |
aoqi@0 | 5306 | for (int i = _first_reg; i <= _last_reg; i++) { |
aoqi@0 | 5307 | if (i == ignore_reg) { |
aoqi@0 | 5308 | // this register must be ignored |
aoqi@0 | 5309 | |
aoqi@0 | 5310 | } else if (_use_pos[i] >= interval_to) { |
aoqi@0 | 5311 | // this register is free for the full interval |
aoqi@0 | 5312 | if (min_full_reg == any_reg || i == hint_reg || (_use_pos[i] < _use_pos[min_full_reg] && min_full_reg != hint_reg)) { |
aoqi@0 | 5313 | min_full_reg = i; |
aoqi@0 | 5314 | } |
aoqi@0 | 5315 | } else if (_use_pos[i] > reg_needed_until) { |
aoqi@0 | 5316 | // this register is at least free until reg_needed_until |
aoqi@0 | 5317 | if (max_partial_reg == any_reg || i == hint_reg || (_use_pos[i] > _use_pos[max_partial_reg] && max_partial_reg != hint_reg)) { |
aoqi@0 | 5318 | max_partial_reg = i; |
aoqi@0 | 5319 | } |
aoqi@0 | 5320 | } |
aoqi@0 | 5321 | } |
aoqi@0 | 5322 | |
aoqi@0 | 5323 | if (min_full_reg != any_reg) { |
aoqi@0 | 5324 | return min_full_reg; |
aoqi@0 | 5325 | } else if (max_partial_reg != any_reg) { |
aoqi@0 | 5326 | *need_split = true; |
aoqi@0 | 5327 | return max_partial_reg; |
aoqi@0 | 5328 | } else { |
aoqi@0 | 5329 | return any_reg; |
aoqi@0 | 5330 | } |
aoqi@0 | 5331 | } |
aoqi@0 | 5332 | |
aoqi@0 | 5333 | int LinearScanWalker::find_free_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split) { |
aoqi@0 | 5334 | assert((_last_reg - _first_reg + 1) % 2 == 0, "adjust algorithm"); |
aoqi@0 | 5335 | |
aoqi@0 | 5336 | int min_full_reg = any_reg; |
aoqi@0 | 5337 | int max_partial_reg = any_reg; |
aoqi@0 | 5338 | |
aoqi@0 | 5339 | for (int i = _first_reg; i < _last_reg; i+=2) { |
aoqi@0 | 5340 | if (_use_pos[i] >= interval_to && _use_pos[i + 1] >= interval_to) { |
aoqi@0 | 5341 | // this register is free for the full interval |
aoqi@0 | 5342 | if (min_full_reg == any_reg || i == hint_reg || (_use_pos[i] < _use_pos[min_full_reg] && min_full_reg != hint_reg)) { |
aoqi@0 | 5343 | min_full_reg = i; |
aoqi@0 | 5344 | } |
aoqi@0 | 5345 | } else if (_use_pos[i] > reg_needed_until && _use_pos[i + 1] > reg_needed_until) { |
aoqi@0 | 5346 | // this register is at least free until reg_needed_until |
aoqi@0 | 5347 | if (max_partial_reg == any_reg || i == hint_reg || (_use_pos[i] > _use_pos[max_partial_reg] && max_partial_reg != hint_reg)) { |
aoqi@0 | 5348 | max_partial_reg = i; |
aoqi@0 | 5349 | } |
aoqi@0 | 5350 | } |
aoqi@0 | 5351 | } |
aoqi@0 | 5352 | |
aoqi@0 | 5353 | if (min_full_reg != any_reg) { |
aoqi@0 | 5354 | return min_full_reg; |
aoqi@0 | 5355 | } else if (max_partial_reg != any_reg) { |
aoqi@0 | 5356 | *need_split = true; |
aoqi@0 | 5357 | return max_partial_reg; |
aoqi@0 | 5358 | } else { |
aoqi@0 | 5359 | return any_reg; |
aoqi@0 | 5360 | } |
aoqi@0 | 5361 | } |
aoqi@0 | 5362 | |
aoqi@0 | 5363 | |
aoqi@0 | 5364 | bool LinearScanWalker::alloc_free_reg(Interval* cur) { |
aoqi@0 | 5365 | TRACE_LINEAR_SCAN(2, tty->print("trying to find free register for "); cur->print()); |
aoqi@0 | 5366 | |
aoqi@0 | 5367 | init_use_lists(true); |
aoqi@0 | 5368 | free_exclude_active_fixed(); |
aoqi@0 | 5369 | free_exclude_active_any(); |
aoqi@0 | 5370 | free_collect_inactive_fixed(cur); |
aoqi@0 | 5371 | free_collect_inactive_any(cur); |
aoqi@0 | 5372 | // free_collect_unhandled(fixedKind, cur); |
aoqi@0 | 5373 | assert(unhandled_first(fixedKind) == Interval::end(), "must not have unhandled fixed intervals because all fixed intervals have a use at position 0"); |
aoqi@0 | 5374 | |
aoqi@0 | 5375 | // _use_pos contains the start of the next interval that has this register assigned |
aoqi@0 | 5376 | // (either as a fixed register or a normal allocated register in the past) |
aoqi@0 | 5377 | // only intervals overlapping with cur are processed, non-overlapping invervals can be ignored safely |
aoqi@0 | 5378 | TRACE_LINEAR_SCAN(4, tty->print_cr(" state of registers:")); |
aoqi@0 | 5379 | TRACE_LINEAR_SCAN(4, for (int i = _first_reg; i <= _last_reg; i++) tty->print_cr(" reg %d: use_pos: %d", i, _use_pos[i])); |
aoqi@0 | 5380 | |
aoqi@0 | 5381 | int hint_reg, hint_regHi; |
aoqi@0 | 5382 | Interval* register_hint = cur->register_hint(); |
aoqi@0 | 5383 | if (register_hint != NULL) { |
aoqi@0 | 5384 | hint_reg = register_hint->assigned_reg(); |
aoqi@0 | 5385 | hint_regHi = register_hint->assigned_regHi(); |
aoqi@0 | 5386 | |
aoqi@0 | 5387 | if (allocator()->is_precolored_cpu_interval(register_hint)) { |
aoqi@0 | 5388 | assert(hint_reg != any_reg && hint_regHi == any_reg, "must be for fixed intervals"); |
aoqi@0 | 5389 | hint_regHi = hint_reg + 1; // connect e.g. eax-edx |
aoqi@0 | 5390 | } |
aoqi@0 | 5391 | TRACE_LINEAR_SCAN(4, tty->print(" hint registers %d, %d from interval ", hint_reg, hint_regHi); register_hint->print()); |
aoqi@0 | 5392 | |
aoqi@0 | 5393 | } else { |
aoqi@0 | 5394 | hint_reg = any_reg; |
aoqi@0 | 5395 | hint_regHi = any_reg; |
aoqi@0 | 5396 | } |
aoqi@0 | 5397 | assert(hint_reg == any_reg || hint_reg != hint_regHi, "hint reg and regHi equal"); |
aoqi@0 | 5398 | assert(cur->assigned_reg() == any_reg && cur->assigned_regHi() == any_reg, "register already assigned to interval"); |
aoqi@0 | 5399 | |
aoqi@0 | 5400 | // the register must be free at least until this position |
aoqi@0 | 5401 | int reg_needed_until = cur->from() + 1; |
aoqi@0 | 5402 | int interval_to = cur->to(); |
aoqi@0 | 5403 | |
aoqi@0 | 5404 | bool need_split = false; |
aoqi@0 | 5405 | int split_pos = -1; |
aoqi@0 | 5406 | int reg = any_reg; |
aoqi@0 | 5407 | int regHi = any_reg; |
aoqi@0 | 5408 | |
aoqi@0 | 5409 | if (_adjacent_regs) { |
aoqi@0 | 5410 | reg = find_free_double_reg(reg_needed_until, interval_to, hint_reg, &need_split); |
aoqi@0 | 5411 | regHi = reg + 1; |
aoqi@0 | 5412 | if (reg == any_reg) { |
aoqi@0 | 5413 | return false; |
aoqi@0 | 5414 | } |
aoqi@0 | 5415 | split_pos = MIN2(_use_pos[reg], _use_pos[regHi]); |
aoqi@0 | 5416 | |
aoqi@0 | 5417 | } else { |
aoqi@0 | 5418 | reg = find_free_reg(reg_needed_until, interval_to, hint_reg, any_reg, &need_split); |
aoqi@0 | 5419 | if (reg == any_reg) { |
aoqi@0 | 5420 | return false; |
aoqi@0 | 5421 | } |
aoqi@0 | 5422 | split_pos = _use_pos[reg]; |
aoqi@0 | 5423 | |
aoqi@0 | 5424 | if (_num_phys_regs == 2) { |
aoqi@0 | 5425 | regHi = find_free_reg(reg_needed_until, interval_to, hint_regHi, reg, &need_split); |
aoqi@0 | 5426 | |
aoqi@0 | 5427 | if (_use_pos[reg] < interval_to && regHi == any_reg) { |
aoqi@0 | 5428 | // do not split interval if only one register can be assigned until the split pos |
aoqi@0 | 5429 | // (when one register is found for the whole interval, split&spill is only |
aoqi@0 | 5430 | // performed for the hi register) |
aoqi@0 | 5431 | return false; |
aoqi@0 | 5432 | |
aoqi@0 | 5433 | } else if (regHi != any_reg) { |
aoqi@0 | 5434 | split_pos = MIN2(split_pos, _use_pos[regHi]); |
aoqi@0 | 5435 | |
aoqi@0 | 5436 | // sort register numbers to prevent e.g. a move from eax,ebx to ebx,eax |
aoqi@0 | 5437 | if (reg > regHi) { |
aoqi@0 | 5438 | int temp = reg; |
aoqi@0 | 5439 | reg = regHi; |
aoqi@0 | 5440 | regHi = temp; |
aoqi@0 | 5441 | } |
aoqi@0 | 5442 | } |
aoqi@0 | 5443 | } |
aoqi@0 | 5444 | } |
aoqi@0 | 5445 | |
aoqi@0 | 5446 | cur->assign_reg(reg, regHi); |
aoqi@0 | 5447 | TRACE_LINEAR_SCAN(2, tty->print_cr("selected register %d, %d", reg, regHi)); |
aoqi@0 | 5448 | |
aoqi@0 | 5449 | assert(split_pos > 0, "invalid split_pos"); |
aoqi@0 | 5450 | if (need_split) { |
aoqi@0 | 5451 | // register not available for full interval, so split it |
aoqi@0 | 5452 | split_when_partial_register_available(cur, split_pos); |
aoqi@0 | 5453 | } |
aoqi@0 | 5454 | |
aoqi@0 | 5455 | // only return true if interval is completely assigned |
aoqi@0 | 5456 | return _num_phys_regs == 1 || regHi != any_reg; |
aoqi@0 | 5457 | } |
aoqi@0 | 5458 | |
aoqi@0 | 5459 | |
aoqi@0 | 5460 | int LinearScanWalker::find_locked_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split) { |
aoqi@0 | 5461 | int max_reg = any_reg; |
aoqi@0 | 5462 | |
aoqi@0 | 5463 | for (int i = _first_reg; i <= _last_reg; i++) { |
aoqi@0 | 5464 | if (i == ignore_reg) { |
aoqi@0 | 5465 | // this register must be ignored |
aoqi@0 | 5466 | |
aoqi@0 | 5467 | } else if (_use_pos[i] > reg_needed_until) { |
aoqi@0 | 5468 | if (max_reg == any_reg || i == hint_reg || (_use_pos[i] > _use_pos[max_reg] && max_reg != hint_reg)) { |
aoqi@0 | 5469 | max_reg = i; |
aoqi@0 | 5470 | } |
aoqi@0 | 5471 | } |
aoqi@0 | 5472 | } |
aoqi@0 | 5473 | |
aoqi@0 | 5474 | if (max_reg != any_reg && _block_pos[max_reg] <= interval_to) { |
aoqi@0 | 5475 | *need_split = true; |
aoqi@0 | 5476 | } |
aoqi@0 | 5477 | |
aoqi@0 | 5478 | return max_reg; |
aoqi@0 | 5479 | } |
aoqi@0 | 5480 | |
aoqi@0 | 5481 | int LinearScanWalker::find_locked_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split) { |
aoqi@0 | 5482 | assert((_last_reg - _first_reg + 1) % 2 == 0, "adjust algorithm"); |
aoqi@0 | 5483 | |
aoqi@0 | 5484 | int max_reg = any_reg; |
aoqi@0 | 5485 | |
aoqi@0 | 5486 | for (int i = _first_reg; i < _last_reg; i+=2) { |
aoqi@0 | 5487 | if (_use_pos[i] > reg_needed_until && _use_pos[i + 1] > reg_needed_until) { |
aoqi@0 | 5488 | if (max_reg == any_reg || _use_pos[i] > _use_pos[max_reg]) { |
aoqi@0 | 5489 | max_reg = i; |
aoqi@0 | 5490 | } |
aoqi@0 | 5491 | } |
aoqi@0 | 5492 | } |
aoqi@0 | 5493 | |
aoqi@0 | 5494 | if (_block_pos[max_reg] <= interval_to || _block_pos[max_reg + 1] <= interval_to) { |
aoqi@0 | 5495 | *need_split = true; |
aoqi@0 | 5496 | } |
aoqi@0 | 5497 | |
aoqi@0 | 5498 | return max_reg; |
aoqi@0 | 5499 | } |
aoqi@0 | 5500 | |
aoqi@0 | 5501 | void LinearScanWalker::split_and_spill_intersecting_intervals(int reg, int regHi) { |
aoqi@0 | 5502 | assert(reg != any_reg, "no register assigned"); |
aoqi@0 | 5503 | |
aoqi@0 | 5504 | for (int i = 0; i < _spill_intervals[reg]->length(); i++) { |
aoqi@0 | 5505 | Interval* it = _spill_intervals[reg]->at(i); |
aoqi@0 | 5506 | remove_from_list(it); |
aoqi@0 | 5507 | split_and_spill_interval(it); |
aoqi@0 | 5508 | } |
aoqi@0 | 5509 | |
aoqi@0 | 5510 | if (regHi != any_reg) { |
aoqi@0 | 5511 | IntervalList* processed = _spill_intervals[reg]; |
aoqi@0 | 5512 | for (int i = 0; i < _spill_intervals[regHi]->length(); i++) { |
aoqi@0 | 5513 | Interval* it = _spill_intervals[regHi]->at(i); |
aoqi@0 | 5514 | if (processed->index_of(it) == -1) { |
aoqi@0 | 5515 | remove_from_list(it); |
aoqi@0 | 5516 | split_and_spill_interval(it); |
aoqi@0 | 5517 | } |
aoqi@0 | 5518 | } |
aoqi@0 | 5519 | } |
aoqi@0 | 5520 | } |
aoqi@0 | 5521 | |
aoqi@0 | 5522 | |
aoqi@0 | 5523 | // Split an Interval and spill it to memory so that cur can be placed in a register |
aoqi@0 | 5524 | void LinearScanWalker::alloc_locked_reg(Interval* cur) { |
aoqi@0 | 5525 | TRACE_LINEAR_SCAN(2, tty->print("need to split and spill to get register for "); cur->print()); |
aoqi@0 | 5526 | |
aoqi@0 | 5527 | // collect current usage of registers |
aoqi@0 | 5528 | init_use_lists(false); |
aoqi@0 | 5529 | spill_exclude_active_fixed(); |
aoqi@0 | 5530 | // spill_block_unhandled_fixed(cur); |
aoqi@0 | 5531 | assert(unhandled_first(fixedKind) == Interval::end(), "must not have unhandled fixed intervals because all fixed intervals have a use at position 0"); |
aoqi@0 | 5532 | spill_block_inactive_fixed(cur); |
aoqi@0 | 5533 | spill_collect_active_any(); |
aoqi@0 | 5534 | spill_collect_inactive_any(cur); |
aoqi@0 | 5535 | |
aoqi@0 | 5536 | #ifndef PRODUCT |
aoqi@0 | 5537 | if (TraceLinearScanLevel >= 4) { |
aoqi@0 | 5538 | tty->print_cr(" state of registers:"); |
aoqi@0 | 5539 | for (int i = _first_reg; i <= _last_reg; i++) { |
aoqi@0 | 5540 | tty->print(" reg %d: use_pos: %d, block_pos: %d, intervals: ", i, _use_pos[i], _block_pos[i]); |
aoqi@0 | 5541 | for (int j = 0; j < _spill_intervals[i]->length(); j++) { |
aoqi@0 | 5542 | tty->print("%d ", _spill_intervals[i]->at(j)->reg_num()); |
aoqi@0 | 5543 | } |
aoqi@0 | 5544 | tty->cr(); |
aoqi@0 | 5545 | } |
aoqi@0 | 5546 | } |
aoqi@0 | 5547 | #endif |
aoqi@0 | 5548 | |
aoqi@0 | 5549 | // the register must be free at least until this position |
aoqi@0 | 5550 | int reg_needed_until = MIN2(cur->first_usage(mustHaveRegister), cur->from() + 1); |
aoqi@0 | 5551 | int interval_to = cur->to(); |
aoqi@0 | 5552 | assert (reg_needed_until > 0 && reg_needed_until < max_jint, "interval has no use"); |
aoqi@0 | 5553 | |
aoqi@0 | 5554 | int split_pos = 0; |
aoqi@0 | 5555 | int use_pos = 0; |
aoqi@0 | 5556 | bool need_split = false; |
aoqi@0 | 5557 | int reg, regHi; |
aoqi@0 | 5558 | |
aoqi@0 | 5559 | if (_adjacent_regs) { |
aoqi@0 | 5560 | reg = find_locked_double_reg(reg_needed_until, interval_to, any_reg, &need_split); |
aoqi@0 | 5561 | regHi = reg + 1; |
aoqi@0 | 5562 | |
aoqi@0 | 5563 | if (reg != any_reg) { |
aoqi@0 | 5564 | use_pos = MIN2(_use_pos[reg], _use_pos[regHi]); |
aoqi@0 | 5565 | split_pos = MIN2(_block_pos[reg], _block_pos[regHi]); |
aoqi@0 | 5566 | } |
aoqi@0 | 5567 | } else { |
aoqi@0 | 5568 | reg = find_locked_reg(reg_needed_until, interval_to, any_reg, cur->assigned_reg(), &need_split); |
aoqi@0 | 5569 | regHi = any_reg; |
aoqi@0 | 5570 | |
aoqi@0 | 5571 | if (reg != any_reg) { |
aoqi@0 | 5572 | use_pos = _use_pos[reg]; |
aoqi@0 | 5573 | split_pos = _block_pos[reg]; |
aoqi@0 | 5574 | |
aoqi@0 | 5575 | if (_num_phys_regs == 2) { |
aoqi@0 | 5576 | if (cur->assigned_reg() != any_reg) { |
aoqi@0 | 5577 | regHi = reg; |
aoqi@0 | 5578 | reg = cur->assigned_reg(); |
aoqi@0 | 5579 | } else { |
aoqi@0 | 5580 | regHi = find_locked_reg(reg_needed_until, interval_to, any_reg, reg, &need_split); |
aoqi@0 | 5581 | if (regHi != any_reg) { |
aoqi@0 | 5582 | use_pos = MIN2(use_pos, _use_pos[regHi]); |
aoqi@0 | 5583 | split_pos = MIN2(split_pos, _block_pos[regHi]); |
aoqi@0 | 5584 | } |
aoqi@0 | 5585 | } |
aoqi@0 | 5586 | |
aoqi@0 | 5587 | if (regHi != any_reg && reg > regHi) { |
aoqi@0 | 5588 | // sort register numbers to prevent e.g. a move from eax,ebx to ebx,eax |
aoqi@0 | 5589 | int temp = reg; |
aoqi@0 | 5590 | reg = regHi; |
aoqi@0 | 5591 | regHi = temp; |
aoqi@0 | 5592 | } |
aoqi@0 | 5593 | } |
aoqi@0 | 5594 | } |
aoqi@0 | 5595 | } |
aoqi@0 | 5596 | |
aoqi@0 | 5597 | if (reg == any_reg || (_num_phys_regs == 2 && regHi == any_reg) || use_pos <= cur->first_usage(mustHaveRegister)) { |
aoqi@0 | 5598 | // the first use of cur is later than the spilling position -> spill cur |
aoqi@0 | 5599 | TRACE_LINEAR_SCAN(4, tty->print_cr("able to spill current interval. first_usage(register): %d, use_pos: %d", cur->first_usage(mustHaveRegister), use_pos)); |
aoqi@0 | 5600 | |
aoqi@0 | 5601 | if (cur->first_usage(mustHaveRegister) <= cur->from() + 1) { |
aoqi@0 | 5602 | assert(false, "cannot spill interval that is used in first instruction (possible reason: no register found)"); |
aoqi@0 | 5603 | // assign a reasonable register and do a bailout in product mode to avoid errors |
aoqi@0 | 5604 | allocator()->assign_spill_slot(cur); |
aoqi@0 | 5605 | BAILOUT("LinearScan: no register found"); |
aoqi@0 | 5606 | } |
aoqi@0 | 5607 | |
aoqi@0 | 5608 | split_and_spill_interval(cur); |
aoqi@0 | 5609 | } else { |
aoqi@0 | 5610 | TRACE_LINEAR_SCAN(4, tty->print_cr("decided to use register %d, %d", reg, regHi)); |
aoqi@0 | 5611 | assert(reg != any_reg && (_num_phys_regs == 1 || regHi != any_reg), "no register found"); |
aoqi@0 | 5612 | assert(split_pos > 0, "invalid split_pos"); |
aoqi@0 | 5613 | assert(need_split == false || split_pos > cur->from(), "splitting interval at from"); |
aoqi@0 | 5614 | |
aoqi@0 | 5615 | cur->assign_reg(reg, regHi); |
aoqi@0 | 5616 | if (need_split) { |
aoqi@0 | 5617 | // register not available for full interval, so split it |
aoqi@0 | 5618 | split_when_partial_register_available(cur, split_pos); |
aoqi@0 | 5619 | } |
aoqi@0 | 5620 | |
aoqi@0 | 5621 | // perform splitting and spilling for all affected intervalls |
aoqi@0 | 5622 | split_and_spill_intersecting_intervals(reg, regHi); |
aoqi@0 | 5623 | } |
aoqi@0 | 5624 | } |
aoqi@0 | 5625 | |
aoqi@0 | 5626 | bool LinearScanWalker::no_allocation_possible(Interval* cur) { |
aoqi@0 | 5627 | #ifdef X86 |
aoqi@0 | 5628 | // fast calculation of intervals that can never get a register because the |
aoqi@0 | 5629 | // the next instruction is a call that blocks all registers |
aoqi@0 | 5630 | // Note: this does not work if callee-saved registers are available (e.g. on Sparc) |
aoqi@0 | 5631 | |
aoqi@0 | 5632 | // check if this interval is the result of a split operation |
aoqi@0 | 5633 | // (an interval got a register until this position) |
aoqi@0 | 5634 | int pos = cur->from(); |
aoqi@0 | 5635 | if ((pos & 1) == 1) { |
aoqi@0 | 5636 | // the current instruction is a call that blocks all registers |
aoqi@0 | 5637 | if (pos < allocator()->max_lir_op_id() && allocator()->has_call(pos + 1)) { |
aoqi@0 | 5638 | TRACE_LINEAR_SCAN(4, tty->print_cr(" free register cannot be available because all registers blocked by following call")); |
aoqi@0 | 5639 | |
aoqi@0 | 5640 | // safety check that there is really no register available |
aoqi@0 | 5641 | assert(alloc_free_reg(cur) == false, "found a register for this interval"); |
aoqi@0 | 5642 | return true; |
aoqi@0 | 5643 | } |
aoqi@0 | 5644 | |
aoqi@0 | 5645 | } |
aoqi@0 | 5646 | #endif |
aoqi@0 | 5647 | return false; |
aoqi@0 | 5648 | } |
aoqi@0 | 5649 | |
aoqi@0 | 5650 | void LinearScanWalker::init_vars_for_alloc(Interval* cur) { |
aoqi@0 | 5651 | BasicType type = cur->type(); |
aoqi@0 | 5652 | _num_phys_regs = LinearScan::num_physical_regs(type); |
aoqi@0 | 5653 | _adjacent_regs = LinearScan::requires_adjacent_regs(type); |
aoqi@0 | 5654 | |
aoqi@0 | 5655 | if (pd_init_regs_for_alloc(cur)) { |
aoqi@0 | 5656 | // the appropriate register range was selected. |
aoqi@0 | 5657 | } else if (type == T_FLOAT || type == T_DOUBLE) { |
aoqi@0 | 5658 | _first_reg = pd_first_fpu_reg; |
aoqi@0 | 5659 | _last_reg = pd_last_fpu_reg; |
aoqi@0 | 5660 | } else { |
aoqi@0 | 5661 | _first_reg = pd_first_cpu_reg; |
aoqi@0 | 5662 | _last_reg = FrameMap::last_cpu_reg(); |
aoqi@0 | 5663 | } |
aoqi@0 | 5664 | |
aoqi@0 | 5665 | assert(0 <= _first_reg && _first_reg < LinearScan::nof_regs, "out of range"); |
aoqi@0 | 5666 | assert(0 <= _last_reg && _last_reg < LinearScan::nof_regs, "out of range"); |
aoqi@0 | 5667 | } |
aoqi@0 | 5668 | |
aoqi@0 | 5669 | |
aoqi@0 | 5670 | bool LinearScanWalker::is_move(LIR_Op* op, Interval* from, Interval* to) { |
aoqi@0 | 5671 | if (op->code() != lir_move) { |
aoqi@0 | 5672 | return false; |
aoqi@0 | 5673 | } |
aoqi@0 | 5674 | assert(op->as_Op1() != NULL, "move must be LIR_Op1"); |
aoqi@0 | 5675 | |
aoqi@0 | 5676 | LIR_Opr in = ((LIR_Op1*)op)->in_opr(); |
aoqi@0 | 5677 | LIR_Opr res = ((LIR_Op1*)op)->result_opr(); |
aoqi@0 | 5678 | return in->is_virtual() && res->is_virtual() && in->vreg_number() == from->reg_num() && res->vreg_number() == to->reg_num(); |
aoqi@0 | 5679 | } |
aoqi@0 | 5680 | |
aoqi@0 | 5681 | // optimization (especially for phi functions of nested loops): |
aoqi@0 | 5682 | // assign same spill slot to non-intersecting intervals |
aoqi@0 | 5683 | void LinearScanWalker::combine_spilled_intervals(Interval* cur) { |
aoqi@0 | 5684 | if (cur->is_split_child()) { |
aoqi@0 | 5685 | // optimization is only suitable for split parents |
aoqi@0 | 5686 | return; |
aoqi@0 | 5687 | } |
aoqi@0 | 5688 | |
aoqi@0 | 5689 | Interval* register_hint = cur->register_hint(false); |
aoqi@0 | 5690 | if (register_hint == NULL) { |
aoqi@0 | 5691 | // cur is not the target of a move, otherwise register_hint would be set |
aoqi@0 | 5692 | return; |
aoqi@0 | 5693 | } |
aoqi@0 | 5694 | assert(register_hint->is_split_parent(), "register hint must be split parent"); |
aoqi@0 | 5695 | |
aoqi@0 | 5696 | if (cur->spill_state() != noOptimization || register_hint->spill_state() != noOptimization) { |
aoqi@0 | 5697 | // combining the stack slots for intervals where spill move optimization is applied |
aoqi@0 | 5698 | // is not benefitial and would cause problems |
aoqi@0 | 5699 | return; |
aoqi@0 | 5700 | } |
aoqi@0 | 5701 | |
aoqi@0 | 5702 | int begin_pos = cur->from(); |
aoqi@0 | 5703 | int end_pos = cur->to(); |
aoqi@0 | 5704 | if (end_pos > allocator()->max_lir_op_id() || (begin_pos & 1) != 0 || (end_pos & 1) != 0) { |
aoqi@0 | 5705 | // safety check that lir_op_with_id is allowed |
aoqi@0 | 5706 | return; |
aoqi@0 | 5707 | } |
aoqi@0 | 5708 | |
aoqi@0 | 5709 | if (!is_move(allocator()->lir_op_with_id(begin_pos), register_hint, cur) || !is_move(allocator()->lir_op_with_id(end_pos), cur, register_hint)) { |
aoqi@0 | 5710 | // cur and register_hint are not connected with two moves |
aoqi@0 | 5711 | return; |
aoqi@0 | 5712 | } |
aoqi@0 | 5713 | |
aoqi@0 | 5714 | Interval* begin_hint = register_hint->split_child_at_op_id(begin_pos, LIR_OpVisitState::inputMode); |
aoqi@0 | 5715 | Interval* end_hint = register_hint->split_child_at_op_id(end_pos, LIR_OpVisitState::outputMode); |
aoqi@0 | 5716 | if (begin_hint == end_hint || begin_hint->to() != begin_pos || end_hint->from() != end_pos) { |
aoqi@0 | 5717 | // register_hint must be split, otherwise the re-writing of use positions does not work |
aoqi@0 | 5718 | return; |
aoqi@0 | 5719 | } |
aoqi@0 | 5720 | |
aoqi@0 | 5721 | assert(begin_hint->assigned_reg() != any_reg, "must have register assigned"); |
aoqi@0 | 5722 | assert(end_hint->assigned_reg() == any_reg, "must not have register assigned"); |
aoqi@0 | 5723 | assert(cur->first_usage(mustHaveRegister) == begin_pos, "must have use position at begin of interval because of move"); |
aoqi@0 | 5724 | assert(end_hint->first_usage(mustHaveRegister) == end_pos, "must have use position at begin of interval because of move"); |
aoqi@0 | 5725 | |
aoqi@0 | 5726 | if (begin_hint->assigned_reg() < LinearScan::nof_regs) { |
aoqi@0 | 5727 | // register_hint is not spilled at begin_pos, so it would not be benefitial to immediately spill cur |
aoqi@0 | 5728 | return; |
aoqi@0 | 5729 | } |
aoqi@0 | 5730 | assert(register_hint->canonical_spill_slot() != -1, "must be set when part of interval was spilled"); |
aoqi@0 | 5731 | |
aoqi@0 | 5732 | // modify intervals such that cur gets the same stack slot as register_hint |
aoqi@0 | 5733 | // delete use positions to prevent the intervals to get a register at beginning |
aoqi@0 | 5734 | cur->set_canonical_spill_slot(register_hint->canonical_spill_slot()); |
aoqi@0 | 5735 | cur->remove_first_use_pos(); |
aoqi@0 | 5736 | end_hint->remove_first_use_pos(); |
aoqi@0 | 5737 | } |
aoqi@0 | 5738 | |
aoqi@0 | 5739 | |
aoqi@0 | 5740 | // allocate a physical register or memory location to an interval |
aoqi@0 | 5741 | bool LinearScanWalker::activate_current() { |
aoqi@0 | 5742 | Interval* cur = current(); |
aoqi@0 | 5743 | bool result = true; |
aoqi@0 | 5744 | |
aoqi@0 | 5745 | TRACE_LINEAR_SCAN(2, tty->print ("+++++ activating interval "); cur->print()); |
aoqi@0 | 5746 | TRACE_LINEAR_SCAN(4, tty->print_cr(" split_parent: %d, insert_move_when_activated: %d", cur->split_parent()->reg_num(), cur->insert_move_when_activated())); |
aoqi@0 | 5747 | |
aoqi@0 | 5748 | if (cur->assigned_reg() >= LinearScan::nof_regs) { |
aoqi@0 | 5749 | // activating an interval that has a stack slot assigned -> split it at first use position |
aoqi@0 | 5750 | // used for method parameters |
aoqi@0 | 5751 | TRACE_LINEAR_SCAN(4, tty->print_cr(" interval has spill slot assigned (method parameter) -> split it before first use")); |
aoqi@0 | 5752 | |
aoqi@0 | 5753 | split_stack_interval(cur); |
aoqi@0 | 5754 | result = false; |
aoqi@0 | 5755 | |
aoqi@0 | 5756 | } else if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::must_start_in_memory)) { |
aoqi@0 | 5757 | // activating an interval that must start in a stack slot, but may get a register later |
aoqi@0 | 5758 | // used for lir_roundfp: rounding is done by store to stack and reload later |
aoqi@0 | 5759 | TRACE_LINEAR_SCAN(4, tty->print_cr(" interval must start in stack slot -> split it before first use")); |
aoqi@0 | 5760 | assert(cur->assigned_reg() == any_reg && cur->assigned_regHi() == any_reg, "register already assigned"); |
aoqi@0 | 5761 | |
aoqi@0 | 5762 | allocator()->assign_spill_slot(cur); |
aoqi@0 | 5763 | split_stack_interval(cur); |
aoqi@0 | 5764 | result = false; |
aoqi@0 | 5765 | |
aoqi@0 | 5766 | } else if (cur->assigned_reg() == any_reg) { |
aoqi@0 | 5767 | // interval has not assigned register -> normal allocation |
aoqi@0 | 5768 | // (this is the normal case for most intervals) |
aoqi@0 | 5769 | TRACE_LINEAR_SCAN(4, tty->print_cr(" normal allocation of register")); |
aoqi@0 | 5770 | |
aoqi@0 | 5771 | // assign same spill slot to non-intersecting intervals |
aoqi@0 | 5772 | combine_spilled_intervals(cur); |
aoqi@0 | 5773 | |
aoqi@0 | 5774 | init_vars_for_alloc(cur); |
aoqi@0 | 5775 | if (no_allocation_possible(cur) || !alloc_free_reg(cur)) { |
aoqi@0 | 5776 | // no empty register available. |
aoqi@0 | 5777 | // split and spill another interval so that this interval gets a register |
aoqi@0 | 5778 | alloc_locked_reg(cur); |
aoqi@0 | 5779 | } |
aoqi@0 | 5780 | |
aoqi@0 | 5781 | // spilled intervals need not be move to active-list |
aoqi@0 | 5782 | if (cur->assigned_reg() >= LinearScan::nof_regs) { |
aoqi@0 | 5783 | result = false; |
aoqi@0 | 5784 | } |
aoqi@0 | 5785 | } |
aoqi@0 | 5786 | |
aoqi@0 | 5787 | // load spilled values that become active from stack slot to register |
aoqi@0 | 5788 | if (cur->insert_move_when_activated()) { |
aoqi@0 | 5789 | assert(cur->is_split_child(), "must be"); |
aoqi@0 | 5790 | assert(cur->current_split_child() != NULL, "must be"); |
aoqi@0 | 5791 | assert(cur->current_split_child()->reg_num() != cur->reg_num(), "cannot insert move between same interval"); |
aoqi@0 | 5792 | TRACE_LINEAR_SCAN(4, tty->print_cr("Inserting move from interval %d to %d because insert_move_when_activated is set", cur->current_split_child()->reg_num(), cur->reg_num())); |
aoqi@0 | 5793 | |
aoqi@0 | 5794 | insert_move(cur->from(), cur->current_split_child(), cur); |
aoqi@0 | 5795 | } |
aoqi@0 | 5796 | cur->make_current_split_child(); |
aoqi@0 | 5797 | |
aoqi@0 | 5798 | return result; // true = interval is moved to active list |
aoqi@0 | 5799 | } |
aoqi@0 | 5800 | |
aoqi@0 | 5801 | |
aoqi@0 | 5802 | // Implementation of EdgeMoveOptimizer |
aoqi@0 | 5803 | |
aoqi@0 | 5804 | EdgeMoveOptimizer::EdgeMoveOptimizer() : |
aoqi@0 | 5805 | _edge_instructions(4), |
aoqi@0 | 5806 | _edge_instructions_idx(4) |
aoqi@0 | 5807 | { |
aoqi@0 | 5808 | } |
aoqi@0 | 5809 | |
aoqi@0 | 5810 | void EdgeMoveOptimizer::optimize(BlockList* code) { |
aoqi@0 | 5811 | EdgeMoveOptimizer optimizer = EdgeMoveOptimizer(); |
aoqi@0 | 5812 | |
aoqi@0 | 5813 | // ignore the first block in the list (index 0 is not processed) |
aoqi@0 | 5814 | for (int i = code->length() - 1; i >= 1; i--) { |
aoqi@0 | 5815 | BlockBegin* block = code->at(i); |
aoqi@0 | 5816 | |
aoqi@0 | 5817 | if (block->number_of_preds() > 1 && !block->is_set(BlockBegin::exception_entry_flag)) { |
aoqi@0 | 5818 | optimizer.optimize_moves_at_block_end(block); |
aoqi@0 | 5819 | } |
aoqi@0 | 5820 | if (block->number_of_sux() == 2) { |
aoqi@0 | 5821 | optimizer.optimize_moves_at_block_begin(block); |
aoqi@0 | 5822 | } |
aoqi@0 | 5823 | } |
aoqi@0 | 5824 | } |
aoqi@0 | 5825 | |
aoqi@0 | 5826 | |
aoqi@0 | 5827 | // clear all internal data structures |
aoqi@0 | 5828 | void EdgeMoveOptimizer::init_instructions() { |
aoqi@0 | 5829 | _edge_instructions.clear(); |
aoqi@0 | 5830 | _edge_instructions_idx.clear(); |
aoqi@0 | 5831 | } |
aoqi@0 | 5832 | |
aoqi@0 | 5833 | // append a lir-instruction-list and the index of the current operation in to the list |
aoqi@0 | 5834 | void EdgeMoveOptimizer::append_instructions(LIR_OpList* instructions, int instructions_idx) { |
aoqi@0 | 5835 | _edge_instructions.append(instructions); |
aoqi@0 | 5836 | _edge_instructions_idx.append(instructions_idx); |
aoqi@0 | 5837 | } |
aoqi@0 | 5838 | |
aoqi@0 | 5839 | // return the current operation of the given edge (predecessor or successor) |
aoqi@0 | 5840 | LIR_Op* EdgeMoveOptimizer::instruction_at(int edge) { |
aoqi@0 | 5841 | LIR_OpList* instructions = _edge_instructions.at(edge); |
aoqi@0 | 5842 | int idx = _edge_instructions_idx.at(edge); |
aoqi@0 | 5843 | |
aoqi@0 | 5844 | if (idx < instructions->length()) { |
aoqi@0 | 5845 | return instructions->at(idx); |
aoqi@0 | 5846 | } else { |
aoqi@0 | 5847 | return NULL; |
aoqi@0 | 5848 | } |
aoqi@0 | 5849 | } |
aoqi@0 | 5850 | |
aoqi@0 | 5851 | // removes the current operation of the given edge (predecessor or successor) |
aoqi@0 | 5852 | void EdgeMoveOptimizer::remove_cur_instruction(int edge, bool decrement_index) { |
aoqi@0 | 5853 | LIR_OpList* instructions = _edge_instructions.at(edge); |
aoqi@0 | 5854 | int idx = _edge_instructions_idx.at(edge); |
aoqi@0 | 5855 | instructions->remove_at(idx); |
aoqi@0 | 5856 | |
aoqi@0 | 5857 | if (decrement_index) { |
aoqi@0 | 5858 | _edge_instructions_idx.at_put(edge, idx - 1); |
aoqi@0 | 5859 | } |
aoqi@0 | 5860 | } |
aoqi@0 | 5861 | |
aoqi@0 | 5862 | |
aoqi@0 | 5863 | bool EdgeMoveOptimizer::operations_different(LIR_Op* op1, LIR_Op* op2) { |
aoqi@0 | 5864 | if (op1 == NULL || op2 == NULL) { |
aoqi@0 | 5865 | // at least one block is already empty -> no optimization possible |
aoqi@0 | 5866 | return true; |
aoqi@0 | 5867 | } |
aoqi@0 | 5868 | |
aoqi@0 | 5869 | if (op1->code() == lir_move && op2->code() == lir_move) { |
aoqi@0 | 5870 | assert(op1->as_Op1() != NULL, "move must be LIR_Op1"); |
aoqi@0 | 5871 | assert(op2->as_Op1() != NULL, "move must be LIR_Op1"); |
aoqi@0 | 5872 | LIR_Op1* move1 = (LIR_Op1*)op1; |
aoqi@0 | 5873 | LIR_Op1* move2 = (LIR_Op1*)op2; |
aoqi@0 | 5874 | if (move1->info() == move2->info() && move1->in_opr() == move2->in_opr() && move1->result_opr() == move2->result_opr()) { |
aoqi@0 | 5875 | // these moves are exactly equal and can be optimized |
aoqi@0 | 5876 | return false; |
aoqi@0 | 5877 | } |
aoqi@0 | 5878 | |
aoqi@0 | 5879 | } else if (op1->code() == lir_fxch && op2->code() == lir_fxch) { |
aoqi@0 | 5880 | assert(op1->as_Op1() != NULL, "fxch must be LIR_Op1"); |
aoqi@0 | 5881 | assert(op2->as_Op1() != NULL, "fxch must be LIR_Op1"); |
aoqi@0 | 5882 | LIR_Op1* fxch1 = (LIR_Op1*)op1; |
aoqi@0 | 5883 | LIR_Op1* fxch2 = (LIR_Op1*)op2; |
aoqi@0 | 5884 | if (fxch1->in_opr()->as_jint() == fxch2->in_opr()->as_jint()) { |
aoqi@0 | 5885 | // equal FPU stack operations can be optimized |
aoqi@0 | 5886 | return false; |
aoqi@0 | 5887 | } |
aoqi@0 | 5888 | |
aoqi@0 | 5889 | } else if (op1->code() == lir_fpop_raw && op2->code() == lir_fpop_raw) { |
aoqi@0 | 5890 | // equal FPU stack operations can be optimized |
aoqi@0 | 5891 | return false; |
aoqi@0 | 5892 | } |
aoqi@0 | 5893 | |
aoqi@0 | 5894 | // no optimization possible |
aoqi@0 | 5895 | return true; |
aoqi@0 | 5896 | } |
aoqi@0 | 5897 | |
aoqi@0 | 5898 | void EdgeMoveOptimizer::optimize_moves_at_block_end(BlockBegin* block) { |
aoqi@0 | 5899 | TRACE_LINEAR_SCAN(4, tty->print_cr("optimizing moves at end of block B%d", block->block_id())); |
aoqi@0 | 5900 | |
aoqi@0 | 5901 | if (block->is_predecessor(block)) { |
aoqi@0 | 5902 | // currently we can't handle this correctly. |
aoqi@0 | 5903 | return; |
aoqi@0 | 5904 | } |
aoqi@0 | 5905 | |
aoqi@0 | 5906 | init_instructions(); |
aoqi@0 | 5907 | int num_preds = block->number_of_preds(); |
aoqi@0 | 5908 | assert(num_preds > 1, "do not call otherwise"); |
aoqi@0 | 5909 | assert(!block->is_set(BlockBegin::exception_entry_flag), "exception handlers not allowed"); |
aoqi@0 | 5910 | |
aoqi@0 | 5911 | // setup a list with the lir-instructions of all predecessors |
aoqi@0 | 5912 | int i; |
aoqi@0 | 5913 | for (i = 0; i < num_preds; i++) { |
aoqi@0 | 5914 | BlockBegin* pred = block->pred_at(i); |
aoqi@0 | 5915 | LIR_OpList* pred_instructions = pred->lir()->instructions_list(); |
aoqi@0 | 5916 | |
aoqi@0 | 5917 | if (pred->number_of_sux() != 1) { |
aoqi@0 | 5918 | // this can happen with switch-statements where multiple edges are between |
aoqi@0 | 5919 | // the same blocks. |
aoqi@0 | 5920 | return; |
aoqi@0 | 5921 | } |
aoqi@0 | 5922 | |
aoqi@0 | 5923 | assert(pred->number_of_sux() == 1, "can handle only one successor"); |
aoqi@0 | 5924 | assert(pred->sux_at(0) == block, "invalid control flow"); |
aoqi@0 | 5925 | assert(pred_instructions->last()->code() == lir_branch, "block with successor must end with branch"); |
aoqi@0 | 5926 | assert(pred_instructions->last()->as_OpBranch() != NULL, "branch must be LIR_OpBranch"); |
aoqi@0 | 5927 | assert(pred_instructions->last()->as_OpBranch()->cond() == lir_cond_always, "block must end with unconditional branch"); |
aoqi@0 | 5928 | |
aoqi@0 | 5929 | if (pred_instructions->last()->info() != NULL) { |
aoqi@0 | 5930 | // can not optimize instructions when debug info is needed |
aoqi@0 | 5931 | return; |
aoqi@0 | 5932 | } |
aoqi@0 | 5933 | |
aoqi@0 | 5934 | // ignore the unconditional branch at the end of the block |
aoqi@0 | 5935 | append_instructions(pred_instructions, pred_instructions->length() - 2); |
aoqi@0 | 5936 | } |
aoqi@0 | 5937 | |
aoqi@0 | 5938 | |
aoqi@0 | 5939 | // process lir-instructions while all predecessors end with the same instruction |
aoqi@0 | 5940 | while (true) { |
aoqi@0 | 5941 | LIR_Op* op = instruction_at(0); |
aoqi@0 | 5942 | for (i = 1; i < num_preds; i++) { |
aoqi@0 | 5943 | if (operations_different(op, instruction_at(i))) { |
aoqi@0 | 5944 | // these instructions are different and cannot be optimized -> |
aoqi@0 | 5945 | // no further optimization possible |
aoqi@0 | 5946 | return; |
aoqi@0 | 5947 | } |
aoqi@0 | 5948 | } |
aoqi@0 | 5949 | |
aoqi@0 | 5950 | TRACE_LINEAR_SCAN(4, tty->print("found instruction that is equal in all %d predecessors: ", num_preds); op->print()); |
aoqi@0 | 5951 | |
aoqi@0 | 5952 | // insert the instruction at the beginning of the current block |
aoqi@0 | 5953 | block->lir()->insert_before(1, op); |
aoqi@0 | 5954 | |
aoqi@0 | 5955 | // delete the instruction at the end of all predecessors |
aoqi@0 | 5956 | for (i = 0; i < num_preds; i++) { |
aoqi@0 | 5957 | remove_cur_instruction(i, true); |
aoqi@0 | 5958 | } |
aoqi@0 | 5959 | } |
aoqi@0 | 5960 | } |
aoqi@0 | 5961 | |
aoqi@0 | 5962 | |
aoqi@0 | 5963 | void EdgeMoveOptimizer::optimize_moves_at_block_begin(BlockBegin* block) { |
aoqi@0 | 5964 | TRACE_LINEAR_SCAN(4, tty->print_cr("optimization moves at begin of block B%d", block->block_id())); |
aoqi@0 | 5965 | |
aoqi@0 | 5966 | init_instructions(); |
aoqi@0 | 5967 | int num_sux = block->number_of_sux(); |
aoqi@0 | 5968 | |
aoqi@0 | 5969 | LIR_OpList* cur_instructions = block->lir()->instructions_list(); |
aoqi@0 | 5970 | |
aoqi@0 | 5971 | assert(num_sux == 2, "method should not be called otherwise"); |
aoqi@0 | 5972 | assert(cur_instructions->last()->code() == lir_branch, "block with successor must end with branch"); |
aoqi@0 | 5973 | assert(cur_instructions->last()->as_OpBranch() != NULL, "branch must be LIR_OpBranch"); |
aoqi@0 | 5974 | assert(cur_instructions->last()->as_OpBranch()->cond() == lir_cond_always, "block must end with unconditional branch"); |
aoqi@0 | 5975 | |
aoqi@0 | 5976 | if (cur_instructions->last()->info() != NULL) { |
aoqi@0 | 5977 | // can no optimize instructions when debug info is needed |
aoqi@0 | 5978 | return; |
aoqi@0 | 5979 | } |
aoqi@0 | 5980 | |
aoqi@0 | 5981 | LIR_Op* branch = cur_instructions->at(cur_instructions->length() - 2); |
aoqi@0 | 5982 | if (branch->info() != NULL || (branch->code() != lir_branch && branch->code() != lir_cond_float_branch)) { |
aoqi@0 | 5983 | // not a valid case for optimization |
aoqi@0 | 5984 | // currently, only blocks that end with two branches (conditional branch followed |
aoqi@0 | 5985 | // by unconditional branch) are optimized |
aoqi@0 | 5986 | return; |
aoqi@0 | 5987 | } |
aoqi@0 | 5988 | |
aoqi@0 | 5989 | // now it is guaranteed that the block ends with two branch instructions. |
aoqi@0 | 5990 | // the instructions are inserted at the end of the block before these two branches |
aoqi@0 | 5991 | int insert_idx = cur_instructions->length() - 2; |
aoqi@0 | 5992 | |
aoqi@0 | 5993 | int i; |
aoqi@0 | 5994 | #ifdef ASSERT |
aoqi@0 | 5995 | for (i = insert_idx - 1; i >= 0; i--) { |
aoqi@0 | 5996 | LIR_Op* op = cur_instructions->at(i); |
aoqi@0 | 5997 | if ((op->code() == lir_branch || op->code() == lir_cond_float_branch) && ((LIR_OpBranch*)op)->block() != NULL) { |
aoqi@0 | 5998 | assert(false, "block with two successors can have only two branch instructions"); |
aoqi@0 | 5999 | } |
aoqi@0 | 6000 | } |
aoqi@0 | 6001 | #endif |
aoqi@0 | 6002 | |
aoqi@0 | 6003 | // setup a list with the lir-instructions of all successors |
aoqi@0 | 6004 | for (i = 0; i < num_sux; i++) { |
aoqi@0 | 6005 | BlockBegin* sux = block->sux_at(i); |
aoqi@0 | 6006 | LIR_OpList* sux_instructions = sux->lir()->instructions_list(); |
aoqi@0 | 6007 | |
aoqi@0 | 6008 | assert(sux_instructions->at(0)->code() == lir_label, "block must start with label"); |
aoqi@0 | 6009 | |
aoqi@0 | 6010 | if (sux->number_of_preds() != 1) { |
aoqi@0 | 6011 | // this can happen with switch-statements where multiple edges are between |
aoqi@0 | 6012 | // the same blocks. |
aoqi@0 | 6013 | return; |
aoqi@0 | 6014 | } |
aoqi@0 | 6015 | assert(sux->pred_at(0) == block, "invalid control flow"); |
aoqi@0 | 6016 | assert(!sux->is_set(BlockBegin::exception_entry_flag), "exception handlers not allowed"); |
aoqi@0 | 6017 | |
aoqi@0 | 6018 | // ignore the label at the beginning of the block |
aoqi@0 | 6019 | append_instructions(sux_instructions, 1); |
aoqi@0 | 6020 | } |
aoqi@0 | 6021 | |
aoqi@0 | 6022 | // process lir-instructions while all successors begin with the same instruction |
aoqi@0 | 6023 | while (true) { |
aoqi@0 | 6024 | LIR_Op* op = instruction_at(0); |
aoqi@0 | 6025 | for (i = 1; i < num_sux; i++) { |
aoqi@0 | 6026 | if (operations_different(op, instruction_at(i))) { |
aoqi@0 | 6027 | // these instructions are different and cannot be optimized -> |
aoqi@0 | 6028 | // no further optimization possible |
aoqi@0 | 6029 | return; |
aoqi@0 | 6030 | } |
aoqi@0 | 6031 | } |
aoqi@0 | 6032 | |
aoqi@0 | 6033 | TRACE_LINEAR_SCAN(4, tty->print("----- found instruction that is equal in all %d successors: ", num_sux); op->print()); |
aoqi@0 | 6034 | |
aoqi@0 | 6035 | // insert instruction at end of current block |
aoqi@0 | 6036 | block->lir()->insert_before(insert_idx, op); |
aoqi@0 | 6037 | insert_idx++; |
aoqi@0 | 6038 | |
aoqi@0 | 6039 | // delete the instructions at the beginning of all successors |
aoqi@0 | 6040 | for (i = 0; i < num_sux; i++) { |
aoqi@0 | 6041 | remove_cur_instruction(i, false); |
aoqi@0 | 6042 | } |
aoqi@0 | 6043 | } |
aoqi@0 | 6044 | } |
aoqi@0 | 6045 | |
aoqi@0 | 6046 | |
aoqi@0 | 6047 | // Implementation of ControlFlowOptimizer |
aoqi@0 | 6048 | |
aoqi@0 | 6049 | ControlFlowOptimizer::ControlFlowOptimizer() : |
aoqi@0 | 6050 | _original_preds(4) |
aoqi@0 | 6051 | { |
aoqi@0 | 6052 | } |
aoqi@0 | 6053 | |
aoqi@0 | 6054 | void ControlFlowOptimizer::optimize(BlockList* code) { |
aoqi@0 | 6055 | ControlFlowOptimizer optimizer = ControlFlowOptimizer(); |
aoqi@0 | 6056 | |
aoqi@0 | 6057 | // push the OSR entry block to the end so that we're not jumping over it. |
aoqi@0 | 6058 | BlockBegin* osr_entry = code->at(0)->end()->as_Base()->osr_entry(); |
aoqi@0 | 6059 | if (osr_entry) { |
aoqi@0 | 6060 | int index = osr_entry->linear_scan_number(); |
aoqi@0 | 6061 | assert(code->at(index) == osr_entry, "wrong index"); |
aoqi@0 | 6062 | code->remove_at(index); |
aoqi@0 | 6063 | code->append(osr_entry); |
aoqi@0 | 6064 | } |
aoqi@0 | 6065 | |
aoqi@0 | 6066 | optimizer.reorder_short_loops(code); |
aoqi@0 | 6067 | optimizer.delete_empty_blocks(code); |
aoqi@0 | 6068 | optimizer.delete_unnecessary_jumps(code); |
aoqi@0 | 6069 | optimizer.delete_jumps_to_return(code); |
aoqi@0 | 6070 | } |
aoqi@0 | 6071 | |
aoqi@0 | 6072 | void ControlFlowOptimizer::reorder_short_loop(BlockList* code, BlockBegin* header_block, int header_idx) { |
aoqi@0 | 6073 | int i = header_idx + 1; |
aoqi@0 | 6074 | int max_end = MIN2(header_idx + ShortLoopSize, code->length()); |
aoqi@0 | 6075 | while (i < max_end && code->at(i)->loop_depth() >= header_block->loop_depth()) { |
aoqi@0 | 6076 | i++; |
aoqi@0 | 6077 | } |
aoqi@0 | 6078 | |
aoqi@0 | 6079 | if (i == code->length() || code->at(i)->loop_depth() < header_block->loop_depth()) { |
aoqi@0 | 6080 | int end_idx = i - 1; |
aoqi@0 | 6081 | BlockBegin* end_block = code->at(end_idx); |
aoqi@0 | 6082 | |
aoqi@0 | 6083 | if (end_block->number_of_sux() == 1 && end_block->sux_at(0) == header_block) { |
aoqi@0 | 6084 | // short loop from header_idx to end_idx found -> reorder blocks such that |
aoqi@0 | 6085 | // the header_block is the last block instead of the first block of the loop |
aoqi@0 | 6086 | TRACE_LINEAR_SCAN(1, tty->print_cr("Reordering short loop: length %d, header B%d, end B%d", |
aoqi@0 | 6087 | end_idx - header_idx + 1, |
aoqi@0 | 6088 | header_block->block_id(), end_block->block_id())); |
aoqi@0 | 6089 | |
aoqi@0 | 6090 | for (int j = header_idx; j < end_idx; j++) { |
aoqi@0 | 6091 | code->at_put(j, code->at(j + 1)); |
aoqi@0 | 6092 | } |
aoqi@0 | 6093 | code->at_put(end_idx, header_block); |
aoqi@0 | 6094 | |
aoqi@0 | 6095 | // correct the flags so that any loop alignment occurs in the right place. |
aoqi@0 | 6096 | assert(code->at(end_idx)->is_set(BlockBegin::backward_branch_target_flag), "must be backward branch target"); |
aoqi@0 | 6097 | code->at(end_idx)->clear(BlockBegin::backward_branch_target_flag); |
aoqi@0 | 6098 | code->at(header_idx)->set(BlockBegin::backward_branch_target_flag); |
aoqi@0 | 6099 | } |
aoqi@0 | 6100 | } |
aoqi@0 | 6101 | } |
aoqi@0 | 6102 | |
aoqi@0 | 6103 | void ControlFlowOptimizer::reorder_short_loops(BlockList* code) { |
aoqi@0 | 6104 | for (int i = code->length() - 1; i >= 0; i--) { |
aoqi@0 | 6105 | BlockBegin* block = code->at(i); |
aoqi@0 | 6106 | |
aoqi@0 | 6107 | if (block->is_set(BlockBegin::linear_scan_loop_header_flag)) { |
aoqi@0 | 6108 | reorder_short_loop(code, block, i); |
aoqi@0 | 6109 | } |
aoqi@0 | 6110 | } |
aoqi@0 | 6111 | |
aoqi@0 | 6112 | DEBUG_ONLY(verify(code)); |
aoqi@0 | 6113 | } |
aoqi@0 | 6114 | |
aoqi@0 | 6115 | // only blocks with exactly one successor can be deleted. Such blocks |
aoqi@0 | 6116 | // must always end with an unconditional branch to this successor |
aoqi@0 | 6117 | bool ControlFlowOptimizer::can_delete_block(BlockBegin* block) { |
aoqi@0 | 6118 | if (block->number_of_sux() != 1 || block->number_of_exception_handlers() != 0 || block->is_entry_block()) { |
aoqi@0 | 6119 | return false; |
aoqi@0 | 6120 | } |
aoqi@0 | 6121 | |
aoqi@0 | 6122 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 6123 | |
aoqi@0 | 6124 | assert(instructions->length() >= 2, "block must have label and branch"); |
aoqi@0 | 6125 | assert(instructions->at(0)->code() == lir_label, "first instruction must always be a label"); |
aoqi@0 | 6126 | assert(instructions->last()->as_OpBranch() != NULL, "last instrcution must always be a branch"); |
aoqi@0 | 6127 | assert(instructions->last()->as_OpBranch()->cond() == lir_cond_always, "branch must be unconditional"); |
aoqi@0 | 6128 | assert(instructions->last()->as_OpBranch()->block() == block->sux_at(0), "branch target must be the successor"); |
aoqi@0 | 6129 | |
aoqi@0 | 6130 | // block must have exactly one successor |
aoqi@0 | 6131 | |
aoqi@0 | 6132 | if (instructions->length() == 2 && instructions->last()->info() == NULL) { |
aoqi@0 | 6133 | return true; |
aoqi@0 | 6134 | } |
aoqi@0 | 6135 | return false; |
aoqi@0 | 6136 | } |
aoqi@0 | 6137 | |
aoqi@0 | 6138 | // substitute branch targets in all branch-instructions of this blocks |
aoqi@0 | 6139 | void ControlFlowOptimizer::substitute_branch_target(BlockBegin* block, BlockBegin* target_from, BlockBegin* target_to) { |
aoqi@0 | 6140 | TRACE_LINEAR_SCAN(3, tty->print_cr("Deleting empty block: substituting from B%d to B%d inside B%d", target_from->block_id(), target_to->block_id(), block->block_id())); |
aoqi@0 | 6141 | |
aoqi@0 | 6142 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 6143 | |
aoqi@0 | 6144 | assert(instructions->at(0)->code() == lir_label, "first instruction must always be a label"); |
aoqi@0 | 6145 | for (int i = instructions->length() - 1; i >= 1; i--) { |
aoqi@0 | 6146 | LIR_Op* op = instructions->at(i); |
aoqi@0 | 6147 | |
aoqi@0 | 6148 | if (op->code() == lir_branch || op->code() == lir_cond_float_branch) { |
aoqi@0 | 6149 | assert(op->as_OpBranch() != NULL, "branch must be of type LIR_OpBranch"); |
aoqi@0 | 6150 | LIR_OpBranch* branch = (LIR_OpBranch*)op; |
aoqi@0 | 6151 | |
aoqi@0 | 6152 | if (branch->block() == target_from) { |
aoqi@0 | 6153 | branch->change_block(target_to); |
aoqi@0 | 6154 | } |
aoqi@0 | 6155 | if (branch->ublock() == target_from) { |
aoqi@0 | 6156 | branch->change_ublock(target_to); |
aoqi@0 | 6157 | } |
aoqi@0 | 6158 | } |
aoqi@0 | 6159 | } |
aoqi@0 | 6160 | } |
aoqi@0 | 6161 | |
aoqi@0 | 6162 | void ControlFlowOptimizer::delete_empty_blocks(BlockList* code) { |
aoqi@0 | 6163 | int old_pos = 0; |
aoqi@0 | 6164 | int new_pos = 0; |
aoqi@0 | 6165 | int num_blocks = code->length(); |
aoqi@0 | 6166 | |
aoqi@0 | 6167 | while (old_pos < num_blocks) { |
aoqi@0 | 6168 | BlockBegin* block = code->at(old_pos); |
aoqi@0 | 6169 | |
aoqi@0 | 6170 | if (can_delete_block(block)) { |
aoqi@0 | 6171 | BlockBegin* new_target = block->sux_at(0); |
aoqi@0 | 6172 | |
aoqi@0 | 6173 | // propagate backward branch target flag for correct code alignment |
aoqi@0 | 6174 | if (block->is_set(BlockBegin::backward_branch_target_flag)) { |
aoqi@0 | 6175 | new_target->set(BlockBegin::backward_branch_target_flag); |
aoqi@0 | 6176 | } |
aoqi@0 | 6177 | |
aoqi@0 | 6178 | // collect a list with all predecessors that contains each predecessor only once |
aoqi@0 | 6179 | // the predecessors of cur are changed during the substitution, so a copy of the |
aoqi@0 | 6180 | // predecessor list is necessary |
aoqi@0 | 6181 | int j; |
aoqi@0 | 6182 | _original_preds.clear(); |
aoqi@0 | 6183 | for (j = block->number_of_preds() - 1; j >= 0; j--) { |
aoqi@0 | 6184 | BlockBegin* pred = block->pred_at(j); |
aoqi@0 | 6185 | if (_original_preds.index_of(pred) == -1) { |
aoqi@0 | 6186 | _original_preds.append(pred); |
aoqi@0 | 6187 | } |
aoqi@0 | 6188 | } |
aoqi@0 | 6189 | |
aoqi@0 | 6190 | for (j = _original_preds.length() - 1; j >= 0; j--) { |
aoqi@0 | 6191 | BlockBegin* pred = _original_preds.at(j); |
aoqi@0 | 6192 | substitute_branch_target(pred, block, new_target); |
aoqi@0 | 6193 | pred->substitute_sux(block, new_target); |
aoqi@0 | 6194 | } |
aoqi@0 | 6195 | } else { |
aoqi@0 | 6196 | // adjust position of this block in the block list if blocks before |
aoqi@0 | 6197 | // have been deleted |
aoqi@0 | 6198 | if (new_pos != old_pos) { |
aoqi@0 | 6199 | code->at_put(new_pos, code->at(old_pos)); |
aoqi@0 | 6200 | } |
aoqi@0 | 6201 | new_pos++; |
aoqi@0 | 6202 | } |
aoqi@0 | 6203 | old_pos++; |
aoqi@0 | 6204 | } |
aoqi@0 | 6205 | code->truncate(new_pos); |
aoqi@0 | 6206 | |
aoqi@0 | 6207 | DEBUG_ONLY(verify(code)); |
aoqi@0 | 6208 | } |
aoqi@0 | 6209 | |
aoqi@0 | 6210 | void ControlFlowOptimizer::delete_unnecessary_jumps(BlockList* code) { |
aoqi@0 | 6211 | // skip the last block because there a branch is always necessary |
aoqi@0 | 6212 | for (int i = code->length() - 2; i >= 0; i--) { |
aoqi@0 | 6213 | BlockBegin* block = code->at(i); |
aoqi@0 | 6214 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 6215 | |
aoqi@0 | 6216 | LIR_Op* last_op = instructions->last(); |
aoqi@0 | 6217 | if (last_op->code() == lir_branch) { |
aoqi@0 | 6218 | assert(last_op->as_OpBranch() != NULL, "branch must be of type LIR_OpBranch"); |
aoqi@0 | 6219 | LIR_OpBranch* last_branch = (LIR_OpBranch*)last_op; |
aoqi@0 | 6220 | |
aoqi@0 | 6221 | assert(last_branch->block() != NULL, "last branch must always have a block as target"); |
aoqi@0 | 6222 | assert(last_branch->label() == last_branch->block()->label(), "must be equal"); |
aoqi@0 | 6223 | |
aoqi@0 | 6224 | if (last_branch->info() == NULL) { |
aoqi@0 | 6225 | if (last_branch->block() == code->at(i + 1)) { |
aoqi@0 | 6226 | |
aoqi@0 | 6227 | TRACE_LINEAR_SCAN(3, tty->print_cr("Deleting unconditional branch at end of block B%d", block->block_id())); |
aoqi@0 | 6228 | |
aoqi@0 | 6229 | // delete last branch instruction |
aoqi@0 | 6230 | instructions->truncate(instructions->length() - 1); |
aoqi@0 | 6231 | |
aoqi@0 | 6232 | } else { |
aoqi@0 | 6233 | LIR_Op* prev_op = instructions->at(instructions->length() - 2); |
aoqi@0 | 6234 | if (prev_op->code() == lir_branch || prev_op->code() == lir_cond_float_branch) { |
aoqi@0 | 6235 | assert(prev_op->as_OpBranch() != NULL, "branch must be of type LIR_OpBranch"); |
aoqi@0 | 6236 | LIR_OpBranch* prev_branch = (LIR_OpBranch*)prev_op; |
aoqi@0 | 6237 | |
aoqi@0 | 6238 | if (prev_branch->stub() == NULL) { |
aoqi@0 | 6239 | |
aoqi@1 | 6240 | #ifndef MIPS64 //MIPS64 not support lir_cmp. same as openjdk6. |
aoqi@0 | 6241 | LIR_Op2* prev_cmp = NULL; |
aoqi@0 | 6242 | |
aoqi@0 | 6243 | for(int j = instructions->length() - 3; j >= 0 && prev_cmp == NULL; j--) { |
aoqi@0 | 6244 | prev_op = instructions->at(j); |
aoqi@0 | 6245 | if (prev_op->code() == lir_cmp) { |
aoqi@0 | 6246 | assert(prev_op->as_Op2() != NULL, "branch must be of type LIR_Op2"); |
aoqi@0 | 6247 | prev_cmp = (LIR_Op2*)prev_op; |
aoqi@0 | 6248 | assert(prev_branch->cond() == prev_cmp->condition(), "should be the same"); |
aoqi@0 | 6249 | } |
aoqi@0 | 6250 | } |
aoqi@0 | 6251 | assert(prev_cmp != NULL, "should have found comp instruction for branch"); |
aoqi@1 | 6252 | #endif |
aoqi@0 | 6253 | if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == NULL) { |
aoqi@0 | 6254 | |
aoqi@0 | 6255 | TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id())); |
aoqi@0 | 6256 | |
aoqi@0 | 6257 | // eliminate a conditional branch to the immediate successor |
aoqi@0 | 6258 | prev_branch->change_block(last_branch->block()); |
aoqi@0 | 6259 | prev_branch->negate_cond(); |
aoqi@1 | 6260 | #ifndef MIPS64 //MIPS64 not support lir_cmp. same as openjdk6. |
aoqi@0 | 6261 | prev_cmp->set_condition(prev_branch->cond()); |
aoqi@1 | 6262 | #endif |
aoqi@0 | 6263 | instructions->truncate(instructions->length() - 1); |
aoqi@0 | 6264 | } |
aoqi@0 | 6265 | } |
aoqi@0 | 6266 | } |
aoqi@0 | 6267 | } |
aoqi@0 | 6268 | } |
aoqi@0 | 6269 | } |
aoqi@0 | 6270 | } |
aoqi@0 | 6271 | |
aoqi@0 | 6272 | DEBUG_ONLY(verify(code)); |
aoqi@0 | 6273 | } |
aoqi@0 | 6274 | |
aoqi@0 | 6275 | void ControlFlowOptimizer::delete_jumps_to_return(BlockList* code) { |
aoqi@0 | 6276 | #ifdef ASSERT |
aoqi@0 | 6277 | BitMap return_converted(BlockBegin::number_of_blocks()); |
aoqi@0 | 6278 | return_converted.clear(); |
aoqi@0 | 6279 | #endif |
aoqi@0 | 6280 | |
aoqi@0 | 6281 | for (int i = code->length() - 1; i >= 0; i--) { |
aoqi@0 | 6282 | BlockBegin* block = code->at(i); |
aoqi@0 | 6283 | LIR_OpList* cur_instructions = block->lir()->instructions_list(); |
aoqi@0 | 6284 | LIR_Op* cur_last_op = cur_instructions->last(); |
aoqi@0 | 6285 | |
aoqi@0 | 6286 | assert(cur_instructions->at(0)->code() == lir_label, "first instruction must always be a label"); |
aoqi@0 | 6287 | if (cur_instructions->length() == 2 && cur_last_op->code() == lir_return) { |
aoqi@0 | 6288 | // the block contains only a label and a return |
aoqi@0 | 6289 | // if a predecessor ends with an unconditional jump to this block, then the jump |
aoqi@0 | 6290 | // can be replaced with a return instruction |
aoqi@0 | 6291 | // |
aoqi@0 | 6292 | // Note: the original block with only a return statement cannot be deleted completely |
aoqi@0 | 6293 | // because the predecessors might have other (conditional) jumps to this block |
aoqi@0 | 6294 | // -> this may lead to unnecesary return instructions in the final code |
aoqi@0 | 6295 | |
aoqi@0 | 6296 | assert(cur_last_op->info() == NULL, "return instructions do not have debug information"); |
aoqi@0 | 6297 | assert(block->number_of_sux() == 0 || |
aoqi@0 | 6298 | (return_converted.at(block->block_id()) && block->number_of_sux() == 1), |
aoqi@0 | 6299 | "blocks that end with return must not have successors"); |
aoqi@0 | 6300 | |
aoqi@0 | 6301 | assert(cur_last_op->as_Op1() != NULL, "return must be LIR_Op1"); |
aoqi@0 | 6302 | LIR_Opr return_opr = ((LIR_Op1*)cur_last_op)->in_opr(); |
aoqi@0 | 6303 | |
aoqi@0 | 6304 | for (int j = block->number_of_preds() - 1; j >= 0; j--) { |
aoqi@0 | 6305 | BlockBegin* pred = block->pred_at(j); |
aoqi@0 | 6306 | LIR_OpList* pred_instructions = pred->lir()->instructions_list(); |
aoqi@0 | 6307 | LIR_Op* pred_last_op = pred_instructions->last(); |
aoqi@0 | 6308 | |
aoqi@0 | 6309 | if (pred_last_op->code() == lir_branch) { |
aoqi@0 | 6310 | assert(pred_last_op->as_OpBranch() != NULL, "branch must be LIR_OpBranch"); |
aoqi@0 | 6311 | LIR_OpBranch* pred_last_branch = (LIR_OpBranch*)pred_last_op; |
aoqi@0 | 6312 | |
aoqi@0 | 6313 | if (pred_last_branch->block() == block && pred_last_branch->cond() == lir_cond_always && pred_last_branch->info() == NULL) { |
aoqi@0 | 6314 | // replace the jump to a return with a direct return |
aoqi@0 | 6315 | // Note: currently the edge between the blocks is not deleted |
aoqi@0 | 6316 | pred_instructions->at_put(pred_instructions->length() - 1, new LIR_Op1(lir_return, return_opr)); |
aoqi@0 | 6317 | #ifdef ASSERT |
aoqi@0 | 6318 | return_converted.set_bit(pred->block_id()); |
aoqi@0 | 6319 | #endif |
aoqi@0 | 6320 | } |
aoqi@0 | 6321 | } |
aoqi@0 | 6322 | } |
aoqi@0 | 6323 | } |
aoqi@0 | 6324 | } |
aoqi@0 | 6325 | } |
aoqi@0 | 6326 | |
aoqi@0 | 6327 | |
aoqi@0 | 6328 | #ifdef ASSERT |
aoqi@0 | 6329 | void ControlFlowOptimizer::verify(BlockList* code) { |
aoqi@0 | 6330 | for (int i = 0; i < code->length(); i++) { |
aoqi@0 | 6331 | BlockBegin* block = code->at(i); |
aoqi@0 | 6332 | LIR_OpList* instructions = block->lir()->instructions_list(); |
aoqi@0 | 6333 | |
aoqi@0 | 6334 | int j; |
aoqi@0 | 6335 | for (j = 0; j < instructions->length(); j++) { |
aoqi@0 | 6336 | LIR_OpBranch* op_branch = instructions->at(j)->as_OpBranch(); |
aoqi@0 | 6337 | |
aoqi@0 | 6338 | if (op_branch != NULL) { |
aoqi@0 | 6339 | assert(op_branch->block() == NULL || code->index_of(op_branch->block()) != -1, "branch target not valid"); |
aoqi@0 | 6340 | assert(op_branch->ublock() == NULL || code->index_of(op_branch->ublock()) != -1, "branch target not valid"); |
aoqi@0 | 6341 | } |
aoqi@0 | 6342 | } |
aoqi@0 | 6343 | |
aoqi@0 | 6344 | for (j = 0; j < block->number_of_sux() - 1; j++) { |
aoqi@0 | 6345 | BlockBegin* sux = block->sux_at(j); |
aoqi@0 | 6346 | assert(code->index_of(sux) != -1, "successor not valid"); |
aoqi@0 | 6347 | } |
aoqi@0 | 6348 | |
aoqi@0 | 6349 | for (j = 0; j < block->number_of_preds() - 1; j++) { |
aoqi@0 | 6350 | BlockBegin* pred = block->pred_at(j); |
aoqi@0 | 6351 | assert(code->index_of(pred) != -1, "successor not valid"); |
aoqi@0 | 6352 | } |
aoqi@0 | 6353 | } |
aoqi@0 | 6354 | } |
aoqi@0 | 6355 | #endif |
aoqi@0 | 6356 | |
aoqi@0 | 6357 | |
aoqi@0 | 6358 | #ifndef PRODUCT |
aoqi@0 | 6359 | |
aoqi@0 | 6360 | // Implementation of LinearStatistic |
aoqi@0 | 6361 | |
aoqi@0 | 6362 | const char* LinearScanStatistic::counter_name(int counter_idx) { |
aoqi@0 | 6363 | switch (counter_idx) { |
aoqi@0 | 6364 | case counter_method: return "compiled methods"; |
aoqi@0 | 6365 | case counter_fpu_method: return "methods using fpu"; |
aoqi@0 | 6366 | case counter_loop_method: return "methods with loops"; |
aoqi@0 | 6367 | case counter_exception_method:return "methods with xhandler"; |
aoqi@0 | 6368 | |
aoqi@0 | 6369 | case counter_loop: return "loops"; |
aoqi@0 | 6370 | case counter_block: return "blocks"; |
aoqi@0 | 6371 | case counter_loop_block: return "blocks inside loop"; |
aoqi@0 | 6372 | case counter_exception_block: return "exception handler entries"; |
aoqi@0 | 6373 | case counter_interval: return "intervals"; |
aoqi@0 | 6374 | case counter_fixed_interval: return "fixed intervals"; |
aoqi@0 | 6375 | case counter_range: return "ranges"; |
aoqi@0 | 6376 | case counter_fixed_range: return "fixed ranges"; |
aoqi@0 | 6377 | case counter_use_pos: return "use positions"; |
aoqi@0 | 6378 | case counter_fixed_use_pos: return "fixed use positions"; |
aoqi@0 | 6379 | case counter_spill_slots: return "spill slots"; |
aoqi@0 | 6380 | |
aoqi@0 | 6381 | // counter for classes of lir instructions |
aoqi@0 | 6382 | case counter_instruction: return "total instructions"; |
aoqi@0 | 6383 | case counter_label: return "labels"; |
aoqi@0 | 6384 | case counter_entry: return "method entries"; |
aoqi@0 | 6385 | case counter_return: return "method returns"; |
aoqi@0 | 6386 | case counter_call: return "method calls"; |
aoqi@0 | 6387 | case counter_move: return "moves"; |
aoqi@0 | 6388 | case counter_cmp: return "compare"; |
aoqi@0 | 6389 | case counter_cond_branch: return "conditional branches"; |
aoqi@0 | 6390 | case counter_uncond_branch: return "unconditional branches"; |
aoqi@0 | 6391 | case counter_stub_branch: return "branches to stub"; |
aoqi@0 | 6392 | case counter_alu: return "artithmetic + logic"; |
aoqi@0 | 6393 | case counter_alloc: return "allocations"; |
aoqi@0 | 6394 | case counter_sync: return "synchronisation"; |
aoqi@0 | 6395 | case counter_throw: return "throw"; |
aoqi@0 | 6396 | case counter_unwind: return "unwind"; |
aoqi@0 | 6397 | case counter_typecheck: return "type+null-checks"; |
aoqi@0 | 6398 | case counter_fpu_stack: return "fpu-stack"; |
aoqi@0 | 6399 | case counter_misc_inst: return "other instructions"; |
aoqi@0 | 6400 | case counter_other_inst: return "misc. instructions"; |
aoqi@0 | 6401 | |
aoqi@0 | 6402 | // counter for different types of moves |
aoqi@0 | 6403 | case counter_move_total: return "total moves"; |
aoqi@0 | 6404 | case counter_move_reg_reg: return "register->register"; |
aoqi@0 | 6405 | case counter_move_reg_stack: return "register->stack"; |
aoqi@0 | 6406 | case counter_move_stack_reg: return "stack->register"; |
aoqi@0 | 6407 | case counter_move_stack_stack:return "stack->stack"; |
aoqi@0 | 6408 | case counter_move_reg_mem: return "register->memory"; |
aoqi@0 | 6409 | case counter_move_mem_reg: return "memory->register"; |
aoqi@0 | 6410 | case counter_move_const_any: return "constant->any"; |
aoqi@0 | 6411 | |
aoqi@0 | 6412 | case blank_line_1: return ""; |
aoqi@0 | 6413 | case blank_line_2: return ""; |
aoqi@0 | 6414 | |
aoqi@0 | 6415 | default: ShouldNotReachHere(); return ""; |
aoqi@0 | 6416 | } |
aoqi@0 | 6417 | } |
aoqi@0 | 6418 | |
aoqi@0 | 6419 | LinearScanStatistic::Counter LinearScanStatistic::base_counter(int counter_idx) { |
aoqi@0 | 6420 | if (counter_idx == counter_fpu_method || counter_idx == counter_loop_method || counter_idx == counter_exception_method) { |
aoqi@0 | 6421 | return counter_method; |
aoqi@0 | 6422 | } else if (counter_idx == counter_loop_block || counter_idx == counter_exception_block) { |
aoqi@0 | 6423 | return counter_block; |
aoqi@0 | 6424 | } else if (counter_idx >= counter_instruction && counter_idx <= counter_other_inst) { |
aoqi@0 | 6425 | return counter_instruction; |
aoqi@0 | 6426 | } else if (counter_idx >= counter_move_total && counter_idx <= counter_move_const_any) { |
aoqi@0 | 6427 | return counter_move_total; |
aoqi@0 | 6428 | } |
aoqi@0 | 6429 | return invalid_counter; |
aoqi@0 | 6430 | } |
aoqi@0 | 6431 | |
aoqi@0 | 6432 | LinearScanStatistic::LinearScanStatistic() { |
aoqi@0 | 6433 | for (int i = 0; i < number_of_counters; i++) { |
aoqi@0 | 6434 | _counters_sum[i] = 0; |
aoqi@0 | 6435 | _counters_max[i] = -1; |
aoqi@0 | 6436 | } |
aoqi@0 | 6437 | |
aoqi@0 | 6438 | } |
aoqi@0 | 6439 | |
aoqi@0 | 6440 | // add the method-local numbers to the total sum |
aoqi@0 | 6441 | void LinearScanStatistic::sum_up(LinearScanStatistic &method_statistic) { |
aoqi@0 | 6442 | for (int i = 0; i < number_of_counters; i++) { |
aoqi@0 | 6443 | _counters_sum[i] += method_statistic._counters_sum[i]; |
aoqi@0 | 6444 | _counters_max[i] = MAX2(_counters_max[i], method_statistic._counters_sum[i]); |
aoqi@0 | 6445 | } |
aoqi@0 | 6446 | } |
aoqi@0 | 6447 | |
aoqi@0 | 6448 | void LinearScanStatistic::print(const char* title) { |
aoqi@0 | 6449 | if (CountLinearScan || TraceLinearScanLevel > 0) { |
aoqi@0 | 6450 | tty->cr(); |
aoqi@0 | 6451 | tty->print_cr("***** LinearScan statistic - %s *****", title); |
aoqi@0 | 6452 | |
aoqi@0 | 6453 | for (int i = 0; i < number_of_counters; i++) { |
aoqi@0 | 6454 | if (_counters_sum[i] > 0 || _counters_max[i] >= 0) { |
aoqi@0 | 6455 | tty->print("%25s: %8d", counter_name(i), _counters_sum[i]); |
aoqi@0 | 6456 | |
aoqi@0 | 6457 | if (base_counter(i) != invalid_counter) { |
aoqi@0 | 6458 | tty->print(" (%5.1f%%) ", _counters_sum[i] * 100.0 / _counters_sum[base_counter(i)]); |
aoqi@0 | 6459 | } else { |
aoqi@0 | 6460 | tty->print(" "); |
aoqi@0 | 6461 | } |
aoqi@0 | 6462 | |
aoqi@0 | 6463 | if (_counters_max[i] >= 0) { |
aoqi@0 | 6464 | tty->print("%8d", _counters_max[i]); |
aoqi@0 | 6465 | } |
aoqi@0 | 6466 | } |
aoqi@0 | 6467 | tty->cr(); |
aoqi@0 | 6468 | } |
aoqi@0 | 6469 | } |
aoqi@0 | 6470 | } |
aoqi@0 | 6471 | |
aoqi@0 | 6472 | void LinearScanStatistic::collect(LinearScan* allocator) { |
aoqi@0 | 6473 | inc_counter(counter_method); |
aoqi@0 | 6474 | if (allocator->has_fpu_registers()) { |
aoqi@0 | 6475 | inc_counter(counter_fpu_method); |
aoqi@0 | 6476 | } |
aoqi@0 | 6477 | if (allocator->num_loops() > 0) { |
aoqi@0 | 6478 | inc_counter(counter_loop_method); |
aoqi@0 | 6479 | } |
aoqi@0 | 6480 | inc_counter(counter_loop, allocator->num_loops()); |
aoqi@0 | 6481 | inc_counter(counter_spill_slots, allocator->max_spills()); |
aoqi@0 | 6482 | |
aoqi@0 | 6483 | int i; |
aoqi@0 | 6484 | for (i = 0; i < allocator->interval_count(); i++) { |
aoqi@0 | 6485 | Interval* cur = allocator->interval_at(i); |
aoqi@0 | 6486 | |
aoqi@0 | 6487 | if (cur != NULL) { |
aoqi@0 | 6488 | inc_counter(counter_interval); |
aoqi@0 | 6489 | inc_counter(counter_use_pos, cur->num_use_positions()); |
aoqi@0 | 6490 | if (LinearScan::is_precolored_interval(cur)) { |
aoqi@0 | 6491 | inc_counter(counter_fixed_interval); |
aoqi@0 | 6492 | inc_counter(counter_fixed_use_pos, cur->num_use_positions()); |
aoqi@0 | 6493 | } |
aoqi@0 | 6494 | |
aoqi@0 | 6495 | Range* range = cur->first(); |
aoqi@0 | 6496 | while (range != Range::end()) { |
aoqi@0 | 6497 | inc_counter(counter_range); |
aoqi@0 | 6498 | if (LinearScan::is_precolored_interval(cur)) { |
aoqi@0 | 6499 | inc_counter(counter_fixed_range); |
aoqi@0 | 6500 | } |
aoqi@0 | 6501 | range = range->next(); |
aoqi@0 | 6502 | } |
aoqi@0 | 6503 | } |
aoqi@0 | 6504 | } |
aoqi@0 | 6505 | |
aoqi@0 | 6506 | bool has_xhandlers = false; |
aoqi@0 | 6507 | // Note: only count blocks that are in code-emit order |
aoqi@0 | 6508 | for (i = 0; i < allocator->ir()->code()->length(); i++) { |
aoqi@0 | 6509 | BlockBegin* cur = allocator->ir()->code()->at(i); |
aoqi@0 | 6510 | |
aoqi@0 | 6511 | inc_counter(counter_block); |
aoqi@0 | 6512 | if (cur->loop_depth() > 0) { |
aoqi@0 | 6513 | inc_counter(counter_loop_block); |
aoqi@0 | 6514 | } |
aoqi@0 | 6515 | if (cur->is_set(BlockBegin::exception_entry_flag)) { |
aoqi@0 | 6516 | inc_counter(counter_exception_block); |
aoqi@0 | 6517 | has_xhandlers = true; |
aoqi@0 | 6518 | } |
aoqi@0 | 6519 | |
aoqi@0 | 6520 | LIR_OpList* instructions = cur->lir()->instructions_list(); |
aoqi@0 | 6521 | for (int j = 0; j < instructions->length(); j++) { |
aoqi@0 | 6522 | LIR_Op* op = instructions->at(j); |
aoqi@0 | 6523 | |
aoqi@0 | 6524 | inc_counter(counter_instruction); |
aoqi@0 | 6525 | |
aoqi@0 | 6526 | switch (op->code()) { |
aoqi@0 | 6527 | case lir_label: inc_counter(counter_label); break; |
aoqi@0 | 6528 | case lir_std_entry: |
aoqi@0 | 6529 | case lir_osr_entry: inc_counter(counter_entry); break; |
aoqi@0 | 6530 | case lir_return: inc_counter(counter_return); break; |
aoqi@0 | 6531 | |
aoqi@0 | 6532 | case lir_rtcall: |
aoqi@0 | 6533 | case lir_static_call: |
aoqi@0 | 6534 | case lir_optvirtual_call: |
aoqi@0 | 6535 | case lir_virtual_call: inc_counter(counter_call); break; |
aoqi@0 | 6536 | |
aoqi@0 | 6537 | case lir_move: { |
aoqi@0 | 6538 | inc_counter(counter_move); |
aoqi@0 | 6539 | inc_counter(counter_move_total); |
aoqi@0 | 6540 | |
aoqi@0 | 6541 | LIR_Opr in = op->as_Op1()->in_opr(); |
aoqi@0 | 6542 | LIR_Opr res = op->as_Op1()->result_opr(); |
aoqi@0 | 6543 | if (in->is_register()) { |
aoqi@0 | 6544 | if (res->is_register()) { |
aoqi@0 | 6545 | inc_counter(counter_move_reg_reg); |
aoqi@0 | 6546 | } else if (res->is_stack()) { |
aoqi@0 | 6547 | inc_counter(counter_move_reg_stack); |
aoqi@0 | 6548 | } else if (res->is_address()) { |
aoqi@0 | 6549 | inc_counter(counter_move_reg_mem); |
aoqi@0 | 6550 | } else { |
aoqi@0 | 6551 | ShouldNotReachHere(); |
aoqi@0 | 6552 | } |
aoqi@0 | 6553 | } else if (in->is_stack()) { |
aoqi@0 | 6554 | if (res->is_register()) { |
aoqi@0 | 6555 | inc_counter(counter_move_stack_reg); |
aoqi@0 | 6556 | } else { |
aoqi@0 | 6557 | inc_counter(counter_move_stack_stack); |
aoqi@0 | 6558 | } |
aoqi@0 | 6559 | } else if (in->is_address()) { |
aoqi@0 | 6560 | assert(res->is_register(), "must be"); |
aoqi@0 | 6561 | inc_counter(counter_move_mem_reg); |
aoqi@0 | 6562 | } else if (in->is_constant()) { |
aoqi@0 | 6563 | inc_counter(counter_move_const_any); |
aoqi@0 | 6564 | } else { |
aoqi@0 | 6565 | ShouldNotReachHere(); |
aoqi@0 | 6566 | } |
aoqi@0 | 6567 | break; |
aoqi@0 | 6568 | } |
aoqi@0 | 6569 | |
aoqi@1 | 6570 | #ifndef MIPS64 |
aoqi@0 | 6571 | case lir_cmp: inc_counter(counter_cmp); break; |
aoqi@0 | 6572 | |
aoqi@1 | 6573 | #endif |
aoqi@0 | 6574 | case lir_branch: |
aoqi@0 | 6575 | case lir_cond_float_branch: { |
aoqi@0 | 6576 | LIR_OpBranch* branch = op->as_OpBranch(); |
aoqi@0 | 6577 | if (branch->block() == NULL) { |
aoqi@0 | 6578 | inc_counter(counter_stub_branch); |
aoqi@0 | 6579 | } else if (branch->cond() == lir_cond_always) { |
aoqi@0 | 6580 | inc_counter(counter_uncond_branch); |
aoqi@0 | 6581 | } else { |
aoqi@0 | 6582 | inc_counter(counter_cond_branch); |
aoqi@0 | 6583 | } |
aoqi@0 | 6584 | break; |
aoqi@0 | 6585 | } |
aoqi@0 | 6586 | |
aoqi@0 | 6587 | case lir_neg: |
aoqi@0 | 6588 | case lir_add: |
aoqi@0 | 6589 | case lir_sub: |
aoqi@0 | 6590 | case lir_mul: |
aoqi@0 | 6591 | case lir_mul_strictfp: |
aoqi@0 | 6592 | case lir_div: |
aoqi@0 | 6593 | case lir_div_strictfp: |
aoqi@0 | 6594 | case lir_rem: |
aoqi@0 | 6595 | case lir_sqrt: |
aoqi@0 | 6596 | case lir_sin: |
aoqi@0 | 6597 | case lir_cos: |
aoqi@0 | 6598 | case lir_abs: |
aoqi@0 | 6599 | case lir_log10: |
aoqi@0 | 6600 | case lir_log: |
aoqi@0 | 6601 | case lir_pow: |
aoqi@0 | 6602 | case lir_exp: |
aoqi@0 | 6603 | case lir_logic_and: |
aoqi@0 | 6604 | case lir_logic_or: |
aoqi@0 | 6605 | case lir_logic_xor: |
aoqi@0 | 6606 | case lir_shl: |
aoqi@0 | 6607 | case lir_shr: |
aoqi@0 | 6608 | case lir_ushr: inc_counter(counter_alu); break; |
aoqi@0 | 6609 | |
aoqi@0 | 6610 | case lir_alloc_object: |
aoqi@0 | 6611 | case lir_alloc_array: inc_counter(counter_alloc); break; |
aoqi@0 | 6612 | |
aoqi@0 | 6613 | case lir_monaddr: |
aoqi@0 | 6614 | case lir_lock: |
aoqi@0 | 6615 | case lir_unlock: inc_counter(counter_sync); break; |
aoqi@0 | 6616 | |
aoqi@0 | 6617 | case lir_throw: inc_counter(counter_throw); break; |
aoqi@0 | 6618 | |
aoqi@0 | 6619 | case lir_unwind: inc_counter(counter_unwind); break; |
aoqi@0 | 6620 | |
aoqi@0 | 6621 | case lir_null_check: |
aoqi@0 | 6622 | case lir_leal: |
aoqi@0 | 6623 | case lir_instanceof: |
aoqi@0 | 6624 | case lir_checkcast: |
aoqi@0 | 6625 | case lir_store_check: inc_counter(counter_typecheck); break; |
aoqi@0 | 6626 | |
aoqi@0 | 6627 | case lir_fpop_raw: |
aoqi@0 | 6628 | case lir_fxch: |
aoqi@0 | 6629 | case lir_fld: inc_counter(counter_fpu_stack); break; |
aoqi@0 | 6630 | |
aoqi@0 | 6631 | case lir_nop: |
aoqi@0 | 6632 | case lir_push: |
aoqi@0 | 6633 | case lir_pop: |
aoqi@0 | 6634 | case lir_convert: |
aoqi@0 | 6635 | case lir_roundfp: |
aoqi@0 | 6636 | case lir_cmove: inc_counter(counter_misc_inst); break; |
aoqi@0 | 6637 | |
aoqi@0 | 6638 | default: inc_counter(counter_other_inst); break; |
aoqi@0 | 6639 | } |
aoqi@0 | 6640 | } |
aoqi@0 | 6641 | } |
aoqi@0 | 6642 | |
aoqi@0 | 6643 | if (has_xhandlers) { |
aoqi@0 | 6644 | inc_counter(counter_exception_method); |
aoqi@0 | 6645 | } |
aoqi@0 | 6646 | } |
aoqi@0 | 6647 | |
aoqi@0 | 6648 | void LinearScanStatistic::compute(LinearScan* allocator, LinearScanStatistic &global_statistic) { |
aoqi@0 | 6649 | if (CountLinearScan || TraceLinearScanLevel > 0) { |
aoqi@0 | 6650 | |
aoqi@0 | 6651 | LinearScanStatistic local_statistic = LinearScanStatistic(); |
aoqi@0 | 6652 | |
aoqi@0 | 6653 | local_statistic.collect(allocator); |
aoqi@0 | 6654 | global_statistic.sum_up(local_statistic); |
aoqi@0 | 6655 | |
aoqi@0 | 6656 | if (TraceLinearScanLevel > 2) { |
aoqi@0 | 6657 | local_statistic.print("current local statistic"); |
aoqi@0 | 6658 | } |
aoqi@0 | 6659 | } |
aoqi@0 | 6660 | } |
aoqi@0 | 6661 | |
aoqi@0 | 6662 | |
aoqi@0 | 6663 | // Implementation of LinearTimers |
aoqi@0 | 6664 | |
aoqi@0 | 6665 | LinearScanTimers::LinearScanTimers() { |
aoqi@0 | 6666 | for (int i = 0; i < number_of_timers; i++) { |
aoqi@0 | 6667 | timer(i)->reset(); |
aoqi@0 | 6668 | } |
aoqi@0 | 6669 | } |
aoqi@0 | 6670 | |
aoqi@0 | 6671 | const char* LinearScanTimers::timer_name(int idx) { |
aoqi@0 | 6672 | switch (idx) { |
aoqi@0 | 6673 | case timer_do_nothing: return "Nothing (Time Check)"; |
aoqi@0 | 6674 | case timer_number_instructions: return "Number Instructions"; |
aoqi@0 | 6675 | case timer_compute_local_live_sets: return "Local Live Sets"; |
aoqi@0 | 6676 | case timer_compute_global_live_sets: return "Global Live Sets"; |
aoqi@0 | 6677 | case timer_build_intervals: return "Build Intervals"; |
aoqi@0 | 6678 | case timer_sort_intervals_before: return "Sort Intervals Before"; |
aoqi@0 | 6679 | case timer_allocate_registers: return "Allocate Registers"; |
aoqi@0 | 6680 | case timer_resolve_data_flow: return "Resolve Data Flow"; |
aoqi@0 | 6681 | case timer_sort_intervals_after: return "Sort Intervals After"; |
aoqi@0 | 6682 | case timer_eliminate_spill_moves: return "Spill optimization"; |
aoqi@0 | 6683 | case timer_assign_reg_num: return "Assign Reg Num"; |
aoqi@0 | 6684 | case timer_allocate_fpu_stack: return "Allocate FPU Stack"; |
aoqi@0 | 6685 | case timer_optimize_lir: return "Optimize LIR"; |
aoqi@0 | 6686 | default: ShouldNotReachHere(); return ""; |
aoqi@0 | 6687 | } |
aoqi@0 | 6688 | } |
aoqi@0 | 6689 | |
aoqi@0 | 6690 | void LinearScanTimers::begin_method() { |
aoqi@0 | 6691 | if (TimeEachLinearScan) { |
aoqi@0 | 6692 | // reset all timers to measure only current method |
aoqi@0 | 6693 | for (int i = 0; i < number_of_timers; i++) { |
aoqi@0 | 6694 | timer(i)->reset(); |
aoqi@0 | 6695 | } |
aoqi@0 | 6696 | } |
aoqi@0 | 6697 | } |
aoqi@0 | 6698 | |
aoqi@0 | 6699 | void LinearScanTimers::end_method(LinearScan* allocator) { |
aoqi@0 | 6700 | if (TimeEachLinearScan) { |
aoqi@0 | 6701 | |
aoqi@0 | 6702 | double c = timer(timer_do_nothing)->seconds(); |
aoqi@0 | 6703 | double total = 0; |
aoqi@0 | 6704 | for (int i = 1; i < number_of_timers; i++) { |
aoqi@0 | 6705 | total += timer(i)->seconds() - c; |
aoqi@0 | 6706 | } |
aoqi@0 | 6707 | |
aoqi@0 | 6708 | if (total >= 0.0005) { |
aoqi@0 | 6709 | // print all information in one line for automatic processing |
aoqi@0 | 6710 | tty->print("@"); allocator->compilation()->method()->print_name(); |
aoqi@0 | 6711 | |
aoqi@0 | 6712 | tty->print("@ %d ", allocator->compilation()->method()->code_size()); |
aoqi@0 | 6713 | tty->print("@ %d ", allocator->block_at(allocator->block_count() - 1)->last_lir_instruction_id() / 2); |
aoqi@0 | 6714 | tty->print("@ %d ", allocator->block_count()); |
aoqi@0 | 6715 | tty->print("@ %d ", allocator->num_virtual_regs()); |
aoqi@0 | 6716 | tty->print("@ %d ", allocator->interval_count()); |
aoqi@0 | 6717 | tty->print("@ %d ", allocator->_num_calls); |
aoqi@0 | 6718 | tty->print("@ %d ", allocator->num_loops()); |
aoqi@0 | 6719 | |
aoqi@0 | 6720 | tty->print("@ %6.6f ", total); |
aoqi@0 | 6721 | for (int i = 1; i < number_of_timers; i++) { |
aoqi@0 | 6722 | tty->print("@ %4.1f ", ((timer(i)->seconds() - c) / total) * 100); |
aoqi@0 | 6723 | } |
aoqi@0 | 6724 | tty->cr(); |
aoqi@0 | 6725 | } |
aoqi@0 | 6726 | } |
aoqi@0 | 6727 | } |
aoqi@0 | 6728 | |
aoqi@0 | 6729 | void LinearScanTimers::print(double total_time) { |
aoqi@0 | 6730 | if (TimeLinearScan) { |
aoqi@0 | 6731 | // correction value: sum of dummy-timer that only measures the time that |
aoqi@0 | 6732 | // is necesary to start and stop itself |
aoqi@0 | 6733 | double c = timer(timer_do_nothing)->seconds(); |
aoqi@0 | 6734 | |
aoqi@0 | 6735 | for (int i = 0; i < number_of_timers; i++) { |
aoqi@0 | 6736 | double t = timer(i)->seconds(); |
aoqi@0 | 6737 | tty->print_cr(" %25s: %6.3f s (%4.1f%%) corrected: %6.3f s (%4.1f%%)", timer_name(i), t, (t / total_time) * 100.0, t - c, (t - c) / (total_time - 2 * number_of_timers * c) * 100); |
aoqi@0 | 6738 | } |
aoqi@0 | 6739 | } |
aoqi@0 | 6740 | } |
aoqi@0 | 6741 | |
aoqi@0 | 6742 | #endif // #ifndef PRODUCT |