Tue, 08 Aug 2017 15:57:29 +0800
merge
aoqi@0 | 1 | /* |
aoqi@0 | 2 | * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. |
aoqi@0 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@0 | 4 | * |
aoqi@0 | 5 | * This code is free software; you can redistribute it and/or modify it |
aoqi@0 | 6 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@0 | 7 | * published by the Free Software Foundation. |
aoqi@0 | 8 | * |
aoqi@0 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@0 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@0 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@0 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@0 | 13 | * accompanied this code). |
aoqi@0 | 14 | * |
aoqi@0 | 15 | * You should have received a copy of the GNU General Public License version |
aoqi@0 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@0 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@0 | 18 | * |
aoqi@0 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@0 | 20 | * or visit www.oracle.com if you need additional information or have any |
aoqi@0 | 21 | * questions. |
aoqi@0 | 22 | * |
aoqi@0 | 23 | */ |
aoqi@0 | 24 | |
aoqi@1 | 25 | /* |
aoqi@1 | 26 | * This file has been modified by Loongson Technology in 2015. These |
aoqi@1 | 27 | * modifications are Copyright (c) 2015 Loongson Technology, and are made |
aoqi@1 | 28 | * available on the same license terms set forth above. |
aoqi@1 | 29 | */ |
aoqi@1 | 30 | |
aoqi@0 | 31 | #include "precompiled.hpp" |
aoqi@0 | 32 | #include "c1/c1_Compilation.hpp" |
aoqi@0 | 33 | #include "c1/c1_Instruction.hpp" |
aoqi@0 | 34 | #include "c1/c1_InstructionPrinter.hpp" |
aoqi@0 | 35 | #include "c1/c1_LIRAssembler.hpp" |
aoqi@0 | 36 | #include "c1/c1_MacroAssembler.hpp" |
aoqi@0 | 37 | #include "c1/c1_ValueStack.hpp" |
aoqi@0 | 38 | #include "ci/ciInstance.hpp" |
aoqi@0 | 39 | #ifdef TARGET_ARCH_x86 |
aoqi@0 | 40 | # include "nativeInst_x86.hpp" |
aoqi@0 | 41 | # include "vmreg_x86.inline.hpp" |
aoqi@0 | 42 | #endif |
aoqi@1 | 43 | #ifdef TARGET_ARCH_mips |
aoqi@1 | 44 | # include "nativeInst_mips.hpp" |
aoqi@1 | 45 | # include "vmreg_mips.inline.hpp" |
aoqi@1 | 46 | #endif |
aoqi@0 | 47 | #ifdef TARGET_ARCH_sparc |
aoqi@0 | 48 | # include "nativeInst_sparc.hpp" |
aoqi@0 | 49 | # include "vmreg_sparc.inline.hpp" |
aoqi@0 | 50 | #endif |
aoqi@0 | 51 | #ifdef TARGET_ARCH_zero |
aoqi@0 | 52 | # include "nativeInst_zero.hpp" |
aoqi@0 | 53 | # include "vmreg_zero.inline.hpp" |
aoqi@0 | 54 | #endif |
aoqi@0 | 55 | #ifdef TARGET_ARCH_arm |
aoqi@0 | 56 | # include "nativeInst_arm.hpp" |
aoqi@0 | 57 | # include "vmreg_arm.inline.hpp" |
aoqi@0 | 58 | #endif |
aoqi@0 | 59 | #ifdef TARGET_ARCH_ppc |
aoqi@0 | 60 | # include "nativeInst_ppc.hpp" |
aoqi@0 | 61 | # include "vmreg_ppc.inline.hpp" |
aoqi@0 | 62 | #endif |
aoqi@0 | 63 | |
aoqi@0 | 64 | |
aoqi@0 | 65 | void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) { |
aoqi@0 | 66 | // we must have enough patching space so that call can be inserted |
aoqi@0 | 67 | while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeCall::instruction_size) { |
aoqi@0 | 68 | _masm->nop(); |
aoqi@0 | 69 | } |
aoqi@0 | 70 | patch->install(_masm, patch_code, obj, info); |
aoqi@0 | 71 | append_code_stub(patch); |
aoqi@0 | 72 | |
aoqi@0 | 73 | #ifdef ASSERT |
aoqi@0 | 74 | Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci()); |
aoqi@0 | 75 | if (patch->id() == PatchingStub::access_field_id) { |
aoqi@0 | 76 | switch (code) { |
aoqi@0 | 77 | case Bytecodes::_putstatic: |
aoqi@0 | 78 | case Bytecodes::_getstatic: |
aoqi@0 | 79 | case Bytecodes::_putfield: |
aoqi@0 | 80 | case Bytecodes::_getfield: |
aoqi@0 | 81 | break; |
aoqi@0 | 82 | default: |
aoqi@0 | 83 | ShouldNotReachHere(); |
aoqi@0 | 84 | } |
aoqi@0 | 85 | } else if (patch->id() == PatchingStub::load_klass_id) { |
aoqi@0 | 86 | switch (code) { |
aoqi@0 | 87 | case Bytecodes::_new: |
aoqi@0 | 88 | case Bytecodes::_anewarray: |
aoqi@0 | 89 | case Bytecodes::_multianewarray: |
aoqi@0 | 90 | case Bytecodes::_instanceof: |
aoqi@0 | 91 | case Bytecodes::_checkcast: |
aoqi@0 | 92 | break; |
aoqi@0 | 93 | default: |
aoqi@0 | 94 | ShouldNotReachHere(); |
aoqi@0 | 95 | } |
aoqi@0 | 96 | } else if (patch->id() == PatchingStub::load_mirror_id) { |
aoqi@0 | 97 | switch (code) { |
aoqi@0 | 98 | case Bytecodes::_putstatic: |
aoqi@0 | 99 | case Bytecodes::_getstatic: |
aoqi@0 | 100 | case Bytecodes::_ldc: |
aoqi@0 | 101 | case Bytecodes::_ldc_w: |
aoqi@0 | 102 | break; |
aoqi@0 | 103 | default: |
aoqi@0 | 104 | ShouldNotReachHere(); |
aoqi@0 | 105 | } |
aoqi@0 | 106 | } else if (patch->id() == PatchingStub::load_appendix_id) { |
aoqi@0 | 107 | Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci()); |
aoqi@0 | 108 | assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution"); |
aoqi@0 | 109 | } else { |
aoqi@0 | 110 | ShouldNotReachHere(); |
aoqi@0 | 111 | } |
aoqi@0 | 112 | #endif |
aoqi@0 | 113 | } |
aoqi@0 | 114 | |
aoqi@0 | 115 | PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) { |
aoqi@0 | 116 | IRScope* scope = info->scope(); |
aoqi@0 | 117 | Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci()); |
aoqi@0 | 118 | if (Bytecodes::has_optional_appendix(bc_raw)) { |
aoqi@0 | 119 | return PatchingStub::load_appendix_id; |
aoqi@0 | 120 | } |
aoqi@0 | 121 | return PatchingStub::load_mirror_id; |
aoqi@0 | 122 | } |
aoqi@0 | 123 | |
aoqi@0 | 124 | //--------------------------------------------------------------- |
aoqi@0 | 125 | |
aoqi@0 | 126 | |
aoqi@0 | 127 | LIR_Assembler::LIR_Assembler(Compilation* c): |
aoqi@0 | 128 | _compilation(c) |
aoqi@0 | 129 | , _masm(c->masm()) |
aoqi@0 | 130 | , _bs(Universe::heap()->barrier_set()) |
aoqi@0 | 131 | , _frame_map(c->frame_map()) |
aoqi@0 | 132 | , _current_block(NULL) |
aoqi@0 | 133 | , _pending_non_safepoint(NULL) |
aoqi@0 | 134 | , _pending_non_safepoint_offset(0) |
aoqi@0 | 135 | { |
aoqi@0 | 136 | _slow_case_stubs = new CodeStubList(); |
aoqi@0 | 137 | } |
aoqi@0 | 138 | |
aoqi@0 | 139 | |
aoqi@0 | 140 | LIR_Assembler::~LIR_Assembler() { |
aoqi@0 | 141 | } |
aoqi@0 | 142 | |
aoqi@0 | 143 | |
aoqi@0 | 144 | void LIR_Assembler::check_codespace() { |
aoqi@0 | 145 | CodeSection* cs = _masm->code_section(); |
aoqi@0 | 146 | if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) { |
aoqi@0 | 147 | BAILOUT("CodeBuffer overflow"); |
aoqi@0 | 148 | } |
aoqi@0 | 149 | } |
aoqi@0 | 150 | |
aoqi@0 | 151 | |
aoqi@0 | 152 | void LIR_Assembler::append_code_stub(CodeStub* stub) { |
aoqi@0 | 153 | _slow_case_stubs->append(stub); |
aoqi@0 | 154 | } |
aoqi@0 | 155 | |
aoqi@0 | 156 | void LIR_Assembler::emit_stubs(CodeStubList* stub_list) { |
aoqi@0 | 157 | for (int m = 0; m < stub_list->length(); m++) { |
aoqi@0 | 158 | CodeStub* s = (*stub_list)[m]; |
aoqi@0 | 159 | |
aoqi@0 | 160 | check_codespace(); |
aoqi@0 | 161 | CHECK_BAILOUT(); |
aoqi@0 | 162 | |
aoqi@0 | 163 | #ifndef PRODUCT |
aoqi@0 | 164 | if (CommentedAssembly) { |
aoqi@0 | 165 | stringStream st; |
aoqi@0 | 166 | s->print_name(&st); |
aoqi@0 | 167 | st.print(" slow case"); |
aoqi@0 | 168 | _masm->block_comment(st.as_string()); |
aoqi@0 | 169 | } |
aoqi@0 | 170 | #endif |
aoqi@0 | 171 | s->emit_code(this); |
aoqi@0 | 172 | #ifdef ASSERT |
aoqi@0 | 173 | s->assert_no_unbound_labels(); |
aoqi@0 | 174 | #endif |
aoqi@0 | 175 | } |
aoqi@0 | 176 | } |
aoqi@0 | 177 | |
aoqi@0 | 178 | |
aoqi@0 | 179 | void LIR_Assembler::emit_slow_case_stubs() { |
aoqi@0 | 180 | emit_stubs(_slow_case_stubs); |
aoqi@0 | 181 | } |
aoqi@0 | 182 | |
aoqi@0 | 183 | |
aoqi@0 | 184 | bool LIR_Assembler::needs_icache(ciMethod* method) const { |
aoqi@0 | 185 | return !method->is_static(); |
aoqi@0 | 186 | } |
aoqi@0 | 187 | |
aoqi@0 | 188 | |
aoqi@0 | 189 | int LIR_Assembler::code_offset() const { |
aoqi@0 | 190 | return _masm->offset(); |
aoqi@0 | 191 | } |
aoqi@0 | 192 | |
aoqi@0 | 193 | |
aoqi@0 | 194 | address LIR_Assembler::pc() const { |
aoqi@0 | 195 | return _masm->pc(); |
aoqi@0 | 196 | } |
aoqi@0 | 197 | |
aoqi@0 | 198 | // To bang the stack of this compiled method we use the stack size |
aoqi@0 | 199 | // that the interpreter would need in case of a deoptimization. This |
aoqi@0 | 200 | // removes the need to bang the stack in the deoptimization blob which |
aoqi@0 | 201 | // in turn simplifies stack overflow handling. |
aoqi@0 | 202 | int LIR_Assembler::bang_size_in_bytes() const { |
aoqi@0 | 203 | return MAX2(initial_frame_size_in_bytes(), _compilation->interpreter_frame_size()); |
aoqi@0 | 204 | } |
aoqi@0 | 205 | |
aoqi@0 | 206 | void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) { |
aoqi@0 | 207 | for (int i = 0; i < info_list->length(); i++) { |
aoqi@0 | 208 | XHandlers* handlers = info_list->at(i)->exception_handlers(); |
aoqi@0 | 209 | |
aoqi@0 | 210 | for (int j = 0; j < handlers->length(); j++) { |
aoqi@0 | 211 | XHandler* handler = handlers->handler_at(j); |
aoqi@0 | 212 | assert(handler->lir_op_id() != -1, "handler not processed by LinearScan"); |
aoqi@0 | 213 | assert(handler->entry_code() == NULL || |
aoqi@0 | 214 | handler->entry_code()->instructions_list()->last()->code() == lir_branch || |
aoqi@0 | 215 | handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch"); |
aoqi@0 | 216 | |
aoqi@0 | 217 | if (handler->entry_pco() == -1) { |
aoqi@0 | 218 | // entry code not emitted yet |
aoqi@0 | 219 | if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) { |
aoqi@0 | 220 | handler->set_entry_pco(code_offset()); |
aoqi@0 | 221 | if (CommentedAssembly) { |
aoqi@0 | 222 | _masm->block_comment("Exception adapter block"); |
aoqi@0 | 223 | } |
aoqi@0 | 224 | emit_lir_list(handler->entry_code()); |
aoqi@0 | 225 | } else { |
aoqi@0 | 226 | handler->set_entry_pco(handler->entry_block()->exception_handler_pco()); |
aoqi@0 | 227 | } |
aoqi@0 | 228 | |
aoqi@0 | 229 | assert(handler->entry_pco() != -1, "must be set now"); |
aoqi@0 | 230 | } |
aoqi@0 | 231 | } |
aoqi@0 | 232 | } |
aoqi@0 | 233 | } |
aoqi@0 | 234 | |
aoqi@0 | 235 | |
aoqi@0 | 236 | void LIR_Assembler::emit_code(BlockList* hir) { |
aoqi@0 | 237 | if (PrintLIR) { |
aoqi@0 | 238 | print_LIR(hir); |
aoqi@0 | 239 | } |
aoqi@0 | 240 | |
aoqi@0 | 241 | int n = hir->length(); |
aoqi@0 | 242 | for (int i = 0; i < n; i++) { |
aoqi@0 | 243 | emit_block(hir->at(i)); |
aoqi@0 | 244 | CHECK_BAILOUT(); |
aoqi@0 | 245 | } |
aoqi@0 | 246 | |
aoqi@0 | 247 | flush_debug_info(code_offset()); |
aoqi@0 | 248 | |
aoqi@0 | 249 | DEBUG_ONLY(check_no_unbound_labels()); |
aoqi@0 | 250 | } |
aoqi@0 | 251 | |
aoqi@0 | 252 | |
aoqi@0 | 253 | void LIR_Assembler::emit_block(BlockBegin* block) { |
aoqi@0 | 254 | if (block->is_set(BlockBegin::backward_branch_target_flag)) { |
aoqi@0 | 255 | align_backward_branch_target(); |
aoqi@0 | 256 | } |
aoqi@0 | 257 | |
aoqi@0 | 258 | // if this block is the start of an exception handler, record the |
aoqi@0 | 259 | // PC offset of the first instruction for later construction of |
aoqi@0 | 260 | // the ExceptionHandlerTable |
aoqi@0 | 261 | if (block->is_set(BlockBegin::exception_entry_flag)) { |
aoqi@0 | 262 | block->set_exception_handler_pco(code_offset()); |
aoqi@0 | 263 | } |
aoqi@0 | 264 | |
aoqi@0 | 265 | #ifndef PRODUCT |
aoqi@0 | 266 | if (PrintLIRWithAssembly) { |
aoqi@0 | 267 | // don't print Phi's |
aoqi@0 | 268 | InstructionPrinter ip(false); |
aoqi@0 | 269 | block->print(ip); |
aoqi@0 | 270 | } |
aoqi@0 | 271 | #endif /* PRODUCT */ |
aoqi@0 | 272 | |
aoqi@0 | 273 | assert(block->lir() != NULL, "must have LIR"); |
aoqi@0 | 274 | X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed")); |
aoqi@0 | 275 | |
aoqi@0 | 276 | #ifndef PRODUCT |
aoqi@0 | 277 | if (CommentedAssembly) { |
aoqi@0 | 278 | stringStream st; |
aoqi@0 | 279 | st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci()); |
aoqi@0 | 280 | _masm->block_comment(st.as_string()); |
aoqi@0 | 281 | } |
aoqi@0 | 282 | #endif |
aoqi@0 | 283 | |
aoqi@0 | 284 | emit_lir_list(block->lir()); |
aoqi@0 | 285 | |
aoqi@0 | 286 | X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed")); |
aoqi@0 | 287 | } |
aoqi@0 | 288 | |
aoqi@0 | 289 | |
aoqi@0 | 290 | void LIR_Assembler::emit_lir_list(LIR_List* list) { |
aoqi@0 | 291 | peephole(list); |
aoqi@0 | 292 | |
aoqi@0 | 293 | int n = list->length(); |
aoqi@0 | 294 | for (int i = 0; i < n; i++) { |
aoqi@0 | 295 | LIR_Op* op = list->at(i); |
aoqi@0 | 296 | |
aoqi@0 | 297 | check_codespace(); |
aoqi@0 | 298 | CHECK_BAILOUT(); |
aoqi@0 | 299 | |
aoqi@0 | 300 | #ifndef PRODUCT |
aoqi@0 | 301 | if (CommentedAssembly) { |
aoqi@0 | 302 | // Don't record out every op since that's too verbose. Print |
aoqi@0 | 303 | // branches since they include block and stub names. Also print |
aoqi@0 | 304 | // patching moves since they generate funny looking code. |
aoqi@0 | 305 | if (op->code() == lir_branch || |
aoqi@0 | 306 | (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) { |
aoqi@0 | 307 | stringStream st; |
aoqi@0 | 308 | op->print_on(&st); |
aoqi@0 | 309 | _masm->block_comment(st.as_string()); |
aoqi@0 | 310 | } |
aoqi@0 | 311 | } |
aoqi@0 | 312 | if (PrintLIRWithAssembly) { |
aoqi@0 | 313 | // print out the LIR operation followed by the resulting assembly |
aoqi@0 | 314 | list->at(i)->print(); tty->cr(); |
aoqi@0 | 315 | } |
aoqi@0 | 316 | #endif /* PRODUCT */ |
aoqi@0 | 317 | |
aoqi@0 | 318 | op->emit_code(this); |
aoqi@0 | 319 | |
aoqi@0 | 320 | if (compilation()->debug_info_recorder()->recording_non_safepoints()) { |
aoqi@0 | 321 | process_debug_info(op); |
aoqi@0 | 322 | } |
aoqi@0 | 323 | |
aoqi@0 | 324 | #ifndef PRODUCT |
aoqi@0 | 325 | if (PrintLIRWithAssembly) { |
aoqi@0 | 326 | _masm->code()->decode(); |
aoqi@0 | 327 | } |
aoqi@0 | 328 | #endif /* PRODUCT */ |
aoqi@0 | 329 | } |
aoqi@0 | 330 | } |
aoqi@0 | 331 | |
aoqi@0 | 332 | #ifdef ASSERT |
aoqi@0 | 333 | void LIR_Assembler::check_no_unbound_labels() { |
aoqi@0 | 334 | CHECK_BAILOUT(); |
aoqi@0 | 335 | |
aoqi@0 | 336 | for (int i = 0; i < _branch_target_blocks.length() - 1; i++) { |
aoqi@0 | 337 | if (!_branch_target_blocks.at(i)->label()->is_bound()) { |
aoqi@0 | 338 | tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id()); |
aoqi@0 | 339 | assert(false, "unbound label"); |
aoqi@0 | 340 | } |
aoqi@0 | 341 | } |
aoqi@0 | 342 | } |
aoqi@0 | 343 | #endif |
aoqi@0 | 344 | |
aoqi@0 | 345 | //----------------------------------debug info-------------------------------- |
aoqi@0 | 346 | |
aoqi@0 | 347 | |
aoqi@0 | 348 | void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) { |
aoqi@0 | 349 | _masm->code_section()->relocate(pc(), relocInfo::poll_type); |
aoqi@0 | 350 | int pc_offset = code_offset(); |
aoqi@0 | 351 | flush_debug_info(pc_offset); |
aoqi@0 | 352 | info->record_debug_info(compilation()->debug_info_recorder(), pc_offset); |
aoqi@0 | 353 | if (info->exception_handlers() != NULL) { |
aoqi@0 | 354 | compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers()); |
aoqi@0 | 355 | } |
aoqi@0 | 356 | } |
aoqi@0 | 357 | |
aoqi@0 | 358 | |
aoqi@0 | 359 | void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) { |
aoqi@0 | 360 | flush_debug_info(pc_offset); |
aoqi@0 | 361 | cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset); |
aoqi@0 | 362 | if (cinfo->exception_handlers() != NULL) { |
aoqi@0 | 363 | compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers()); |
aoqi@0 | 364 | } |
aoqi@0 | 365 | } |
aoqi@0 | 366 | |
aoqi@0 | 367 | static ValueStack* debug_info(Instruction* ins) { |
aoqi@0 | 368 | StateSplit* ss = ins->as_StateSplit(); |
aoqi@0 | 369 | if (ss != NULL) return ss->state(); |
aoqi@0 | 370 | return ins->state_before(); |
aoqi@0 | 371 | } |
aoqi@0 | 372 | |
aoqi@0 | 373 | void LIR_Assembler::process_debug_info(LIR_Op* op) { |
aoqi@0 | 374 | Instruction* src = op->source(); |
aoqi@0 | 375 | if (src == NULL) return; |
aoqi@0 | 376 | int pc_offset = code_offset(); |
aoqi@0 | 377 | if (_pending_non_safepoint == src) { |
aoqi@0 | 378 | _pending_non_safepoint_offset = pc_offset; |
aoqi@0 | 379 | return; |
aoqi@0 | 380 | } |
aoqi@0 | 381 | ValueStack* vstack = debug_info(src); |
aoqi@0 | 382 | if (vstack == NULL) return; |
aoqi@0 | 383 | if (_pending_non_safepoint != NULL) { |
aoqi@0 | 384 | // Got some old debug info. Get rid of it. |
aoqi@0 | 385 | if (debug_info(_pending_non_safepoint) == vstack) { |
aoqi@0 | 386 | _pending_non_safepoint_offset = pc_offset; |
aoqi@0 | 387 | return; |
aoqi@0 | 388 | } |
aoqi@0 | 389 | if (_pending_non_safepoint_offset < pc_offset) { |
aoqi@0 | 390 | record_non_safepoint_debug_info(); |
aoqi@0 | 391 | } |
aoqi@0 | 392 | _pending_non_safepoint = NULL; |
aoqi@0 | 393 | } |
aoqi@0 | 394 | // Remember the debug info. |
aoqi@0 | 395 | if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) { |
aoqi@0 | 396 | _pending_non_safepoint = src; |
aoqi@0 | 397 | _pending_non_safepoint_offset = pc_offset; |
aoqi@0 | 398 | } |
aoqi@0 | 399 | } |
aoqi@0 | 400 | |
aoqi@0 | 401 | // Index caller states in s, where 0 is the oldest, 1 its callee, etc. |
aoqi@0 | 402 | // Return NULL if n is too large. |
aoqi@0 | 403 | // Returns the caller_bci for the next-younger state, also. |
aoqi@0 | 404 | static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) { |
aoqi@0 | 405 | ValueStack* t = s; |
aoqi@0 | 406 | for (int i = 0; i < n; i++) { |
aoqi@0 | 407 | if (t == NULL) break; |
aoqi@0 | 408 | t = t->caller_state(); |
aoqi@0 | 409 | } |
aoqi@0 | 410 | if (t == NULL) return NULL; |
aoqi@0 | 411 | for (;;) { |
aoqi@0 | 412 | ValueStack* tc = t->caller_state(); |
aoqi@0 | 413 | if (tc == NULL) return s; |
aoqi@0 | 414 | t = tc; |
aoqi@0 | 415 | bci_result = tc->bci(); |
aoqi@0 | 416 | s = s->caller_state(); |
aoqi@0 | 417 | } |
aoqi@0 | 418 | } |
aoqi@0 | 419 | |
aoqi@0 | 420 | void LIR_Assembler::record_non_safepoint_debug_info() { |
aoqi@0 | 421 | int pc_offset = _pending_non_safepoint_offset; |
aoqi@0 | 422 | ValueStack* vstack = debug_info(_pending_non_safepoint); |
aoqi@0 | 423 | int bci = vstack->bci(); |
aoqi@0 | 424 | |
aoqi@0 | 425 | DebugInformationRecorder* debug_info = compilation()->debug_info_recorder(); |
aoqi@0 | 426 | assert(debug_info->recording_non_safepoints(), "sanity"); |
aoqi@0 | 427 | |
aoqi@0 | 428 | debug_info->add_non_safepoint(pc_offset); |
aoqi@0 | 429 | |
aoqi@0 | 430 | // Visit scopes from oldest to youngest. |
aoqi@0 | 431 | for (int n = 0; ; n++) { |
aoqi@0 | 432 | int s_bci = bci; |
aoqi@0 | 433 | ValueStack* s = nth_oldest(vstack, n, s_bci); |
aoqi@0 | 434 | if (s == NULL) break; |
aoqi@0 | 435 | IRScope* scope = s->scope(); |
aoqi@0 | 436 | //Always pass false for reexecute since these ScopeDescs are never used for deopt |
aoqi@0 | 437 | debug_info->describe_scope(pc_offset, scope->method(), s->bci(), false/*reexecute*/); |
aoqi@0 | 438 | } |
aoqi@0 | 439 | |
aoqi@0 | 440 | debug_info->end_non_safepoint(pc_offset); |
aoqi@0 | 441 | } |
aoqi@0 | 442 | |
aoqi@0 | 443 | |
aoqi@0 | 444 | void LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) { |
aoqi@0 | 445 | add_debug_info_for_null_check(code_offset(), cinfo); |
aoqi@0 | 446 | } |
aoqi@0 | 447 | |
aoqi@0 | 448 | void LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) { |
aoqi@0 | 449 | ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo); |
aoqi@0 | 450 | append_code_stub(stub); |
aoqi@0 | 451 | } |
aoqi@0 | 452 | |
aoqi@0 | 453 | void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) { |
aoqi@0 | 454 | add_debug_info_for_div0(code_offset(), info); |
aoqi@0 | 455 | } |
aoqi@0 | 456 | |
aoqi@0 | 457 | void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) { |
aoqi@0 | 458 | DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo); |
aoqi@0 | 459 | append_code_stub(stub); |
aoqi@0 | 460 | } |
aoqi@0 | 461 | |
aoqi@0 | 462 | void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) { |
aoqi@0 | 463 | rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info()); |
aoqi@0 | 464 | } |
aoqi@0 | 465 | |
aoqi@0 | 466 | |
aoqi@0 | 467 | void LIR_Assembler::emit_call(LIR_OpJavaCall* op) { |
aoqi@0 | 468 | verify_oop_map(op->info()); |
aoqi@0 | 469 | |
aoqi@0 | 470 | if (os::is_MP()) { |
aoqi@0 | 471 | // must align calls sites, otherwise they can't be updated atomically on MP hardware |
aoqi@0 | 472 | align_call(op->code()); |
aoqi@0 | 473 | } |
aoqi@0 | 474 | |
aoqi@0 | 475 | // emit the static call stub stuff out of line |
aoqi@0 | 476 | emit_static_call_stub(); |
aoqi@0 | 477 | |
aoqi@0 | 478 | switch (op->code()) { |
aoqi@0 | 479 | case lir_static_call: |
aoqi@0 | 480 | case lir_dynamic_call: |
aoqi@0 | 481 | call(op, relocInfo::static_call_type); |
aoqi@0 | 482 | break; |
aoqi@0 | 483 | case lir_optvirtual_call: |
aoqi@0 | 484 | call(op, relocInfo::opt_virtual_call_type); |
aoqi@0 | 485 | break; |
aoqi@0 | 486 | case lir_icvirtual_call: |
aoqi@0 | 487 | ic_call(op); |
aoqi@0 | 488 | break; |
aoqi@0 | 489 | case lir_virtual_call: |
aoqi@0 | 490 | vtable_call(op); |
aoqi@0 | 491 | break; |
aoqi@0 | 492 | default: |
aoqi@0 | 493 | fatal(err_msg_res("unexpected op code: %s", op->name())); |
aoqi@0 | 494 | break; |
aoqi@0 | 495 | } |
aoqi@0 | 496 | |
aoqi@0 | 497 | // JSR 292 |
aoqi@0 | 498 | // Record if this method has MethodHandle invokes. |
aoqi@0 | 499 | if (op->is_method_handle_invoke()) { |
aoqi@0 | 500 | compilation()->set_has_method_handle_invokes(true); |
aoqi@0 | 501 | } |
aoqi@0 | 502 | |
aoqi@0 | 503 | #if defined(X86) && defined(TIERED) |
aoqi@0 | 504 | // C2 leave fpu stack dirty clean it |
aoqi@0 | 505 | if (UseSSE < 2) { |
aoqi@0 | 506 | int i; |
aoqi@0 | 507 | for ( i = 1; i <= 7 ; i++ ) { |
aoqi@0 | 508 | ffree(i); |
aoqi@0 | 509 | } |
aoqi@0 | 510 | if (!op->result_opr()->is_float_kind()) { |
aoqi@0 | 511 | ffree(0); |
aoqi@0 | 512 | } |
aoqi@0 | 513 | } |
aoqi@0 | 514 | #endif // X86 && TIERED |
aoqi@0 | 515 | } |
aoqi@0 | 516 | |
aoqi@0 | 517 | |
aoqi@0 | 518 | void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) { |
aoqi@0 | 519 | _masm->bind (*(op->label())); |
aoqi@0 | 520 | } |
aoqi@0 | 521 | |
aoqi@0 | 522 | |
aoqi@0 | 523 | void LIR_Assembler::emit_op1(LIR_Op1* op) { |
aoqi@0 | 524 | switch (op->code()) { |
aoqi@0 | 525 | case lir_move: |
aoqi@0 | 526 | if (op->move_kind() == lir_move_volatile) { |
aoqi@0 | 527 | assert(op->patch_code() == lir_patch_none, "can't patch volatiles"); |
aoqi@0 | 528 | volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info()); |
aoqi@0 | 529 | } else { |
aoqi@0 | 530 | move_op(op->in_opr(), op->result_opr(), op->type(), |
aoqi@0 | 531 | op->patch_code(), op->info(), op->pop_fpu_stack(), |
aoqi@0 | 532 | op->move_kind() == lir_move_unaligned, |
aoqi@0 | 533 | op->move_kind() == lir_move_wide); |
aoqi@0 | 534 | } |
aoqi@0 | 535 | break; |
aoqi@0 | 536 | |
aoqi@0 | 537 | case lir_prefetchr: |
aoqi@0 | 538 | prefetchr(op->in_opr()); |
aoqi@0 | 539 | break; |
aoqi@0 | 540 | |
aoqi@0 | 541 | case lir_prefetchw: |
aoqi@0 | 542 | prefetchw(op->in_opr()); |
aoqi@0 | 543 | break; |
aoqi@0 | 544 | |
aoqi@0 | 545 | case lir_roundfp: { |
aoqi@0 | 546 | LIR_OpRoundFP* round_op = op->as_OpRoundFP(); |
aoqi@0 | 547 | roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack()); |
aoqi@0 | 548 | break; |
aoqi@0 | 549 | } |
aoqi@0 | 550 | |
aoqi@0 | 551 | case lir_return: |
aoqi@0 | 552 | return_op(op->in_opr()); |
aoqi@0 | 553 | break; |
aoqi@0 | 554 | |
aoqi@0 | 555 | case lir_safepoint: |
aoqi@0 | 556 | if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) { |
aoqi@0 | 557 | _masm->nop(); |
aoqi@0 | 558 | } |
aoqi@0 | 559 | safepoint_poll(op->in_opr(), op->info()); |
aoqi@0 | 560 | break; |
aoqi@0 | 561 | |
aoqi@0 | 562 | case lir_fxch: |
aoqi@0 | 563 | fxch(op->in_opr()->as_jint()); |
aoqi@0 | 564 | break; |
aoqi@0 | 565 | |
aoqi@0 | 566 | case lir_fld: |
aoqi@0 | 567 | fld(op->in_opr()->as_jint()); |
aoqi@0 | 568 | break; |
aoqi@0 | 569 | |
aoqi@0 | 570 | case lir_ffree: |
aoqi@0 | 571 | ffree(op->in_opr()->as_jint()); |
aoqi@0 | 572 | break; |
aoqi@0 | 573 | |
aoqi@0 | 574 | case lir_branch: |
aoqi@0 | 575 | break; |
aoqi@0 | 576 | |
aoqi@0 | 577 | case lir_push: |
aoqi@0 | 578 | push(op->in_opr()); |
aoqi@0 | 579 | break; |
aoqi@0 | 580 | |
aoqi@0 | 581 | case lir_pop: |
aoqi@0 | 582 | pop(op->in_opr()); |
aoqi@0 | 583 | break; |
aoqi@0 | 584 | |
aoqi@0 | 585 | case lir_neg: |
aoqi@0 | 586 | negate(op->in_opr(), op->result_opr()); |
aoqi@0 | 587 | break; |
aoqi@0 | 588 | |
aoqi@0 | 589 | case lir_leal: |
aoqi@0 | 590 | leal(op->in_opr(), op->result_opr()); |
aoqi@0 | 591 | break; |
aoqi@0 | 592 | |
aoqi@0 | 593 | case lir_null_check: |
aoqi@0 | 594 | if (GenerateCompilerNullChecks) { |
aoqi@0 | 595 | add_debug_info_for_null_check_here(op->info()); |
aoqi@0 | 596 | |
aoqi@0 | 597 | if (op->in_opr()->is_single_cpu()) { |
aoqi@0 | 598 | _masm->null_check(op->in_opr()->as_register()); |
aoqi@0 | 599 | } else { |
aoqi@0 | 600 | Unimplemented(); |
aoqi@0 | 601 | } |
aoqi@0 | 602 | } |
aoqi@0 | 603 | break; |
aoqi@0 | 604 | |
aoqi@0 | 605 | case lir_monaddr: |
aoqi@0 | 606 | monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr()); |
aoqi@0 | 607 | break; |
aoqi@0 | 608 | |
aoqi@0 | 609 | #ifdef SPARC |
aoqi@0 | 610 | case lir_pack64: |
aoqi@0 | 611 | pack64(op->in_opr(), op->result_opr()); |
aoqi@0 | 612 | break; |
aoqi@0 | 613 | |
aoqi@0 | 614 | case lir_unpack64: |
aoqi@0 | 615 | unpack64(op->in_opr(), op->result_opr()); |
aoqi@0 | 616 | break; |
aoqi@0 | 617 | #endif |
aoqi@0 | 618 | |
aoqi@0 | 619 | case lir_unwind: |
aoqi@0 | 620 | unwind_op(op->in_opr()); |
aoqi@0 | 621 | break; |
aoqi@0 | 622 | |
aoqi@0 | 623 | default: |
aoqi@0 | 624 | Unimplemented(); |
aoqi@0 | 625 | break; |
aoqi@0 | 626 | } |
aoqi@0 | 627 | } |
aoqi@0 | 628 | |
aoqi@0 | 629 | |
aoqi@0 | 630 | void LIR_Assembler::emit_op0(LIR_Op0* op) { |
aoqi@0 | 631 | switch (op->code()) { |
aoqi@0 | 632 | case lir_word_align: { |
aoqi@0 | 633 | while (code_offset() % BytesPerWord != 0) { |
aoqi@0 | 634 | _masm->nop(); |
aoqi@0 | 635 | } |
aoqi@0 | 636 | break; |
aoqi@0 | 637 | } |
aoqi@0 | 638 | |
aoqi@0 | 639 | case lir_nop: |
aoqi@0 | 640 | assert(op->info() == NULL, "not supported"); |
aoqi@0 | 641 | _masm->nop(); |
aoqi@0 | 642 | break; |
aoqi@0 | 643 | |
aoqi@0 | 644 | case lir_label: |
aoqi@0 | 645 | Unimplemented(); |
aoqi@0 | 646 | break; |
aoqi@0 | 647 | |
aoqi@0 | 648 | case lir_build_frame: |
aoqi@0 | 649 | build_frame(); |
aoqi@0 | 650 | break; |
aoqi@0 | 651 | |
aoqi@0 | 652 | case lir_std_entry: |
aoqi@0 | 653 | // init offsets |
aoqi@0 | 654 | offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset()); |
aoqi@0 | 655 | _masm->align(CodeEntryAlignment); |
aoqi@0 | 656 | if (needs_icache(compilation()->method())) { |
aoqi@0 | 657 | check_icache(); |
aoqi@0 | 658 | } |
aoqi@0 | 659 | offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset()); |
aoqi@0 | 660 | _masm->verified_entry(); |
aoqi@0 | 661 | build_frame(); |
aoqi@0 | 662 | offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset()); |
aoqi@0 | 663 | break; |
aoqi@0 | 664 | |
aoqi@0 | 665 | case lir_osr_entry: |
aoqi@0 | 666 | offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset()); |
aoqi@0 | 667 | osr_entry(); |
aoqi@0 | 668 | break; |
aoqi@0 | 669 | |
aoqi@0 | 670 | case lir_24bit_FPU: |
aoqi@0 | 671 | set_24bit_FPU(); |
aoqi@0 | 672 | break; |
aoqi@0 | 673 | |
aoqi@0 | 674 | case lir_reset_FPU: |
aoqi@0 | 675 | reset_FPU(); |
aoqi@0 | 676 | break; |
aoqi@0 | 677 | |
aoqi@0 | 678 | case lir_breakpoint: |
aoqi@0 | 679 | breakpoint(); |
aoqi@0 | 680 | break; |
aoqi@0 | 681 | |
aoqi@0 | 682 | case lir_fpop_raw: |
aoqi@0 | 683 | fpop(); |
aoqi@0 | 684 | break; |
aoqi@0 | 685 | |
aoqi@0 | 686 | case lir_membar: |
aoqi@0 | 687 | membar(); |
aoqi@0 | 688 | break; |
aoqi@0 | 689 | |
aoqi@0 | 690 | case lir_membar_acquire: |
aoqi@0 | 691 | membar_acquire(); |
aoqi@0 | 692 | break; |
aoqi@0 | 693 | |
aoqi@0 | 694 | case lir_membar_release: |
aoqi@0 | 695 | membar_release(); |
aoqi@0 | 696 | break; |
aoqi@0 | 697 | |
aoqi@0 | 698 | case lir_membar_loadload: |
aoqi@0 | 699 | membar_loadload(); |
aoqi@0 | 700 | break; |
aoqi@0 | 701 | |
aoqi@0 | 702 | case lir_membar_storestore: |
aoqi@0 | 703 | membar_storestore(); |
aoqi@0 | 704 | break; |
aoqi@0 | 705 | |
aoqi@0 | 706 | case lir_membar_loadstore: |
aoqi@0 | 707 | membar_loadstore(); |
aoqi@0 | 708 | break; |
aoqi@0 | 709 | |
aoqi@0 | 710 | case lir_membar_storeload: |
aoqi@0 | 711 | membar_storeload(); |
aoqi@0 | 712 | break; |
aoqi@0 | 713 | |
aoqi@0 | 714 | case lir_get_thread: |
aoqi@0 | 715 | get_thread(op->result_opr()); |
aoqi@0 | 716 | break; |
aoqi@0 | 717 | |
aoqi@0 | 718 | default: |
aoqi@0 | 719 | ShouldNotReachHere(); |
aoqi@0 | 720 | break; |
aoqi@0 | 721 | } |
aoqi@0 | 722 | } |
aoqi@0 | 723 | |
aoqi@0 | 724 | |
aoqi@0 | 725 | void LIR_Assembler::emit_op2(LIR_Op2* op) { |
aoqi@0 | 726 | switch (op->code()) { |
aoqi@1 | 727 | #ifndef MIPS64 |
aoqi@0 | 728 | case lir_cmp: |
aoqi@0 | 729 | if (op->info() != NULL) { |
aoqi@0 | 730 | assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(), |
aoqi@0 | 731 | "shouldn't be codeemitinfo for non-address operands"); |
aoqi@0 | 732 | add_debug_info_for_null_check_here(op->info()); // exception possible |
aoqi@0 | 733 | } |
aoqi@0 | 734 | comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op); |
aoqi@0 | 735 | break; |
aoqi@1 | 736 | #else |
aoqi@1 | 737 | case lir_null_check_for_branch: |
aoqi@1 | 738 | if (op->info() != NULL) { |
aoqi@1 | 739 | assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(), |
aoqi@1 | 740 | "shouldn't be codeemitinfo for non-address operands"); |
aoqi@1 | 741 | add_debug_info_for_null_check_here(op->info()); // exception possible |
aoqi@1 | 742 | } |
aoqi@1 | 743 | break; |
aoqi@1 | 744 | #endif |
aoqi@0 | 745 | |
aoqi@0 | 746 | case lir_cmp_l2i: |
aoqi@0 | 747 | case lir_cmp_fd2i: |
aoqi@0 | 748 | case lir_ucmp_fd2i: |
aoqi@0 | 749 | comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op); |
aoqi@0 | 750 | break; |
aoqi@0 | 751 | |
aoqi@0 | 752 | case lir_cmove: |
aoqi@1 | 753 | #ifndef MIPS64 |
aoqi@0 | 754 | cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type()); |
aoqi@1 | 755 | #endif |
aoqi@0 | 756 | break; |
aoqi@0 | 757 | |
aoqi@0 | 758 | case lir_shl: |
aoqi@0 | 759 | case lir_shr: |
aoqi@0 | 760 | case lir_ushr: |
aoqi@0 | 761 | if (op->in_opr2()->is_constant()) { |
aoqi@0 | 762 | shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr()); |
aoqi@0 | 763 | } else { |
aoqi@0 | 764 | shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr()); |
aoqi@0 | 765 | } |
aoqi@0 | 766 | break; |
aoqi@0 | 767 | |
aoqi@0 | 768 | case lir_add: |
aoqi@0 | 769 | case lir_sub: |
aoqi@0 | 770 | case lir_mul: |
aoqi@0 | 771 | case lir_mul_strictfp: |
aoqi@0 | 772 | case lir_div: |
aoqi@0 | 773 | case lir_div_strictfp: |
aoqi@0 | 774 | case lir_rem: |
aoqi@0 | 775 | assert(op->fpu_pop_count() < 2, ""); |
aoqi@0 | 776 | arith_op( |
aoqi@0 | 777 | op->code(), |
aoqi@0 | 778 | op->in_opr1(), |
aoqi@0 | 779 | op->in_opr2(), |
aoqi@0 | 780 | op->result_opr(), |
aoqi@0 | 781 | op->info(), |
aoqi@0 | 782 | op->fpu_pop_count() == 1); |
aoqi@0 | 783 | break; |
aoqi@0 | 784 | |
aoqi@0 | 785 | case lir_abs: |
aoqi@0 | 786 | case lir_sqrt: |
aoqi@0 | 787 | case lir_sin: |
aoqi@0 | 788 | case lir_tan: |
aoqi@0 | 789 | case lir_cos: |
aoqi@0 | 790 | case lir_log: |
aoqi@0 | 791 | case lir_log10: |
aoqi@0 | 792 | case lir_exp: |
aoqi@0 | 793 | case lir_pow: |
aoqi@0 | 794 | intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op); |
aoqi@0 | 795 | break; |
aoqi@0 | 796 | |
aoqi@0 | 797 | case lir_logic_and: |
aoqi@0 | 798 | case lir_logic_or: |
aoqi@0 | 799 | case lir_logic_xor: |
aoqi@0 | 800 | logic_op( |
aoqi@0 | 801 | op->code(), |
aoqi@0 | 802 | op->in_opr1(), |
aoqi@0 | 803 | op->in_opr2(), |
aoqi@0 | 804 | op->result_opr()); |
aoqi@0 | 805 | break; |
aoqi@0 | 806 | |
aoqi@0 | 807 | case lir_throw: |
aoqi@0 | 808 | throw_op(op->in_opr1(), op->in_opr2(), op->info()); |
aoqi@0 | 809 | break; |
aoqi@0 | 810 | |
aoqi@0 | 811 | case lir_xadd: |
aoqi@0 | 812 | case lir_xchg: |
aoqi@0 | 813 | atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr()); |
aoqi@0 | 814 | break; |
aoqi@0 | 815 | |
aoqi@0 | 816 | default: |
aoqi@0 | 817 | Unimplemented(); |
aoqi@0 | 818 | break; |
aoqi@0 | 819 | } |
aoqi@0 | 820 | } |
aoqi@0 | 821 | |
aoqi@0 | 822 | |
aoqi@0 | 823 | void LIR_Assembler::build_frame() { |
aoqi@0 | 824 | _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes()); |
aoqi@0 | 825 | } |
aoqi@0 | 826 | |
aoqi@0 | 827 | |
aoqi@0 | 828 | void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) { |
aoqi@0 | 829 | assert((src->is_single_fpu() && dest->is_single_stack()) || |
aoqi@0 | 830 | (src->is_double_fpu() && dest->is_double_stack()), |
aoqi@0 | 831 | "round_fp: rounds register -> stack location"); |
aoqi@0 | 832 | |
aoqi@0 | 833 | reg2stack (src, dest, src->type(), pop_fpu_stack); |
aoqi@0 | 834 | } |
aoqi@0 | 835 | |
aoqi@0 | 836 | |
aoqi@0 | 837 | void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) { |
aoqi@0 | 838 | if (src->is_register()) { |
aoqi@0 | 839 | if (dest->is_register()) { |
aoqi@0 | 840 | assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here"); |
aoqi@0 | 841 | reg2reg(src, dest); |
aoqi@0 | 842 | } else if (dest->is_stack()) { |
aoqi@0 | 843 | assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here"); |
aoqi@0 | 844 | reg2stack(src, dest, type, pop_fpu_stack); |
aoqi@0 | 845 | } else if (dest->is_address()) { |
aoqi@0 | 846 | reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned); |
aoqi@0 | 847 | } else { |
aoqi@0 | 848 | ShouldNotReachHere(); |
aoqi@0 | 849 | } |
aoqi@0 | 850 | |
aoqi@0 | 851 | } else if (src->is_stack()) { |
aoqi@0 | 852 | assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here"); |
aoqi@0 | 853 | if (dest->is_register()) { |
aoqi@0 | 854 | stack2reg(src, dest, type); |
aoqi@0 | 855 | } else if (dest->is_stack()) { |
aoqi@0 | 856 | stack2stack(src, dest, type); |
aoqi@0 | 857 | } else { |
aoqi@0 | 858 | ShouldNotReachHere(); |
aoqi@0 | 859 | } |
aoqi@0 | 860 | |
aoqi@0 | 861 | } else if (src->is_constant()) { |
aoqi@0 | 862 | if (dest->is_register()) { |
aoqi@0 | 863 | const2reg(src, dest, patch_code, info); // patching is possible |
aoqi@0 | 864 | } else if (dest->is_stack()) { |
aoqi@0 | 865 | assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here"); |
aoqi@0 | 866 | const2stack(src, dest); |
aoqi@0 | 867 | } else if (dest->is_address()) { |
aoqi@0 | 868 | assert(patch_code == lir_patch_none, "no patching allowed here"); |
aoqi@0 | 869 | const2mem(src, dest, type, info, wide); |
aoqi@0 | 870 | } else { |
aoqi@0 | 871 | ShouldNotReachHere(); |
aoqi@0 | 872 | } |
aoqi@0 | 873 | |
aoqi@0 | 874 | } else if (src->is_address()) { |
aoqi@0 | 875 | mem2reg(src, dest, type, patch_code, info, wide, unaligned); |
aoqi@0 | 876 | |
aoqi@0 | 877 | } else { |
aoqi@0 | 878 | ShouldNotReachHere(); |
aoqi@0 | 879 | } |
aoqi@0 | 880 | } |
aoqi@0 | 881 | |
aoqi@0 | 882 | |
aoqi@0 | 883 | void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) { |
aoqi@0 | 884 | #ifndef PRODUCT |
aoqi@0 | 885 | if (VerifyOops) { |
aoqi@0 | 886 | OopMapStream s(info->oop_map()); |
aoqi@0 | 887 | while (!s.is_done()) { |
aoqi@0 | 888 | OopMapValue v = s.current(); |
aoqi@0 | 889 | if (v.is_oop()) { |
aoqi@0 | 890 | VMReg r = v.reg(); |
aoqi@0 | 891 | if (!r->is_stack()) { |
aoqi@0 | 892 | stringStream st; |
aoqi@0 | 893 | st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset()); |
aoqi@0 | 894 | #ifdef SPARC |
aoqi@0 | 895 | _masm->_verify_oop(r->as_Register(), strdup(st.as_string()), __FILE__, __LINE__); |
aoqi@0 | 896 | #else |
aoqi@0 | 897 | _masm->verify_oop(r->as_Register()); |
aoqi@0 | 898 | #endif |
aoqi@0 | 899 | } else { |
aoqi@0 | 900 | _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size); |
aoqi@0 | 901 | } |
aoqi@0 | 902 | } |
aoqi@0 | 903 | check_codespace(); |
aoqi@0 | 904 | CHECK_BAILOUT(); |
aoqi@0 | 905 | |
aoqi@0 | 906 | s.next(); |
aoqi@0 | 907 | } |
aoqi@0 | 908 | } |
aoqi@0 | 909 | #endif |
aoqi@0 | 910 | } |