src/cpu/mips/vm/c2_globals_mips.hpp

Tue, 04 Sep 2018 21:25:12 +0800

author
aoqi
date
Tue, 04 Sep 2018 21:25:12 +0800
changeset 9228
617b86d17edb
parent 9166
7aec3140c7b6
child 9251
1ccc5a3b3671
permissions
-rw-r--r--

#7517 mRegP match a0_RegP

aoqi@1 1 /*
aoqi@1 2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
aoqi@1 3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
aoqi@1 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@1 5 *
aoqi@1 6 * This code is free software; you can redistribute it and/or modify it
aoqi@1 7 * under the terms of the GNU General Public License version 2 only, as
aoqi@1 8 * published by the Free Software Foundation.
aoqi@1 9 *
aoqi@1 10 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@1 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@1 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@1 13 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@1 14 * accompanied this code).
aoqi@1 15 *
aoqi@1 16 * You should have received a copy of the GNU General Public License version
aoqi@1 17 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@1 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@1 19 *
aoqi@1 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@1 21 * or visit www.oracle.com if you need additional information or have any
aoqi@1 22 * questions.
aoqi@1 23 *
aoqi@1 24 */
aoqi@1 25
aoqi@1 26 #ifndef CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP
aoqi@1 27 #define CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP
aoqi@1 28
aoqi@1 29 #include "utilities/globalDefinitions.hpp"
aoqi@1 30 #include "utilities/macros.hpp"
aoqi@1 31
aoqi@1 32 // Sets the default values for platform dependent flags used by the server compiler.
aoqi@1 33 // (see c2_globals.hpp). Alpha-sorted.
aoqi@1 34 define_pd_global(bool, BackgroundCompilation, true);
aoqi@1 35 define_pd_global(bool, UseTLAB, true);
aoqi@1 36 define_pd_global(bool, ResizeTLAB, true);
aoqi@1 37 define_pd_global(bool, CICompileOSR, true);
aoqi@1 38 define_pd_global(bool, InlineIntrinsics, true);
aoqi@1 39 define_pd_global(bool, PreferInterpreterNativeStubs, false);
aoqi@1 40 define_pd_global(bool, ProfileTraps, true);
aoqi@1 41 define_pd_global(bool, UseOnStackReplacement, true);
aoqi@1 42 #ifdef CC_INTERP
aoqi@1 43 define_pd_global(bool, ProfileInterpreter, false);
aoqi@1 44 #else
aoqi@1 45 define_pd_global(bool, ProfileInterpreter, true);
aoqi@1 46 #endif // CC_INTERP
aoqi@9228 47 define_pd_global(bool, TieredCompilation, false); // Disable C1 in server JIT
aoqi@1 48 define_pd_global(intx, CompileThreshold, 10000);
aoqi@1 49 define_pd_global(intx, BackEdgeThreshold, 100000);
aoqi@1 50
aoqi@1 51 define_pd_global(intx, OnStackReplacePercentage, 140);
aoqi@1 52 define_pd_global(intx, ConditionalMoveLimit, 3);
aoqi@1 53 define_pd_global(intx, FLOATPRESSURE, 6);
aoqi@1 54 define_pd_global(intx, FreqInlineSize, 325);
aoqi@1 55 define_pd_global(intx, MinJumpTableSize, 10);
aoqi@1 56 #ifdef MIPS64
aoqi@1 57 define_pd_global(intx, INTPRESSURE, 13);
aoqi@1 58 define_pd_global(intx, InteriorEntryAlignment, 16);
aoqi@1 59 define_pd_global(intx, NewSizeThreadIncrease, ScaleForWordSize(4*K));
aoqi@1 60 define_pd_global(intx, LoopUnrollLimit, 60);
aoqi@1 61 // InitialCodeCacheSize derived from specjbb2000 run.
aoqi@1 62 define_pd_global(intx, InitialCodeCacheSize, 2496*K); // Integral multiple of CodeCacheExpansionSize
aoqi@1 63 define_pd_global(intx, CodeCacheExpansionSize, 64*K);
aoqi@1 64
aoqi@1 65 // Ergonomics related flags
aoqi@1 66 define_pd_global(uint64_t,MaxRAM, 128ULL*G);
aoqi@1 67 #else
aoqi@1 68 define_pd_global(intx, INTPRESSURE, 6);
aoqi@1 69 define_pd_global(intx, InteriorEntryAlignment, 4);
aoqi@1 70 define_pd_global(intx, NewSizeThreadIncrease, 4*K);
aoqi@1 71 define_pd_global(intx, LoopUnrollLimit, 50); // Design center runs on 1.3.1
aoqi@1 72 // InitialCodeCacheSize derived from specjbb2000 run.
aoqi@1 73 define_pd_global(intx, InitialCodeCacheSize, 2304*K); // Integral multiple of CodeCacheExpansionSize
aoqi@1 74 define_pd_global(intx, CodeCacheExpansionSize, 32*K);
aoqi@1 75
aoqi@1 76 // Ergonomics related flags
aoqi@1 77 define_pd_global(uint64_t,MaxRAM, 4ULL*G);
aoqi@1 78 #endif // AMD64
aoqi@1 79 define_pd_global(intx, RegisterCostAreaRatio, 16000);
aoqi@1 80
aoqi@1 81 // Peephole and CISC spilling both break the graph, and so makes the
aoqi@1 82 // scheduler sick.
fujie@194 83 define_pd_global(bool, OptoPeephole, false);
fujie@194 84 define_pd_global(bool, UseCISCSpill, false);
aoqi@1 85 define_pd_global(bool, OptoScheduling, false);
aoqi@1 86 define_pd_global(bool, OptoBundling, false);
aoqi@1 87
aoqi@1 88 define_pd_global(intx, ReservedCodeCacheSize, 48*M);
aoqi@6880 89 define_pd_global(uintx, CodeCacheMinBlockLength, 4);
huangxuguang@9166 90 define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K);
aoqi@1 91
aoqi@1 92 define_pd_global(bool, TrapBasedRangeChecks, false); // Not needed on x86.
aoqi@1 93
aoqi@1 94 // Heap related flags
aoqi@1 95 define_pd_global(uintx,MetaspaceSize, ScaleForWordSize(16*M));
aoqi@1 96
aoqi@1 97 // Ergonomics related flags
aoqi@1 98 define_pd_global(bool, NeverActAsServerClassMachine, false);
aoqi@1 99
aoqi@1 100 #endif // CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP

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