Instruction decoding support: add movn and movz in MIPS disassembler.

Tue, 26 Jul 2016 11:15:09 +0800

author
fujie
date
Tue, 26 Jul 2016 11:15:09 +0800
changeset 38
f0e26f502a50
parent 37
440521e9c713
child 39
72830a7941b2

Instruction decoding support: add movn and movz in MIPS disassembler.

src/cpu/mips/vm/assembler_mips.cpp file | annotate | diff | comparison | revisions
src/cpu/mips/vm/disassembler_mips.cpp file | annotate | diff | comparison | revisions
     1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp	Mon Jul 25 11:37:27 2016 +0800
     1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp	Tue Jul 26 11:15:09 2016 +0800
     1.3 @@ -198,7 +198,7 @@
     1.4  
     1.5  const char* Assembler::special_name[] = {
     1.6  	"sll",      "",         "srl",      "sra",      "sllv",     "",         "srlv",     "srav",
     1.7 -	"jr",       "jalr",     "",         "",         "syscall",  "break",    "",         "sync",
     1.8 +	"jr",       "jalr",     "movz",     "movn",     "syscall",  "break",    "",         "sync",
     1.9  	"mfhi",     "mthi",     "mflo",     "mtlo",     "dsll",     "",         "dsrl",     "dsra",
    1.10  	"mult",     "multu",    "div",      "divu",     "dmult",    "dmultu",   "ddiv",     "ddivu",
    1.11  	"add",      "addu",     "sub",      "subu",     "and",      "or",       "xor",      "nor",
     2.1 --- a/src/cpu/mips/vm/disassembler_mips.cpp	Mon Jul 25 11:37:27 2016 +0800
     2.2 +++ b/src/cpu/mips/vm/disassembler_mips.cpp	Tue Jul 26 11:15:09 2016 +0800
     2.3 @@ -281,6 +281,8 @@
     2.4  		case Assembler::nor_op:
     2.5  		case Assembler::slt_op:
     2.6  		case Assembler::sltu_op:
     2.7 +		case Assembler::movz_op:
     2.8 +		case Assembler::movn_op:
     2.9  		case Assembler::dadd_op:
    2.10  		case Assembler::daddu_op:
    2.11  		case Assembler::dsub_op:

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