Tue, 21 Jun 2011 09:04:55 -0700
7056380: VM crashes with SIGSEGV in compiled code
Summary: code was using andq reg, imm instead of addq addr, imm
Reviewed-by: kvn, jrose, twisti
1.1 --- a/src/cpu/x86/vm/assembler_x86.cpp Mon Jun 20 16:45:35 2011 -0700 1.2 +++ b/src/cpu/x86/vm/assembler_x86.cpp Tue Jun 21 09:04:55 2011 -0700 1.3 @@ -3804,6 +3804,14 @@ 1.4 emit_arith(0x03, 0xC0, dst, src); 1.5 } 1.6 1.7 +void Assembler::andq(Address dst, int32_t imm32) { 1.8 + InstructionMark im(this); 1.9 + prefixq(dst); 1.10 + emit_byte(0x81); 1.11 + emit_operand(rsp, dst, 4); 1.12 + emit_long(imm32); 1.13 +} 1.14 + 1.15 void Assembler::andq(Register dst, int32_t imm32) { 1.16 (void) prefixq_and_encode(dst->encoding()); 1.17 emit_arith(0x81, 0xE0, dst, imm32);
2.1 --- a/src/cpu/x86/vm/assembler_x86.hpp Mon Jun 20 16:45:35 2011 -0700 2.2 +++ b/src/cpu/x86/vm/assembler_x86.hpp Tue Jun 21 09:04:55 2011 -0700 2.3 @@ -779,6 +779,7 @@ 2.4 void andl(Register dst, Address src); 2.5 void andl(Register dst, Register src); 2.6 2.7 + void andq(Address dst, int32_t imm32); 2.8 void andq(Register dst, int32_t imm32); 2.9 void andq(Register dst, Address src); 2.10 void andq(Register dst, Register src);
3.1 --- a/src/cpu/x86/vm/x86_64.ad Mon Jun 20 16:45:35 2011 -0700 3.2 +++ b/src/cpu/x86/vm/x86_64.ad Tue Jun 21 09:04:55 2011 -0700 3.3 @@ -830,6 +830,17 @@ 3.4 } 3.5 } 3.6 3.7 +// This could be in MacroAssembler but it's fairly C2 specific 3.8 +void emit_cmpfp_fixup(MacroAssembler& _masm) { 3.9 + Label exit; 3.10 + __ jccb(Assembler::noParity, exit); 3.11 + __ pushf(); 3.12 + __ andq(Address(rsp, 0), 0xffffff2b); 3.13 + __ popf(); 3.14 + __ bind(exit); 3.15 + __ nop(); // (target for branch to avoid branch to branch) 3.16 +} 3.17 + 3.18 3.19 //============================================================================= 3.20 const bool Matcher::constant_table_absolute_addressing = true; 3.21 @@ -2173,27 +2184,9 @@ 3.22 emit_rm(cbuf, 0x3, $dst$$reg & 7, $src$$reg & 7); 3.23 %} 3.24 3.25 - enc_class cmpfp_fixup() 3.26 - %{ 3.27 - // jnp,s exit 3.28 - emit_opcode(cbuf, 0x7B); 3.29 - emit_d8(cbuf, 0x0A); 3.30 - 3.31 - // pushfq 3.32 - emit_opcode(cbuf, 0x9C); 3.33 - 3.34 - // andq $0xffffff2b, (%rsp) 3.35 - emit_opcode(cbuf, Assembler::REX_W); 3.36 - emit_opcode(cbuf, 0x81); 3.37 - emit_opcode(cbuf, 0x24); 3.38 - emit_opcode(cbuf, 0x24); 3.39 - emit_d32(cbuf, 0xffffff2b); 3.40 - 3.41 - // popfq 3.42 - emit_opcode(cbuf, 0x9D); 3.43 - 3.44 - // nop (target for branch to avoid branch to branch) 3.45 - emit_opcode(cbuf, 0x90); 3.46 + enc_class cmpfp_fixup() %{ 3.47 + MacroAssembler _masm(&cbuf); 3.48 + emit_cmpfp_fixup(_masm); 3.49 %} 3.50 3.51 enc_class cmpfp3(rRegI dst) 3.52 @@ -10253,14 +10246,8 @@ 3.53 "popfq\n" 3.54 "exit: nop\t# avoid branch to branch" %} 3.55 ins_encode %{ 3.56 - Label L_exit; 3.57 __ ucomiss($src$$XMMRegister, $constantaddress($con)); 3.58 - __ jcc(Assembler::noParity, L_exit); 3.59 - __ pushf(); 3.60 - __ andq(rsp, 0xffffff2b); 3.61 - __ popf(); 3.62 - __ bind(L_exit); 3.63 - __ nop(); 3.64 + emit_cmpfp_fixup(_masm); 3.65 %} 3.66 ins_pipe(pipe_slow); 3.67 %} 3.68 @@ -10341,14 +10328,8 @@ 3.69 "popfq\n" 3.70 "exit: nop\t# avoid branch to branch" %} 3.71 ins_encode %{ 3.72 - Label L_exit; 3.73 __ ucomisd($src$$XMMRegister, $constantaddress($con)); 3.74 - __ jcc(Assembler::noParity, L_exit); 3.75 - __ pushf(); 3.76 - __ andq(rsp, 0xffffff2b); 3.77 - __ popf(); 3.78 - __ bind(L_exit); 3.79 - __ nop(); 3.80 + emit_cmpfp_fixup(_masm); 3.81 %} 3.82 ins_pipe(pipe_slow); 3.83 %}