Fri, 22 Sep 2017 14:09:57 +0800
[Interpreter] Optimize TemplateTable::xaload.
src/cpu/mips/vm/templateTable_mips_64.cpp | file | annotate | diff | comparison | revisions |
1.1 --- a/src/cpu/mips/vm/templateTable_mips_64.cpp Thu Sep 21 11:09:31 2017 +0800 1.2 +++ b/src/cpu/mips/vm/templateTable_mips_64.cpp Fri Sep 22 14:09:57 2017 +0800 1.3 @@ -528,8 +528,7 @@ 1.4 } 1.5 1.6 void TemplateTable::locals_index_wide(Register reg) { 1.7 - __ get_2_byte_integer_at_bcp(reg, AT, 2); 1.8 - __ huswap(reg); 1.9 + __ get_unsigned_2_byte_index_at_bcp(reg, 2); 1.10 __ dsll(reg, reg, Address::times_8); 1.11 __ dsub(reg, LVP, reg); 1.12 } 1.13 @@ -629,9 +628,12 @@ 1.14 } else { 1.15 index_check(SSR, FSR); 1.16 __ dsll(FSR, FSR, 2); 1.17 - __ dadd(FSR, SSR, FSR); 1.18 - //FSR: index 1.19 - __ lw(FSR, FSR, arrayOopDesc::base_offset_in_bytes(T_INT)); 1.20 + if (UseLoongsonISA && Assembler::is_simm(arrayOopDesc::base_offset_in_bytes(T_INT), 8)) { 1.21 + __ gslwx(FSR, FSR, SSR, arrayOopDesc::base_offset_in_bytes(T_INT)); 1.22 + } else { 1.23 + __ dadd(FSR, SSR, FSR); 1.24 + __ lw(FSR, FSR, arrayOopDesc::base_offset_in_bytes(T_INT)); 1.25 + } 1.26 } 1.27 } 1.28 1.29 @@ -652,8 +654,12 @@ 1.30 } else { 1.31 index_check(SSR, FSR); 1.32 __ dsll(AT, FSR, Address::times_8); 1.33 - __ dadd(AT, SSR, AT); 1.34 - __ ld(FSR, AT, arrayOopDesc::base_offset_in_bytes(T_LONG) + 0 * wordSize); 1.35 + if (UseLoongsonISA && Assembler::is_simm(arrayOopDesc::base_offset_in_bytes(T_LONG), 8)) { 1.36 + __ gsldx(FSR, SSR, AT, arrayOopDesc::base_offset_in_bytes(T_LONG)); 1.37 + } else { 1.38 + __ dadd(AT, SSR, AT); 1.39 + __ ld(FSR, AT, arrayOopDesc::base_offset_in_bytes(T_LONG)); 1.40 + } 1.41 } 1.42 } 1.43 1.44 @@ -674,8 +680,12 @@ 1.45 } else { 1.46 index_check(SSR, FSR); 1.47 __ shl(FSR, 2); 1.48 - __ dadd(FSR, SSR, FSR); 1.49 - __ lwc1(FSF, FSR, arrayOopDesc::base_offset_in_bytes(T_FLOAT)); 1.50 + if (UseLoongsonISA && Assembler::is_simm(arrayOopDesc::base_offset_in_bytes(T_FLOAT), 8)) { 1.51 + __ gslwxc1(FSF, SSR, FSR, arrayOopDesc::base_offset_in_bytes(T_FLOAT)); 1.52 + } else { 1.53 + __ dadd(FSR, SSR, FSR); 1.54 + __ lwc1(FSF, FSR, arrayOopDesc::base_offset_in_bytes(T_FLOAT)); 1.55 + } 1.56 } 1.57 } 1.58 1.59 @@ -696,8 +706,12 @@ 1.60 } else { 1.61 index_check(SSR, FSR); 1.62 __ dsll(AT, FSR, 3); 1.63 - __ dadd(AT, SSR, AT); 1.64 - __ ldc1(FSF, AT, arrayOopDesc::base_offset_in_bytes(T_DOUBLE) + 0 * wordSize); 1.65 + if (UseLoongsonISA && Assembler::is_simm(arrayOopDesc::base_offset_in_bytes(T_DOUBLE), 8)) { 1.66 + __ gsldxc1(FSF, SSR, AT, arrayOopDesc::base_offset_in_bytes(T_DOUBLE)); 1.67 + } else { 1.68 + __ dadd(AT, SSR, AT); 1.69 + __ ldc1(FSF, AT, arrayOopDesc::base_offset_in_bytes(T_DOUBLE)); 1.70 + } 1.71 } 1.72 } 1.73 1.74 @@ -724,8 +738,12 @@ 1.75 __ gslble(FSR, FSR, AT); 1.76 } else { 1.77 index_check(SSR, FSR); 1.78 - __ dadd(FSR, SSR, FSR); 1.79 - __ lb(FSR, FSR, arrayOopDesc::base_offset_in_bytes(T_BYTE)); 1.80 + if (UseLoongsonISA && Assembler::is_simm(arrayOopDesc::base_offset_in_bytes(T_BYTE), 8)) { 1.81 + __ gslbx(FSR, SSR, FSR, arrayOopDesc::base_offset_in_bytes(T_BYTE)); 1.82 + } else { 1.83 + __ dadd(FSR, SSR, FSR); 1.84 + __ lb(FSR, FSR, arrayOopDesc::base_offset_in_bytes(T_BYTE)); 1.85 + } 1.86 } 1.87 } 1.88 1.89 @@ -768,8 +786,12 @@ 1.90 } else { 1.91 index_check(SSR, FSR); 1.92 __ dsll(FSR, FSR, Address::times_2); 1.93 - __ dadd(FSR, SSR, FSR); 1.94 - __ lh(FSR, FSR, arrayOopDesc::base_offset_in_bytes(T_SHORT)); 1.95 + if (UseLoongsonISA && Assembler::is_simm(arrayOopDesc::base_offset_in_bytes(T_SHORT), 8)) { 1.96 + __ gslhx(FSR, SSR, FSR, arrayOopDesc::base_offset_in_bytes(T_SHORT)); 1.97 + } else { 1.98 + __ dadd(FSR, SSR, FSR); 1.99 + __ lh(FSR, FSR, arrayOopDesc::base_offset_in_bytes(T_SHORT)); 1.100 + } 1.101 } 1.102 } 1.103