[Interpreter] Fixed unaligned load in MacroAssembler::biased_locking_enter.

Sun, 12 Jun 2016 09:26:58 +0800

author
aoqi
date
Sun, 12 Jun 2016 09:26:58 +0800
changeset 18
c6d15c517c00
parent 17
9427473af9a2
child 19
675330130fb8

[Interpreter] Fixed unaligned load in MacroAssembler::biased_locking_enter.
If tmp_reg = lock_reg, ld_ptr(swap_reg, saved_mark_addr) in line 844 may cause unaligned
load and cause slow case of monitorenter. This is because both saved_mark_addr
and tmp_reg use the same register lock_reg.

src/cpu/mips/vm/assembler_mips.cpp file | annotate | diff | comparison | revisions
     1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp	Thu Jun 02 17:52:46 2016 +0800
     1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp	Sun Jun 12 09:26:58 2016 +0800
     1.3 @@ -654,15 +654,12 @@
     1.4                                           Label* slow_case,
     1.5                                           BiasedLockingCounters* counters) {
     1.6    assert(UseBiasedLocking, "why call this otherwise?");
     1.7 -  //assert(swap_reg == eax, "swap_reg must be eax for cmpxchg");
     1.8 -  assert_different_registers(lock_reg, obj_reg, swap_reg);
     1.9    bool need_tmp_reg = false;
    1.10    if (tmp_reg == noreg) {
    1.11      need_tmp_reg = true;
    1.12 -    tmp_reg = lock_reg;
    1.13 -  } else {
    1.14 -    assert_different_registers(lock_reg, obj_reg, swap_reg, tmp_reg);
    1.15 +    tmp_reg = T9;
    1.16    }
    1.17 +  assert_different_registers(lock_reg, obj_reg, swap_reg, tmp_reg, AT);
    1.18    assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout");
    1.19    Address mark_addr      (obj_reg, oopDesc::mark_offset_in_bytes());
    1.20    Address saved_mark_addr(lock_reg, 0);

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