Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/globals_mips.hpp	Wed Feb 05 00:26:59 2020 +0800
     1.2 +++ b/src/cpu/mips/vm/globals_mips.hpp	Thu Feb 13 19:16:02 2020 +0800
     1.3 @@ -99,11 +99,13 @@
     1.4    product(bool, UseCodeCacheAllocOpt, true,                                 \
     1.5                  "Allocate code cache within 32-bit memory address space")   \
     1.6                                                                              \
     1.7 -  product(intx, UseSyncLevel, 3000,                                         \
     1.8 +  product(intx, UseSyncLevel, 10000,                                        \
     1.9                  "The sync level on Loongson CPUs"                           \
    1.10 -                "default: for all Loongson CPUs, UseSyncLevel == 3000, "    \
    1.11 -                "for GS464E, UseSyncLevel == 2000"                          \
    1.12 -                "for GS464, UseSyncLevel == 1000")                          \
    1.13 +                "UseSyncLevel == 10000, 111, for all Loongson CPUs, "       \
    1.14 +                "UseSyncLevel == 4000, 101, maybe for GS464V"               \
    1.15 +                "UseSyncLevel == 3000, 001, maybe for GS464V"               \
    1.16 +                "UseSyncLevel == 2000, 011, maybe for GS464E/GS264"         \
    1.17 +                "UseSyncLevel == 1000, 110, maybe for GS464")               \
    1.18                                                                              \
    1.19    develop(bool, UseBoundCheckInstruction, false,                            \
    1.20                  "Use bound check instruction")                              \

     2.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp	Wed Feb 05 00:26:59 2020 +0800
     2.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp	Thu Feb 13 19:16:02 2020 +0800
     2.3 @@ -1,6 +1,6 @@
     2.4  /*
     2.5   * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
     2.6 - * Copyright (c) 2017, 2019, Loongson Technology. All rights reserved.
     2.7 + * Copyright (c) 2017, 2020, Loongson Technology. All rights reserved.
     2.8   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     2.9   *
    2.10   * This code is free software; you can redistribute it and/or modify it
    2.11 @@ -466,7 +466,7 @@
    2.12  
    2.13    li(tmp_reg1, counter_addr);
    2.14    bind(again);
    2.15 -  if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync();
    2.16 +  if (UseSyncLevel >= 10000 || UseSyncLevel == 1000 || UseSyncLevel == 4000) sync();
    2.17    ll(tmp_reg2, tmp_reg1, 0);
    2.18    addi(tmp_reg2, tmp_reg2, inc);
    2.19    sc(tmp_reg2, tmp_reg1, 0);
    2.20 @@ -2517,7 +2517,7 @@
    2.21  
    2.22    bind(again);
    2.23  
    2.24 -  if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync();
    2.25 +  if (UseSyncLevel >= 10000 || UseSyncLevel == 1000 || UseSyncLevel == 4000) sync();
    2.26    ll(AT, dest);
    2.27    bne(AT, c_reg, nequal);
    2.28    delayed()->nop();
    2.29 @@ -2543,7 +2543,7 @@
    2.30    Label done, again, nequal;
    2.31  
    2.32    bind(again);
    2.33 -  if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync();
    2.34 +  if (UseSyncLevel >= 10000 || UseSyncLevel == 1000 || UseSyncLevel == 4000) sync();
    2.35  #ifdef _LP64
    2.36    lld(AT, dest);
    2.37  #else
    2.38 @@ -2589,7 +2589,7 @@
    2.39  
    2.40    bind(again);
    2.41  
    2.42 -  if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync();
    2.43 +  if (UseSyncLevel >= 10000 || UseSyncLevel == 1000 || UseSyncLevel == 4000) sync();
    2.44    lld(AT, dest);
    2.45    bne(AT, c_reg, nequal);
    2.46    delayed()->nop();

     3.1 --- a/src/cpu/mips/vm/mips_64.ad	Wed Feb 05 00:26:59 2020 +0800
     3.2 +++ b/src/cpu/mips/vm/mips_64.ad	Thu Feb 13 19:16:02 2020 +0800
     3.3 @@ -14168,7 +14168,7 @@
     3.4        __ stop("in storeIConditional: index != 0");
     3.5      } else {
     3.6        __ bind(again);
     3.7 -      if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) __ sync();
     3.8 +      if (UseSyncLevel >= 10000 || UseSyncLevel == 1000 || UseSyncLevel == 4000) __ sync();
     3.9        __ ll(AT, addr);
    3.10        __ bne(AT, oldval, failure);
    3.11        __ delayed()->addu(AT, R0, R0);

     4.1 --- a/src/cpu/mips/vm/vm_version_mips.cpp	Wed Feb 05 00:26:59 2020 +0800
     4.2 +++ b/src/cpu/mips/vm/vm_version_mips.cpp	Thu Feb 13 19:16:02 2020 +0800
     4.3 @@ -1,6 +1,6 @@
     4.4  /*
     4.5   * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
     4.6 - * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved.
     4.7 + * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved.
     4.8   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4.9   *
    4.10   * This code is free software; you can redistribute it and/or modify it
    4.11 @@ -322,16 +322,23 @@
    4.12      if (FLAG_IS_DEFAULT(UseSyncLevel)) {
    4.13        FLAG_SET_DEFAULT(UseSyncLevel, 2000);
    4.14      }
    4.15 -  } else if (needs_llsync() && needs_llsync() && needs_ulsync()) {
    4.16 +  } else if (!needs_llsync() && !needs_llsync() && needs_ulsync()) {
    4.17      if (FLAG_IS_DEFAULT(UseSyncLevel)) {
    4.18        FLAG_SET_DEFAULT(UseSyncLevel, 3000);
    4.19      }
    4.20 -  } else if (!needs_llsync() && !needs_llsync() && !needs_ulsync()) {
    4.21 +  } else if (needs_llsync() && !needs_llsync() && needs_ulsync()) {
    4.22      if (FLAG_IS_DEFAULT(UseSyncLevel)) {
    4.23 -      FLAG_SET_DEFAULT(UseSyncLevel, 0);
    4.24 +      FLAG_SET_DEFAULT(UseSyncLevel, 4000);
    4.25 +    }
    4.26 +  } else if (needs_llsync() && needs_llsync() && needs_ulsync()) {
    4.27 +    if (FLAG_IS_DEFAULT(UseSyncLevel)) {
    4.28 +      FLAG_SET_DEFAULT(UseSyncLevel, 10000);
    4.29      }
    4.30    } else {
    4.31      assert(false, "Should Not Reach Here, what is the cpu type?");
    4.32 +    if (FLAG_IS_DEFAULT(UseSyncLevel)) {
    4.33 +      FLAG_SET_DEFAULT(UseSyncLevel, 10000);
    4.34 +    }
    4.35    }
    4.36  
    4.37    if (supports_lext1()) {