Thu, 06 Sep 2018 10:41:38 +0800
#7379 [C1] Fix the judging conditions of NativeInstruction::is_jump.
Reviewed-by: aoqi, fujie
src/cpu/mips/vm/nativeInst_mips.cpp | file | annotate | diff | comparison | revisions |
1.1 --- a/src/cpu/mips/vm/nativeInst_mips.cpp Tue Sep 04 21:25:12 2018 +0800 1.2 +++ b/src/cpu/mips/vm/nativeInst_mips.cpp Thu Sep 06 10:41:38 2018 +0800 1.3 @@ -1631,15 +1631,6 @@ 1.4 is_op(int_at(4), Assembler::addiu_op) && 1.5 is_special_op(int_at(8), Assembler::jr_op)); 1.6 #else 1.7 -// lui rd, imm(63...48); 1.8 -// ori rd, rd, imm(47...32); 1.9 -// dsll rd, rd, 16; 1.10 -// ori rd, rd, imm(31...16); 1.11 -// dsll rd, rd, 16; 1.12 -// ori rd, rd, imm(15...0); 1.13 -// jalr rd 1.14 -// nop 1.15 -// 1.16 if ((int_at(0) & NativeGeneralJump::b_mask) == NativeGeneralJump::beq_opcode) 1.17 return true; 1.18 if (is_op(int_at(4), Assembler::lui_op)) /* simplified b_far */ 1.19 @@ -1667,18 +1658,35 @@ 1.20 return true; 1.21 } 1.22 1.23 + // lui rd, imm(63...48); 1.24 + // ori rd, rd, imm(47...32); 1.25 + // dsll rd, rd, 16; 1.26 + // ori rd, rd, imm(31...16); 1.27 + // dsll rd, rd, 16; 1.28 + // ori rd, rd, imm(15...0); 1.29 + // jr rd 1.30 + // nop 1.31 if (is_op(int_at(0), Assembler::lui_op) && 1.32 is_op(int_at(4), Assembler::ori_op) && 1.33 is_special_op(int_at(8), Assembler::dsll_op) && 1.34 is_op(int_at(12), Assembler::ori_op) && 1.35 is_special_op(int_at(16), Assembler::dsll_op) && 1.36 - is_op(int_at(20), Assembler::ori_op)) 1.37 + is_op(int_at(20), Assembler::ori_op) && 1.38 + is_special_op(int_at(24), Assembler::jr_op)) { 1.39 return true; 1.40 + } 1.41 + 1.42 + //lui dst, imm16 1.43 + //ori dst, dst, imm16 1.44 + //dsll dst, dst, 16 1.45 + //ori dst, dst, imm16 1.46 if (is_op(int_at(0), Assembler::lui_op) && 1.47 is_op(int_at(4), Assembler::ori_op) && 1.48 is_special_op(int_at(8), Assembler::dsll_op) && 1.49 - is_op(int_at(12), Assembler::ori_op)) 1.50 + is_op(int_at(12), Assembler::ori_op) && 1.51 + is_special_op(int_at(16), Assembler::jr_op)) { 1.52 return true; 1.53 + } 1.54 1.55 //ori dst, R0, imm16 1.56 //dsll dst, dst, 16 1.57 @@ -1687,7 +1695,8 @@ 1.58 if ( is_op(Assembler::ori_op) && 1.59 is_special_op(int_at(4), Assembler::dsll_op) && 1.60 is_op (int_at(8), Assembler::ori_op) && 1.61 - nativeInstruction_at(addr_at(12))->is_nop()) { 1.62 + nativeInstruction_at(addr_at(12))->is_nop() && 1.63 + is_special_op(int_at(16), Assembler::jr_op)) { 1.64 return true; 1.65 } 1.66 1.67 @@ -1698,7 +1707,8 @@ 1.68 if ( is_op(Assembler::ori_op) && 1.69 is_special_op(int_at(4), Assembler::dsll_op) && 1.70 nativeInstruction_at(addr_at(8))->is_nop() && 1.71 - nativeInstruction_at(addr_at(12))->is_nop()) { 1.72 + nativeInstruction_at(addr_at(12))->is_nop() && 1.73 + is_special_op(int_at(16), Assembler::jr_op)) { 1.74 return true; 1.75 } 1.76 1.77 @@ -1709,7 +1719,8 @@ 1.78 if ( is_op(Assembler::daddiu_op) && 1.79 nativeInstruction_at(addr_at(4))->is_nop() && 1.80 nativeInstruction_at(addr_at(8))->is_nop() && 1.81 - nativeInstruction_at(addr_at(12))->is_nop() ) { 1.82 + nativeInstruction_at(addr_at(12))->is_nop() && 1.83 + is_special_op(int_at(16), Assembler::jr_op)) { 1.84 return true; 1.85 } 1.86 1.87 @@ -1720,7 +1731,8 @@ 1.88 if ( is_op(Assembler::lui_op) && 1.89 is_op (int_at(4), Assembler::ori_op) && 1.90 nativeInstruction_at(addr_at(8))->is_nop() && 1.91 - nativeInstruction_at(addr_at(12))->is_nop() ) { 1.92 + nativeInstruction_at(addr_at(12))->is_nop() && 1.93 + is_special_op(int_at(16), Assembler::jr_op)) { 1.94 return true; 1.95 } 1.96 1.97 @@ -1731,7 +1743,8 @@ 1.98 if ( is_op(Assembler::lui_op) && 1.99 nativeInstruction_at(addr_at(4))->is_nop() && 1.100 nativeInstruction_at(addr_at(8))->is_nop() && 1.101 - nativeInstruction_at(addr_at(12))->is_nop() ) { 1.102 + nativeInstruction_at(addr_at(12))->is_nop() && 1.103 + is_special_op(int_at(16), Assembler::jr_op)) { 1.104 return true; 1.105 } 1.106