Tue, 17 Jul 2018 20:32:39 +0800
#7326 mips generates wrong code for jal/j machine instructions
Reviewed-by: aoqi, zhaixiang
1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp Fri Jul 13 14:14:12 2018 +0800 1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp Tue Jul 17 20:32:39 2018 +0800 1.3 @@ -571,21 +571,13 @@ 1.4 } 1.5 1.6 void Assembler::j(address entry) { 1.7 -#ifdef MIPS64 1.8 - int dest = ((intptr_t)entry - (((intptr_t)pc() + 4) & 0xfffffffff0000000))>>2; 1.9 -#else 1.10 - int dest = ((intptr_t)entry - (((intptr_t)pc() + 4) & 0xf0000000))>>2; 1.11 -#endif 1.12 + int dest = ((intptr_t)entry & (intptr_t)0xfffffff)>>2; 1.13 emit_long((j_op<<26) | dest); 1.14 has_delay_slot(); 1.15 } 1.16 1.17 void Assembler::jal(address entry) { 1.18 -#ifdef MIPS64 1.19 - int dest = ((intptr_t)entry - (((intptr_t)pc() + 4) & 0xfffffffff0000000))>>2; 1.20 -#else 1.21 - int dest = ((intptr_t)entry - (((intptr_t)pc() + 4) & 0xf0000000))>>2; 1.22 -#endif 1.23 + int dest = ((intptr_t)entry & (intptr_t)0xfffffff)>>2; 1.24 emit_long((jal_op<<26) | dest); 1.25 has_delay_slot(); 1.26 }
2.1 --- a/src/cpu/mips/vm/assembler_mips.hpp Fri Jul 13 14:14:12 2018 +0800 2.2 +++ b/src/cpu/mips/vm/assembler_mips.hpp Tue Jul 17 20:32:39 2018 +0800 2.3 @@ -1,6 +1,6 @@ 2.4 /* 2.5 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. 2.6 - * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. 2.7 + * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. 2.8 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 2.9 * 2.10 * This code is free software; you can redistribute it and/or modify it 2.11 @@ -916,12 +916,11 @@ 2.12 2.13 static bool fit_in_jal(address target, address pc) { 2.14 #ifdef _LP64 2.15 - int dst = ((intptr_t)target - (((intptr_t)pc + 4) & 0xfffffffff0000000))>>2; 2.16 + intptr_t mask = 0xfffffffff0000000; 2.17 #else 2.18 - int dst = ((intptr_t)target - (((intptr_t)pc + 4) & 0xf0000000))>>2; 2.19 + intptr_t mask = 0xf0000000; 2.20 #endif 2.21 - if ((dst >= 0) && (dst < (1<<26))) return true; 2.22 - else return false; 2.23 + return ((intptr_t)(pc + 4) & mask) == ((intptr_t)target & mask); 2.24 } 2.25 2.26 bool fit_int_branch(address entry) {
3.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp Fri Jul 13 14:14:12 2018 +0800 3.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp Tue Jul 17 20:32:39 2018 +0800 3.3 @@ -180,7 +180,7 @@ 3.4 address cl = first_cache_address(); 3.5 address ch = last_cache_address(); 3.6 3.7 - return fit_in_jal(target, cl) && fit_in_jal(target, ch); 3.8 + return (cl <= target) && (target <= ch) && fit_in_jal(cl, ch); 3.9 } 3.10 3.11 void MacroAssembler::general_jump(address target) {