Thu, 27 Feb 2014 20:40:24 +0100
8035970: PPC64: fix ad file after 8027754: Enable loop optimizations for loops with MathExact
Reviewed-by: kvn
src/cpu/ppc/vm/ppc.ad | file | annotate | diff | comparison | revisions |
1.1 --- a/src/cpu/ppc/vm/ppc.ad Wed Feb 26 11:33:34 2014 -0800 1.2 +++ b/src/cpu/ppc/vm/ppc.ad Thu Feb 27 20:40:24 2014 +0100 1.3 @@ -2407,18 +2407,6 @@ 1.4 return RegMask(); 1.5 } 1.6 1.7 -const RegMask Matcher::mathExactI_result_proj_mask() { 1.8 - return RARG4_BITS64_REG_mask(); 1.9 -} 1.10 - 1.11 -const RegMask Matcher::mathExactL_result_proj_mask() { 1.12 - return RARG4_BITS64_REG_mask(); 1.13 -} 1.14 - 1.15 -const RegMask Matcher::mathExactI_flags_proj_mask() { 1.16 - return INT_FLAGS_mask(); 1.17 -} 1.18 - 1.19 %} 1.20 1.21 //----------ENCODING BLOCK----------------------------------------------------- 1.22 @@ -7634,16 +7622,6 @@ 1.23 //----------Arithmetic Instructions-------------------------------------------- 1.24 // Addition Instructions 1.25 1.26 -// PPC has no instruction setting overflow of 32-bit integer. 1.27 -//instruct addExactI_rReg(rarg4RegI dst, rRegI src, flagsReg cr) %{ 1.28 -// match(AddExactI dst src); 1.29 -// effect(DEF cr); 1.30 -// 1.31 -// format %{ "ADD $dst, $dst, $src \t// addExact int, sets $cr" %} 1.32 -// ins_encode( enc_add(dst, dst, src) ); 1.33 -// ins_pipe(pipe_class_default); 1.34 -//%} 1.35 - 1.36 // Register Addition 1.37 instruct addI_reg_reg(iRegIdst dst, iRegIsrc_iRegL2Isrc src1, iRegIsrc_iRegL2Isrc src2) %{ 1.38 match(Set dst (AddI src1 src2));