Wed, 02 Jun 2010 22:45:42 -0700
Merge
1 /*
2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 class BlockBegin;
26 class BlockList;
27 class LIR_Assembler;
28 class CodeEmitInfo;
29 class CodeStub;
30 class CodeStubList;
31 class ArrayCopyStub;
32 class LIR_Op;
33 class ciType;
34 class ValueType;
35 class LIR_OpVisitState;
36 class FpuStackSim;
38 //---------------------------------------------------------------------
39 // LIR Operands
40 // LIR_OprDesc
41 // LIR_OprPtr
42 // LIR_Const
43 // LIR_Address
44 //---------------------------------------------------------------------
45 class LIR_OprDesc;
46 class LIR_OprPtr;
47 class LIR_Const;
48 class LIR_Address;
49 class LIR_OprVisitor;
52 typedef LIR_OprDesc* LIR_Opr;
53 typedef int RegNr;
55 define_array(LIR_OprArray, LIR_Opr)
56 define_stack(LIR_OprList, LIR_OprArray)
58 define_array(LIR_OprRefArray, LIR_Opr*)
59 define_stack(LIR_OprRefList, LIR_OprRefArray)
61 define_array(CodeEmitInfoArray, CodeEmitInfo*)
62 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
64 define_array(LIR_OpArray, LIR_Op*)
65 define_stack(LIR_OpList, LIR_OpArray)
67 // define LIR_OprPtr early so LIR_OprDesc can refer to it
68 class LIR_OprPtr: public CompilationResourceObj {
69 public:
70 bool is_oop_pointer() const { return (type() == T_OBJECT); }
71 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
73 virtual LIR_Const* as_constant() { return NULL; }
74 virtual LIR_Address* as_address() { return NULL; }
75 virtual BasicType type() const = 0;
76 virtual void print_value_on(outputStream* out) const = 0;
77 };
81 // LIR constants
82 class LIR_Const: public LIR_OprPtr {
83 private:
84 JavaValue _value;
86 void type_check(BasicType t) const { assert(type() == t, "type check"); }
87 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
88 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
90 public:
91 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
92 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
93 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
94 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
95 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
96 LIR_Const(void* p) {
97 #ifdef _LP64
98 assert(sizeof(jlong) >= sizeof(p), "too small");;
99 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
100 #else
101 assert(sizeof(jint) >= sizeof(p), "too small");;
102 _value.set_type(T_INT); _value.set_jint((jint)p);
103 #endif
104 }
106 virtual BasicType type() const { return _value.get_type(); }
107 virtual LIR_Const* as_constant() { return this; }
109 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
110 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
111 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
112 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
113 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
114 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
115 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
117 #ifdef _LP64
118 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
119 #else
120 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
121 #endif
124 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
125 jint as_jint_lo_bits() const {
126 if (type() == T_DOUBLE) {
127 return low(jlong_cast(_value.get_jdouble()));
128 } else {
129 return as_jint_lo();
130 }
131 }
132 jint as_jint_hi_bits() const {
133 if (type() == T_DOUBLE) {
134 return high(jlong_cast(_value.get_jdouble()));
135 } else {
136 return as_jint_hi();
137 }
138 }
139 jlong as_jlong_bits() const {
140 if (type() == T_DOUBLE) {
141 return jlong_cast(_value.get_jdouble());
142 } else {
143 return as_jlong();
144 }
145 }
147 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
150 bool is_zero_float() {
151 jfloat f = as_jfloat();
152 jfloat ok = 0.0f;
153 return jint_cast(f) == jint_cast(ok);
154 }
156 bool is_one_float() {
157 jfloat f = as_jfloat();
158 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
159 }
161 bool is_zero_double() {
162 jdouble d = as_jdouble();
163 jdouble ok = 0.0;
164 return jlong_cast(d) == jlong_cast(ok);
165 }
167 bool is_one_double() {
168 jdouble d = as_jdouble();
169 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
170 }
171 };
174 //---------------------LIR Operand descriptor------------------------------------
175 //
176 // The class LIR_OprDesc represents a LIR instruction operand;
177 // it can be a register (ALU/FPU), stack location or a constant;
178 // Constants and addresses are represented as resource area allocated
179 // structures (see above).
180 // Registers and stack locations are inlined into the this pointer
181 // (see value function).
183 class LIR_OprDesc: public CompilationResourceObj {
184 public:
185 // value structure:
186 // data opr-type opr-kind
187 // +--------------+-------+-------+
188 // [max...........|7 6 5 4|3 2 1 0]
189 // ^
190 // is_pointer bit
191 //
192 // lowest bit cleared, means it is a structure pointer
193 // we need 4 bits to represent types
195 private:
196 friend class LIR_OprFact;
198 // Conversion
199 intptr_t value() const { return (intptr_t) this; }
201 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
202 return (value() & mask) == masked_value;
203 }
205 enum OprKind {
206 pointer_value = 0
207 , stack_value = 1
208 , cpu_register = 3
209 , fpu_register = 5
210 , illegal_value = 7
211 };
213 enum OprBits {
214 pointer_bits = 1
215 , kind_bits = 3
216 , type_bits = 4
217 , size_bits = 2
218 , destroys_bits = 1
219 , virtual_bits = 1
220 , is_xmm_bits = 1
221 , last_use_bits = 1
222 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
223 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
224 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
225 , data_bits = BitsPerInt - non_data_bits
226 , reg_bits = data_bits / 2 // for two registers in one value encoding
227 };
229 enum OprShift {
230 kind_shift = 0
231 , type_shift = kind_shift + kind_bits
232 , size_shift = type_shift + type_bits
233 , destroys_shift = size_shift + size_bits
234 , last_use_shift = destroys_shift + destroys_bits
235 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
236 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
237 , is_xmm_shift = virtual_shift + virtual_bits
238 , data_shift = is_xmm_shift + is_xmm_bits
239 , reg1_shift = data_shift
240 , reg2_shift = data_shift + reg_bits
242 };
244 enum OprSize {
245 single_size = 0 << size_shift
246 , double_size = 1 << size_shift
247 };
249 enum OprMask {
250 kind_mask = right_n_bits(kind_bits)
251 , type_mask = right_n_bits(type_bits) << type_shift
252 , size_mask = right_n_bits(size_bits) << size_shift
253 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
254 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
255 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
256 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
257 , pointer_mask = right_n_bits(pointer_bits)
258 , lower_reg_mask = right_n_bits(reg_bits)
259 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
260 };
262 uintptr_t data() const { return value() >> data_shift; }
263 int lo_reg_half() const { return data() & lower_reg_mask; }
264 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
265 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
266 OprSize size_field() const { return (OprSize)(value() & size_mask); }
268 static char type_char(BasicType t);
270 public:
271 enum {
272 vreg_base = ConcreteRegisterImpl::number_of_registers,
273 vreg_max = (1 << data_bits) - 1
274 };
276 static inline LIR_Opr illegalOpr();
278 enum OprType {
279 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
280 , int_type = 1 << type_shift
281 , long_type = 2 << type_shift
282 , object_type = 3 << type_shift
283 , pointer_type = 4 << type_shift
284 , float_type = 5 << type_shift
285 , double_type = 6 << type_shift
286 };
287 friend OprType as_OprType(BasicType t);
288 friend BasicType as_BasicType(OprType t);
290 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
291 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
293 static OprSize size_for(BasicType t) {
294 switch (t) {
295 case T_LONG:
296 case T_DOUBLE:
297 return double_size;
298 break;
300 case T_FLOAT:
301 case T_BOOLEAN:
302 case T_CHAR:
303 case T_BYTE:
304 case T_SHORT:
305 case T_INT:
306 case T_OBJECT:
307 case T_ARRAY:
308 return single_size;
309 break;
311 default:
312 ShouldNotReachHere();
313 return single_size;
314 }
315 }
318 void validate_type() const PRODUCT_RETURN;
320 BasicType type() const {
321 if (is_pointer()) {
322 return pointer()->type();
323 }
324 return as_BasicType(type_field());
325 }
328 ValueType* value_type() const { return as_ValueType(type()); }
330 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
332 bool is_equal(LIR_Opr opr) const { return this == opr; }
333 // checks whether types are same
334 bool is_same_type(LIR_Opr opr) const {
335 assert(type_field() != unknown_type &&
336 opr->type_field() != unknown_type, "shouldn't see unknown_type");
337 return type_field() == opr->type_field();
338 }
339 bool is_same_register(LIR_Opr opr) {
340 return (is_register() && opr->is_register() &&
341 kind_field() == opr->kind_field() &&
342 (value() & no_type_mask) == (opr->value() & no_type_mask));
343 }
345 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
346 bool is_illegal() const { return kind_field() == illegal_value; }
347 bool is_valid() const { return kind_field() != illegal_value; }
349 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
350 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
352 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
353 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
355 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
356 bool is_oop() const;
358 // semantic for fpu- and xmm-registers:
359 // * is_float and is_double return true for xmm_registers
360 // (so is_single_fpu and is_single_xmm are true)
361 // * So you must always check for is_???_xmm prior to is_???_fpu to
362 // distinguish between fpu- and xmm-registers
364 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
365 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
366 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
368 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
369 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
370 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
371 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
372 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
374 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
375 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
376 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
377 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
378 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
380 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
381 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
382 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
384 // fast accessor functions for special bits that do not work for pointers
385 // (in this functions, the check for is_pointer() is omitted)
386 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
387 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
388 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
389 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
390 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
392 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
393 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
394 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
395 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
398 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
399 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
400 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
401 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
402 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
403 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
404 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
405 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
406 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
407 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
408 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
409 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
411 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
412 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
413 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
415 Register as_register() const;
416 Register as_register_lo() const;
417 Register as_register_hi() const;
419 Register as_pointer_register() {
420 #ifdef _LP64
421 if (is_double_cpu()) {
422 assert(as_register_lo() == as_register_hi(), "should be a single register");
423 return as_register_lo();
424 }
425 #endif
426 return as_register();
427 }
429 #ifdef X86
430 XMMRegister as_xmm_float_reg() const;
431 XMMRegister as_xmm_double_reg() const;
432 // for compatibility with RInfo
433 int fpu () const { return lo_reg_half(); }
434 #endif // X86
436 #ifdef SPARC
437 FloatRegister as_float_reg () const;
438 FloatRegister as_double_reg () const;
439 #endif
441 jint as_jint() const { return as_constant_ptr()->as_jint(); }
442 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
443 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
444 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
445 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
447 void print() const PRODUCT_RETURN;
448 void print(outputStream* out) const PRODUCT_RETURN;
449 };
452 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
453 switch (type) {
454 case T_INT: return LIR_OprDesc::int_type;
455 case T_LONG: return LIR_OprDesc::long_type;
456 case T_FLOAT: return LIR_OprDesc::float_type;
457 case T_DOUBLE: return LIR_OprDesc::double_type;
458 case T_OBJECT:
459 case T_ARRAY: return LIR_OprDesc::object_type;
460 case T_ILLEGAL: // fall through
461 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
462 }
463 }
465 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
466 switch (t) {
467 case LIR_OprDesc::int_type: return T_INT;
468 case LIR_OprDesc::long_type: return T_LONG;
469 case LIR_OprDesc::float_type: return T_FLOAT;
470 case LIR_OprDesc::double_type: return T_DOUBLE;
471 case LIR_OprDesc::object_type: return T_OBJECT;
472 case LIR_OprDesc::unknown_type: // fall through
473 default: ShouldNotReachHere(); return T_ILLEGAL;
474 }
475 }
478 // LIR_Address
479 class LIR_Address: public LIR_OprPtr {
480 friend class LIR_OpVisitState;
482 public:
483 // NOTE: currently these must be the log2 of the scale factor (and
484 // must also be equivalent to the ScaleFactor enum in
485 // assembler_i486.hpp)
486 enum Scale {
487 times_1 = 0,
488 times_2 = 1,
489 times_4 = 2,
490 times_8 = 3
491 };
493 private:
494 LIR_Opr _base;
495 LIR_Opr _index;
496 Scale _scale;
497 intx _disp;
498 BasicType _type;
500 public:
501 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
502 _base(base)
503 , _index(index)
504 , _scale(times_1)
505 , _type(type)
506 , _disp(0) { verify(); }
508 LIR_Address(LIR_Opr base, intx disp, BasicType type):
509 _base(base)
510 , _index(LIR_OprDesc::illegalOpr())
511 , _scale(times_1)
512 , _type(type)
513 , _disp(disp) { verify(); }
515 LIR_Address(LIR_Opr base, BasicType type):
516 _base(base)
517 , _index(LIR_OprDesc::illegalOpr())
518 , _scale(times_1)
519 , _type(type)
520 , _disp(0) { verify(); }
522 #ifdef X86
523 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
524 _base(base)
525 , _index(index)
526 , _scale(scale)
527 , _type(type)
528 , _disp(disp) { verify(); }
529 #endif // X86
531 LIR_Opr base() const { return _base; }
532 LIR_Opr index() const { return _index; }
533 Scale scale() const { return _scale; }
534 intx disp() const { return _disp; }
536 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
538 virtual LIR_Address* as_address() { return this; }
539 virtual BasicType type() const { return _type; }
540 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
542 void verify() const PRODUCT_RETURN;
544 static Scale scale(BasicType type);
545 };
548 // operand factory
549 class LIR_OprFact: public AllStatic {
550 public:
552 static LIR_Opr illegalOpr;
554 static LIR_Opr single_cpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
555 static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
556 static LIR_Opr double_cpu(int reg1, int reg2) {
557 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
558 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
559 (reg2 << LIR_OprDesc::reg2_shift) |
560 LIR_OprDesc::long_type |
561 LIR_OprDesc::cpu_register |
562 LIR_OprDesc::double_size);
563 }
565 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
566 LIR_OprDesc::float_type |
567 LIR_OprDesc::fpu_register |
568 LIR_OprDesc::single_size); }
570 #ifdef SPARC
571 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
572 (reg2 << LIR_OprDesc::reg2_shift) |
573 LIR_OprDesc::double_type |
574 LIR_OprDesc::fpu_register |
575 LIR_OprDesc::double_size); }
576 #endif
577 #ifdef X86
578 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
579 (reg << LIR_OprDesc::reg2_shift) |
580 LIR_OprDesc::double_type |
581 LIR_OprDesc::fpu_register |
582 LIR_OprDesc::double_size); }
584 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
585 LIR_OprDesc::float_type |
586 LIR_OprDesc::fpu_register |
587 LIR_OprDesc::single_size |
588 LIR_OprDesc::is_xmm_mask); }
589 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
590 (reg << LIR_OprDesc::reg2_shift) |
591 LIR_OprDesc::double_type |
592 LIR_OprDesc::fpu_register |
593 LIR_OprDesc::double_size |
594 LIR_OprDesc::is_xmm_mask); }
595 #endif // X86
598 static LIR_Opr virtual_register(int index, BasicType type) {
599 LIR_Opr res;
600 switch (type) {
601 case T_OBJECT: // fall through
602 case T_ARRAY:
603 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
604 LIR_OprDesc::object_type |
605 LIR_OprDesc::cpu_register |
606 LIR_OprDesc::single_size |
607 LIR_OprDesc::virtual_mask);
608 break;
610 case T_INT:
611 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
612 LIR_OprDesc::int_type |
613 LIR_OprDesc::cpu_register |
614 LIR_OprDesc::single_size |
615 LIR_OprDesc::virtual_mask);
616 break;
618 case T_LONG:
619 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
620 LIR_OprDesc::long_type |
621 LIR_OprDesc::cpu_register |
622 LIR_OprDesc::double_size |
623 LIR_OprDesc::virtual_mask);
624 break;
626 case T_FLOAT:
627 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
628 LIR_OprDesc::float_type |
629 LIR_OprDesc::fpu_register |
630 LIR_OprDesc::single_size |
631 LIR_OprDesc::virtual_mask);
632 break;
634 case
635 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
636 LIR_OprDesc::double_type |
637 LIR_OprDesc::fpu_register |
638 LIR_OprDesc::double_size |
639 LIR_OprDesc::virtual_mask);
640 break;
642 default: ShouldNotReachHere(); res = illegalOpr;
643 }
645 #ifdef ASSERT
646 res->validate_type();
647 assert(res->vreg_number() == index, "conversion check");
648 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
649 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
651 // old-style calculation; check if old and new method are equal
652 LIR_OprDesc::OprType t = as_OprType(type);
653 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
654 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
655 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
656 assert(res == old_res, "old and new method not equal");
657 #endif
659 return res;
660 }
662 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
663 // the index is platform independent; a double stack useing indeces 2 and 3 has always
664 // index 2.
665 static LIR_Opr stack(int index, BasicType type) {
666 LIR_Opr res;
667 switch (type) {
668 case T_OBJECT: // fall through
669 case T_ARRAY:
670 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
671 LIR_OprDesc::object_type |
672 LIR_OprDesc::stack_value |
673 LIR_OprDesc::single_size);
674 break;
676 case T_INT:
677 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
678 LIR_OprDesc::int_type |
679 LIR_OprDesc::stack_value |
680 LIR_OprDesc::single_size);
681 break;
683 case T_LONG:
684 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
685 LIR_OprDesc::long_type |
686 LIR_OprDesc::stack_value |
687 LIR_OprDesc::double_size);
688 break;
690 case T_FLOAT:
691 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
692 LIR_OprDesc::float_type |
693 LIR_OprDesc::stack_value |
694 LIR_OprDesc::single_size);
695 break;
696 case T_DOUBLE:
697 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
698 LIR_OprDesc::double_type |
699 LIR_OprDesc::stack_value |
700 LIR_OprDesc::double_size);
701 break;
703 default: ShouldNotReachHere(); res = illegalOpr;
704 }
706 #ifdef ASSERT
707 assert(index >= 0, "index must be positive");
708 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
710 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
711 LIR_OprDesc::stack_value |
712 as_OprType(type) |
713 LIR_OprDesc::size_for(type));
714 assert(res == old_res, "old and new method not equal");
715 #endif
717 return res;
718 }
720 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
721 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
722 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
723 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
724 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
725 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
726 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
727 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
728 static LIR_Opr illegal() { return (LIR_Opr)-1; }
729 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
731 static LIR_Opr value_type(ValueType* type);
732 static LIR_Opr dummy_value_type(ValueType* type);
733 };
736 //-------------------------------------------------------------------------------
737 // LIR Instructions
738 //-------------------------------------------------------------------------------
739 //
740 // Note:
741 // - every instruction has a result operand
742 // - every instruction has an CodeEmitInfo operand (can be revisited later)
743 // - every instruction has a LIR_OpCode operand
744 // - LIR_OpN, means an instruction that has N input operands
745 //
746 // class hierarchy:
747 //
748 class LIR_Op;
749 class LIR_Op0;
750 class LIR_OpLabel;
751 class LIR_Op1;
752 class LIR_OpBranch;
753 class LIR_OpConvert;
754 class LIR_OpAllocObj;
755 class LIR_OpRoundFP;
756 class LIR_Op2;
757 class LIR_OpDelay;
758 class LIR_Op3;
759 class LIR_OpAllocArray;
760 class LIR_OpCall;
761 class LIR_OpJavaCall;
762 class LIR_OpRTCall;
763 class LIR_OpArrayCopy;
764 class LIR_OpLock;
765 class LIR_OpTypeCheck;
766 class LIR_OpCompareAndSwap;
767 class LIR_OpProfileCall;
770 // LIR operation codes
771 enum LIR_Code {
772 lir_none
773 , begin_op0
774 , lir_word_align
775 , lir_label
776 , lir_nop
777 , lir_backwardbranch_target
778 , lir_std_entry
779 , lir_osr_entry
780 , lir_build_frame
781 , lir_fpop_raw
782 , lir_24bit_FPU
783 , lir_reset_FPU
784 , lir_breakpoint
785 , lir_rtcall
786 , lir_membar
787 , lir_membar_acquire
788 , lir_membar_release
789 , lir_get_thread
790 , end_op0
791 , begin_op1
792 , lir_fxch
793 , lir_fld
794 , lir_ffree
795 , lir_push
796 , lir_pop
797 , lir_null_check
798 , lir_return
799 , lir_leal
800 , lir_neg
801 , lir_branch
802 , lir_cond_float_branch
803 , lir_move
804 , lir_prefetchr
805 , lir_prefetchw
806 , lir_convert
807 , lir_alloc_object
808 , lir_monaddr
809 , lir_roundfp
810 , lir_safepoint
811 , lir_unwind
812 , end_op1
813 , begin_op2
814 , lir_cmp
815 , lir_cmp_l2i
816 , lir_ucmp_fd2i
817 , lir_cmp_fd2i
818 , lir_cmove
819 , lir_add
820 , lir_sub
821 , lir_mul
822 , lir_mul_strictfp
823 , lir_div
824 , lir_div_strictfp
825 , lir_rem
826 , lir_sqrt
827 , lir_abs
828 , lir_sin
829 , lir_cos
830 , lir_tan
831 , lir_log
832 , lir_log10
833 , lir_logic_and
834 , lir_logic_or
835 , lir_logic_xor
836 , lir_shl
837 , lir_shr
838 , lir_ushr
839 , lir_alloc_array
840 , lir_throw
841 , lir_compare_to
842 , end_op2
843 , begin_op3
844 , lir_idiv
845 , lir_irem
846 , end_op3
847 , begin_opJavaCall
848 , lir_static_call
849 , lir_optvirtual_call
850 , lir_icvirtual_call
851 , lir_virtual_call
852 , lir_dynamic_call
853 , end_opJavaCall
854 , begin_opArrayCopy
855 , lir_arraycopy
856 , end_opArrayCopy
857 , begin_opLock
858 , lir_lock
859 , lir_unlock
860 , end_opLock
861 , begin_delay_slot
862 , lir_delay_slot
863 , end_delay_slot
864 , begin_opTypeCheck
865 , lir_instanceof
866 , lir_checkcast
867 , lir_store_check
868 , end_opTypeCheck
869 , begin_opCompareAndSwap
870 , lir_cas_long
871 , lir_cas_obj
872 , lir_cas_int
873 , end_opCompareAndSwap
874 , begin_opMDOProfile
875 , lir_profile_call
876 , end_opMDOProfile
877 };
880 enum LIR_Condition {
881 lir_cond_equal
882 , lir_cond_notEqual
883 , lir_cond_less
884 , lir_cond_lessEqual
885 , lir_cond_greaterEqual
886 , lir_cond_greater
887 , lir_cond_belowEqual
888 , lir_cond_aboveEqual
889 , lir_cond_always
890 , lir_cond_unknown = -1
891 };
894 enum LIR_PatchCode {
895 lir_patch_none,
896 lir_patch_low,
897 lir_patch_high,
898 lir_patch_normal
899 };
902 enum LIR_MoveKind {
903 lir_move_normal,
904 lir_move_volatile,
905 lir_move_unaligned,
906 lir_move_max_flag
907 };
910 // --------------------------------------------------
911 // LIR_Op
912 // --------------------------------------------------
913 class LIR_Op: public CompilationResourceObj {
914 friend class LIR_OpVisitState;
916 #ifdef ASSERT
917 private:
918 const char * _file;
919 int _line;
920 #endif
922 protected:
923 LIR_Opr _result;
924 unsigned short _code;
925 unsigned short _flags;
926 CodeEmitInfo* _info;
927 int _id; // value id for register allocation
928 int _fpu_pop_count;
929 Instruction* _source; // for debugging
931 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
933 protected:
934 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
936 public:
937 LIR_Op()
938 : _result(LIR_OprFact::illegalOpr)
939 , _code(lir_none)
940 , _flags(0)
941 , _info(NULL)
942 #ifdef ASSERT
943 , _file(NULL)
944 , _line(0)
945 #endif
946 , _fpu_pop_count(0)
947 , _source(NULL)
948 , _id(-1) {}
950 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
951 : _result(result)
952 , _code(code)
953 , _flags(0)
954 , _info(info)
955 #ifdef ASSERT
956 , _file(NULL)
957 , _line(0)
958 #endif
959 , _fpu_pop_count(0)
960 , _source(NULL)
961 , _id(-1) {}
963 CodeEmitInfo* info() const { return _info; }
964 LIR_Code code() const { return (LIR_Code)_code; }
965 LIR_Opr result_opr() const { return _result; }
966 void set_result_opr(LIR_Opr opr) { _result = opr; }
968 #ifdef ASSERT
969 void set_file_and_line(const char * file, int line) {
970 _file = file;
971 _line = line;
972 }
973 #endif
975 virtual const char * name() const PRODUCT_RETURN0;
977 int id() const { return _id; }
978 void set_id(int id) { _id = id; }
980 // FPU stack simulation helpers -- only used on Intel
981 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
982 int fpu_pop_count() const { return _fpu_pop_count; }
983 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
985 Instruction* source() const { return _source; }
986 void set_source(Instruction* ins) { _source = ins; }
988 virtual void emit_code(LIR_Assembler* masm) = 0;
989 virtual void print_instr(outputStream* out) const = 0;
990 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
992 virtual LIR_OpCall* as_OpCall() { return NULL; }
993 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
994 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
995 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
996 virtual LIR_OpLock* as_OpLock() { return NULL; }
997 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
998 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
999 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1000 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1001 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1002 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1003 virtual LIR_Op0* as_Op0() { return NULL; }
1004 virtual LIR_Op1* as_Op1() { return NULL; }
1005 virtual LIR_Op2* as_Op2() { return NULL; }
1006 virtual LIR_Op3* as_Op3() { return NULL; }
1007 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1008 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1009 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1010 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1012 virtual void verify() const {}
1013 };
1015 // for calls
1016 class LIR_OpCall: public LIR_Op {
1017 friend class LIR_OpVisitState;
1019 protected:
1020 address _addr;
1021 LIR_OprList* _arguments;
1022 protected:
1023 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1024 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1025 : LIR_Op(code, result, info)
1026 , _arguments(arguments)
1027 , _addr(addr) {}
1029 public:
1030 address addr() const { return _addr; }
1031 const LIR_OprList* arguments() const { return _arguments; }
1032 virtual LIR_OpCall* as_OpCall() { return this; }
1033 };
1036 // --------------------------------------------------
1037 // LIR_OpJavaCall
1038 // --------------------------------------------------
1039 class LIR_OpJavaCall: public LIR_OpCall {
1040 friend class LIR_OpVisitState;
1042 private:
1043 ciMethod* _method;
1044 LIR_Opr _receiver;
1045 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1047 public:
1048 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1049 LIR_Opr receiver, LIR_Opr result,
1050 address addr, LIR_OprList* arguments,
1051 CodeEmitInfo* info)
1052 : LIR_OpCall(code, addr, result, arguments, info)
1053 , _receiver(receiver)
1054 , _method(method)
1055 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1056 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1058 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1059 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1060 LIR_OprList* arguments, CodeEmitInfo* info)
1061 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1062 , _receiver(receiver)
1063 , _method(method)
1064 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1065 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1067 LIR_Opr receiver() const { return _receiver; }
1068 ciMethod* method() const { return _method; }
1070 // JSR 292 support.
1071 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1072 bool is_method_handle_invoke() const {
1073 return
1074 is_invokedynamic() // An invokedynamic is always a MethodHandle call site.
1075 ||
1076 (method()->holder()->name() == ciSymbol::java_dyn_MethodHandle() &&
1077 methodOopDesc::is_method_handle_invoke_name(method()->name()->sid()));
1078 }
1080 intptr_t vtable_offset() const {
1081 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1082 return (intptr_t) addr();
1083 }
1085 virtual void emit_code(LIR_Assembler* masm);
1086 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1087 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1088 };
1090 // --------------------------------------------------
1091 // LIR_OpLabel
1092 // --------------------------------------------------
1093 // Location where a branch can continue
1094 class LIR_OpLabel: public LIR_Op {
1095 friend class LIR_OpVisitState;
1097 private:
1098 Label* _label;
1099 public:
1100 LIR_OpLabel(Label* lbl)
1101 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1102 , _label(lbl) {}
1103 Label* label() const { return _label; }
1105 virtual void emit_code(LIR_Assembler* masm);
1106 virtual LIR_OpLabel* as_OpLabel() { return this; }
1107 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1108 };
1110 // LIR_OpArrayCopy
1111 class LIR_OpArrayCopy: public LIR_Op {
1112 friend class LIR_OpVisitState;
1114 private:
1115 ArrayCopyStub* _stub;
1116 LIR_Opr _src;
1117 LIR_Opr _src_pos;
1118 LIR_Opr _dst;
1119 LIR_Opr _dst_pos;
1120 LIR_Opr _length;
1121 LIR_Opr _tmp;
1122 ciArrayKlass* _expected_type;
1123 int _flags;
1125 public:
1126 enum Flags {
1127 src_null_check = 1 << 0,
1128 dst_null_check = 1 << 1,
1129 src_pos_positive_check = 1 << 2,
1130 dst_pos_positive_check = 1 << 3,
1131 length_positive_check = 1 << 4,
1132 src_range_check = 1 << 5,
1133 dst_range_check = 1 << 6,
1134 type_check = 1 << 7,
1135 all_flags = (1 << 8) - 1
1136 };
1138 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1139 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1141 LIR_Opr src() const { return _src; }
1142 LIR_Opr src_pos() const { return _src_pos; }
1143 LIR_Opr dst() const { return _dst; }
1144 LIR_Opr dst_pos() const { return _dst_pos; }
1145 LIR_Opr length() const { return _length; }
1146 LIR_Opr tmp() const { return _tmp; }
1147 int flags() const { return _flags; }
1148 ciArrayKlass* expected_type() const { return _expected_type; }
1149 ArrayCopyStub* stub() const { return _stub; }
1151 virtual void emit_code(LIR_Assembler* masm);
1152 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1153 void print_instr(outputStream* out) const PRODUCT_RETURN;
1154 };
1157 // --------------------------------------------------
1158 // LIR_Op0
1159 // --------------------------------------------------
1160 class LIR_Op0: public LIR_Op {
1161 friend class LIR_OpVisitState;
1163 public:
1164 LIR_Op0(LIR_Code code)
1165 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1166 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1167 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1169 virtual void emit_code(LIR_Assembler* masm);
1170 virtual LIR_Op0* as_Op0() { return this; }
1171 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1172 };
1175 // --------------------------------------------------
1176 // LIR_Op1
1177 // --------------------------------------------------
1179 class LIR_Op1: public LIR_Op {
1180 friend class LIR_OpVisitState;
1182 protected:
1183 LIR_Opr _opr; // input operand
1184 BasicType _type; // Operand types
1185 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1187 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1189 void set_kind(LIR_MoveKind kind) {
1190 assert(code() == lir_move, "must be");
1191 _flags = kind;
1192 }
1194 public:
1195 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1196 : LIR_Op(code, result, info)
1197 , _opr(opr)
1198 , _patch(patch)
1199 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1201 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1202 : LIR_Op(code, result, info)
1203 , _opr(opr)
1204 , _patch(patch)
1205 , _type(type) {
1206 assert(code == lir_move, "must be");
1207 set_kind(kind);
1208 }
1210 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1211 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1212 , _opr(opr)
1213 , _patch(lir_patch_none)
1214 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1216 LIR_Opr in_opr() const { return _opr; }
1217 LIR_PatchCode patch_code() const { return _patch; }
1218 BasicType type() const { return _type; }
1220 LIR_MoveKind move_kind() const {
1221 assert(code() == lir_move, "must be");
1222 return (LIR_MoveKind)_flags;
1223 }
1225 virtual void emit_code(LIR_Assembler* masm);
1226 virtual LIR_Op1* as_Op1() { return this; }
1227 virtual const char * name() const PRODUCT_RETURN0;
1229 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1231 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1232 virtual void verify() const;
1233 };
1236 // for runtime calls
1237 class LIR_OpRTCall: public LIR_OpCall {
1238 friend class LIR_OpVisitState;
1240 private:
1241 LIR_Opr _tmp;
1242 public:
1243 LIR_OpRTCall(address addr, LIR_Opr tmp,
1244 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1245 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1246 , _tmp(tmp) {}
1248 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1249 virtual void emit_code(LIR_Assembler* masm);
1250 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1252 LIR_Opr tmp() const { return _tmp; }
1254 virtual void verify() const;
1255 };
1258 class LIR_OpBranch: public LIR_Op {
1259 friend class LIR_OpVisitState;
1261 private:
1262 LIR_Condition _cond;
1263 BasicType _type;
1264 Label* _label;
1265 BlockBegin* _block; // if this is a branch to a block, this is the block
1266 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1267 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1269 public:
1270 LIR_OpBranch(LIR_Condition cond, Label* lbl)
1271 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1272 , _cond(cond)
1273 , _label(lbl)
1274 , _block(NULL)
1275 , _ublock(NULL)
1276 , _stub(NULL) { }
1278 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1279 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1281 // for unordered comparisons
1282 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1284 LIR_Condition cond() const { return _cond; }
1285 BasicType type() const { return _type; }
1286 Label* label() const { return _label; }
1287 BlockBegin* block() const { return _block; }
1288 BlockBegin* ublock() const { return _ublock; }
1289 CodeStub* stub() const { return _stub; }
1291 void change_block(BlockBegin* b);
1292 void change_ublock(BlockBegin* b);
1293 void negate_cond();
1295 virtual void emit_code(LIR_Assembler* masm);
1296 virtual LIR_OpBranch* as_OpBranch() { return this; }
1297 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1298 };
1301 class ConversionStub;
1303 class LIR_OpConvert: public LIR_Op1 {
1304 friend class LIR_OpVisitState;
1306 private:
1307 Bytecodes::Code _bytecode;
1308 ConversionStub* _stub;
1310 public:
1311 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1312 : LIR_Op1(lir_convert, opr, result)
1313 , _stub(stub)
1314 , _bytecode(code) {}
1316 Bytecodes::Code bytecode() const { return _bytecode; }
1317 ConversionStub* stub() const { return _stub; }
1319 virtual void emit_code(LIR_Assembler* masm);
1320 virtual LIR_OpConvert* as_OpConvert() { return this; }
1321 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1323 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1324 };
1327 // LIR_OpAllocObj
1328 class LIR_OpAllocObj : public LIR_Op1 {
1329 friend class LIR_OpVisitState;
1331 private:
1332 LIR_Opr _tmp1;
1333 LIR_Opr _tmp2;
1334 LIR_Opr _tmp3;
1335 LIR_Opr _tmp4;
1336 int _hdr_size;
1337 int _obj_size;
1338 CodeStub* _stub;
1339 bool _init_check;
1341 public:
1342 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1343 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1344 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1345 : LIR_Op1(lir_alloc_object, klass, result)
1346 , _tmp1(t1)
1347 , _tmp2(t2)
1348 , _tmp3(t3)
1349 , _tmp4(t4)
1350 , _hdr_size(hdr_size)
1351 , _obj_size(obj_size)
1352 , _init_check(init_check)
1353 , _stub(stub) { }
1355 LIR_Opr klass() const { return in_opr(); }
1356 LIR_Opr obj() const { return result_opr(); }
1357 LIR_Opr tmp1() const { return _tmp1; }
1358 LIR_Opr tmp2() const { return _tmp2; }
1359 LIR_Opr tmp3() const { return _tmp3; }
1360 LIR_Opr tmp4() const { return _tmp4; }
1361 int header_size() const { return _hdr_size; }
1362 int object_size() const { return _obj_size; }
1363 bool init_check() const { return _init_check; }
1364 CodeStub* stub() const { return _stub; }
1366 virtual void emit_code(LIR_Assembler* masm);
1367 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1368 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1369 };
1372 // LIR_OpRoundFP
1373 class LIR_OpRoundFP : public LIR_Op1 {
1374 friend class LIR_OpVisitState;
1376 private:
1377 LIR_Opr _tmp;
1379 public:
1380 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1381 : LIR_Op1(lir_roundfp, reg, result)
1382 , _tmp(stack_loc_temp) {}
1384 LIR_Opr tmp() const { return _tmp; }
1385 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1386 void print_instr(outputStream* out) const PRODUCT_RETURN;
1387 };
1389 // LIR_OpTypeCheck
1390 class LIR_OpTypeCheck: public LIR_Op {
1391 friend class LIR_OpVisitState;
1393 private:
1394 LIR_Opr _object;
1395 LIR_Opr _array;
1396 ciKlass* _klass;
1397 LIR_Opr _tmp1;
1398 LIR_Opr _tmp2;
1399 LIR_Opr _tmp3;
1400 bool _fast_check;
1401 CodeEmitInfo* _info_for_patch;
1402 CodeEmitInfo* _info_for_exception;
1403 CodeStub* _stub;
1404 // Helpers for Tier1UpdateMethodData
1405 ciMethod* _profiled_method;
1406 int _profiled_bci;
1408 public:
1409 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1410 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1411 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1412 ciMethod* profiled_method, int profiled_bci);
1413 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1414 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception,
1415 ciMethod* profiled_method, int profiled_bci);
1417 LIR_Opr object() const { return _object; }
1418 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1419 LIR_Opr tmp1() const { return _tmp1; }
1420 LIR_Opr tmp2() const { return _tmp2; }
1421 LIR_Opr tmp3() const { return _tmp3; }
1422 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1423 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1424 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1425 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1426 CodeStub* stub() const { return _stub; }
1428 // methodDataOop profiling
1429 ciMethod* profiled_method() { return _profiled_method; }
1430 int profiled_bci() { return _profiled_bci; }
1432 virtual void emit_code(LIR_Assembler* masm);
1433 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1434 void print_instr(outputStream* out) const PRODUCT_RETURN;
1435 };
1437 // LIR_Op2
1438 class LIR_Op2: public LIR_Op {
1439 friend class LIR_OpVisitState;
1441 int _fpu_stack_size; // for sin/cos implementation on Intel
1443 protected:
1444 LIR_Opr _opr1;
1445 LIR_Opr _opr2;
1446 BasicType _type;
1447 LIR_Opr _tmp;
1448 LIR_Condition _condition;
1450 void verify() const;
1452 public:
1453 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1454 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1455 , _opr1(opr1)
1456 , _opr2(opr2)
1457 , _type(T_ILLEGAL)
1458 , _condition(condition)
1459 , _fpu_stack_size(0)
1460 , _tmp(LIR_OprFact::illegalOpr) {
1461 assert(code == lir_cmp, "code check");
1462 }
1464 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result)
1465 : LIR_Op(code, result, NULL)
1466 , _opr1(opr1)
1467 , _opr2(opr2)
1468 , _type(T_ILLEGAL)
1469 , _condition(condition)
1470 , _fpu_stack_size(0)
1471 , _tmp(LIR_OprFact::illegalOpr) {
1472 assert(code == lir_cmove, "code check");
1473 }
1475 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1476 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1477 : LIR_Op(code, result, info)
1478 , _opr1(opr1)
1479 , _opr2(opr2)
1480 , _type(type)
1481 , _condition(lir_cond_unknown)
1482 , _fpu_stack_size(0)
1483 , _tmp(LIR_OprFact::illegalOpr) {
1484 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1485 }
1487 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp)
1488 : LIR_Op(code, result, NULL)
1489 , _opr1(opr1)
1490 , _opr2(opr2)
1491 , _type(T_ILLEGAL)
1492 , _condition(lir_cond_unknown)
1493 , _fpu_stack_size(0)
1494 , _tmp(tmp) {
1495 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1496 }
1498 LIR_Opr in_opr1() const { return _opr1; }
1499 LIR_Opr in_opr2() const { return _opr2; }
1500 BasicType type() const { return _type; }
1501 LIR_Opr tmp_opr() const { return _tmp; }
1502 LIR_Condition condition() const {
1503 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition;
1504 }
1506 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1507 int fpu_stack_size() const { return _fpu_stack_size; }
1509 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1510 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1512 virtual void emit_code(LIR_Assembler* masm);
1513 virtual LIR_Op2* as_Op2() { return this; }
1514 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1515 };
1517 class LIR_OpAllocArray : public LIR_Op {
1518 friend class LIR_OpVisitState;
1520 private:
1521 LIR_Opr _klass;
1522 LIR_Opr _len;
1523 LIR_Opr _tmp1;
1524 LIR_Opr _tmp2;
1525 LIR_Opr _tmp3;
1526 LIR_Opr _tmp4;
1527 BasicType _type;
1528 CodeStub* _stub;
1530 public:
1531 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1532 : LIR_Op(lir_alloc_array, result, NULL)
1533 , _klass(klass)
1534 , _len(len)
1535 , _tmp1(t1)
1536 , _tmp2(t2)
1537 , _tmp3(t3)
1538 , _tmp4(t4)
1539 , _type(type)
1540 , _stub(stub) {}
1542 LIR_Opr klass() const { return _klass; }
1543 LIR_Opr len() const { return _len; }
1544 LIR_Opr obj() const { return result_opr(); }
1545 LIR_Opr tmp1() const { return _tmp1; }
1546 LIR_Opr tmp2() const { return _tmp2; }
1547 LIR_Opr tmp3() const { return _tmp3; }
1548 LIR_Opr tmp4() const { return _tmp4; }
1549 BasicType type() const { return _type; }
1550 CodeStub* stub() const { return _stub; }
1552 virtual void emit_code(LIR_Assembler* masm);
1553 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1554 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1555 };
1558 class LIR_Op3: public LIR_Op {
1559 friend class LIR_OpVisitState;
1561 private:
1562 LIR_Opr _opr1;
1563 LIR_Opr _opr2;
1564 LIR_Opr _opr3;
1565 public:
1566 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1567 : LIR_Op(code, result, info)
1568 , _opr1(opr1)
1569 , _opr2(opr2)
1570 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1571 LIR_Opr in_opr1() const { return _opr1; }
1572 LIR_Opr in_opr2() const { return _opr2; }
1573 LIR_Opr in_opr3() const { return _opr3; }
1575 virtual void emit_code(LIR_Assembler* masm);
1576 virtual LIR_Op3* as_Op3() { return this; }
1577 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1578 };
1581 //--------------------------------
1582 class LabelObj: public CompilationResourceObj {
1583 private:
1584 Label _label;
1585 public:
1586 LabelObj() {}
1587 Label* label() { return &_label; }
1588 };
1591 class LIR_OpLock: public LIR_Op {
1592 friend class LIR_OpVisitState;
1594 private:
1595 LIR_Opr _hdr;
1596 LIR_Opr _obj;
1597 LIR_Opr _lock;
1598 LIR_Opr _scratch;
1599 CodeStub* _stub;
1600 public:
1601 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1602 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1603 , _hdr(hdr)
1604 , _obj(obj)
1605 , _lock(lock)
1606 , _scratch(scratch)
1607 , _stub(stub) {}
1609 LIR_Opr hdr_opr() const { return _hdr; }
1610 LIR_Opr obj_opr() const { return _obj; }
1611 LIR_Opr lock_opr() const { return _lock; }
1612 LIR_Opr scratch_opr() const { return _scratch; }
1613 CodeStub* stub() const { return _stub; }
1615 virtual void emit_code(LIR_Assembler* masm);
1616 virtual LIR_OpLock* as_OpLock() { return this; }
1617 void print_instr(outputStream* out) const PRODUCT_RETURN;
1618 };
1621 class LIR_OpDelay: public LIR_Op {
1622 friend class LIR_OpVisitState;
1624 private:
1625 LIR_Op* _op;
1627 public:
1628 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1629 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1630 _op(op) {
1631 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1632 }
1633 virtual void emit_code(LIR_Assembler* masm);
1634 virtual LIR_OpDelay* as_OpDelay() { return this; }
1635 void print_instr(outputStream* out) const PRODUCT_RETURN;
1636 LIR_Op* delay_op() const { return _op; }
1637 CodeEmitInfo* call_info() const { return info(); }
1638 };
1641 // LIR_OpCompareAndSwap
1642 class LIR_OpCompareAndSwap : public LIR_Op {
1643 friend class LIR_OpVisitState;
1645 private:
1646 LIR_Opr _addr;
1647 LIR_Opr _cmp_value;
1648 LIR_Opr _new_value;
1649 LIR_Opr _tmp1;
1650 LIR_Opr _tmp2;
1652 public:
1653 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2)
1654 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info
1655 , _addr(addr)
1656 , _cmp_value(cmp_value)
1657 , _new_value(new_value)
1658 , _tmp1(t1)
1659 , _tmp2(t2) { }
1661 LIR_Opr addr() const { return _addr; }
1662 LIR_Opr cmp_value() const { return _cmp_value; }
1663 LIR_Opr new_value() const { return _new_value; }
1664 LIR_Opr tmp1() const { return _tmp1; }
1665 LIR_Opr tmp2() const { return _tmp2; }
1667 virtual void emit_code(LIR_Assembler* masm);
1668 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1669 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1670 };
1672 // LIR_OpProfileCall
1673 class LIR_OpProfileCall : public LIR_Op {
1674 friend class LIR_OpVisitState;
1676 private:
1677 ciMethod* _profiled_method;
1678 int _profiled_bci;
1679 LIR_Opr _mdo;
1680 LIR_Opr _recv;
1681 LIR_Opr _tmp1;
1682 ciKlass* _known_holder;
1684 public:
1685 // Destroys recv
1686 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1687 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info
1688 , _profiled_method(profiled_method)
1689 , _profiled_bci(profiled_bci)
1690 , _mdo(mdo)
1691 , _recv(recv)
1692 , _tmp1(t1)
1693 , _known_holder(known_holder) { }
1695 ciMethod* profiled_method() const { return _profiled_method; }
1696 int profiled_bci() const { return _profiled_bci; }
1697 LIR_Opr mdo() const { return _mdo; }
1698 LIR_Opr recv() const { return _recv; }
1699 LIR_Opr tmp1() const { return _tmp1; }
1700 ciKlass* known_holder() const { return _known_holder; }
1702 virtual void emit_code(LIR_Assembler* masm);
1703 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1704 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1705 };
1708 class LIR_InsertionBuffer;
1710 //--------------------------------LIR_List---------------------------------------------------
1711 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1712 // The LIR instructions are appended by the LIR_List class itself;
1713 //
1714 // Notes:
1715 // - all offsets are(should be) in bytes
1716 // - local positions are specified with an offset, with offset 0 being local 0
1718 class LIR_List: public CompilationResourceObj {
1719 private:
1720 LIR_OpList _operations;
1722 Compilation* _compilation;
1723 #ifndef PRODUCT
1724 BlockBegin* _block;
1725 #endif
1726 #ifdef ASSERT
1727 const char * _file;
1728 int _line;
1729 #endif
1731 void append(LIR_Op* op) {
1732 if (op->source() == NULL)
1733 op->set_source(_compilation->current_instruction());
1734 #ifndef PRODUCT
1735 if (PrintIRWithLIR) {
1736 _compilation->maybe_print_current_instruction();
1737 op->print(); tty->cr();
1738 }
1739 #endif // PRODUCT
1741 _operations.append(op);
1743 #ifdef ASSERT
1744 op->verify();
1745 op->set_file_and_line(_file, _line);
1746 _file = NULL;
1747 _line = 0;
1748 #endif
1749 }
1751 public:
1752 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
1754 #ifdef ASSERT
1755 void set_file_and_line(const char * file, int line);
1756 #endif
1758 //---------- accessors ---------------
1759 LIR_OpList* instructions_list() { return &_operations; }
1760 int length() const { return _operations.length(); }
1761 LIR_Op* at(int i) const { return _operations.at(i); }
1763 NOT_PRODUCT(BlockBegin* block() const { return _block; });
1765 // insert LIR_Ops in buffer to right places in LIR_List
1766 void append(LIR_InsertionBuffer* buffer);
1768 //---------- mutators ---------------
1769 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
1770 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
1772 //---------- printing -------------
1773 void print_instructions() PRODUCT_RETURN;
1776 //---------- instructions -------------
1777 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1778 address dest, LIR_OprList* arguments,
1779 CodeEmitInfo* info) {
1780 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
1781 }
1782 void call_static(ciMethod* method, LIR_Opr result,
1783 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1784 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
1785 }
1786 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1787 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1788 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
1789 }
1790 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1791 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
1792 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
1793 }
1794 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1795 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1796 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
1797 }
1799 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
1800 void word_align() { append(new LIR_Op0(lir_word_align)); }
1801 void membar() { append(new LIR_Op0(lir_membar)); }
1802 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
1803 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
1805 void nop() { append(new LIR_Op0(lir_nop)); }
1806 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
1808 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
1809 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
1811 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
1813 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
1814 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
1816 // result is a stack location for old backend and vreg for UseLinearScan
1817 // stack_loc_temp is an illegal register for old backend
1818 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
1819 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1820 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1821 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1822 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
1823 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
1824 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
1826 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
1828 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
1829 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
1831 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
1833 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
1835 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
1837 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
1838 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
1839 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
1841 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); }
1842 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
1843 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
1844 }
1845 void unwind_exception(LIR_Opr exceptionOop) {
1846 append(new LIR_Op1(lir_unwind, exceptionOop));
1847 }
1849 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
1850 append(new LIR_Op2(lir_compare_to, left, right, dst));
1851 }
1853 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
1854 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
1856 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
1857 append(new LIR_Op2(lir_cmp, condition, left, right, info));
1858 }
1859 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
1860 cmp(condition, left, LIR_OprFact::intConst(right), info);
1861 }
1863 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
1864 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
1866 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst) {
1867 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst));
1868 }
1870 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1871 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1872 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1874 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
1875 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
1876 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
1877 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
1878 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
1879 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
1880 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
1882 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
1883 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
1884 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
1885 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
1886 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
1887 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
1888 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
1890 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1891 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
1893 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
1895 void prefetch(LIR_Address* addr, bool is_store);
1897 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1898 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1899 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
1900 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1901 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
1903 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1904 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1905 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1906 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1908 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
1909 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
1911 // jump is an unconditional branch
1912 void jump(BlockBegin* block) {
1913 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
1914 }
1915 void jump(CodeStub* stub) {
1916 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
1917 }
1918 void branch(LIR_Condition cond, Label* lbl) { append(new LIR_OpBranch(cond, lbl)); }
1919 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
1920 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
1921 append(new LIR_OpBranch(cond, type, block));
1922 }
1923 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
1924 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
1925 append(new LIR_OpBranch(cond, type, stub));
1926 }
1927 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
1928 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
1929 append(new LIR_OpBranch(cond, type, block, unordered));
1930 }
1932 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1933 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1934 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1936 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1937 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1938 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1940 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
1941 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
1943 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
1944 append(new LIR_OpRTCall(routine, tmp, result, arguments));
1945 }
1947 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
1948 LIR_OprList* arguments, CodeEmitInfo* info) {
1949 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
1950 }
1952 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
1953 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub);
1954 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
1956 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
1957 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
1958 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
1960 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
1962 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
1964 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1965 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1966 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1967 ciMethod* profiled_method, int profiled_bci);
1968 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch);
1969 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1971 // methodDataOop profiling
1972 void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass)); }
1973 };
1975 void print_LIR(BlockList* blocks);
1977 class LIR_InsertionBuffer : public CompilationResourceObj {
1978 private:
1979 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
1981 // list of insertion points. index and count are stored alternately:
1982 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
1983 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
1984 intStack _index_and_count;
1986 // the LIR_Ops to be inserted
1987 LIR_OpList _ops;
1989 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
1990 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
1991 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
1993 #ifdef ASSERT
1994 void verify();
1995 #endif
1996 public:
1997 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
1999 // must be called before using the insertion buffer
2000 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2001 bool initialized() const { return _lir != NULL; }
2002 // called automatically when the buffer is appended to the LIR_List
2003 void finish() { _lir = NULL; }
2005 // accessors
2006 LIR_List* lir_list() const { return _lir; }
2007 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2008 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2009 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2011 int number_of_ops() const { return _ops.length(); }
2012 LIR_Op* op_at(int i) const { return _ops.at(i); }
2014 // append an instruction to the buffer
2015 void append(int index, LIR_Op* op);
2017 // instruction
2018 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2019 };
2022 //
2023 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2024 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2025 // information about the input, output and temporaries used by the
2026 // op to be recorded. It also records whether the op has call semantics
2027 // and also records all the CodeEmitInfos used by this op.
2028 //
2031 class LIR_OpVisitState: public StackObj {
2032 public:
2033 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2035 enum {
2036 maxNumberOfOperands = 16,
2037 maxNumberOfInfos = 4
2038 };
2040 private:
2041 LIR_Op* _op;
2043 // optimization: the operands and infos are not stored in a variable-length
2044 // list, but in a fixed-size array to save time of size checks and resizing
2045 int _oprs_len[numModes];
2046 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2047 int _info_len;
2048 CodeEmitInfo* _info_new[maxNumberOfInfos];
2050 bool _has_call;
2051 bool _has_slow_case;
2054 // only include register operands
2055 // addresses are decomposed to the base and index registers
2056 // constants and stack operands are ignored
2057 void append(LIR_Opr& opr, OprMode mode) {
2058 assert(opr->is_valid(), "should not call this otherwise");
2059 assert(mode >= 0 && mode < numModes, "bad mode");
2061 if (opr->is_register()) {
2062 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2063 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2065 } else if (opr->is_pointer()) {
2066 LIR_Address* address = opr->as_address_ptr();
2067 if (address != NULL) {
2068 // special handling for addresses: add base and index register of the address
2069 // both are always input operands!
2070 if (address->_base->is_valid()) {
2071 assert(address->_base->is_register(), "must be");
2072 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2073 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base;
2074 }
2075 if (address->_index->is_valid()) {
2076 assert(address->_index->is_register(), "must be");
2077 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2078 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index;
2079 }
2081 } else {
2082 assert(opr->is_constant(), "constant operands are not processed");
2083 }
2084 } else {
2085 assert(opr->is_stack(), "stack operands are not processed");
2086 }
2087 }
2089 void append(CodeEmitInfo* info) {
2090 assert(info != NULL, "should not call this otherwise");
2091 assert(_info_len < maxNumberOfInfos, "array overflow");
2092 _info_new[_info_len++] = info;
2093 }
2095 public:
2096 LIR_OpVisitState() { reset(); }
2098 LIR_Op* op() const { return _op; }
2099 void set_op(LIR_Op* op) { reset(); _op = op; }
2101 bool has_call() const { return _has_call; }
2102 bool has_slow_case() const { return _has_slow_case; }
2104 void reset() {
2105 _op = NULL;
2106 _has_call = false;
2107 _has_slow_case = false;
2109 _oprs_len[inputMode] = 0;
2110 _oprs_len[tempMode] = 0;
2111 _oprs_len[outputMode] = 0;
2112 _info_len = 0;
2113 }
2116 int opr_count(OprMode mode) const {
2117 assert(mode >= 0 && mode < numModes, "bad mode");
2118 return _oprs_len[mode];
2119 }
2121 LIR_Opr opr_at(OprMode mode, int index) const {
2122 assert(mode >= 0 && mode < numModes, "bad mode");
2123 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2124 return *_oprs_new[mode][index];
2125 }
2127 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2128 assert(mode >= 0 && mode < numModes, "bad mode");
2129 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2130 *_oprs_new[mode][index] = opr;
2131 }
2133 int info_count() const {
2134 return _info_len;
2135 }
2137 CodeEmitInfo* info_at(int index) const {
2138 assert(index < _info_len, "index out of bounds");
2139 return _info_new[index];
2140 }
2142 XHandlers* all_xhandler();
2144 // collects all register operands of the instruction
2145 void visit(LIR_Op* op);
2147 #if ASSERT
2148 // check that an operation has no operands
2149 bool no_operands(LIR_Op* op);
2150 #endif
2152 // LIR_Op visitor functions use these to fill in the state
2153 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2154 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2155 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2156 void do_info(CodeEmitInfo* info) { append(info); }
2158 void do_stub(CodeStub* stub);
2159 void do_call() { _has_call = true; }
2160 void do_slow_case() { _has_slow_case = true; }
2161 void do_slow_case(CodeEmitInfo* info) {
2162 _has_slow_case = true;
2163 append(info);
2164 }
2165 };
2168 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };