Thu, 27 May 2010 19:08:38 -0700
6941466: Oracle rebranding changes for Hotspot repositories
Summary: Change all the Sun copyrights to Oracle copyright
Reviewed-by: ohair
1 /*
2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 class BlockBegin;
26 class BlockList;
27 class LIR_Assembler;
28 class CodeEmitInfo;
29 class CodeStub;
30 class CodeStubList;
31 class ArrayCopyStub;
32 class LIR_Op;
33 class ciType;
34 class ValueType;
35 class LIR_OpVisitState;
36 class FpuStackSim;
38 //---------------------------------------------------------------------
39 // LIR Operands
40 // LIR_OprDesc
41 // LIR_OprPtr
42 // LIR_Const
43 // LIR_Address
44 //---------------------------------------------------------------------
45 class LIR_OprDesc;
46 class LIR_OprPtr;
47 class LIR_Const;
48 class LIR_Address;
49 class LIR_OprVisitor;
52 typedef LIR_OprDesc* LIR_Opr;
53 typedef int RegNr;
55 define_array(LIR_OprArray, LIR_Opr)
56 define_stack(LIR_OprList, LIR_OprArray)
58 define_array(LIR_OprRefArray, LIR_Opr*)
59 define_stack(LIR_OprRefList, LIR_OprRefArray)
61 define_array(CodeEmitInfoArray, CodeEmitInfo*)
62 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
64 define_array(LIR_OpArray, LIR_Op*)
65 define_stack(LIR_OpList, LIR_OpArray)
67 // define LIR_OprPtr early so LIR_OprDesc can refer to it
68 class LIR_OprPtr: public CompilationResourceObj {
69 public:
70 bool is_oop_pointer() const { return (type() == T_OBJECT); }
71 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
73 virtual LIR_Const* as_constant() { return NULL; }
74 virtual LIR_Address* as_address() { return NULL; }
75 virtual BasicType type() const = 0;
76 virtual void print_value_on(outputStream* out) const = 0;
77 };
81 // LIR constants
82 class LIR_Const: public LIR_OprPtr {
83 private:
84 JavaValue _value;
86 void type_check(BasicType t) const { assert(type() == t, "type check"); }
87 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
88 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
90 public:
91 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
92 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
93 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
94 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
95 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
96 LIR_Const(void* p) {
97 #ifdef _LP64
98 assert(sizeof(jlong) >= sizeof(p), "too small");;
99 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
100 #else
101 assert(sizeof(jint) >= sizeof(p), "too small");;
102 _value.set_type(T_INT); _value.set_jint((jint)p);
103 #endif
104 }
106 virtual BasicType type() const { return _value.get_type(); }
107 virtual LIR_Const* as_constant() { return this; }
109 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
110 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
111 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
112 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
113 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
114 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
115 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
117 #ifdef _LP64
118 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
119 #else
120 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
121 #endif
124 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
125 jint as_jint_lo_bits() const {
126 if (type() == T_DOUBLE) {
127 return low(jlong_cast(_value.get_jdouble()));
128 } else {
129 return as_jint_lo();
130 }
131 }
132 jint as_jint_hi_bits() const {
133 if (type() == T_DOUBLE) {
134 return high(jlong_cast(_value.get_jdouble()));
135 } else {
136 return as_jint_hi();
137 }
138 }
139 jlong as_jlong_bits() const {
140 if (type() == T_DOUBLE) {
141 return jlong_cast(_value.get_jdouble());
142 } else {
143 return as_jlong();
144 }
145 }
147 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
150 bool is_zero_float() {
151 jfloat f = as_jfloat();
152 jfloat ok = 0.0f;
153 return jint_cast(f) == jint_cast(ok);
154 }
156 bool is_one_float() {
157 jfloat f = as_jfloat();
158 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
159 }
161 bool is_zero_double() {
162 jdouble d = as_jdouble();
163 jdouble ok = 0.0;
164 return jlong_cast(d) == jlong_cast(ok);
165 }
167 bool is_one_double() {
168 jdouble d = as_jdouble();
169 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
170 }
171 };
174 //---------------------LIR Operand descriptor------------------------------------
175 //
176 // The class LIR_OprDesc represents a LIR instruction operand;
177 // it can be a register (ALU/FPU), stack location or a constant;
178 // Constants and addresses are represented as resource area allocated
179 // structures (see above).
180 // Registers and stack locations are inlined into the this pointer
181 // (see value function).
183 class LIR_OprDesc: public CompilationResourceObj {
184 public:
185 // value structure:
186 // data opr-type opr-kind
187 // +--------------+-------+-------+
188 // [max...........|7 6 5 4|3 2 1 0]
189 // ^
190 // is_pointer bit
191 //
192 // lowest bit cleared, means it is a structure pointer
193 // we need 4 bits to represent types
195 private:
196 friend class LIR_OprFact;
198 // Conversion
199 intptr_t value() const { return (intptr_t) this; }
201 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
202 return (value() & mask) == masked_value;
203 }
205 enum OprKind {
206 pointer_value = 0
207 , stack_value = 1
208 , cpu_register = 3
209 , fpu_register = 5
210 , illegal_value = 7
211 };
213 enum OprBits {
214 pointer_bits = 1
215 , kind_bits = 3
216 , type_bits = 4
217 , size_bits = 2
218 , destroys_bits = 1
219 , virtual_bits = 1
220 , is_xmm_bits = 1
221 , last_use_bits = 1
222 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
223 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
224 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
225 , data_bits = BitsPerInt - non_data_bits
226 , reg_bits = data_bits / 2 // for two registers in one value encoding
227 };
229 enum OprShift {
230 kind_shift = 0
231 , type_shift = kind_shift + kind_bits
232 , size_shift = type_shift + type_bits
233 , destroys_shift = size_shift + size_bits
234 , last_use_shift = destroys_shift + destroys_bits
235 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
236 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
237 , is_xmm_shift = virtual_shift + virtual_bits
238 , data_shift = is_xmm_shift + is_xmm_bits
239 , reg1_shift = data_shift
240 , reg2_shift = data_shift + reg_bits
242 };
244 enum OprSize {
245 single_size = 0 << size_shift
246 , double_size = 1 << size_shift
247 };
249 enum OprMask {
250 kind_mask = right_n_bits(kind_bits)
251 , type_mask = right_n_bits(type_bits) << type_shift
252 , size_mask = right_n_bits(size_bits) << size_shift
253 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
254 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
255 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
256 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
257 , pointer_mask = right_n_bits(pointer_bits)
258 , lower_reg_mask = right_n_bits(reg_bits)
259 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
260 };
262 uintptr_t data() const { return value() >> data_shift; }
263 int lo_reg_half() const { return data() & lower_reg_mask; }
264 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
265 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
266 OprSize size_field() const { return (OprSize)(value() & size_mask); }
268 static char type_char(BasicType t);
270 public:
271 enum {
272 vreg_base = ConcreteRegisterImpl::number_of_registers,
273 vreg_max = (1 << data_bits) - 1
274 };
276 static inline LIR_Opr illegalOpr();
278 enum OprType {
279 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
280 , int_type = 1 << type_shift
281 , long_type = 2 << type_shift
282 , object_type = 3 << type_shift
283 , pointer_type = 4 << type_shift
284 , float_type = 5 << type_shift
285 , double_type = 6 << type_shift
286 };
287 friend OprType as_OprType(BasicType t);
288 friend BasicType as_BasicType(OprType t);
290 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
291 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
293 static OprSize size_for(BasicType t) {
294 switch (t) {
295 case T_LONG:
296 case T_DOUBLE:
297 return double_size;
298 break;
300 case T_FLOAT:
301 case T_BOOLEAN:
302 case T_CHAR:
303 case T_BYTE:
304 case T_SHORT:
305 case T_INT:
306 case T_OBJECT:
307 case T_ARRAY:
308 return single_size;
309 break;
311 default:
312 ShouldNotReachHere();
313 return single_size;
314 }
315 }
318 void validate_type() const PRODUCT_RETURN;
320 BasicType type() const {
321 if (is_pointer()) {
322 return pointer()->type();
323 }
324 return as_BasicType(type_field());
325 }
328 ValueType* value_type() const { return as_ValueType(type()); }
330 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
332 bool is_equal(LIR_Opr opr) const { return this == opr; }
333 // checks whether types are same
334 bool is_same_type(LIR_Opr opr) const {
335 assert(type_field() != unknown_type &&
336 opr->type_field() != unknown_type, "shouldn't see unknown_type");
337 return type_field() == opr->type_field();
338 }
339 bool is_same_register(LIR_Opr opr) {
340 return (is_register() && opr->is_register() &&
341 kind_field() == opr->kind_field() &&
342 (value() & no_type_mask) == (opr->value() & no_type_mask));
343 }
345 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
346 bool is_illegal() const { return kind_field() == illegal_value; }
347 bool is_valid() const { return kind_field() != illegal_value; }
349 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
350 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
352 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
353 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
355 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
356 bool is_oop() const;
358 // semantic for fpu- and xmm-registers:
359 // * is_float and is_double return true for xmm_registers
360 // (so is_single_fpu and is_single_xmm are true)
361 // * So you must always check for is_???_xmm prior to is_???_fpu to
362 // distinguish between fpu- and xmm-registers
364 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
365 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
366 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
368 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
369 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
370 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
371 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
372 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
374 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
375 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
376 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
377 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
378 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
380 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
381 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
382 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
384 // fast accessor functions for special bits that do not work for pointers
385 // (in this functions, the check for is_pointer() is omitted)
386 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
387 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
388 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
389 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
390 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
392 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
393 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
394 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
395 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
398 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
399 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
400 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
401 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
402 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
403 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
404 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
405 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
406 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
407 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
408 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
409 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
411 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
412 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
413 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
415 Register as_register() const;
416 Register as_register_lo() const;
417 Register as_register_hi() const;
419 Register as_pointer_register() {
420 #ifdef _LP64
421 if (is_double_cpu()) {
422 assert(as_register_lo() == as_register_hi(), "should be a single register");
423 return as_register_lo();
424 }
425 #endif
426 return as_register();
427 }
429 #ifdef X86
430 XMMRegister as_xmm_float_reg() const;
431 XMMRegister as_xmm_double_reg() const;
432 // for compatibility with RInfo
433 int fpu () const { return lo_reg_half(); }
434 #endif // X86
436 #ifdef SPARC
437 FloatRegister as_float_reg () const;
438 FloatRegister as_double_reg () const;
439 #endif
441 jint as_jint() const { return as_constant_ptr()->as_jint(); }
442 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
443 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
444 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
445 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
447 void print() const PRODUCT_RETURN;
448 void print(outputStream* out) const PRODUCT_RETURN;
449 };
452 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
453 switch (type) {
454 case T_INT: return LIR_OprDesc::int_type;
455 case T_LONG: return LIR_OprDesc::long_type;
456 case T_FLOAT: return LIR_OprDesc::float_type;
457 case T_DOUBLE: return LIR_OprDesc::double_type;
458 case T_OBJECT:
459 case T_ARRAY: return LIR_OprDesc::object_type;
460 case T_ILLEGAL: // fall through
461 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
462 }
463 }
465 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
466 switch (t) {
467 case LIR_OprDesc::int_type: return T_INT;
468 case LIR_OprDesc::long_type: return T_LONG;
469 case LIR_OprDesc::float_type: return T_FLOAT;
470 case LIR_OprDesc::double_type: return T_DOUBLE;
471 case LIR_OprDesc::object_type: return T_OBJECT;
472 case LIR_OprDesc::unknown_type: // fall through
473 default: ShouldNotReachHere(); return T_ILLEGAL;
474 }
475 }
478 // LIR_Address
479 class LIR_Address: public LIR_OprPtr {
480 friend class LIR_OpVisitState;
482 public:
483 // NOTE: currently these must be the log2 of the scale factor (and
484 // must also be equivalent to the ScaleFactor enum in
485 // assembler_i486.hpp)
486 enum Scale {
487 times_1 = 0,
488 times_2 = 1,
489 times_4 = 2,
490 times_8 = 3
491 };
493 private:
494 LIR_Opr _base;
495 LIR_Opr _index;
496 Scale _scale;
497 intx _disp;
498 BasicType _type;
500 public:
501 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
502 _base(base)
503 , _index(index)
504 , _scale(times_1)
505 , _type(type)
506 , _disp(0) { verify(); }
508 LIR_Address(LIR_Opr base, int disp, BasicType type):
509 _base(base)
510 , _index(LIR_OprDesc::illegalOpr())
511 , _scale(times_1)
512 , _type(type)
513 , _disp(disp) { verify(); }
515 #ifdef X86
516 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, int disp, BasicType type):
517 _base(base)
518 , _index(index)
519 , _scale(scale)
520 , _type(type)
521 , _disp(disp) { verify(); }
522 #endif // X86
524 LIR_Opr base() const { return _base; }
525 LIR_Opr index() const { return _index; }
526 Scale scale() const { return _scale; }
527 intx disp() const { return _disp; }
529 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
531 virtual LIR_Address* as_address() { return this; }
532 virtual BasicType type() const { return _type; }
533 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
535 void verify() const PRODUCT_RETURN;
537 static Scale scale(BasicType type);
538 };
541 // operand factory
542 class LIR_OprFact: public AllStatic {
543 public:
545 static LIR_Opr illegalOpr;
547 static LIR_Opr single_cpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
548 static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
549 static LIR_Opr double_cpu(int reg1, int reg2) {
550 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
551 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
552 (reg2 << LIR_OprDesc::reg2_shift) |
553 LIR_OprDesc::long_type |
554 LIR_OprDesc::cpu_register |
555 LIR_OprDesc::double_size);
556 }
558 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
559 LIR_OprDesc::float_type |
560 LIR_OprDesc::fpu_register |
561 LIR_OprDesc::single_size); }
563 #ifdef SPARC
564 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
565 (reg2 << LIR_OprDesc::reg2_shift) |
566 LIR_OprDesc::double_type |
567 LIR_OprDesc::fpu_register |
568 LIR_OprDesc::double_size); }
569 #endif
570 #ifdef X86
571 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
572 (reg << LIR_OprDesc::reg2_shift) |
573 LIR_OprDesc::double_type |
574 LIR_OprDesc::fpu_register |
575 LIR_OprDesc::double_size); }
577 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
578 LIR_OprDesc::float_type |
579 LIR_OprDesc::fpu_register |
580 LIR_OprDesc::single_size |
581 LIR_OprDesc::is_xmm_mask); }
582 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
583 (reg << LIR_OprDesc::reg2_shift) |
584 LIR_OprDesc::double_type |
585 LIR_OprDesc::fpu_register |
586 LIR_OprDesc::double_size |
587 LIR_OprDesc::is_xmm_mask); }
588 #endif // X86
591 static LIR_Opr virtual_register(int index, BasicType type) {
592 LIR_Opr res;
593 switch (type) {
594 case T_OBJECT: // fall through
595 case T_ARRAY:
596 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
597 LIR_OprDesc::object_type |
598 LIR_OprDesc::cpu_register |
599 LIR_OprDesc::single_size |
600 LIR_OprDesc::virtual_mask);
601 break;
603 case T_INT:
604 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
605 LIR_OprDesc::int_type |
606 LIR_OprDesc::cpu_register |
607 LIR_OprDesc::single_size |
608 LIR_OprDesc::virtual_mask);
609 break;
611 case T_LONG:
612 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
613 LIR_OprDesc::long_type |
614 LIR_OprDesc::cpu_register |
615 LIR_OprDesc::double_size |
616 LIR_OprDesc::virtual_mask);
617 break;
619 case T_FLOAT:
620 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
621 LIR_OprDesc::float_type |
622 LIR_OprDesc::fpu_register |
623 LIR_OprDesc::single_size |
624 LIR_OprDesc::virtual_mask);
625 break;
627 case
628 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
629 LIR_OprDesc::double_type |
630 LIR_OprDesc::fpu_register |
631 LIR_OprDesc::double_size |
632 LIR_OprDesc::virtual_mask);
633 break;
635 default: ShouldNotReachHere(); res = illegalOpr;
636 }
638 #ifdef ASSERT
639 res->validate_type();
640 assert(res->vreg_number() == index, "conversion check");
641 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
642 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
644 // old-style calculation; check if old and new method are equal
645 LIR_OprDesc::OprType t = as_OprType(type);
646 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
647 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
648 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
649 assert(res == old_res, "old and new method not equal");
650 #endif
652 return res;
653 }
655 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
656 // the index is platform independent; a double stack useing indeces 2 and 3 has always
657 // index 2.
658 static LIR_Opr stack(int index, BasicType type) {
659 LIR_Opr res;
660 switch (type) {
661 case T_OBJECT: // fall through
662 case T_ARRAY:
663 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
664 LIR_OprDesc::object_type |
665 LIR_OprDesc::stack_value |
666 LIR_OprDesc::single_size);
667 break;
669 case T_INT:
670 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
671 LIR_OprDesc::int_type |
672 LIR_OprDesc::stack_value |
673 LIR_OprDesc::single_size);
674 break;
676 case T_LONG:
677 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
678 LIR_OprDesc::long_type |
679 LIR_OprDesc::stack_value |
680 LIR_OprDesc::double_size);
681 break;
683 case T_FLOAT:
684 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
685 LIR_OprDesc::float_type |
686 LIR_OprDesc::stack_value |
687 LIR_OprDesc::single_size);
688 break;
689 case T_DOUBLE:
690 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
691 LIR_OprDesc::double_type |
692 LIR_OprDesc::stack_value |
693 LIR_OprDesc::double_size);
694 break;
696 default: ShouldNotReachHere(); res = illegalOpr;
697 }
699 #ifdef ASSERT
700 assert(index >= 0, "index must be positive");
701 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
703 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
704 LIR_OprDesc::stack_value |
705 as_OprType(type) |
706 LIR_OprDesc::size_for(type));
707 assert(res == old_res, "old and new method not equal");
708 #endif
710 return res;
711 }
713 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
714 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
715 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
716 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
717 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
718 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
719 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
720 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
721 static LIR_Opr illegal() { return (LIR_Opr)-1; }
722 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
724 static LIR_Opr value_type(ValueType* type);
725 static LIR_Opr dummy_value_type(ValueType* type);
726 };
729 //-------------------------------------------------------------------------------
730 // LIR Instructions
731 //-------------------------------------------------------------------------------
732 //
733 // Note:
734 // - every instruction has a result operand
735 // - every instruction has an CodeEmitInfo operand (can be revisited later)
736 // - every instruction has a LIR_OpCode operand
737 // - LIR_OpN, means an instruction that has N input operands
738 //
739 // class hierarchy:
740 //
741 class LIR_Op;
742 class LIR_Op0;
743 class LIR_OpLabel;
744 class LIR_Op1;
745 class LIR_OpBranch;
746 class LIR_OpConvert;
747 class LIR_OpAllocObj;
748 class LIR_OpRoundFP;
749 class LIR_Op2;
750 class LIR_OpDelay;
751 class LIR_Op3;
752 class LIR_OpAllocArray;
753 class LIR_OpCall;
754 class LIR_OpJavaCall;
755 class LIR_OpRTCall;
756 class LIR_OpArrayCopy;
757 class LIR_OpLock;
758 class LIR_OpTypeCheck;
759 class LIR_OpCompareAndSwap;
760 class LIR_OpProfileCall;
763 // LIR operation codes
764 enum LIR_Code {
765 lir_none
766 , begin_op0
767 , lir_word_align
768 , lir_label
769 , lir_nop
770 , lir_backwardbranch_target
771 , lir_std_entry
772 , lir_osr_entry
773 , lir_build_frame
774 , lir_fpop_raw
775 , lir_24bit_FPU
776 , lir_reset_FPU
777 , lir_breakpoint
778 , lir_rtcall
779 , lir_membar
780 , lir_membar_acquire
781 , lir_membar_release
782 , lir_get_thread
783 , end_op0
784 , begin_op1
785 , lir_fxch
786 , lir_fld
787 , lir_ffree
788 , lir_push
789 , lir_pop
790 , lir_null_check
791 , lir_return
792 , lir_leal
793 , lir_neg
794 , lir_branch
795 , lir_cond_float_branch
796 , lir_move
797 , lir_prefetchr
798 , lir_prefetchw
799 , lir_convert
800 , lir_alloc_object
801 , lir_monaddr
802 , lir_roundfp
803 , lir_safepoint
804 , lir_unwind
805 , end_op1
806 , begin_op2
807 , lir_cmp
808 , lir_cmp_l2i
809 , lir_ucmp_fd2i
810 , lir_cmp_fd2i
811 , lir_cmove
812 , lir_add
813 , lir_sub
814 , lir_mul
815 , lir_mul_strictfp
816 , lir_div
817 , lir_div_strictfp
818 , lir_rem
819 , lir_sqrt
820 , lir_abs
821 , lir_sin
822 , lir_cos
823 , lir_tan
824 , lir_log
825 , lir_log10
826 , lir_logic_and
827 , lir_logic_or
828 , lir_logic_xor
829 , lir_shl
830 , lir_shr
831 , lir_ushr
832 , lir_alloc_array
833 , lir_throw
834 , lir_compare_to
835 , end_op2
836 , begin_op3
837 , lir_idiv
838 , lir_irem
839 , end_op3
840 , begin_opJavaCall
841 , lir_static_call
842 , lir_optvirtual_call
843 , lir_icvirtual_call
844 , lir_virtual_call
845 , lir_dynamic_call
846 , end_opJavaCall
847 , begin_opArrayCopy
848 , lir_arraycopy
849 , end_opArrayCopy
850 , begin_opLock
851 , lir_lock
852 , lir_unlock
853 , end_opLock
854 , begin_delay_slot
855 , lir_delay_slot
856 , end_delay_slot
857 , begin_opTypeCheck
858 , lir_instanceof
859 , lir_checkcast
860 , lir_store_check
861 , end_opTypeCheck
862 , begin_opCompareAndSwap
863 , lir_cas_long
864 , lir_cas_obj
865 , lir_cas_int
866 , end_opCompareAndSwap
867 , begin_opMDOProfile
868 , lir_profile_call
869 , end_opMDOProfile
870 };
873 enum LIR_Condition {
874 lir_cond_equal
875 , lir_cond_notEqual
876 , lir_cond_less
877 , lir_cond_lessEqual
878 , lir_cond_greaterEqual
879 , lir_cond_greater
880 , lir_cond_belowEqual
881 , lir_cond_aboveEqual
882 , lir_cond_always
883 , lir_cond_unknown = -1
884 };
887 enum LIR_PatchCode {
888 lir_patch_none,
889 lir_patch_low,
890 lir_patch_high,
891 lir_patch_normal
892 };
895 enum LIR_MoveKind {
896 lir_move_normal,
897 lir_move_volatile,
898 lir_move_unaligned,
899 lir_move_max_flag
900 };
903 // --------------------------------------------------
904 // LIR_Op
905 // --------------------------------------------------
906 class LIR_Op: public CompilationResourceObj {
907 friend class LIR_OpVisitState;
909 #ifdef ASSERT
910 private:
911 const char * _file;
912 int _line;
913 #endif
915 protected:
916 LIR_Opr _result;
917 unsigned short _code;
918 unsigned short _flags;
919 CodeEmitInfo* _info;
920 int _id; // value id for register allocation
921 int _fpu_pop_count;
922 Instruction* _source; // for debugging
924 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
926 protected:
927 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
929 public:
930 LIR_Op()
931 : _result(LIR_OprFact::illegalOpr)
932 , _code(lir_none)
933 , _flags(0)
934 , _info(NULL)
935 #ifdef ASSERT
936 , _file(NULL)
937 , _line(0)
938 #endif
939 , _fpu_pop_count(0)
940 , _source(NULL)
941 , _id(-1) {}
943 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
944 : _result(result)
945 , _code(code)
946 , _flags(0)
947 , _info(info)
948 #ifdef ASSERT
949 , _file(NULL)
950 , _line(0)
951 #endif
952 , _fpu_pop_count(0)
953 , _source(NULL)
954 , _id(-1) {}
956 CodeEmitInfo* info() const { return _info; }
957 LIR_Code code() const { return (LIR_Code)_code; }
958 LIR_Opr result_opr() const { return _result; }
959 void set_result_opr(LIR_Opr opr) { _result = opr; }
961 #ifdef ASSERT
962 void set_file_and_line(const char * file, int line) {
963 _file = file;
964 _line = line;
965 }
966 #endif
968 virtual const char * name() const PRODUCT_RETURN0;
970 int id() const { return _id; }
971 void set_id(int id) { _id = id; }
973 // FPU stack simulation helpers -- only used on Intel
974 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
975 int fpu_pop_count() const { return _fpu_pop_count; }
976 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
978 Instruction* source() const { return _source; }
979 void set_source(Instruction* ins) { _source = ins; }
981 virtual void emit_code(LIR_Assembler* masm) = 0;
982 virtual void print_instr(outputStream* out) const = 0;
983 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
985 virtual LIR_OpCall* as_OpCall() { return NULL; }
986 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
987 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
988 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
989 virtual LIR_OpLock* as_OpLock() { return NULL; }
990 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
991 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
992 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
993 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
994 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
995 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
996 virtual LIR_Op0* as_Op0() { return NULL; }
997 virtual LIR_Op1* as_Op1() { return NULL; }
998 virtual LIR_Op2* as_Op2() { return NULL; }
999 virtual LIR_Op3* as_Op3() { return NULL; }
1000 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1001 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1002 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1003 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1005 virtual void verify() const {}
1006 };
1008 // for calls
1009 class LIR_OpCall: public LIR_Op {
1010 friend class LIR_OpVisitState;
1012 protected:
1013 address _addr;
1014 LIR_OprList* _arguments;
1015 protected:
1016 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1017 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1018 : LIR_Op(code, result, info)
1019 , _arguments(arguments)
1020 , _addr(addr) {}
1022 public:
1023 address addr() const { return _addr; }
1024 const LIR_OprList* arguments() const { return _arguments; }
1025 virtual LIR_OpCall* as_OpCall() { return this; }
1026 };
1029 // --------------------------------------------------
1030 // LIR_OpJavaCall
1031 // --------------------------------------------------
1032 class LIR_OpJavaCall: public LIR_OpCall {
1033 friend class LIR_OpVisitState;
1035 private:
1036 ciMethod* _method;
1037 LIR_Opr _receiver;
1039 public:
1040 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1041 LIR_Opr receiver, LIR_Opr result,
1042 address addr, LIR_OprList* arguments,
1043 CodeEmitInfo* info)
1044 : LIR_OpCall(code, addr, result, arguments, info)
1045 , _receiver(receiver)
1046 , _method(method) { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1048 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1049 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1050 LIR_OprList* arguments, CodeEmitInfo* info)
1051 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1052 , _receiver(receiver)
1053 , _method(method) { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1055 LIR_Opr receiver() const { return _receiver; }
1056 ciMethod* method() const { return _method; }
1058 // JSR 292 support.
1059 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1060 bool is_method_handle_invoke() const {
1061 return
1062 is_invokedynamic() // An invokedynamic is always a MethodHandle call site.
1063 ||
1064 (method()->holder()->name() == ciSymbol::java_dyn_MethodHandle() &&
1065 methodOopDesc::is_method_handle_invoke_name(method()->name()->sid()));
1066 }
1068 intptr_t vtable_offset() const {
1069 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1070 return (intptr_t) addr();
1071 }
1073 virtual void emit_code(LIR_Assembler* masm);
1074 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1075 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1076 };
1078 // --------------------------------------------------
1079 // LIR_OpLabel
1080 // --------------------------------------------------
1081 // Location where a branch can continue
1082 class LIR_OpLabel: public LIR_Op {
1083 friend class LIR_OpVisitState;
1085 private:
1086 Label* _label;
1087 public:
1088 LIR_OpLabel(Label* lbl)
1089 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1090 , _label(lbl) {}
1091 Label* label() const { return _label; }
1093 virtual void emit_code(LIR_Assembler* masm);
1094 virtual LIR_OpLabel* as_OpLabel() { return this; }
1095 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1096 };
1098 // LIR_OpArrayCopy
1099 class LIR_OpArrayCopy: public LIR_Op {
1100 friend class LIR_OpVisitState;
1102 private:
1103 ArrayCopyStub* _stub;
1104 LIR_Opr _src;
1105 LIR_Opr _src_pos;
1106 LIR_Opr _dst;
1107 LIR_Opr _dst_pos;
1108 LIR_Opr _length;
1109 LIR_Opr _tmp;
1110 ciArrayKlass* _expected_type;
1111 int _flags;
1113 public:
1114 enum Flags {
1115 src_null_check = 1 << 0,
1116 dst_null_check = 1 << 1,
1117 src_pos_positive_check = 1 << 2,
1118 dst_pos_positive_check = 1 << 3,
1119 length_positive_check = 1 << 4,
1120 src_range_check = 1 << 5,
1121 dst_range_check = 1 << 6,
1122 type_check = 1 << 7,
1123 all_flags = (1 << 8) - 1
1124 };
1126 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1127 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1129 LIR_Opr src() const { return _src; }
1130 LIR_Opr src_pos() const { return _src_pos; }
1131 LIR_Opr dst() const { return _dst; }
1132 LIR_Opr dst_pos() const { return _dst_pos; }
1133 LIR_Opr length() const { return _length; }
1134 LIR_Opr tmp() const { return _tmp; }
1135 int flags() const { return _flags; }
1136 ciArrayKlass* expected_type() const { return _expected_type; }
1137 ArrayCopyStub* stub() const { return _stub; }
1139 virtual void emit_code(LIR_Assembler* masm);
1140 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1141 void print_instr(outputStream* out) const PRODUCT_RETURN;
1142 };
1145 // --------------------------------------------------
1146 // LIR_Op0
1147 // --------------------------------------------------
1148 class LIR_Op0: public LIR_Op {
1149 friend class LIR_OpVisitState;
1151 public:
1152 LIR_Op0(LIR_Code code)
1153 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1154 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1155 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1157 virtual void emit_code(LIR_Assembler* masm);
1158 virtual LIR_Op0* as_Op0() { return this; }
1159 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1160 };
1163 // --------------------------------------------------
1164 // LIR_Op1
1165 // --------------------------------------------------
1167 class LIR_Op1: public LIR_Op {
1168 friend class LIR_OpVisitState;
1170 protected:
1171 LIR_Opr _opr; // input operand
1172 BasicType _type; // Operand types
1173 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1175 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1177 void set_kind(LIR_MoveKind kind) {
1178 assert(code() == lir_move, "must be");
1179 _flags = kind;
1180 }
1182 public:
1183 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1184 : LIR_Op(code, result, info)
1185 , _opr(opr)
1186 , _patch(patch)
1187 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1189 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1190 : LIR_Op(code, result, info)
1191 , _opr(opr)
1192 , _patch(patch)
1193 , _type(type) {
1194 assert(code == lir_move, "must be");
1195 set_kind(kind);
1196 }
1198 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1199 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1200 , _opr(opr)
1201 , _patch(lir_patch_none)
1202 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1204 LIR_Opr in_opr() const { return _opr; }
1205 LIR_PatchCode patch_code() const { return _patch; }
1206 BasicType type() const { return _type; }
1208 LIR_MoveKind move_kind() const {
1209 assert(code() == lir_move, "must be");
1210 return (LIR_MoveKind)_flags;
1211 }
1213 virtual void emit_code(LIR_Assembler* masm);
1214 virtual LIR_Op1* as_Op1() { return this; }
1215 virtual const char * name() const PRODUCT_RETURN0;
1217 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1219 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1220 virtual void verify() const;
1221 };
1224 // for runtime calls
1225 class LIR_OpRTCall: public LIR_OpCall {
1226 friend class LIR_OpVisitState;
1228 private:
1229 LIR_Opr _tmp;
1230 public:
1231 LIR_OpRTCall(address addr, LIR_Opr tmp,
1232 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1233 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1234 , _tmp(tmp) {}
1236 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1237 virtual void emit_code(LIR_Assembler* masm);
1238 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1240 LIR_Opr tmp() const { return _tmp; }
1242 virtual void verify() const;
1243 };
1246 class LIR_OpBranch: public LIR_Op {
1247 friend class LIR_OpVisitState;
1249 private:
1250 LIR_Condition _cond;
1251 BasicType _type;
1252 Label* _label;
1253 BlockBegin* _block; // if this is a branch to a block, this is the block
1254 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1255 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1257 public:
1258 LIR_OpBranch(LIR_Condition cond, Label* lbl)
1259 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1260 , _cond(cond)
1261 , _label(lbl)
1262 , _block(NULL)
1263 , _ublock(NULL)
1264 , _stub(NULL) { }
1266 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1267 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1269 // for unordered comparisons
1270 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1272 LIR_Condition cond() const { return _cond; }
1273 BasicType type() const { return _type; }
1274 Label* label() const { return _label; }
1275 BlockBegin* block() const { return _block; }
1276 BlockBegin* ublock() const { return _ublock; }
1277 CodeStub* stub() const { return _stub; }
1279 void change_block(BlockBegin* b);
1280 void change_ublock(BlockBegin* b);
1281 void negate_cond();
1283 virtual void emit_code(LIR_Assembler* masm);
1284 virtual LIR_OpBranch* as_OpBranch() { return this; }
1285 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1286 };
1289 class ConversionStub;
1291 class LIR_OpConvert: public LIR_Op1 {
1292 friend class LIR_OpVisitState;
1294 private:
1295 Bytecodes::Code _bytecode;
1296 ConversionStub* _stub;
1298 public:
1299 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1300 : LIR_Op1(lir_convert, opr, result)
1301 , _stub(stub)
1302 , _bytecode(code) {}
1304 Bytecodes::Code bytecode() const { return _bytecode; }
1305 ConversionStub* stub() const { return _stub; }
1307 virtual void emit_code(LIR_Assembler* masm);
1308 virtual LIR_OpConvert* as_OpConvert() { return this; }
1309 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1311 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1312 };
1315 // LIR_OpAllocObj
1316 class LIR_OpAllocObj : public LIR_Op1 {
1317 friend class LIR_OpVisitState;
1319 private:
1320 LIR_Opr _tmp1;
1321 LIR_Opr _tmp2;
1322 LIR_Opr _tmp3;
1323 LIR_Opr _tmp4;
1324 int _hdr_size;
1325 int _obj_size;
1326 CodeStub* _stub;
1327 bool _init_check;
1329 public:
1330 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1331 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1332 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1333 : LIR_Op1(lir_alloc_object, klass, result)
1334 , _tmp1(t1)
1335 , _tmp2(t2)
1336 , _tmp3(t3)
1337 , _tmp4(t4)
1338 , _hdr_size(hdr_size)
1339 , _obj_size(obj_size)
1340 , _init_check(init_check)
1341 , _stub(stub) { }
1343 LIR_Opr klass() const { return in_opr(); }
1344 LIR_Opr obj() const { return result_opr(); }
1345 LIR_Opr tmp1() const { return _tmp1; }
1346 LIR_Opr tmp2() const { return _tmp2; }
1347 LIR_Opr tmp3() const { return _tmp3; }
1348 LIR_Opr tmp4() const { return _tmp4; }
1349 int header_size() const { return _hdr_size; }
1350 int object_size() const { return _obj_size; }
1351 bool init_check() const { return _init_check; }
1352 CodeStub* stub() const { return _stub; }
1354 virtual void emit_code(LIR_Assembler* masm);
1355 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1356 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1357 };
1360 // LIR_OpRoundFP
1361 class LIR_OpRoundFP : public LIR_Op1 {
1362 friend class LIR_OpVisitState;
1364 private:
1365 LIR_Opr _tmp;
1367 public:
1368 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1369 : LIR_Op1(lir_roundfp, reg, result)
1370 , _tmp(stack_loc_temp) {}
1372 LIR_Opr tmp() const { return _tmp; }
1373 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1374 void print_instr(outputStream* out) const PRODUCT_RETURN;
1375 };
1377 // LIR_OpTypeCheck
1378 class LIR_OpTypeCheck: public LIR_Op {
1379 friend class LIR_OpVisitState;
1381 private:
1382 LIR_Opr _object;
1383 LIR_Opr _array;
1384 ciKlass* _klass;
1385 LIR_Opr _tmp1;
1386 LIR_Opr _tmp2;
1387 LIR_Opr _tmp3;
1388 bool _fast_check;
1389 CodeEmitInfo* _info_for_patch;
1390 CodeEmitInfo* _info_for_exception;
1391 CodeStub* _stub;
1392 // Helpers for Tier1UpdateMethodData
1393 ciMethod* _profiled_method;
1394 int _profiled_bci;
1396 public:
1397 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1398 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1399 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1400 ciMethod* profiled_method, int profiled_bci);
1401 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1402 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception,
1403 ciMethod* profiled_method, int profiled_bci);
1405 LIR_Opr object() const { return _object; }
1406 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1407 LIR_Opr tmp1() const { return _tmp1; }
1408 LIR_Opr tmp2() const { return _tmp2; }
1409 LIR_Opr tmp3() const { return _tmp3; }
1410 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1411 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1412 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1413 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1414 CodeStub* stub() const { return _stub; }
1416 // methodDataOop profiling
1417 ciMethod* profiled_method() { return _profiled_method; }
1418 int profiled_bci() { return _profiled_bci; }
1420 virtual void emit_code(LIR_Assembler* masm);
1421 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1422 void print_instr(outputStream* out) const PRODUCT_RETURN;
1423 };
1425 // LIR_Op2
1426 class LIR_Op2: public LIR_Op {
1427 friend class LIR_OpVisitState;
1429 int _fpu_stack_size; // for sin/cos implementation on Intel
1431 protected:
1432 LIR_Opr _opr1;
1433 LIR_Opr _opr2;
1434 BasicType _type;
1435 LIR_Opr _tmp;
1436 LIR_Condition _condition;
1438 void verify() const;
1440 public:
1441 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1442 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1443 , _opr1(opr1)
1444 , _opr2(opr2)
1445 , _type(T_ILLEGAL)
1446 , _condition(condition)
1447 , _fpu_stack_size(0)
1448 , _tmp(LIR_OprFact::illegalOpr) {
1449 assert(code == lir_cmp, "code check");
1450 }
1452 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result)
1453 : LIR_Op(code, result, NULL)
1454 , _opr1(opr1)
1455 , _opr2(opr2)
1456 , _type(T_ILLEGAL)
1457 , _condition(condition)
1458 , _fpu_stack_size(0)
1459 , _tmp(LIR_OprFact::illegalOpr) {
1460 assert(code == lir_cmove, "code check");
1461 }
1463 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1464 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1465 : LIR_Op(code, result, info)
1466 , _opr1(opr1)
1467 , _opr2(opr2)
1468 , _type(type)
1469 , _condition(lir_cond_unknown)
1470 , _fpu_stack_size(0)
1471 , _tmp(LIR_OprFact::illegalOpr) {
1472 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1473 }
1475 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp)
1476 : LIR_Op(code, result, NULL)
1477 , _opr1(opr1)
1478 , _opr2(opr2)
1479 , _type(T_ILLEGAL)
1480 , _condition(lir_cond_unknown)
1481 , _fpu_stack_size(0)
1482 , _tmp(tmp) {
1483 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1484 }
1486 LIR_Opr in_opr1() const { return _opr1; }
1487 LIR_Opr in_opr2() const { return _opr2; }
1488 BasicType type() const { return _type; }
1489 LIR_Opr tmp_opr() const { return _tmp; }
1490 LIR_Condition condition() const {
1491 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition;
1492 }
1494 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1495 int fpu_stack_size() const { return _fpu_stack_size; }
1497 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1498 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1500 virtual void emit_code(LIR_Assembler* masm);
1501 virtual LIR_Op2* as_Op2() { return this; }
1502 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1503 };
1505 class LIR_OpAllocArray : public LIR_Op {
1506 friend class LIR_OpVisitState;
1508 private:
1509 LIR_Opr _klass;
1510 LIR_Opr _len;
1511 LIR_Opr _tmp1;
1512 LIR_Opr _tmp2;
1513 LIR_Opr _tmp3;
1514 LIR_Opr _tmp4;
1515 BasicType _type;
1516 CodeStub* _stub;
1518 public:
1519 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1520 : LIR_Op(lir_alloc_array, result, NULL)
1521 , _klass(klass)
1522 , _len(len)
1523 , _tmp1(t1)
1524 , _tmp2(t2)
1525 , _tmp3(t3)
1526 , _tmp4(t4)
1527 , _type(type)
1528 , _stub(stub) {}
1530 LIR_Opr klass() const { return _klass; }
1531 LIR_Opr len() const { return _len; }
1532 LIR_Opr obj() const { return result_opr(); }
1533 LIR_Opr tmp1() const { return _tmp1; }
1534 LIR_Opr tmp2() const { return _tmp2; }
1535 LIR_Opr tmp3() const { return _tmp3; }
1536 LIR_Opr tmp4() const { return _tmp4; }
1537 BasicType type() const { return _type; }
1538 CodeStub* stub() const { return _stub; }
1540 virtual void emit_code(LIR_Assembler* masm);
1541 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1542 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1543 };
1546 class LIR_Op3: public LIR_Op {
1547 friend class LIR_OpVisitState;
1549 private:
1550 LIR_Opr _opr1;
1551 LIR_Opr _opr2;
1552 LIR_Opr _opr3;
1553 public:
1554 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1555 : LIR_Op(code, result, info)
1556 , _opr1(opr1)
1557 , _opr2(opr2)
1558 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1559 LIR_Opr in_opr1() const { return _opr1; }
1560 LIR_Opr in_opr2() const { return _opr2; }
1561 LIR_Opr in_opr3() const { return _opr3; }
1563 virtual void emit_code(LIR_Assembler* masm);
1564 virtual LIR_Op3* as_Op3() { return this; }
1565 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1566 };
1569 //--------------------------------
1570 class LabelObj: public CompilationResourceObj {
1571 private:
1572 Label _label;
1573 public:
1574 LabelObj() {}
1575 Label* label() { return &_label; }
1576 };
1579 class LIR_OpLock: public LIR_Op {
1580 friend class LIR_OpVisitState;
1582 private:
1583 LIR_Opr _hdr;
1584 LIR_Opr _obj;
1585 LIR_Opr _lock;
1586 LIR_Opr _scratch;
1587 CodeStub* _stub;
1588 public:
1589 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1590 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1591 , _hdr(hdr)
1592 , _obj(obj)
1593 , _lock(lock)
1594 , _scratch(scratch)
1595 , _stub(stub) {}
1597 LIR_Opr hdr_opr() const { return _hdr; }
1598 LIR_Opr obj_opr() const { return _obj; }
1599 LIR_Opr lock_opr() const { return _lock; }
1600 LIR_Opr scratch_opr() const { return _scratch; }
1601 CodeStub* stub() const { return _stub; }
1603 virtual void emit_code(LIR_Assembler* masm);
1604 virtual LIR_OpLock* as_OpLock() { return this; }
1605 void print_instr(outputStream* out) const PRODUCT_RETURN;
1606 };
1609 class LIR_OpDelay: public LIR_Op {
1610 friend class LIR_OpVisitState;
1612 private:
1613 LIR_Op* _op;
1615 public:
1616 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1617 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1618 _op(op) {
1619 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1620 }
1621 virtual void emit_code(LIR_Assembler* masm);
1622 virtual LIR_OpDelay* as_OpDelay() { return this; }
1623 void print_instr(outputStream* out) const PRODUCT_RETURN;
1624 LIR_Op* delay_op() const { return _op; }
1625 CodeEmitInfo* call_info() const { return info(); }
1626 };
1629 // LIR_OpCompareAndSwap
1630 class LIR_OpCompareAndSwap : public LIR_Op {
1631 friend class LIR_OpVisitState;
1633 private:
1634 LIR_Opr _addr;
1635 LIR_Opr _cmp_value;
1636 LIR_Opr _new_value;
1637 LIR_Opr _tmp1;
1638 LIR_Opr _tmp2;
1640 public:
1641 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2)
1642 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info
1643 , _addr(addr)
1644 , _cmp_value(cmp_value)
1645 , _new_value(new_value)
1646 , _tmp1(t1)
1647 , _tmp2(t2) { }
1649 LIR_Opr addr() const { return _addr; }
1650 LIR_Opr cmp_value() const { return _cmp_value; }
1651 LIR_Opr new_value() const { return _new_value; }
1652 LIR_Opr tmp1() const { return _tmp1; }
1653 LIR_Opr tmp2() const { return _tmp2; }
1655 virtual void emit_code(LIR_Assembler* masm);
1656 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1657 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1658 };
1660 // LIR_OpProfileCall
1661 class LIR_OpProfileCall : public LIR_Op {
1662 friend class LIR_OpVisitState;
1664 private:
1665 ciMethod* _profiled_method;
1666 int _profiled_bci;
1667 LIR_Opr _mdo;
1668 LIR_Opr _recv;
1669 LIR_Opr _tmp1;
1670 ciKlass* _known_holder;
1672 public:
1673 // Destroys recv
1674 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1675 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info
1676 , _profiled_method(profiled_method)
1677 , _profiled_bci(profiled_bci)
1678 , _mdo(mdo)
1679 , _recv(recv)
1680 , _tmp1(t1)
1681 , _known_holder(known_holder) { }
1683 ciMethod* profiled_method() const { return _profiled_method; }
1684 int profiled_bci() const { return _profiled_bci; }
1685 LIR_Opr mdo() const { return _mdo; }
1686 LIR_Opr recv() const { return _recv; }
1687 LIR_Opr tmp1() const { return _tmp1; }
1688 ciKlass* known_holder() const { return _known_holder; }
1690 virtual void emit_code(LIR_Assembler* masm);
1691 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1692 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1693 };
1696 class LIR_InsertionBuffer;
1698 //--------------------------------LIR_List---------------------------------------------------
1699 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1700 // The LIR instructions are appended by the LIR_List class itself;
1701 //
1702 // Notes:
1703 // - all offsets are(should be) in bytes
1704 // - local positions are specified with an offset, with offset 0 being local 0
1706 class LIR_List: public CompilationResourceObj {
1707 private:
1708 LIR_OpList _operations;
1710 Compilation* _compilation;
1711 #ifndef PRODUCT
1712 BlockBegin* _block;
1713 #endif
1714 #ifdef ASSERT
1715 const char * _file;
1716 int _line;
1717 #endif
1719 void append(LIR_Op* op) {
1720 if (op->source() == NULL)
1721 op->set_source(_compilation->current_instruction());
1722 #ifndef PRODUCT
1723 if (PrintIRWithLIR) {
1724 _compilation->maybe_print_current_instruction();
1725 op->print(); tty->cr();
1726 }
1727 #endif // PRODUCT
1729 _operations.append(op);
1731 #ifdef ASSERT
1732 op->verify();
1733 op->set_file_and_line(_file, _line);
1734 _file = NULL;
1735 _line = 0;
1736 #endif
1737 }
1739 public:
1740 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
1742 #ifdef ASSERT
1743 void set_file_and_line(const char * file, int line);
1744 #endif
1746 //---------- accessors ---------------
1747 LIR_OpList* instructions_list() { return &_operations; }
1748 int length() const { return _operations.length(); }
1749 LIR_Op* at(int i) const { return _operations.at(i); }
1751 NOT_PRODUCT(BlockBegin* block() const { return _block; });
1753 // insert LIR_Ops in buffer to right places in LIR_List
1754 void append(LIR_InsertionBuffer* buffer);
1756 //---------- mutators ---------------
1757 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
1758 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
1760 //---------- printing -------------
1761 void print_instructions() PRODUCT_RETURN;
1764 //---------- instructions -------------
1765 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1766 address dest, LIR_OprList* arguments,
1767 CodeEmitInfo* info) {
1768 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
1769 }
1770 void call_static(ciMethod* method, LIR_Opr result,
1771 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1772 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
1773 }
1774 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1775 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1776 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
1777 }
1778 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1779 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
1780 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
1781 }
1782 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1783 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1784 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
1785 }
1787 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
1788 void word_align() { append(new LIR_Op0(lir_word_align)); }
1789 void membar() { append(new LIR_Op0(lir_membar)); }
1790 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
1791 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
1793 void nop() { append(new LIR_Op0(lir_nop)); }
1794 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
1796 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
1797 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
1799 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
1801 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
1802 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
1804 // result is a stack location for old backend and vreg for UseLinearScan
1805 // stack_loc_temp is an illegal register for old backend
1806 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
1807 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1808 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1809 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1810 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
1811 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
1812 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
1814 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
1816 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
1817 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
1819 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
1821 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
1823 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
1825 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
1826 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
1827 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
1829 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); }
1830 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
1831 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
1832 }
1833 void unwind_exception(LIR_Opr exceptionOop) {
1834 append(new LIR_Op1(lir_unwind, exceptionOop));
1835 }
1837 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
1838 append(new LIR_Op2(lir_compare_to, left, right, dst));
1839 }
1841 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
1842 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
1844 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
1845 append(new LIR_Op2(lir_cmp, condition, left, right, info));
1846 }
1847 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
1848 cmp(condition, left, LIR_OprFact::intConst(right), info);
1849 }
1851 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
1852 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
1854 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst) {
1855 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst));
1856 }
1858 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1859 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1860 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2);
1862 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
1863 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
1864 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
1865 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
1866 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
1867 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
1868 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
1870 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
1871 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
1872 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
1873 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
1874 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
1875 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
1876 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
1878 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1879 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
1881 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
1883 void prefetch(LIR_Address* addr, bool is_store);
1885 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1886 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1887 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
1888 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
1889 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
1891 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1892 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1893 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1894 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
1896 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
1897 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
1899 // jump is an unconditional branch
1900 void jump(BlockBegin* block) {
1901 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
1902 }
1903 void jump(CodeStub* stub) {
1904 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
1905 }
1906 void branch(LIR_Condition cond, Label* lbl) { append(new LIR_OpBranch(cond, lbl)); }
1907 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
1908 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
1909 append(new LIR_OpBranch(cond, type, block));
1910 }
1911 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
1912 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
1913 append(new LIR_OpBranch(cond, type, stub));
1914 }
1915 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
1916 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
1917 append(new LIR_OpBranch(cond, type, block, unordered));
1918 }
1920 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1921 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1922 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
1924 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1925 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1926 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
1928 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
1929 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
1931 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
1932 append(new LIR_OpRTCall(routine, tmp, result, arguments));
1933 }
1935 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
1936 LIR_OprList* arguments, CodeEmitInfo* info) {
1937 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
1938 }
1940 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
1941 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub);
1942 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
1944 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
1945 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
1946 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
1948 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
1950 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
1952 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1953 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1954 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1955 ciMethod* profiled_method, int profiled_bci);
1956 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch);
1957 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1959 // methodDataOop profiling
1960 void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass)); }
1961 };
1963 void print_LIR(BlockList* blocks);
1965 class LIR_InsertionBuffer : public CompilationResourceObj {
1966 private:
1967 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
1969 // list of insertion points. index and count are stored alternately:
1970 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
1971 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
1972 intStack _index_and_count;
1974 // the LIR_Ops to be inserted
1975 LIR_OpList _ops;
1977 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
1978 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
1979 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
1981 #ifdef ASSERT
1982 void verify();
1983 #endif
1984 public:
1985 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
1987 // must be called before using the insertion buffer
1988 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
1989 bool initialized() const { return _lir != NULL; }
1990 // called automatically when the buffer is appended to the LIR_List
1991 void finish() { _lir = NULL; }
1993 // accessors
1994 LIR_List* lir_list() const { return _lir; }
1995 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
1996 int index_at(int i) const { return _index_and_count.at((i << 1)); }
1997 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
1999 int number_of_ops() const { return _ops.length(); }
2000 LIR_Op* op_at(int i) const { return _ops.at(i); }
2002 // append an instruction to the buffer
2003 void append(int index, LIR_Op* op);
2005 // instruction
2006 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2007 };
2010 //
2011 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2012 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2013 // information about the input, output and temporaries used by the
2014 // op to be recorded. It also records whether the op has call semantics
2015 // and also records all the CodeEmitInfos used by this op.
2016 //
2019 class LIR_OpVisitState: public StackObj {
2020 public:
2021 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2023 enum {
2024 maxNumberOfOperands = 16,
2025 maxNumberOfInfos = 4
2026 };
2028 private:
2029 LIR_Op* _op;
2031 // optimization: the operands and infos are not stored in a variable-length
2032 // list, but in a fixed-size array to save time of size checks and resizing
2033 int _oprs_len[numModes];
2034 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2035 int _info_len;
2036 CodeEmitInfo* _info_new[maxNumberOfInfos];
2038 bool _has_call;
2039 bool _has_slow_case;
2042 // only include register operands
2043 // addresses are decomposed to the base and index registers
2044 // constants and stack operands are ignored
2045 void append(LIR_Opr& opr, OprMode mode) {
2046 assert(opr->is_valid(), "should not call this otherwise");
2047 assert(mode >= 0 && mode < numModes, "bad mode");
2049 if (opr->is_register()) {
2050 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2051 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2053 } else if (opr->is_pointer()) {
2054 LIR_Address* address = opr->as_address_ptr();
2055 if (address != NULL) {
2056 // special handling for addresses: add base and index register of the address
2057 // both are always input operands!
2058 if (address->_base->is_valid()) {
2059 assert(address->_base->is_register(), "must be");
2060 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2061 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base;
2062 }
2063 if (address->_index->is_valid()) {
2064 assert(address->_index->is_register(), "must be");
2065 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2066 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index;
2067 }
2069 } else {
2070 assert(opr->is_constant(), "constant operands are not processed");
2071 }
2072 } else {
2073 assert(opr->is_stack(), "stack operands are not processed");
2074 }
2075 }
2077 void append(CodeEmitInfo* info) {
2078 assert(info != NULL, "should not call this otherwise");
2079 assert(_info_len < maxNumberOfInfos, "array overflow");
2080 _info_new[_info_len++] = info;
2081 }
2083 public:
2084 LIR_OpVisitState() { reset(); }
2086 LIR_Op* op() const { return _op; }
2087 void set_op(LIR_Op* op) { reset(); _op = op; }
2089 bool has_call() const { return _has_call; }
2090 bool has_slow_case() const { return _has_slow_case; }
2092 void reset() {
2093 _op = NULL;
2094 _has_call = false;
2095 _has_slow_case = false;
2097 _oprs_len[inputMode] = 0;
2098 _oprs_len[tempMode] = 0;
2099 _oprs_len[outputMode] = 0;
2100 _info_len = 0;
2101 }
2104 int opr_count(OprMode mode) const {
2105 assert(mode >= 0 && mode < numModes, "bad mode");
2106 return _oprs_len[mode];
2107 }
2109 LIR_Opr opr_at(OprMode mode, int index) const {
2110 assert(mode >= 0 && mode < numModes, "bad mode");
2111 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2112 return *_oprs_new[mode][index];
2113 }
2115 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2116 assert(mode >= 0 && mode < numModes, "bad mode");
2117 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2118 *_oprs_new[mode][index] = opr;
2119 }
2121 int info_count() const {
2122 return _info_len;
2123 }
2125 CodeEmitInfo* info_at(int index) const {
2126 assert(index < _info_len, "index out of bounds");
2127 return _info_new[index];
2128 }
2130 XHandlers* all_xhandler();
2132 // collects all register operands of the instruction
2133 void visit(LIR_Op* op);
2135 #if ASSERT
2136 // check that an operation has no operands
2137 bool no_operands(LIR_Op* op);
2138 #endif
2140 // LIR_Op visitor functions use these to fill in the state
2141 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2142 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2143 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2144 void do_info(CodeEmitInfo* info) { append(info); }
2146 void do_stub(CodeStub* stub);
2147 void do_call() { _has_call = true; }
2148 void do_slow_case() { _has_slow_case = true; }
2149 void do_slow_case(CodeEmitInfo* info) {
2150 _has_slow_case = true;
2151 append(info);
2152 }
2153 };
2156 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };