jdk8-mips64-public/hotspot: src/cpu/mips/vm/vmreg

     1 /*

     2  * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved.

     3  * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.

     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     5  *

     6  * This code is free software; you can redistribute it and/or modify it

     7  * under the terms of the GNU General Public License version 2 only, as

     8  * published by the Free Software Foundation.

     9  *

    10  * This code is distributed in the hope that it will be useful, but WITHOUT

    11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    13  * version 2 for more details (a copy is included in the LICENSE file that

    14  * accompanied this code).

    15  *

    16  * You should have received a copy of the GNU General Public License version

    17  * 2 along with this work; if not, write to the Free Software Foundation,

    18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    19  *

    20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

    21  * or visit www.oracle.com if you need additional information or have any

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    24  */

    26 #ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP

    27 #define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP

    29 inline VMReg RegisterImpl::as_VMReg() {

    30   if( this==noreg ) return VMRegImpl::Bad();

    31 #ifdef _LP64

    32   //FIXME why encoding << 1? what is the meaning of the VMReg's value

    33   return VMRegImpl::as_VMReg(encoding() << 1 );

    34 #else

    35   return VMRegImpl::as_VMReg(encoding() );

    36 #endif // _LP64

    37 }

    39 inline VMReg FloatRegisterImpl::as_VMReg() {

    40 #ifdef _LP64

    41   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);

    42 #else

    43   return VMRegImpl::as_VMReg((encoding()) + ConcreteRegisterImpl::max_gpr);

    44 #endif // _LP64

    45 }

    47 inline bool VMRegImpl::is_Register() {

    48   return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;

    49 }

    51 inline bool VMRegImpl::is_FloatRegister() {

    52   return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;

    53 }

    55 inline Register VMRegImpl::as_Register() {

    57   assert( is_Register(), "must be");

    58   // Yuk

    59 #ifdef _LP64

    60   return ::as_Register(value() >> 1);

    61 #else

    62   return ::as_Register(value());

    63 #endif // _LP64

    64 }

    66 inline FloatRegister VMRegImpl::as_FloatRegister() {

    67   assert( is_FloatRegister(), "must be" );

    68   // Yuk

    69 #ifdef _LP64

    70   assert( is_even(value()), "must be" );

    71   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);

    72 #else

    73   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr));

    74 #endif // _LP64

    75 }

    77 inline   bool VMRegImpl::is_concrete() {

    78   assert(is_reg(), "must be");

    79   if(is_Register()) return true;

    80   if(is_FloatRegister()) return true;

    81   assert(false, "what register?");

    82   return false;

    83 }

    85 #endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP

src/cpu/mips/vm/vmreg_mips.inline.hpp@d885f8d65c58