src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp

Fri, 03 Sep 2010 17:51:07 -0700

author
iveresov
date
Fri, 03 Sep 2010 17:51:07 -0700
changeset 2138
d5d065957597
parent 2036
126ea7725993
child 2146
3a294e483abc
permissions
-rw-r--r--

6953144: Tiered compilation
Summary: Infrastructure for tiered compilation support (interpreter + c1 + c2) for 32 and 64 bit. Simple tiered policy implementation.
Reviewed-by: kvn, never, phh, twisti

     1 /*
     2  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     8  *
     9  * This code is distributed in the hope that it will be useful, but WITHOUT
    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    12  * version 2 for more details (a copy is included in the LICENSE file that
    13  * accompanied this code).
    14  *
    15  * You should have received a copy of the GNU General Public License version
    16  * 2 along with this work; if not, write to the Free Software Foundation,
    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    18  *
    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    20  * or visit www.oracle.com if you need additional information or have any
    21  * questions.
    22  *
    23  */
    25 # include "incls/_precompiled.incl"
    26 # include "incls/_c1_LIRGenerator_sparc.cpp.incl"
    28 #ifdef ASSERT
    29 #define __ gen()->lir(__FILE__, __LINE__)->
    30 #else
    31 #define __ gen()->lir()->
    32 #endif
    34 void LIRItem::load_byte_item() {
    35   // byte loads use same registers as other loads
    36   load_item();
    37 }
    40 void LIRItem::load_nonconstant() {
    41   LIR_Opr r = value()->operand();
    42   if (_gen->can_inline_as_constant(value())) {
    43     if (!r->is_constant()) {
    44       r = LIR_OprFact::value_type(value()->type());
    45     }
    46     _result = r;
    47   } else {
    48     load_item();
    49   }
    50 }
    53 //--------------------------------------------------------------
    54 //               LIRGenerator
    55 //--------------------------------------------------------------
    57 LIR_Opr LIRGenerator::exceptionOopOpr()              { return FrameMap::Oexception_opr;  }
    58 LIR_Opr LIRGenerator::exceptionPcOpr()               { return FrameMap::Oissuing_pc_opr; }
    59 LIR_Opr LIRGenerator::syncTempOpr()                  { return new_register(T_OBJECT); }
    60 LIR_Opr LIRGenerator::getThreadTemp()                { return rlock_callee_saved(T_INT); }
    62 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
    63   LIR_Opr opr;
    64   switch (type->tag()) {
    65   case intTag:     opr = callee ? FrameMap::I0_opr      : FrameMap::O0_opr;       break;
    66   case objectTag:  opr = callee ? FrameMap::I0_oop_opr  : FrameMap::O0_oop_opr;   break;
    67   case longTag:    opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break;
    68   case floatTag:   opr = FrameMap::F0_opr;                                        break;
    69   case doubleTag:  opr = FrameMap::F0_double_opr;                                 break;
    71   case addressTag:
    72   default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
    73   }
    75   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
    76   return opr;
    77 }
    79 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
    80   LIR_Opr reg = new_register(type);
    81   set_vreg_flag(reg, callee_saved);
    82   return reg;
    83 }
    86 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
    87   return new_register(T_INT);
    88 }
    94 //--------- loading items into registers --------------------------------
    96 // SPARC cannot inline all constants
    97 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
    98   if (v->type()->as_IntConstant() != NULL) {
    99     return v->type()->as_IntConstant()->value() == 0;
   100   } else if (v->type()->as_LongConstant() != NULL) {
   101     return v->type()->as_LongConstant()->value() == 0L;
   102   } else if (v->type()->as_ObjectConstant() != NULL) {
   103     return v->type()->as_ObjectConstant()->value()->is_null_object();
   104   } else {
   105     return false;
   106   }
   107 }
   110 // only simm13 constants can be inlined
   111 bool LIRGenerator:: can_inline_as_constant(Value i) const {
   112   if (i->type()->as_IntConstant() != NULL) {
   113     return Assembler::is_simm13(i->type()->as_IntConstant()->value());
   114   } else {
   115     return can_store_as_constant(i, as_BasicType(i->type()));
   116   }
   117 }
   120 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const {
   121   if (c->type() == T_INT) {
   122     return Assembler::is_simm13(c->as_jint());
   123   }
   124   return false;
   125 }
   128 LIR_Opr LIRGenerator::safepoint_poll_register() {
   129   return new_register(T_INT);
   130 }
   134 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
   135                                             int shift, int disp, BasicType type) {
   136   assert(base->is_register(), "must be");
   138   // accumulate fixed displacements
   139   if (index->is_constant()) {
   140     disp += index->as_constant_ptr()->as_jint() << shift;
   141     index = LIR_OprFact::illegalOpr;
   142   }
   144   if (index->is_register()) {
   145     // apply the shift and accumulate the displacement
   146     if (shift > 0) {
   147       LIR_Opr tmp = new_pointer_register();
   148       __ shift_left(index, shift, tmp);
   149       index = tmp;
   150     }
   151     if (disp != 0) {
   152       LIR_Opr tmp = new_pointer_register();
   153       if (Assembler::is_simm13(disp)) {
   154         __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
   155         index = tmp;
   156       } else {
   157         __ move(LIR_OprFact::intptrConst(disp), tmp);
   158         __ add(tmp, index, tmp);
   159         index = tmp;
   160       }
   161       disp = 0;
   162     }
   163   } else if (disp != 0 && !Assembler::is_simm13(disp)) {
   164     // index is illegal so replace it with the displacement loaded into a register
   165     index = new_pointer_register();
   166     __ move(LIR_OprFact::intptrConst(disp), index);
   167     disp = 0;
   168   }
   170   // at this point we either have base + index or base + displacement
   171   if (disp == 0) {
   172     return new LIR_Address(base, index, type);
   173   } else {
   174     assert(Assembler::is_simm13(disp), "must be");
   175     return new LIR_Address(base, disp, type);
   176   }
   177 }
   180 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
   181                                               BasicType type, bool needs_card_mark) {
   182   int elem_size = type2aelembytes(type);
   183   int shift = exact_log2(elem_size);
   185   LIR_Opr base_opr;
   186   int offset = arrayOopDesc::base_offset_in_bytes(type);
   188   if (index_opr->is_constant()) {
   189     int i = index_opr->as_constant_ptr()->as_jint();
   190     int array_offset = i * elem_size;
   191     if (Assembler::is_simm13(array_offset + offset)) {
   192       base_opr = array_opr;
   193       offset = array_offset + offset;
   194     } else {
   195       base_opr = new_pointer_register();
   196       if (Assembler::is_simm13(array_offset)) {
   197         __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
   198       } else {
   199         __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
   200         __ add(base_opr, array_opr, base_opr);
   201       }
   202     }
   203   } else {
   204 #ifdef _LP64
   205     if (index_opr->type() == T_INT) {
   206       LIR_Opr tmp = new_register(T_LONG);
   207       __ convert(Bytecodes::_i2l, index_opr, tmp);
   208       index_opr = tmp;
   209     }
   210 #endif
   212     base_opr = new_pointer_register();
   213     assert (index_opr->is_register(), "Must be register");
   214     if (shift > 0) {
   215       __ shift_left(index_opr, shift, base_opr);
   216       __ add(base_opr, array_opr, base_opr);
   217     } else {
   218       __ add(index_opr, array_opr, base_opr);
   219     }
   220   }
   221   if (needs_card_mark) {
   222     LIR_Opr ptr = new_pointer_register();
   223     __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
   224     return new LIR_Address(ptr, type);
   225   } else {
   226     return new LIR_Address(base_opr, offset, type);
   227   }
   228 }
   230 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
   231   LIR_Opr r;
   232   if (type == T_LONG) {
   233     r = LIR_OprFact::longConst(x);
   234   } else if (type == T_INT) {
   235     r = LIR_OprFact::intConst(x);
   236   } else {
   237     ShouldNotReachHere();
   238   }
   239   if (!Assembler::is_simm13(x)) {
   240     LIR_Opr tmp = new_register(type);
   241     __ move(r, tmp);
   242     return tmp;
   243   }
   244   return r;
   245 }
   247 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
   248   LIR_Opr pointer = new_pointer_register();
   249   __ move(LIR_OprFact::intptrConst(counter), pointer);
   250   LIR_Address* addr = new LIR_Address(pointer, type);
   251   increment_counter(addr, step);
   252 }
   254 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
   255   LIR_Opr temp = new_register(addr->type());
   256   __ move(addr, temp);
   257   __ add(temp, load_immediate(step, addr->type()), temp);
   258   __ move(temp, addr);
   259 }
   261 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
   262   LIR_Opr o7opr = FrameMap::O7_opr;
   263   __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
   264   __ cmp(condition, o7opr, c);
   265 }
   268 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
   269   LIR_Opr o7opr = FrameMap::O7_opr;
   270   __ load(new LIR_Address(base, disp, type), o7opr, info);
   271   __ cmp(condition, reg, o7opr);
   272 }
   275 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
   276   LIR_Opr o7opr = FrameMap::O7_opr;
   277   __ load(new LIR_Address(base, disp, type), o7opr, info);
   278   __ cmp(condition, reg, o7opr);
   279 }
   282 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
   283   assert(left != result, "should be different registers");
   284   if (is_power_of_2(c + 1)) {
   285     __ shift_left(left, log2_intptr(c + 1), result);
   286     __ sub(result, left, result);
   287     return true;
   288   } else if (is_power_of_2(c - 1)) {
   289     __ shift_left(left, log2_intptr(c - 1), result);
   290     __ add(result, left, result);
   291     return true;
   292   }
   293   return false;
   294 }
   297 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
   298   BasicType t = item->type();
   299   LIR_Opr sp_opr = FrameMap::SP_opr;
   300   if ((t == T_LONG || t == T_DOUBLE) &&
   301       ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
   302     __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
   303   } else {
   304     __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
   305   }
   306 }
   308 //----------------------------------------------------------------------
   309 //             visitor functions
   310 //----------------------------------------------------------------------
   313 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
   314   assert(x->is_root(),"");
   315   bool needs_range_check = true;
   316   bool use_length = x->length() != NULL;
   317   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
   318   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
   319                                          !get_jobject_constant(x->value())->is_null_object());
   321   LIRItem array(x->array(), this);
   322   LIRItem index(x->index(), this);
   323   LIRItem value(x->value(), this);
   324   LIRItem length(this);
   326   array.load_item();
   327   index.load_nonconstant();
   329   if (use_length) {
   330     needs_range_check = x->compute_needs_range_check();
   331     if (needs_range_check) {
   332       length.set_instruction(x->length());
   333       length.load_item();
   334     }
   335   }
   336   if (needs_store_check) {
   337     value.load_item();
   338   } else {
   339     value.load_for_store(x->elt_type());
   340   }
   342   set_no_result(x);
   344   // the CodeEmitInfo must be duplicated for each different
   345   // LIR-instruction because spilling can occur anywhere between two
   346   // instructions and so the debug information must be different
   347   CodeEmitInfo* range_check_info = state_for(x);
   348   CodeEmitInfo* null_check_info = NULL;
   349   if (x->needs_null_check()) {
   350     null_check_info = new CodeEmitInfo(range_check_info);
   351   }
   353   // emit array address setup early so it schedules better
   354   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
   356   if (GenerateRangeChecks && needs_range_check) {
   357     if (use_length) {
   358       __ cmp(lir_cond_belowEqual, length.result(), index.result());
   359       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
   360     } else {
   361       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
   362       // range_check also does the null check
   363       null_check_info = NULL;
   364     }
   365   }
   367   if (GenerateArrayStoreCheck && needs_store_check) {
   368     LIR_Opr tmp1 = FrameMap::G1_opr;
   369     LIR_Opr tmp2 = FrameMap::G3_opr;
   370     LIR_Opr tmp3 = FrameMap::G5_opr;
   372     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
   373     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
   374   }
   376   if (obj_store) {
   377     // Needs GC write barriers.
   378     pre_barrier(LIR_OprFact::address(array_addr), false, NULL);
   379   }
   380   __ move(value.result(), array_addr, null_check_info);
   381   if (obj_store) {
   382     // Precise card mark
   383     post_barrier(LIR_OprFact::address(array_addr), value.result());
   384   }
   385 }
   388 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
   389   assert(x->is_root(),"");
   390   LIRItem obj(x->obj(), this);
   391   obj.load_item();
   393   set_no_result(x);
   395   LIR_Opr lock    = FrameMap::G1_opr;
   396   LIR_Opr scratch = FrameMap::G3_opr;
   397   LIR_Opr hdr     = FrameMap::G4_opr;
   399   CodeEmitInfo* info_for_exception = NULL;
   400   if (x->needs_null_check()) {
   401     info_for_exception = state_for(x, x->lock_stack_before());
   402   }
   404   // this CodeEmitInfo must not have the xhandlers because here the
   405   // object is already locked (xhandlers expects object to be unlocked)
   406   CodeEmitInfo* info = state_for(x, x->state(), true);
   407   monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
   408 }
   411 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
   412   assert(x->is_root(),"");
   413   LIRItem obj(x->obj(), this);
   414   obj.dont_load_item();
   416   set_no_result(x);
   417   LIR_Opr lock      = FrameMap::G1_opr;
   418   LIR_Opr hdr       = FrameMap::G3_opr;
   419   LIR_Opr obj_temp  = FrameMap::G4_opr;
   420   monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
   421 }
   424 // _ineg, _lneg, _fneg, _dneg
   425 void LIRGenerator::do_NegateOp(NegateOp* x) {
   426   LIRItem value(x->x(), this);
   427   value.load_item();
   428   LIR_Opr reg = rlock_result(x);
   429   __ negate(value.result(), reg);
   430 }
   434 // for  _fadd, _fmul, _fsub, _fdiv, _frem
   435 //      _dadd, _dmul, _dsub, _ddiv, _drem
   436 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
   437   switch (x->op()) {
   438   case Bytecodes::_fadd:
   439   case Bytecodes::_fmul:
   440   case Bytecodes::_fsub:
   441   case Bytecodes::_fdiv:
   442   case Bytecodes::_dadd:
   443   case Bytecodes::_dmul:
   444   case Bytecodes::_dsub:
   445   case Bytecodes::_ddiv: {
   446     LIRItem left(x->x(), this);
   447     LIRItem right(x->y(), this);
   448     left.load_item();
   449     right.load_item();
   450     rlock_result(x);
   451     arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
   452   }
   453   break;
   455   case Bytecodes::_frem:
   456   case Bytecodes::_drem: {
   457     address entry;
   458     switch (x->op()) {
   459     case Bytecodes::_frem:
   460       entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
   461       break;
   462     case Bytecodes::_drem:
   463       entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
   464       break;
   465     default:
   466       ShouldNotReachHere();
   467     }
   468     LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
   469     set_result(x, result);
   470   }
   471   break;
   473   default: ShouldNotReachHere();
   474   }
   475 }
   478 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
   479 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
   480   switch (x->op()) {
   481   case Bytecodes::_lrem:
   482   case Bytecodes::_lmul:
   483   case Bytecodes::_ldiv: {
   485     if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
   486       LIRItem right(x->y(), this);
   487       right.load_item();
   489       CodeEmitInfo* info = state_for(x);
   490       LIR_Opr item = right.result();
   491       assert(item->is_register(), "must be");
   492       __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0));
   493       __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
   494     }
   496     address entry;
   497     switch (x->op()) {
   498     case Bytecodes::_lrem:
   499       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
   500       break; // check if dividend is 0 is done elsewhere
   501     case Bytecodes::_ldiv:
   502       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
   503       break; // check if dividend is 0 is done elsewhere
   504     case Bytecodes::_lmul:
   505       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
   506       break;
   507     default:
   508       ShouldNotReachHere();
   509     }
   511     // order of arguments to runtime call is reversed.
   512     LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
   513     set_result(x, result);
   514     break;
   515   }
   516   case Bytecodes::_ladd:
   517   case Bytecodes::_lsub: {
   518     LIRItem left(x->x(), this);
   519     LIRItem right(x->y(), this);
   520     left.load_item();
   521     right.load_item();
   522     rlock_result(x);
   524     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
   525     break;
   526   }
   527   default: ShouldNotReachHere();
   528   }
   529 }
   532 // Returns if item is an int constant that can be represented by a simm13
   533 static bool is_simm13(LIR_Opr item) {
   534   if (item->is_constant() && item->type() == T_INT) {
   535     return Assembler::is_simm13(item->as_constant_ptr()->as_jint());
   536   } else {
   537     return false;
   538   }
   539 }
   542 // for: _iadd, _imul, _isub, _idiv, _irem
   543 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
   544   bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
   545   LIRItem left(x->x(), this);
   546   LIRItem right(x->y(), this);
   547   // missing test if instr is commutative and if we should swap
   548   right.load_nonconstant();
   549   assert(right.is_constant() || right.is_register(), "wrong state of right");
   550   left.load_item();
   551   rlock_result(x);
   552   if (is_div_rem) {
   553     CodeEmitInfo* info = state_for(x);
   554     LIR_Opr tmp = FrameMap::G1_opr;
   555     if (x->op() == Bytecodes::_irem) {
   556       __ irem(left.result(), right.result(), x->operand(), tmp, info);
   557     } else if (x->op() == Bytecodes::_idiv) {
   558       __ idiv(left.result(), right.result(), x->operand(), tmp, info);
   559     }
   560   } else {
   561     arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr);
   562   }
   563 }
   566 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
   567   ValueTag tag = x->type()->tag();
   568   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
   569   switch (tag) {
   570     case floatTag:
   571     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
   572     case longTag:    do_ArithmeticOp_Long(x); return;
   573     case intTag:     do_ArithmeticOp_Int(x);  return;
   574   }
   575   ShouldNotReachHere();
   576 }
   579 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
   580 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
   581   LIRItem value(x->x(), this);
   582   LIRItem count(x->y(), this);
   583   // Long shift destroys count register
   584   if (value.type()->is_long()) {
   585     count.set_destroys_register();
   586   }
   587   value.load_item();
   588   // the old backend doesn't support this
   589   if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) {
   590     jint c = count.get_jint_constant() & 0x1f;
   591     assert(c >= 0 && c < 32, "should be small");
   592     count.dont_load_item();
   593   } else {
   594     count.load_item();
   595   }
   596   LIR_Opr reg = rlock_result(x);
   597   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
   598 }
   601 // _iand, _land, _ior, _lor, _ixor, _lxor
   602 void LIRGenerator::do_LogicOp(LogicOp* x) {
   603   LIRItem left(x->x(), this);
   604   LIRItem right(x->y(), this);
   606   left.load_item();
   607   right.load_nonconstant();
   608   LIR_Opr reg = rlock_result(x);
   610   logic_op(x->op(), reg, left.result(), right.result());
   611 }
   615 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
   616 void LIRGenerator::do_CompareOp(CompareOp* x) {
   617   LIRItem left(x->x(), this);
   618   LIRItem right(x->y(), this);
   619   left.load_item();
   620   right.load_item();
   621   LIR_Opr reg = rlock_result(x);
   622   if (x->x()->type()->is_float_kind()) {
   623     Bytecodes::Code code = x->op();
   624     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
   625   } else if (x->x()->type()->tag() == longTag) {
   626     __ lcmp2int(left.result(), right.result(), reg);
   627   } else {
   628     Unimplemented();
   629   }
   630 }
   633 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
   634   assert(x->number_of_arguments() == 3, "wrong type");
   635   LIRItem obj       (x->argument_at(0), this);  // AtomicLong object
   636   LIRItem cmp_value (x->argument_at(1), this);  // value to compare with field
   637   LIRItem new_value (x->argument_at(2), this);  // replace field with new_value if it matches cmp_value
   639   obj.load_item();
   640   cmp_value.load_item();
   641   new_value.load_item();
   643   // generate compare-and-swap and produce zero condition if swap occurs
   644   int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
   645   LIR_Opr addr = FrameMap::O7_opr;
   646   __ add(obj.result(), LIR_OprFact::intConst(value_offset), addr);
   647   LIR_Opr t1 = FrameMap::G1_opr;  // temp for 64-bit value
   648   LIR_Opr t2 = FrameMap::G3_opr;  // temp for 64-bit value
   649   __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
   651   // generate conditional move of boolean result
   652   LIR_Opr result = rlock_result(x);
   653   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
   654 }
   657 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
   658   assert(x->number_of_arguments() == 4, "wrong type");
   659   LIRItem obj   (x->argument_at(0), this);  // object
   660   LIRItem offset(x->argument_at(1), this);  // offset of field
   661   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
   662   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
   664   // Use temps to avoid kills
   665   LIR_Opr t1 = FrameMap::G1_opr;
   666   LIR_Opr t2 = FrameMap::G3_opr;
   667   LIR_Opr addr = new_pointer_register();
   669   // get address of field
   670   obj.load_item();
   671   offset.load_item();
   672   cmp.load_item();
   673   val.load_item();
   675   __ add(obj.result(), offset.result(), addr);
   677   if (type == objectType) {  // Write-barrier needed for Object fields.
   678     pre_barrier(addr, false, NULL);
   679   }
   681   if (type == objectType)
   682     __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
   683   else if (type == intType)
   684     __ cas_int(addr, cmp.result(), val.result(), t1, t2);
   685   else if (type == longType)
   686     __ cas_long(addr, cmp.result(), val.result(), t1, t2);
   687   else {
   688     ShouldNotReachHere();
   689   }
   691   // generate conditional move of boolean result
   692   LIR_Opr result = rlock_result(x);
   693   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
   694   if (type == objectType) {  // Write-barrier needed for Object fields.
   695     // Precise card mark since could either be object or array
   696     post_barrier(addr, val.result());
   697   }
   698 }
   701 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
   702   switch (x->id()) {
   703     case vmIntrinsics::_dabs:
   704     case vmIntrinsics::_dsqrt: {
   705       assert(x->number_of_arguments() == 1, "wrong type");
   706       LIRItem value(x->argument_at(0), this);
   707       value.load_item();
   708       LIR_Opr dst = rlock_result(x);
   710       switch (x->id()) {
   711       case vmIntrinsics::_dsqrt: {
   712         __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
   713         break;
   714       }
   715       case vmIntrinsics::_dabs: {
   716         __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
   717         break;
   718       }
   719       }
   720       break;
   721     }
   722     case vmIntrinsics::_dlog10: // fall through
   723     case vmIntrinsics::_dlog: // fall through
   724     case vmIntrinsics::_dsin: // fall through
   725     case vmIntrinsics::_dtan: // fall through
   726     case vmIntrinsics::_dcos: {
   727       assert(x->number_of_arguments() == 1, "wrong type");
   729       address runtime_entry = NULL;
   730       switch (x->id()) {
   731       case vmIntrinsics::_dsin:
   732         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
   733         break;
   734       case vmIntrinsics::_dcos:
   735         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
   736         break;
   737       case vmIntrinsics::_dtan:
   738         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
   739         break;
   740       case vmIntrinsics::_dlog:
   741         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
   742         break;
   743       case vmIntrinsics::_dlog10:
   744         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
   745         break;
   746       default:
   747         ShouldNotReachHere();
   748       }
   750       LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
   751       set_result(x, result);
   752     }
   753   }
   754 }
   757 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
   758   assert(x->number_of_arguments() == 5, "wrong type");
   760   // Make all state_for calls early since they can emit code
   761   CodeEmitInfo* info = state_for(x, x->state());
   763   // Note: spill caller save before setting the item
   764   LIRItem src     (x->argument_at(0), this);
   765   LIRItem src_pos (x->argument_at(1), this);
   766   LIRItem dst     (x->argument_at(2), this);
   767   LIRItem dst_pos (x->argument_at(3), this);
   768   LIRItem length  (x->argument_at(4), this);
   769   // load all values in callee_save_registers, as this makes the
   770   // parameter passing to the fast case simpler
   771   src.load_item_force     (rlock_callee_saved(T_OBJECT));
   772   src_pos.load_item_force (rlock_callee_saved(T_INT));
   773   dst.load_item_force     (rlock_callee_saved(T_OBJECT));
   774   dst_pos.load_item_force (rlock_callee_saved(T_INT));
   775   length.load_item_force  (rlock_callee_saved(T_INT));
   777   int flags;
   778   ciArrayKlass* expected_type;
   779   arraycopy_helper(x, &flags, &expected_type);
   781   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
   782                length.result(), rlock_callee_saved(T_INT),
   783                expected_type, flags, info);
   784   set_no_result(x);
   785 }
   787 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
   788 // _i2b, _i2c, _i2s
   789 void LIRGenerator::do_Convert(Convert* x) {
   791   switch (x->op()) {
   792     case Bytecodes::_f2l:
   793     case Bytecodes::_d2l:
   794     case Bytecodes::_d2i:
   795     case Bytecodes::_l2f:
   796     case Bytecodes::_l2d: {
   798       address entry;
   799       switch (x->op()) {
   800       case Bytecodes::_l2f:
   801         entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
   802         break;
   803       case Bytecodes::_l2d:
   804         entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
   805         break;
   806       case Bytecodes::_f2l:
   807         entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
   808         break;
   809       case Bytecodes::_d2l:
   810         entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
   811         break;
   812       case Bytecodes::_d2i:
   813         entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
   814         break;
   815       default:
   816         ShouldNotReachHere();
   817       }
   818       LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
   819       set_result(x, result);
   820       break;
   821     }
   823     case Bytecodes::_i2f:
   824     case Bytecodes::_i2d: {
   825       LIRItem value(x->value(), this);
   827       LIR_Opr reg = rlock_result(x);
   828       // To convert an int to double, we need to load the 32-bit int
   829       // from memory into a single precision floating point register
   830       // (even numbered). Then the sparc fitod instruction takes care
   831       // of the conversion. This is a bit ugly, but is the best way to
   832       // get the int value in a single precision floating point register
   833       value.load_item();
   834       LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT);
   835       __ convert(x->op(), tmp, reg);
   836       break;
   837     }
   838     break;
   840     case Bytecodes::_i2l:
   841     case Bytecodes::_i2b:
   842     case Bytecodes::_i2c:
   843     case Bytecodes::_i2s:
   844     case Bytecodes::_l2i:
   845     case Bytecodes::_f2d:
   846     case Bytecodes::_d2f: { // inline code
   847       LIRItem value(x->value(), this);
   849       value.load_item();
   850       LIR_Opr reg = rlock_result(x);
   851       __ convert(x->op(), value.result(), reg, false);
   852     }
   853     break;
   855     case Bytecodes::_f2i: {
   856       LIRItem value (x->value(), this);
   857       value.set_destroys_register();
   858       value.load_item();
   859       LIR_Opr reg = rlock_result(x);
   860       set_vreg_flag(reg, must_start_in_memory);
   861       __ convert(x->op(), value.result(), reg, false);
   862     }
   863     break;
   865     default: ShouldNotReachHere();
   866   }
   867 }
   870 void LIRGenerator::do_NewInstance(NewInstance* x) {
   871   // This instruction can be deoptimized in the slow path : use
   872   // O0 as result register.
   873   const LIR_Opr reg = result_register_for(x->type());
   875   if (PrintNotLoaded && !x->klass()->is_loaded()) {
   876     tty->print_cr("   ###class not loaded at new bci %d", x->bci());
   877   }
   878   CodeEmitInfo* info = state_for(x, x->state());
   879   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
   880   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
   881   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
   882   LIR_Opr tmp4 = FrameMap::O1_oop_opr;
   883   LIR_Opr klass_reg = FrameMap::G5_oop_opr;
   884   new_instance(reg, x->klass(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
   885   LIR_Opr result = rlock_result(x);
   886   __ move(reg, result);
   887 }
   890 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
   891   // Evaluate state_for early since it may emit code
   892   CodeEmitInfo* info = state_for(x, x->state());
   894   LIRItem length(x->length(), this);
   895   length.load_item();
   897   LIR_Opr reg = result_register_for(x->type());
   898   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
   899   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
   900   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
   901   LIR_Opr tmp4 = FrameMap::O1_oop_opr;
   902   LIR_Opr klass_reg = FrameMap::G5_oop_opr;
   903   LIR_Opr len = length.result();
   904   BasicType elem_type = x->elt_type();
   906   __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
   908   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
   909   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
   911   LIR_Opr result = rlock_result(x);
   912   __ move(reg, result);
   913 }
   916 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
   917   // Evaluate state_for early since it may emit code.
   918   CodeEmitInfo* info = state_for(x, x->state());
   919   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
   920   // and therefore provide the state before the parameters have been consumed
   921   CodeEmitInfo* patching_info = NULL;
   922   if (!x->klass()->is_loaded() || PatchALot) {
   923     patching_info = state_for(x, x->state_before());
   924   }
   926   LIRItem length(x->length(), this);
   927   length.load_item();
   929   const LIR_Opr reg = result_register_for(x->type());
   930   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
   931   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
   932   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
   933   LIR_Opr tmp4 = FrameMap::O1_oop_opr;
   934   LIR_Opr klass_reg = FrameMap::G5_oop_opr;
   935   LIR_Opr len = length.result();
   937   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
   938   ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());
   939   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
   940     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
   941   }
   942   jobject2reg_with_patching(klass_reg, obj, patching_info);
   943   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
   945   LIR_Opr result = rlock_result(x);
   946   __ move(reg, result);
   947 }
   950 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
   951   Values* dims = x->dims();
   952   int i = dims->length();
   953   LIRItemList* items = new LIRItemList(dims->length(), NULL);
   954   while (i-- > 0) {
   955     LIRItem* size = new LIRItem(dims->at(i), this);
   956     items->at_put(i, size);
   957   }
   959   // Evaluate state_for early since it may emit code.
   960   CodeEmitInfo* patching_info = NULL;
   961   if (!x->klass()->is_loaded() || PatchALot) {
   962     patching_info = state_for(x, x->state_before());
   964     // cannot re-use same xhandlers for multiple CodeEmitInfos, so
   965     // clone all handlers.  This is handled transparently in other
   966     // places by the CodeEmitInfo cloning logic but is handled
   967     // specially here because a stub isn't being used.
   968     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
   969   }
   970   CodeEmitInfo* info = state_for(x, x->state());
   972   i = dims->length();
   973   while (i-- > 0) {
   974     LIRItem* size = items->at(i);
   975     size->load_item();
   976     store_stack_parameter (size->result(),
   977                            in_ByteSize(STACK_BIAS +
   978                                        frame::memory_parameter_word_sp_offset * wordSize +
   979                                        i * sizeof(jint)));
   980   }
   982   // This instruction can be deoptimized in the slow path : use
   983   // O0 as result register.
   984   const LIR_Opr reg = result_register_for(x->type());
   985   jobject2reg_with_patching(reg, x->klass(), patching_info);
   986   LIR_Opr rank = FrameMap::O1_opr;
   987   __ move(LIR_OprFact::intConst(x->rank()), rank);
   988   LIR_Opr varargs = FrameMap::as_pointer_opr(O2);
   989   int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS;
   990   __ add(FrameMap::SP_opr,
   991          LIR_OprFact::intptrConst(offset_from_sp),
   992          varargs);
   993   LIR_OprList* args = new LIR_OprList(3);
   994   args->append(reg);
   995   args->append(rank);
   996   args->append(varargs);
   997   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
   998                   LIR_OprFact::illegalOpr,
   999                   reg, args, info);
  1001   LIR_Opr result = rlock_result(x);
  1002   __ move(reg, result);
  1006 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
  1010 void LIRGenerator::do_CheckCast(CheckCast* x) {
  1011   LIRItem obj(x->obj(), this);
  1012   CodeEmitInfo* patching_info = NULL;
  1013   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
  1014     // must do this before locking the destination register as an oop register,
  1015     // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location)
  1016     patching_info = state_for(x, x->state_before());
  1018   obj.load_item();
  1019   LIR_Opr out_reg = rlock_result(x);
  1020   CodeStub* stub;
  1021   CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks());
  1023   if (x->is_incompatible_class_change_check()) {
  1024     assert(patching_info == NULL, "can't patch this");
  1025     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
  1026   } else {
  1027     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
  1029   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
  1030   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
  1031   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
  1032   __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
  1033                x->direct_compare(), info_for_exception, patching_info, stub,
  1034                x->profiled_method(), x->profiled_bci());
  1038 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
  1039   LIRItem obj(x->obj(), this);
  1040   CodeEmitInfo* patching_info = NULL;
  1041   if (!x->klass()->is_loaded() || PatchALot) {
  1042     patching_info = state_for(x, x->state_before());
  1044   // ensure the result register is not the input register because the result is initialized before the patching safepoint
  1045   obj.load_item();
  1046   LIR_Opr out_reg = rlock_result(x);
  1047   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
  1048   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
  1049   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
  1050   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,  x->direct_compare(), patching_info);
  1054 void LIRGenerator::do_If(If* x) {
  1055   assert(x->number_of_sux() == 2, "inconsistency");
  1056   ValueTag tag = x->x()->type()->tag();
  1057   LIRItem xitem(x->x(), this);
  1058   LIRItem yitem(x->y(), this);
  1059   LIRItem* xin = &xitem;
  1060   LIRItem* yin = &yitem;
  1061   If::Condition cond = x->cond();
  1063   if (tag == longTag) {
  1064     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
  1065     // mirror for other conditions
  1066     if (cond == If::gtr || cond == If::leq) {
  1067       // swap inputs
  1068       cond = Instruction::mirror(cond);
  1069       xin = &yitem;
  1070       yin = &xitem;
  1072     xin->set_destroys_register();
  1075   LIR_Opr left = LIR_OprFact::illegalOpr;
  1076   LIR_Opr right = LIR_OprFact::illegalOpr;
  1078   xin->load_item();
  1079   left = xin->result();
  1081   if (is_simm13(yin->result())) {
  1082     // inline int constants which are small enough to be immediate operands
  1083     right = LIR_OprFact::value_type(yin->value()->type());
  1084   } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
  1085              (cond == If::eql || cond == If::neq)) {
  1086     // inline long zero
  1087     right = LIR_OprFact::value_type(yin->value()->type());
  1088   } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
  1089     right = LIR_OprFact::value_type(yin->value()->type());
  1090   } else {
  1091     yin->load_item();
  1092     right = yin->result();
  1094   set_no_result(x);
  1096   // add safepoint before generating condition code so it can be recomputed
  1097   if (x->is_safepoint()) {
  1098     // increment backedge counter if needed
  1099     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
  1100     __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
  1103   __ cmp(lir_cond(cond), left, right);
  1104   // Generate branch profiling. Profiling code doesn't kill flags.
  1105   profile_branch(x, cond);
  1106   move_to_phi(x->state());
  1107   if (x->x()->type()->is_float_kind()) {
  1108     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
  1109   } else {
  1110     __ branch(lir_cond(cond), right->type(), x->tsux());
  1112   assert(x->default_sux() == x->fsux(), "wrong destination above");
  1113   __ jump(x->default_sux());
  1117 LIR_Opr LIRGenerator::getThreadPointer() {
  1118   return FrameMap::as_pointer_opr(G2);
  1122 void LIRGenerator::trace_block_entry(BlockBegin* block) {
  1123   __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr);
  1124   LIR_OprList* args = new LIR_OprList(1);
  1125   args->append(FrameMap::O0_opr);
  1126   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
  1127   __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args);
  1131 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
  1132                                         CodeEmitInfo* info) {
  1133 #ifdef _LP64
  1134   __ store(value, address, info);
  1135 #else
  1136   __ volatile_store_mem_reg(value, address, info);
  1137 #endif
  1140 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
  1141                                        CodeEmitInfo* info) {
  1142 #ifdef _LP64
  1143   __ load(address, result, info);
  1144 #else
  1145   __ volatile_load_mem_reg(address, result, info);
  1146 #endif
  1150 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
  1151                                      BasicType type, bool is_volatile) {
  1152   LIR_Opr base_op = src;
  1153   LIR_Opr index_op = offset;
  1155   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
  1156 #ifndef _LP64
  1157   if (is_volatile && type == T_LONG) {
  1158     __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
  1159   } else
  1160 #endif
  1162       if (type == T_BOOLEAN) {
  1163         type = T_BYTE;
  1165       LIR_Address* addr;
  1166       if (type == T_ARRAY || type == T_OBJECT) {
  1167         LIR_Opr tmp = new_pointer_register();
  1168         __ add(base_op, index_op, tmp);
  1169         addr = new LIR_Address(tmp, type);
  1170       } else {
  1171         addr = new LIR_Address(base_op, index_op, type);
  1174       if (is_obj) {
  1175         pre_barrier(LIR_OprFact::address(addr), false, NULL);
  1176         // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
  1178       __ move(data, addr);
  1179       if (is_obj) {
  1180         // This address is precise
  1181         post_barrier(LIR_OprFact::address(addr), data);
  1187 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
  1188                                      BasicType type, bool is_volatile) {
  1189 #ifndef _LP64
  1190   if (is_volatile && type == T_LONG) {
  1191     __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
  1192   } else
  1193 #endif
  1195     LIR_Address* addr = new LIR_Address(src, offset, type);
  1196     __ load(addr, dst);

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