1.1 --- a/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp Thu Sep 02 11:40:02 2010 -0700
1.2 +++ b/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp Fri Sep 03 17:51:07 2010 -0700
1.3 @@ -1,5 +1,5 @@
1.4 /*
1.5 - * Copyright (c) 2005, 2009, Oracle and/or its affiliates. All rights reserved.
1.6 + * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
1.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 *
1.9 * This code is free software; you can redistribute it and/or modify it
1.10 @@ -227,29 +227,37 @@
1.11 }
1.12 }
1.13
1.14 +LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
1.15 + LIR_Opr r;
1.16 + if (type == T_LONG) {
1.17 + r = LIR_OprFact::longConst(x);
1.18 + } else if (type == T_INT) {
1.19 + r = LIR_OprFact::intConst(x);
1.20 + } else {
1.21 + ShouldNotReachHere();
1.22 + }
1.23 + if (!Assembler::is_simm13(x)) {
1.24 + LIR_Opr tmp = new_register(type);
1.25 + __ move(r, tmp);
1.26 + return tmp;
1.27 + }
1.28 + return r;
1.29 +}
1.30
1.31 -void LIRGenerator::increment_counter(address counter, int step) {
1.32 +void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
1.33 LIR_Opr pointer = new_pointer_register();
1.34 __ move(LIR_OprFact::intptrConst(counter), pointer);
1.35 - LIR_Address* addr = new LIR_Address(pointer, T_INT);
1.36 + LIR_Address* addr = new LIR_Address(pointer, type);
1.37 increment_counter(addr, step);
1.38 }
1.39
1.40 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
1.41 - LIR_Opr temp = new_register(T_INT);
1.42 + LIR_Opr temp = new_register(addr->type());
1.43 __ move(addr, temp);
1.44 - LIR_Opr c = LIR_OprFact::intConst(step);
1.45 - if (Assembler::is_simm13(step)) {
1.46 - __ add(temp, c, temp);
1.47 - } else {
1.48 - LIR_Opr temp2 = new_register(T_INT);
1.49 - __ move(c, temp2);
1.50 - __ add(temp, temp2, temp);
1.51 - }
1.52 + __ add(temp, load_immediate(step, addr->type()), temp);
1.53 __ move(temp, addr);
1.54 }
1.55
1.56 -
1.57 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1.58 LIR_Opr o7opr = FrameMap::O7_opr;
1.59 __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
1.60 @@ -611,7 +619,6 @@
1.61 left.load_item();
1.62 right.load_item();
1.63 LIR_Opr reg = rlock_result(x);
1.64 -
1.65 if (x->x()->type()->is_float_kind()) {
1.66 Bytecodes::Code code = x->op();
1.67 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
1.68 @@ -1089,12 +1096,12 @@
1.69 // add safepoint before generating condition code so it can be recomputed
1.70 if (x->is_safepoint()) {
1.71 // increment backedge counter if needed
1.72 - increment_backedge_counter(state_for(x, x->state_before()));
1.73 -
1.74 + increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1.75 __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
1.76 }
1.77
1.78 __ cmp(lir_cond(cond), left, right);
1.79 + // Generate branch profiling. Profiling code doesn't kill flags.
1.80 profile_branch(x, cond);
1.81 move_to_phi(x->state());
1.82 if (x->x()->type()->is_float_kind()) {
