Thu, 02 Oct 2008 19:58:19 -0700
6754988: Update copyright year
Summary: Update for files that have been modified starting July 2008
Reviewed-by: ohair, tbell
1 /*
2 * Copyright 2005-2008 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
25 # include "incls/_precompiled.incl"
26 # include "incls/_c1_LIRGenerator_x86.cpp.incl"
28 #ifdef ASSERT
29 #define __ gen()->lir(__FILE__, __LINE__)->
30 #else
31 #define __ gen()->lir()->
32 #endif
34 // Item will be loaded into a byte register; Intel only
35 void LIRItem::load_byte_item() {
36 load_item();
37 LIR_Opr res = result();
39 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
40 // make sure that it is a byte register
41 assert(!value()->type()->is_float() && !value()->type()->is_double(),
42 "can't load floats in byte register");
43 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
44 __ move(res, reg);
46 _result = reg;
47 }
48 }
51 void LIRItem::load_nonconstant() {
52 LIR_Opr r = value()->operand();
53 if (r->is_constant()) {
54 _result = r;
55 } else {
56 load_item();
57 }
58 }
60 //--------------------------------------------------------------
61 // LIRGenerator
62 //--------------------------------------------------------------
65 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
66 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
67 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
68 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
69 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
70 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
71 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
72 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
75 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
76 LIR_Opr opr;
77 switch (type->tag()) {
78 case intTag: opr = FrameMap::rax_opr; break;
79 case objectTag: opr = FrameMap::rax_oop_opr; break;
80 case longTag: opr = FrameMap::long0_opr; break;
81 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
82 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
84 case addressTag:
85 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
86 }
88 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
89 return opr;
90 }
93 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
94 LIR_Opr reg = new_register(T_INT);
95 set_vreg_flag(reg, LIRGenerator::byte_reg);
96 return reg;
97 }
100 //--------- loading items into registers --------------------------------
103 // i486 instructions can inline constants
104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
105 if (type == T_SHORT || type == T_CHAR) {
106 // there is no immediate move of word values in asembler_i486.?pp
107 return false;
108 }
109 Constant* c = v->as_Constant();
110 if (c && c->state() == NULL) {
111 // constants of any type can be stored directly, except for
112 // unloaded object constants.
113 return true;
114 }
115 return false;
116 }
119 bool LIRGenerator::can_inline_as_constant(Value v) const {
120 if (v->type()->tag() == longTag) return false;
121 return v->type()->tag() != objectTag ||
122 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
123 }
126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
127 if (c->type() == T_LONG) return false;
128 return c->type() != T_OBJECT || c->as_jobject() == NULL;
129 }
132 LIR_Opr LIRGenerator::safepoint_poll_register() {
133 return LIR_OprFact::illegalOpr;
134 }
137 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
138 int shift, int disp, BasicType type) {
139 assert(base->is_register(), "must be");
140 if (index->is_constant()) {
141 return new LIR_Address(base,
142 (index->as_constant_ptr()->as_jint() << shift) + disp,
143 type);
144 } else {
145 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
146 }
147 }
150 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
151 BasicType type, bool needs_card_mark) {
152 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
154 LIR_Address* addr;
155 if (index_opr->is_constant()) {
156 int elem_size = type2aelembytes(type);
157 addr = new LIR_Address(array_opr,
158 offset_in_bytes + index_opr->as_jint() * elem_size, type);
159 } else {
160 #ifdef _LP64
161 if (index_opr->type() == T_INT) {
162 LIR_Opr tmp = new_register(T_LONG);
163 __ convert(Bytecodes::_i2l, index_opr, tmp);
164 index_opr = tmp;
165 }
166 #endif // _LP64
167 addr = new LIR_Address(array_opr,
168 index_opr,
169 LIR_Address::scale(type),
170 offset_in_bytes, type);
171 }
172 if (needs_card_mark) {
173 // This store will need a precise card mark, so go ahead and
174 // compute the full adddres instead of computing once for the
175 // store and again for the card mark.
176 LIR_Opr tmp = new_pointer_register();
177 __ leal(LIR_OprFact::address(addr), tmp);
178 return new LIR_Address(tmp, 0, type);
179 } else {
180 return addr;
181 }
182 }
185 void LIRGenerator::increment_counter(address counter, int step) {
186 LIR_Opr pointer = new_pointer_register();
187 __ move(LIR_OprFact::intptrConst(counter), pointer);
188 LIR_Address* addr = new LIR_Address(pointer, 0, T_INT);
189 increment_counter(addr, step);
190 }
193 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
194 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
195 }
198 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
199 __ cmp_mem_int(condition, base, disp, c, info);
200 }
203 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
204 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
205 }
208 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
209 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
210 }
213 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
214 if (tmp->is_valid()) {
215 if (is_power_of_2(c + 1)) {
216 __ move(left, tmp);
217 __ shift_left(left, log2_intptr(c + 1), left);
218 __ sub(left, tmp, result);
219 return true;
220 } else if (is_power_of_2(c - 1)) {
221 __ move(left, tmp);
222 __ shift_left(left, log2_intptr(c - 1), left);
223 __ add(left, tmp, result);
224 return true;
225 }
226 }
227 return false;
228 }
231 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
232 BasicType type = item->type();
233 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
234 }
236 //----------------------------------------------------------------------
237 // visitor functions
238 //----------------------------------------------------------------------
241 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
242 assert(x->is_root(),"");
243 bool needs_range_check = true;
244 bool use_length = x->length() != NULL;
245 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
246 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
247 !get_jobject_constant(x->value())->is_null_object());
249 LIRItem array(x->array(), this);
250 LIRItem index(x->index(), this);
251 LIRItem value(x->value(), this);
252 LIRItem length(this);
254 array.load_item();
255 index.load_nonconstant();
257 if (use_length) {
258 needs_range_check = x->compute_needs_range_check();
259 if (needs_range_check) {
260 length.set_instruction(x->length());
261 length.load_item();
262 }
263 }
264 if (needs_store_check) {
265 value.load_item();
266 } else {
267 value.load_for_store(x->elt_type());
268 }
270 set_no_result(x);
272 // the CodeEmitInfo must be duplicated for each different
273 // LIR-instruction because spilling can occur anywhere between two
274 // instructions and so the debug information must be different
275 CodeEmitInfo* range_check_info = state_for(x);
276 CodeEmitInfo* null_check_info = NULL;
277 if (x->needs_null_check()) {
278 null_check_info = new CodeEmitInfo(range_check_info);
279 }
281 // emit array address setup early so it schedules better
282 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
284 if (GenerateRangeChecks && needs_range_check) {
285 if (use_length) {
286 __ cmp(lir_cond_belowEqual, length.result(), index.result());
287 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
288 } else {
289 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
290 // range_check also does the null check
291 null_check_info = NULL;
292 }
293 }
295 if (GenerateArrayStoreCheck && needs_store_check) {
296 LIR_Opr tmp1 = new_register(objectType);
297 LIR_Opr tmp2 = new_register(objectType);
298 LIR_Opr tmp3 = new_register(objectType);
300 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
301 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
302 }
304 if (obj_store) {
305 __ move(value.result(), array_addr, null_check_info);
306 // Seems to be a precise
307 post_barrier(LIR_OprFact::address(array_addr), value.result());
308 } else {
309 __ move(value.result(), array_addr, null_check_info);
310 }
311 }
314 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
315 assert(x->is_root(),"");
316 LIRItem obj(x->obj(), this);
317 obj.load_item();
319 set_no_result(x);
321 // "lock" stores the address of the monitor stack slot, so this is not an oop
322 LIR_Opr lock = new_register(T_INT);
323 // Need a scratch register for biased locking on x86
324 LIR_Opr scratch = LIR_OprFact::illegalOpr;
325 if (UseBiasedLocking) {
326 scratch = new_register(T_INT);
327 }
329 CodeEmitInfo* info_for_exception = NULL;
330 if (x->needs_null_check()) {
331 info_for_exception = state_for(x, x->lock_stack_before());
332 }
333 // this CodeEmitInfo must not have the xhandlers because here the
334 // object is already locked (xhandlers expect object to be unlocked)
335 CodeEmitInfo* info = state_for(x, x->state(), true);
336 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
337 x->monitor_no(), info_for_exception, info);
338 }
341 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
342 assert(x->is_root(),"");
344 LIRItem obj(x->obj(), this);
345 obj.dont_load_item();
347 LIR_Opr lock = new_register(T_INT);
348 LIR_Opr obj_temp = new_register(T_INT);
349 set_no_result(x);
350 monitor_exit(obj_temp, lock, syncTempOpr(), x->monitor_no());
351 }
354 // _ineg, _lneg, _fneg, _dneg
355 void LIRGenerator::do_NegateOp(NegateOp* x) {
356 LIRItem value(x->x(), this);
357 value.set_destroys_register();
358 value.load_item();
359 LIR_Opr reg = rlock(x);
360 __ negate(value.result(), reg);
362 set_result(x, round_item(reg));
363 }
366 // for _fadd, _fmul, _fsub, _fdiv, _frem
367 // _dadd, _dmul, _dsub, _ddiv, _drem
368 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
369 LIRItem left(x->x(), this);
370 LIRItem right(x->y(), this);
371 LIRItem* left_arg = &left;
372 LIRItem* right_arg = &right;
373 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
374 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
375 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
376 left.load_item();
377 } else {
378 left.dont_load_item();
379 }
381 // do not load right operand if it is a constant. only 0 and 1 are
382 // loaded because there are special instructions for loading them
383 // without memory access (not needed for SSE2 instructions)
384 bool must_load_right = false;
385 if (right.is_constant()) {
386 LIR_Const* c = right.result()->as_constant_ptr();
387 assert(c != NULL, "invalid constant");
388 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
390 if (c->type() == T_FLOAT) {
391 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
392 } else {
393 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
394 }
395 }
397 if (must_load_both) {
398 // frem and drem destroy also right operand, so move it to a new register
399 right.set_destroys_register();
400 right.load_item();
401 } else if (right.is_register() || must_load_right) {
402 right.load_item();
403 } else {
404 right.dont_load_item();
405 }
406 LIR_Opr reg = rlock(x);
407 LIR_Opr tmp = LIR_OprFact::illegalOpr;
408 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
409 tmp = new_register(T_DOUBLE);
410 }
412 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
413 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
414 LIR_Opr fpu0, fpu1;
415 if (x->op() == Bytecodes::_frem) {
416 fpu0 = LIR_OprFact::single_fpu(0);
417 fpu1 = LIR_OprFact::single_fpu(1);
418 } else {
419 fpu0 = LIR_OprFact::double_fpu(0);
420 fpu1 = LIR_OprFact::double_fpu(1);
421 }
422 __ move(right.result(), fpu1); // order of left and right operand is important!
423 __ move(left.result(), fpu0);
424 __ rem (fpu0, fpu1, fpu0);
425 __ move(fpu0, reg);
427 } else {
428 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
429 }
431 set_result(x, round_item(reg));
432 }
435 // for _ladd, _lmul, _lsub, _ldiv, _lrem
436 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
437 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
438 // long division is implemented as a direct call into the runtime
439 LIRItem left(x->x(), this);
440 LIRItem right(x->y(), this);
442 // the check for division by zero destroys the right operand
443 right.set_destroys_register();
445 BasicTypeList signature(2);
446 signature.append(T_LONG);
447 signature.append(T_LONG);
448 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
450 // check for division by zero (destroys registers of right operand!)
451 CodeEmitInfo* info = state_for(x);
453 const LIR_Opr result_reg = result_register_for(x->type());
454 left.load_item_force(cc->at(1));
455 right.load_item();
457 __ move(right.result(), cc->at(0));
459 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
460 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
462 address entry;
463 switch (x->op()) {
464 case Bytecodes::_lrem:
465 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
466 break; // check if dividend is 0 is done elsewhere
467 case Bytecodes::_ldiv:
468 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
469 break; // check if dividend is 0 is done elsewhere
470 case Bytecodes::_lmul:
471 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
472 break;
473 default:
474 ShouldNotReachHere();
475 }
477 LIR_Opr result = rlock_result(x);
478 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
479 __ move(result_reg, result);
480 } else if (x->op() == Bytecodes::_lmul) {
481 // missing test if instr is commutative and if we should swap
482 LIRItem left(x->x(), this);
483 LIRItem right(x->y(), this);
485 // right register is destroyed by the long mul, so it must be
486 // copied to a new register.
487 right.set_destroys_register();
489 left.load_item();
490 right.load_item();
492 LIR_Opr reg = FrameMap::long0_opr;
493 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
494 LIR_Opr result = rlock_result(x);
495 __ move(reg, result);
496 } else {
497 // missing test if instr is commutative and if we should swap
498 LIRItem left(x->x(), this);
499 LIRItem right(x->y(), this);
501 left.load_item();
502 // dont load constants to save register
503 right.load_nonconstant();
504 rlock_result(x);
505 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
506 }
507 }
511 // for: _iadd, _imul, _isub, _idiv, _irem
512 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
513 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
514 // The requirements for division and modulo
515 // input : rax,: dividend min_int
516 // reg: divisor (may not be rax,/rdx) -1
517 //
518 // output: rax,: quotient (= rax, idiv reg) min_int
519 // rdx: remainder (= rax, irem reg) 0
521 // rax, and rdx will be destroyed
523 // Note: does this invalidate the spec ???
524 LIRItem right(x->y(), this);
525 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
527 // call state_for before load_item_force because state_for may
528 // force the evaluation of other instructions that are needed for
529 // correct debug info. Otherwise the live range of the fix
530 // register might be too long.
531 CodeEmitInfo* info = state_for(x);
533 left.load_item_force(divInOpr());
535 right.load_item();
537 LIR_Opr result = rlock_result(x);
538 LIR_Opr result_reg;
539 if (x->op() == Bytecodes::_idiv) {
540 result_reg = divOutOpr();
541 } else {
542 result_reg = remOutOpr();
543 }
545 if (!ImplicitDiv0Checks) {
546 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
547 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
548 }
549 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
550 if (x->op() == Bytecodes::_irem) {
551 __ irem(left.result(), right.result(), result_reg, tmp, info);
552 } else if (x->op() == Bytecodes::_idiv) {
553 __ idiv(left.result(), right.result(), result_reg, tmp, info);
554 } else {
555 ShouldNotReachHere();
556 }
558 __ move(result_reg, result);
559 } else {
560 // missing test if instr is commutative and if we should swap
561 LIRItem left(x->x(), this);
562 LIRItem right(x->y(), this);
563 LIRItem* left_arg = &left;
564 LIRItem* right_arg = &right;
565 if (x->is_commutative() && left.is_stack() && right.is_register()) {
566 // swap them if left is real stack (or cached) and right is real register(not cached)
567 left_arg = &right;
568 right_arg = &left;
569 }
571 left_arg->load_item();
573 // do not need to load right, as we can handle stack and constants
574 if (x->op() == Bytecodes::_imul ) {
575 // check if we can use shift instead
576 bool use_constant = false;
577 bool use_tmp = false;
578 if (right_arg->is_constant()) {
579 int iconst = right_arg->get_jint_constant();
580 if (iconst > 0) {
581 if (is_power_of_2(iconst)) {
582 use_constant = true;
583 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
584 use_constant = true;
585 use_tmp = true;
586 }
587 }
588 }
589 if (use_constant) {
590 right_arg->dont_load_item();
591 } else {
592 right_arg->load_item();
593 }
594 LIR_Opr tmp = LIR_OprFact::illegalOpr;
595 if (use_tmp) {
596 tmp = new_register(T_INT);
597 }
598 rlock_result(x);
600 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
601 } else {
602 right_arg->dont_load_item();
603 rlock_result(x);
604 LIR_Opr tmp = LIR_OprFact::illegalOpr;
605 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
606 }
607 }
608 }
611 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
612 // when an operand with use count 1 is the left operand, then it is
613 // likely that no move for 2-operand-LIR-form is necessary
614 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
615 x->swap_operands();
616 }
618 ValueTag tag = x->type()->tag();
619 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
620 switch (tag) {
621 case floatTag:
622 case doubleTag: do_ArithmeticOp_FPU(x); return;
623 case longTag: do_ArithmeticOp_Long(x); return;
624 case intTag: do_ArithmeticOp_Int(x); return;
625 }
626 ShouldNotReachHere();
627 }
630 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
631 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
632 // count must always be in rcx
633 LIRItem value(x->x(), this);
634 LIRItem count(x->y(), this);
636 ValueTag elemType = x->type()->tag();
637 bool must_load_count = !count.is_constant() || elemType == longTag;
638 if (must_load_count) {
639 // count for long must be in register
640 count.load_item_force(shiftCountOpr());
641 } else {
642 count.dont_load_item();
643 }
644 value.load_item();
645 LIR_Opr reg = rlock_result(x);
647 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
648 }
651 // _iand, _land, _ior, _lor, _ixor, _lxor
652 void LIRGenerator::do_LogicOp(LogicOp* x) {
653 // when an operand with use count 1 is the left operand, then it is
654 // likely that no move for 2-operand-LIR-form is necessary
655 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
656 x->swap_operands();
657 }
659 LIRItem left(x->x(), this);
660 LIRItem right(x->y(), this);
662 left.load_item();
663 right.load_nonconstant();
664 LIR_Opr reg = rlock_result(x);
666 logic_op(x->op(), reg, left.result(), right.result());
667 }
671 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
672 void LIRGenerator::do_CompareOp(CompareOp* x) {
673 LIRItem left(x->x(), this);
674 LIRItem right(x->y(), this);
675 ValueTag tag = x->x()->type()->tag();
676 if (tag == longTag) {
677 left.set_destroys_register();
678 }
679 left.load_item();
680 right.load_item();
681 LIR_Opr reg = rlock_result(x);
683 if (x->x()->type()->is_float_kind()) {
684 Bytecodes::Code code = x->op();
685 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
686 } else if (x->x()->type()->tag() == longTag) {
687 __ lcmp2int(left.result(), right.result(), reg);
688 } else {
689 Unimplemented();
690 }
691 }
694 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
695 assert(x->number_of_arguments() == 3, "wrong type");
696 LIRItem obj (x->argument_at(0), this); // AtomicLong object
697 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field
698 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value
700 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction
701 cmp_value.load_item_force(FrameMap::long0_opr);
703 // new value must be in rcx,ebx (hi,lo)
704 new_value.load_item_force(FrameMap::long1_opr);
706 // object pointer register is overwritten with field address
707 obj.load_item();
709 // generate compare-and-swap; produces zero condition if swap occurs
710 int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
711 LIR_Opr addr = obj.result();
712 __ add(addr, LIR_OprFact::intConst(value_offset), addr);
713 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed
714 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed
715 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
717 // generate conditional move of boolean result
718 LIR_Opr result = rlock_result(x);
719 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
720 }
723 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
724 assert(x->number_of_arguments() == 4, "wrong type");
725 LIRItem obj (x->argument_at(0), this); // object
726 LIRItem offset(x->argument_at(1), this); // offset of field
727 LIRItem cmp (x->argument_at(2), this); // value to compare with field
728 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
730 assert(obj.type()->tag() == objectTag, "invalid type");
732 // In 64bit the type can be long, sparc doesn't have this assert
733 // assert(offset.type()->tag() == intTag, "invalid type");
735 assert(cmp.type()->tag() == type->tag(), "invalid type");
736 assert(val.type()->tag() == type->tag(), "invalid type");
738 // get address of field
739 obj.load_item();
740 offset.load_nonconstant();
742 if (type == objectType) {
743 cmp.load_item_force(FrameMap::rax_oop_opr);
744 val.load_item();
745 } else if (type == intType) {
746 cmp.load_item_force(FrameMap::rax_opr);
747 val.load_item();
748 } else if (type == longType) {
749 cmp.load_item_force(FrameMap::long0_opr);
750 val.load_item_force(FrameMap::long1_opr);
751 } else {
752 ShouldNotReachHere();
753 }
755 LIR_Opr addr = new_pointer_register();
756 __ move(obj.result(), addr);
757 __ add(addr, offset.result(), addr);
761 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
762 if (type == objectType)
763 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
764 else if (type == intType)
765 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
766 else if (type == longType)
767 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
768 else {
769 ShouldNotReachHere();
770 }
772 // generate conditional move of boolean result
773 LIR_Opr result = rlock_result(x);
774 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
775 if (type == objectType) { // Write-barrier needed for Object fields.
776 // Seems to be precise
777 post_barrier(addr, val.result());
778 }
779 }
782 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
783 assert(x->number_of_arguments() == 1, "wrong type");
784 LIRItem value(x->argument_at(0), this);
786 bool use_fpu = false;
787 if (UseSSE >= 2) {
788 switch(x->id()) {
789 case vmIntrinsics::_dsin:
790 case vmIntrinsics::_dcos:
791 case vmIntrinsics::_dtan:
792 case vmIntrinsics::_dlog:
793 case vmIntrinsics::_dlog10:
794 use_fpu = true;
795 }
796 } else {
797 value.set_destroys_register();
798 }
800 value.load_item();
802 LIR_Opr calc_input = value.result();
803 LIR_Opr calc_result = rlock_result(x);
805 // sin and cos need two free fpu stack slots, so register two temporary operands
806 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
807 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
809 if (use_fpu) {
810 LIR_Opr tmp = FrameMap::fpu0_double_opr;
811 __ move(calc_input, tmp);
813 calc_input = tmp;
814 calc_result = tmp;
815 tmp1 = FrameMap::caller_save_fpu_reg_at(1);
816 tmp2 = FrameMap::caller_save_fpu_reg_at(2);
817 }
819 switch(x->id()) {
820 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
821 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
822 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break;
823 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break;
824 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break;
825 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
826 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, LIR_OprFact::illegalOpr); break;
827 default: ShouldNotReachHere();
828 }
830 if (use_fpu) {
831 __ move(calc_result, x->operand());
832 }
833 }
836 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
837 assert(x->number_of_arguments() == 5, "wrong type");
838 LIRItem src(x->argument_at(0), this);
839 LIRItem src_pos(x->argument_at(1), this);
840 LIRItem dst(x->argument_at(2), this);
841 LIRItem dst_pos(x->argument_at(3), this);
842 LIRItem length(x->argument_at(4), this);
844 // operands for arraycopy must use fixed registers, otherwise
845 // LinearScan will fail allocation (because arraycopy always needs a
846 // call)
848 #ifndef _LP64
849 src.load_item_force (FrameMap::rcx_oop_opr);
850 src_pos.load_item_force (FrameMap::rdx_opr);
851 dst.load_item_force (FrameMap::rax_oop_opr);
852 dst_pos.load_item_force (FrameMap::rbx_opr);
853 length.load_item_force (FrameMap::rdi_opr);
854 LIR_Opr tmp = (FrameMap::rsi_opr);
855 #else
857 // The java calling convention will give us enough registers
858 // so that on the stub side the args will be perfect already.
859 // On the other slow/special case side we call C and the arg
860 // positions are not similar enough to pick one as the best.
861 // Also because the java calling convention is a "shifted" version
862 // of the C convention we can process the java args trivially into C
863 // args without worry of overwriting during the xfer
865 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
866 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
867 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
868 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
869 length.load_item_force (FrameMap::as_opr(j_rarg4));
871 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
872 #endif // LP64
874 set_no_result(x);
876 int flags;
877 ciArrayKlass* expected_type;
878 arraycopy_helper(x, &flags, &expected_type);
880 CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?)
881 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
882 }
885 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
886 // _i2b, _i2c, _i2s
887 LIR_Opr fixed_register_for(BasicType type) {
888 switch (type) {
889 case T_FLOAT: return FrameMap::fpu0_float_opr;
890 case T_DOUBLE: return FrameMap::fpu0_double_opr;
891 case T_INT: return FrameMap::rax_opr;
892 case T_LONG: return FrameMap::long0_opr;
893 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
894 }
895 }
897 void LIRGenerator::do_Convert(Convert* x) {
898 // flags that vary for the different operations and different SSE-settings
899 bool fixed_input, fixed_result, round_result, needs_stub;
901 switch (x->op()) {
902 case Bytecodes::_i2l: // fall through
903 case Bytecodes::_l2i: // fall through
904 case Bytecodes::_i2b: // fall through
905 case Bytecodes::_i2c: // fall through
906 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
908 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
909 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
910 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
911 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
912 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
913 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
914 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
915 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
916 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
917 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
918 default: ShouldNotReachHere();
919 }
921 LIRItem value(x->value(), this);
922 value.load_item();
923 LIR_Opr input = value.result();
924 LIR_Opr result = rlock(x);
926 // arguments of lir_convert
927 LIR_Opr conv_input = input;
928 LIR_Opr conv_result = result;
929 ConversionStub* stub = NULL;
931 if (fixed_input) {
932 conv_input = fixed_register_for(input->type());
933 __ move(input, conv_input);
934 }
936 assert(fixed_result == false || round_result == false, "cannot set both");
937 if (fixed_result) {
938 conv_result = fixed_register_for(result->type());
939 } else if (round_result) {
940 result = new_register(result->type());
941 set_vreg_flag(result, must_start_in_memory);
942 }
944 if (needs_stub) {
945 stub = new ConversionStub(x->op(), conv_input, conv_result);
946 }
948 __ convert(x->op(), conv_input, conv_result, stub);
950 if (result != conv_result) {
951 __ move(conv_result, result);
952 }
954 assert(result->is_virtual(), "result must be virtual register");
955 set_result(x, result);
956 }
959 void LIRGenerator::do_NewInstance(NewInstance* x) {
960 if (PrintNotLoaded && !x->klass()->is_loaded()) {
961 tty->print_cr(" ###class not loaded at new bci %d", x->bci());
962 }
963 CodeEmitInfo* info = state_for(x, x->state());
964 LIR_Opr reg = result_register_for(x->type());
965 LIR_Opr klass_reg = new_register(objectType);
966 new_instance(reg, x->klass(),
967 FrameMap::rcx_oop_opr,
968 FrameMap::rdi_oop_opr,
969 FrameMap::rsi_oop_opr,
970 LIR_OprFact::illegalOpr,
971 FrameMap::rdx_oop_opr, info);
972 LIR_Opr result = rlock_result(x);
973 __ move(reg, result);
974 }
977 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
978 CodeEmitInfo* info = state_for(x, x->state());
980 LIRItem length(x->length(), this);
981 length.load_item_force(FrameMap::rbx_opr);
983 LIR_Opr reg = result_register_for(x->type());
984 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
985 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
986 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
987 LIR_Opr tmp4 = reg;
988 LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
989 LIR_Opr len = length.result();
990 BasicType elem_type = x->elt_type();
992 __ oop2reg(ciTypeArrayKlass::make(elem_type)->encoding(), klass_reg);
994 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
995 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
997 LIR_Opr result = rlock_result(x);
998 __ move(reg, result);
999 }
1002 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1003 LIRItem length(x->length(), this);
1004 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1005 // and therefore provide the state before the parameters have been consumed
1006 CodeEmitInfo* patching_info = NULL;
1007 if (!x->klass()->is_loaded() || PatchALot) {
1008 patching_info = state_for(x, x->state_before());
1009 }
1011 CodeEmitInfo* info = state_for(x, x->state());
1013 const LIR_Opr reg = result_register_for(x->type());
1014 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1015 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1016 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1017 LIR_Opr tmp4 = reg;
1018 LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
1020 length.load_item_force(FrameMap::rbx_opr);
1021 LIR_Opr len = length.result();
1023 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1024 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());
1025 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1026 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1027 }
1028 jobject2reg_with_patching(klass_reg, obj, patching_info);
1029 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1031 LIR_Opr result = rlock_result(x);
1032 __ move(reg, result);
1033 }
1036 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1037 Values* dims = x->dims();
1038 int i = dims->length();
1039 LIRItemList* items = new LIRItemList(dims->length(), NULL);
1040 while (i-- > 0) {
1041 LIRItem* size = new LIRItem(dims->at(i), this);
1042 items->at_put(i, size);
1043 }
1045 // need to get the info before, as the items may become invalid through item_free
1046 CodeEmitInfo* patching_info = NULL;
1047 if (!x->klass()->is_loaded() || PatchALot) {
1048 patching_info = state_for(x, x->state_before());
1050 // cannot re-use same xhandlers for multiple CodeEmitInfos, so
1051 // clone all handlers.
1052 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1053 }
1055 CodeEmitInfo* info = state_for(x, x->state());
1057 i = dims->length();
1058 while (i-- > 0) {
1059 LIRItem* size = items->at(i);
1060 size->load_nonconstant();
1062 store_stack_parameter(size->result(), in_ByteSize(i*4));
1063 }
1065 LIR_Opr reg = result_register_for(x->type());
1066 jobject2reg_with_patching(reg, x->klass(), patching_info);
1068 LIR_Opr rank = FrameMap::rbx_opr;
1069 __ move(LIR_OprFact::intConst(x->rank()), rank);
1070 LIR_Opr varargs = FrameMap::rcx_opr;
1071 __ move(FrameMap::rsp_opr, varargs);
1072 LIR_OprList* args = new LIR_OprList(3);
1073 args->append(reg);
1074 args->append(rank);
1075 args->append(varargs);
1076 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1077 LIR_OprFact::illegalOpr,
1078 reg, args, info);
1080 LIR_Opr result = rlock_result(x);
1081 __ move(reg, result);
1082 }
1085 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1086 // nothing to do for now
1087 }
1090 void LIRGenerator::do_CheckCast(CheckCast* x) {
1091 LIRItem obj(x->obj(), this);
1093 CodeEmitInfo* patching_info = NULL;
1094 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1095 // must do this before locking the destination register as an oop register,
1096 // and before the obj is loaded (the latter is for deoptimization)
1097 patching_info = state_for(x, x->state_before());
1098 }
1099 obj.load_item();
1101 // info for exceptions
1102 CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks());
1104 CodeStub* stub;
1105 if (x->is_incompatible_class_change_check()) {
1106 assert(patching_info == NULL, "can't patch this");
1107 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1108 } else {
1109 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1110 }
1111 LIR_Opr reg = rlock_result(x);
1112 __ checkcast(reg, obj.result(), x->klass(),
1113 new_register(objectType), new_register(objectType),
1114 !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr,
1115 x->direct_compare(), info_for_exception, patching_info, stub,
1116 x->profiled_method(), x->profiled_bci());
1117 }
1120 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1121 LIRItem obj(x->obj(), this);
1123 // result and test object may not be in same register
1124 LIR_Opr reg = rlock_result(x);
1125 CodeEmitInfo* patching_info = NULL;
1126 if ((!x->klass()->is_loaded() || PatchALot)) {
1127 // must do this before locking the destination register as an oop register
1128 patching_info = state_for(x, x->state_before());
1129 }
1130 obj.load_item();
1131 LIR_Opr tmp = new_register(objectType);
1132 __ instanceof(reg, obj.result(), x->klass(),
1133 tmp, new_register(objectType), LIR_OprFact::illegalOpr,
1134 x->direct_compare(), patching_info);
1135 }
1138 void LIRGenerator::do_If(If* x) {
1139 assert(x->number_of_sux() == 2, "inconsistency");
1140 ValueTag tag = x->x()->type()->tag();
1141 bool is_safepoint = x->is_safepoint();
1143 If::Condition cond = x->cond();
1145 LIRItem xitem(x->x(), this);
1146 LIRItem yitem(x->y(), this);
1147 LIRItem* xin = &xitem;
1148 LIRItem* yin = &yitem;
1150 if (tag == longTag) {
1151 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1152 // mirror for other conditions
1153 if (cond == If::gtr || cond == If::leq) {
1154 cond = Instruction::mirror(cond);
1155 xin = &yitem;
1156 yin = &xitem;
1157 }
1158 xin->set_destroys_register();
1159 }
1160 xin->load_item();
1161 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1162 // inline long zero
1163 yin->dont_load_item();
1164 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1165 // longs cannot handle constants at right side
1166 yin->load_item();
1167 } else {
1168 yin->dont_load_item();
1169 }
1171 // add safepoint before generating condition code so it can be recomputed
1172 if (x->is_safepoint()) {
1173 // increment backedge counter if needed
1174 increment_backedge_counter(state_for(x, x->state_before()));
1176 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1177 }
1178 set_no_result(x);
1180 LIR_Opr left = xin->result();
1181 LIR_Opr right = yin->result();
1182 __ cmp(lir_cond(cond), left, right);
1183 profile_branch(x, cond);
1184 move_to_phi(x->state());
1185 if (x->x()->type()->is_float_kind()) {
1186 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1187 } else {
1188 __ branch(lir_cond(cond), right->type(), x->tsux());
1189 }
1190 assert(x->default_sux() == x->fsux(), "wrong destination above");
1191 __ jump(x->default_sux());
1192 }
1195 LIR_Opr LIRGenerator::getThreadPointer() {
1196 #ifdef _LP64
1197 return FrameMap::as_pointer_opr(r15_thread);
1198 #else
1199 LIR_Opr result = new_register(T_INT);
1200 __ get_thread(result);
1201 return result;
1202 #endif //
1203 }
1205 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1206 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1207 LIR_OprList* args = new LIR_OprList();
1208 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1209 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1210 }
1213 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1214 CodeEmitInfo* info) {
1215 if (address->type() == T_LONG) {
1216 address = new LIR_Address(address->base(),
1217 address->index(), address->scale(),
1218 address->disp(), T_DOUBLE);
1219 // Transfer the value atomically by using FP moves. This means
1220 // the value has to be moved between CPU and FPU registers. It
1221 // always has to be moved through spill slot since there's no
1222 // quick way to pack the value into an SSE register.
1223 LIR_Opr temp_double = new_register(T_DOUBLE);
1224 LIR_Opr spill = new_register(T_LONG);
1225 set_vreg_flag(spill, must_start_in_memory);
1226 __ move(value, spill);
1227 __ volatile_move(spill, temp_double, T_LONG);
1228 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1229 } else {
1230 __ store(value, address, info);
1231 }
1232 }
1236 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1237 CodeEmitInfo* info) {
1238 if (address->type() == T_LONG) {
1239 address = new LIR_Address(address->base(),
1240 address->index(), address->scale(),
1241 address->disp(), T_DOUBLE);
1242 // Transfer the value atomically by using FP moves. This means
1243 // the value has to be moved between CPU and FPU registers. In
1244 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1245 // SSE2+ mode it can be moved directly.
1246 LIR_Opr temp_double = new_register(T_DOUBLE);
1247 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1248 __ volatile_move(temp_double, result, T_LONG);
1249 if (UseSSE < 2) {
1250 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1251 set_vreg_flag(result, must_start_in_memory);
1252 }
1253 } else {
1254 __ load(address, result, info);
1255 }
1256 }
1258 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1259 BasicType type, bool is_volatile) {
1260 if (is_volatile && type == T_LONG) {
1261 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1262 LIR_Opr tmp = new_register(T_DOUBLE);
1263 __ load(addr, tmp);
1264 LIR_Opr spill = new_register(T_LONG);
1265 set_vreg_flag(spill, must_start_in_memory);
1266 __ move(tmp, spill);
1267 __ move(spill, dst);
1268 } else {
1269 LIR_Address* addr = new LIR_Address(src, offset, type);
1270 __ load(addr, dst);
1271 }
1272 }
1275 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1276 BasicType type, bool is_volatile) {
1277 if (is_volatile && type == T_LONG) {
1278 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1279 LIR_Opr tmp = new_register(T_DOUBLE);
1280 LIR_Opr spill = new_register(T_DOUBLE);
1281 set_vreg_flag(spill, must_start_in_memory);
1282 __ move(data, spill);
1283 __ move(spill, tmp);
1284 __ move(tmp, addr);
1285 } else {
1286 LIR_Address* addr = new LIR_Address(src, offset, type);
1287 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1288 if (is_obj) {
1289 __ move(data, addr);
1290 assert(src->is_register(), "must be register");
1291 // Seems to be a precise address
1292 post_barrier(LIR_OprFact::address(addr), data);
1293 } else {
1294 __ move(data, addr);
1295 }
1296 }
1297 }