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src/cpu/mips/vm/c1_Runtime1_mips.cpp@97a8ece254bc
src/cpu/mips/vm/c1_Runtime1_mips.cpp
Tue, 10 Jul 2018 16:46:48 +0800
- author
- fujie
- date
- Tue, 10 Jul 2018 16:46:48 +0800
- changeset 9161
- 97a8ece254bc
- parent 9153
- 7ebfb115ed31
- child 9171
- c67c94f5b85d
- permissions
- -rw-r--r--
#7241 [C1] Fix an oopmap not found assert
# Internal Error (/home/zhaixiang/project/loongson/jdk8-mips-c1/hotspot/src/share/vm/compiler/oopMap.cpp:305), pid=10960, tid=0x000000ff9795f1f0
# assert(i < len) failed: oopmap not found
1 /*
2 * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/assembler.hpp"
28 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "nativeInst_mips.hpp"
33 #include "oops/compiledICHolder.hpp"
34 #include "oops/oop.inline.hpp"
35 #include "prims/jvmtiExport.hpp"
36 #include "register_mips.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/signature.hpp"
39 #include "runtime/vframeArray.hpp"
40 #include "utilities/macros.hpp"
41 #include "vmreg_mips.inline.hpp"
42 #if INCLUDE_ALL_GCS
43 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
44 #endif
47 // Implementation of StubAssembler
48 // this method will preserve the stack space for arguments as indicated by args_size
49 // for stack alignment consideration, you cannot call this with argument in stack.
50 // if you need >3 arguments, you must implement this method yourself.
51 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
52 // i use S7 for edi.
53 // setup registers
54 const Register thread = TREG; // is callee-saved register (Visual C++ calling conventions)
55 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
56 assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
57 assert(args_size >= 0, "illegal args_size");
58 bool align_stack = false;
59 #ifdef _LP64
60 // At a method handle call, the stack may not be properly aligned
61 // when returning with an exception.
62 align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
63 #endif
65 set_num_rt_args(1 + args_size);
68 // push java thread (becomes first argument of C function)
69 get_thread(thread);
70 move(A0, thread);
72 if(!align_stack) {
73 set_last_Java_frame(thread, NOREG, FP, NULL);
74 } else {
75 address the_pc = pc();
76 set_last_Java_frame(thread, NOREG, FP, the_pc);
77 move(AT, -(StackAlignmentInBytes));
78 andr(SP, SP, AT);
79 }
81 relocate(relocInfo::internal_pc_type);
82 {
83 #ifndef _LP64
84 int save_pc = (int)pc() + 12 + NativeCall::return_address_offset;
85 lui(AT, Assembler::split_high(save_pc));
86 addiu(AT, AT, Assembler::split_low(save_pc));
87 #else
88 uintptr_t save_pc = (uintptr_t)pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset_long;
89 li48(AT, save_pc);
90 #endif
91 }
92 st_ptr(AT, thread, in_bytes(JavaThread::last_Java_pc_offset()));
94 // do the call
95 #ifndef _LP64
96 lui(T9, Assembler::split_high((int)entry));
97 addiu(T9, T9, Assembler::split_low((int)entry));
98 #else
99 li48(T9, (intptr_t)entry);
100 #endif
101 jalr(T9);
102 delayed()->nop();
104 int call_offset = offset();
106 // verify callee-saved register
107 #ifdef ASSERT
108 guarantee(thread != V0, "change this code");
109 push(V0);
110 {
111 Label L;
112 get_thread(V0);
113 beq(thread, V0, L);
114 delayed()->nop();
115 int3();
116 stop("StubAssembler::call_RT: edi not callee saved?");
117 bind(L);
118 }
119 super_pop(V0);
120 #endif
121 // discard thread and arguments
122 ld_ptr(SP, thread, in_bytes(JavaThread::last_Java_sp_offset())); //by yyq
123 //FIXME , in x86 version , the second parameter is false, why true here? @jerome, 12/31, 06
124 // reset_last_Java_frame(thread, true);
125 reset_last_Java_frame(thread, true, true);
126 // check for pending exceptions
127 {
128 Label L;
129 ld_ptr(AT, thread, in_bytes(Thread::pending_exception_offset()));
130 beq(AT, R0, L);
131 delayed()->nop();
132 // exception pending => remove activation and forward to exception handler
133 // make sure that the vm_results are cleared
134 if (oop_result1->is_valid()) {
135 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_offset()));
136 }
137 if (metadata_result->is_valid()) {
138 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_2_offset()));
139 }
140 // the leave() in x86 just pops ebp and remains the return address on the top
141 // of stack
142 // the return address will be needed by forward_exception_entry()
143 if (frame_size() == no_frame_size) {
144 addiu(SP, FP, wordSize);
145 ld_ptr(FP, SP, (-1) * wordSize);
146 jmp(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
147 delayed()->nop();
148 } else if (_stub_id == Runtime1::forward_exception_id) {
149 should_not_reach_here();
150 } else {
151 jmp(Runtime1::entry_for(Runtime1::forward_exception_id), relocInfo::runtime_call_type);
152 delayed()->nop();
153 }
154 bind(L);
155 }
156 // get oop results if there are any and reset the values in the thread
157 if (oop_result1->is_valid()) {
158 ld_ptr(oop_result1, thread, in_bytes(JavaThread::vm_result_offset()));
159 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_offset()));
160 verify_oop(oop_result1);
161 }
162 if (metadata_result->is_valid()) {
163 ld_ptr(metadata_result, thread, in_bytes(JavaThread::vm_result_2_offset()));
164 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_2_offset()));
165 verify_oop(metadata_result);
166 }
167 return call_offset;
168 }
171 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
172 if (arg1 != A1) move(A1, arg1);
173 return call_RT(oop_result1, metadata_result, entry, 1);
174 }
177 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
178 if (arg1!=A1) move(A1, arg1);
179 if (arg2!=A2) move(A2, arg2); assert(arg2 != A1, "smashed argument");
180 return call_RT(oop_result1, metadata_result, entry, 2);
181 }
184 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
185 if (arg1!=A1) move(A1, arg1);
186 if (arg2!=A2) move(A2, arg2); assert(arg2 != A1, "smashed argument");
187 if (arg3!=A3) move(A3, arg3); assert(arg3 != A1 && arg3 != A2, "smashed argument");
188 return call_RT(oop_result1, metadata_result, entry, 3);
189 }
192 // Implementation of StubFrame
194 class StubFrame: public StackObj {
195 private:
196 StubAssembler* _sasm;
198 public:
199 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
200 void load_argument(int offset_in_words, Register reg);
202 ~StubFrame();
203 };
206 #define __ _sasm->
208 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
209 _sasm = sasm;
210 __ set_info(name, must_gc_arguments);
211 __ enter();
212 }
215 //FIXME, I have no idea the frame architecture of mips
216 // load parameters that were stored with LIR_Assembler::store_parameter
217 // Note: offsets for store_parameter and load_argument must match
218 void StubFrame::load_argument(int offset_in_words, Register reg) {
219 //ebp + 0: link
220 // + 1: return address
221 // + 2: argument with offset 0
222 // + 3: argument with offset 1
223 // + 4: ...
224 __ ld_ptr(reg, Address(FP, (offset_in_words + 2) * BytesPerWord));
225 }
228 StubFrame::~StubFrame() {
229 __ leave();
230 __ jr(RA);
231 __ delayed()->nop();
232 }
234 #undef __
237 // Implementation of Runtime1
239 #define __ sasm->
241 //static OopMap* save_live_registers(MacroAssembler* sasm, int num_rt_args);
242 //static void restore_live_registers(MacroAssembler* sasm);
243 //DeoptimizationBlob* SharedRuntime::_deopt_blob = NULL;
244 /*
245 const int fpu_stack_as_doubles_size_in_words = 16;
246 const int fpu_stack_as_doubles_size = 64;
247 */
248 const int float_regs_as_doubles_size_in_words = 16;
250 //FIXME,
251 // Stack layout for saving/restoring all the registers needed during a runtime
252 // call (this includes deoptimization)
253 // Note: note that users of this frame may well have arguments to some runtime
254 // while these values are on the stack. These positions neglect those arguments
255 // but the code in save_live_registers will take the argument count into
256 // account.
257 //
258 #ifdef _LP64
259 #define SLOT2(x) x,
260 #define SLOT_PER_WORD 2
261 #else
262 #define SLOT2(x)
263 #define SLOT_PER_WORD 1
264 #endif // _LP64
266 enum reg_save_layout {
267 #ifndef _LP64
268 T0_off = 0,
269 S0_off = T0_off + SLOT_PER_WORD * 8,
270 #else
271 A4_off = 0,
272 S0_off = A4_off + SLOT_PER_WORD * 8,
273 #endif
274 FP_off = S0_off + SLOT_PER_WORD * 8, SLOT2(FPH_off)
275 T8_off, SLOT2(T8H_off)
276 T9_off, SLOT2(T9H_off)
277 SP_off, SLOT2(SPH_off)
278 V0_off, SLOT2(V0H_off)
279 V1_off, SLOT2(V1H_off)
280 A0_off, SLOT2(A0H_off)
281 A1_off, SLOT2(A1H_off)
282 A2_off, SLOT2(A2H_off)
283 A3_off, SLOT2(A3H_off)
285 // Float registers
286 /* FIXME: Jin: In MIPS64, F0~23 are all caller-saved registers */
287 F0_off, SLOT2( F0H_off)
288 F1_off, SLOT2( F1H_off)
289 F2_off, SLOT2( F2H_off)
290 F3_off, SLOT2( F3H_off)
291 F4_off, SLOT2( F4H_off)
292 F5_off, SLOT2( F5H_off)
293 F6_off, SLOT2( F6H_off)
294 F7_off, SLOT2( F7H_off)
295 F8_off, SLOT2( F8H_off)
296 F9_off, SLOT2( F9H_off)
297 F10_off, SLOT2( F10H_off)
298 F11_off, SLOT2( F11H_off)
299 F12_off, SLOT2( F12H_off)
300 F13_off, SLOT2( F13H_off)
301 F14_off, SLOT2( F14H_off)
302 F15_off, SLOT2( F15H_off)
303 F16_off, SLOT2( F16H_off)
304 F17_off, SLOT2( F17H_off)
305 F18_off, SLOT2( F18H_off)
306 F19_off, SLOT2( F19H_off)
308 GP_off, SLOT2( GPH_off)
309 //temp_2_off,
310 temp_1_off, SLOT2(temp_1H_off)
311 saved_fp_off, SLOT2(saved_fpH_off)
312 return_off, SLOT2(returnH_off)
314 reg_save_frame_size,
316 // illegal instruction handler
317 continue_dest_off = temp_1_off,
319 // deoptimization equates
320 //deopt_type = temp_2_off, // slot for type of deopt in progress
321 ret_type = temp_1_off // slot for return type
322 };
326 // Save off registers which might be killed by calls into the runtime.
327 // Tries to smart of about FP registers. In particular we separate
328 // saving and describing the FPU registers for deoptimization since we
329 // have to save the FPU registers twice if we describe them and on P4
330 // saving FPU registers which don't contain anything appears
331 // expensive. The deopt blob is the only thing which needs to
332 // describe FPU registers. In all other cases it should be sufficient
333 // to simply save their current value.
334 //FIXME, I have no idea which register should be saved . @jerome
335 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
336 bool save_fpu_registers = true, bool describe_fpu_registers = false) {
338 LP64_ONLY(num_rt_args = 0);
339 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
340 int frame_size_in_slots = reg_save_frame_size + num_rt_args * wordSize / VMRegImpl::slots_per_word; // args + thread
341 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
343 // record saved value locations in an OopMap
344 // locations are offsets from sp after runtime call; num_rt_args is number of arguments
345 // in call, including thread
346 OopMap* map = new OopMap(reg_save_frame_size, 0);
348 map->set_callee_saved(VMRegImpl::stack2reg(V0_off + num_rt_args), V0->as_VMReg());
349 map->set_callee_saved(VMRegImpl::stack2reg(V1_off + num_rt_args), V1->as_VMReg());
350 #ifdef _LP64
351 map->set_callee_saved(VMRegImpl::stack2reg(V0H_off + num_rt_args), V0->as_VMReg()->next());
352 map->set_callee_saved(VMRegImpl::stack2reg(V1H_off + num_rt_args), V1->as_VMReg()->next());
353 #endif
355 int i = 0;
356 #ifndef _LP64
357 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
358 map->set_callee_saved(VMRegImpl::stack2reg(T0_off + num_rt_args + i++), r->as_VMReg());
359 }
360 #else
361 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
362 map->set_callee_saved(VMRegImpl::stack2reg(A4_off + num_rt_args + i++), r->as_VMReg());
363 map->set_callee_saved(VMRegImpl::stack2reg(A4_off + num_rt_args + i++), r->as_VMReg()->next());
364 }
365 #endif
367 i = 0;
368 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
369 map->set_callee_saved(VMRegImpl::stack2reg(S0_off + num_rt_args + i++), r->as_VMReg());
370 #ifdef _LP64
371 map->set_callee_saved(VMRegImpl::stack2reg(S0_off + num_rt_args + i++), r->as_VMReg()->next());
372 #endif
373 }
375 map->set_callee_saved(VMRegImpl::stack2reg(FP_off + num_rt_args), FP->as_VMReg());
376 map->set_callee_saved(VMRegImpl::stack2reg(GP_off + num_rt_args), GP->as_VMReg());
377 map->set_callee_saved(VMRegImpl::stack2reg(T8_off + num_rt_args), T8->as_VMReg());
378 map->set_callee_saved(VMRegImpl::stack2reg(T9_off + num_rt_args), T9->as_VMReg());
379 map->set_callee_saved(VMRegImpl::stack2reg(A0_off + num_rt_args), A0->as_VMReg());
380 map->set_callee_saved(VMRegImpl::stack2reg(A1_off + num_rt_args), A1->as_VMReg());
381 map->set_callee_saved(VMRegImpl::stack2reg(A2_off + num_rt_args), A2->as_VMReg());
382 map->set_callee_saved(VMRegImpl::stack2reg(A3_off + num_rt_args), A3->as_VMReg());
384 map->set_callee_saved(VMRegImpl::stack2reg(F0_off + num_rt_args), F0->as_VMReg());
385 map->set_callee_saved(VMRegImpl::stack2reg(F1_off + num_rt_args), F1->as_VMReg());
386 map->set_callee_saved(VMRegImpl::stack2reg(F2_off + num_rt_args), F2->as_VMReg());
387 map->set_callee_saved(VMRegImpl::stack2reg(F3_off + num_rt_args), F1->as_VMReg());
388 map->set_callee_saved(VMRegImpl::stack2reg(F4_off + num_rt_args), F4->as_VMReg());
389 map->set_callee_saved(VMRegImpl::stack2reg(F5_off + num_rt_args), F4->as_VMReg());
390 map->set_callee_saved(VMRegImpl::stack2reg(F6_off + num_rt_args), F4->as_VMReg());
391 map->set_callee_saved(VMRegImpl::stack2reg(F7_off + num_rt_args), F4->as_VMReg());
392 map->set_callee_saved(VMRegImpl::stack2reg(F8_off + num_rt_args), F4->as_VMReg());
393 map->set_callee_saved(VMRegImpl::stack2reg(F9_off + num_rt_args), F4->as_VMReg());
394 map->set_callee_saved(VMRegImpl::stack2reg(F10_off + num_rt_args), F4->as_VMReg());
395 map->set_callee_saved(VMRegImpl::stack2reg(F11_off + num_rt_args), F4->as_VMReg());
396 map->set_callee_saved(VMRegImpl::stack2reg(F12_off + num_rt_args), F12->as_VMReg());
397 map->set_callee_saved(VMRegImpl::stack2reg(F13_off + num_rt_args), F13->as_VMReg());
398 map->set_callee_saved(VMRegImpl::stack2reg(F14_off + num_rt_args), F14->as_VMReg());
399 map->set_callee_saved(VMRegImpl::stack2reg(F15_off + num_rt_args), F15->as_VMReg());
400 map->set_callee_saved(VMRegImpl::stack2reg(F16_off + num_rt_args), F16->as_VMReg());
401 map->set_callee_saved(VMRegImpl::stack2reg(F17_off + num_rt_args), F17->as_VMReg());
402 map->set_callee_saved(VMRegImpl::stack2reg(F18_off + num_rt_args), F18->as_VMReg());
403 map->set_callee_saved(VMRegImpl::stack2reg(F19_off + num_rt_args), F19->as_VMReg());
405 #ifdef _LP64
406 map->set_callee_saved(VMRegImpl::stack2reg(FPH_off + num_rt_args), FP->as_VMReg()->next());
407 map->set_callee_saved(VMRegImpl::stack2reg(GPH_off + num_rt_args), GP->as_VMReg()->next());
408 map->set_callee_saved(VMRegImpl::stack2reg(T8H_off + num_rt_args), T8->as_VMReg()->next());
409 map->set_callee_saved(VMRegImpl::stack2reg(T9H_off + num_rt_args), T9->as_VMReg()->next());
410 map->set_callee_saved(VMRegImpl::stack2reg(A0H_off + num_rt_args), A0->as_VMReg()->next());
411 map->set_callee_saved(VMRegImpl::stack2reg(A1H_off + num_rt_args), A1->as_VMReg()->next());
412 map->set_callee_saved(VMRegImpl::stack2reg(A2H_off + num_rt_args), A2->as_VMReg()->next());
413 map->set_callee_saved(VMRegImpl::stack2reg(A3H_off + num_rt_args), A3->as_VMReg()->next());
414 #endif
415 return map;
416 }
418 //FIXME, Is it enough to save this registers by yyq
419 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
420 bool save_fpu_registers = true,
421 bool describe_fpu_registers = false) {
422 //const int reg_save_frame_size = return_off + 1 + num_rt_args;
423 __ block_comment("save_live_registers");
425 // save all register state - int, fpu
426 __ addi(SP, SP, -(reg_save_frame_size / SLOT_PER_WORD - 2)* wordSize);
428 #ifndef _LP64
429 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
430 __ sw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
431 #else
432 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
433 __ sd(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
434 #endif
435 }
436 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
437 __ st_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
438 }
439 __ st_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
440 __ st_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
441 __ st_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
442 __ st_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
443 __ st_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
444 __ st_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
445 __ st_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
446 __ st_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
447 __ st_ptr(V0, SP, V0_off * wordSize / SLOT_PER_WORD);
448 __ st_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
450 __ sdc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
451 __ sdc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
452 __ sdc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
453 __ sdc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
454 __ sdc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
455 __ sdc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
456 __ sdc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
457 __ sdc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
458 __ sdc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
459 __ sdc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
460 __ sdc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
461 __ sdc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
462 __ sdc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
463 __ sdc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
464 __ sdc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
465 __ sdc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
466 __ sdc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
467 __ sdc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
468 __ sdc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
469 __ sdc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
471 return generate_oop_map(sasm, num_rt_args, save_fpu_registers, describe_fpu_registers);
472 }
474 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) {
475 //static void restore_live_registers(MacroAssembler* sasm) {
476 #ifndef _LP64
477 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
478 __ lw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
479 #else
480 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
481 __ ld(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
482 #endif
483 }
484 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
485 __ ld_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
486 }
487 __ ld_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
488 __ ld_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
490 __ ld_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
491 __ ld_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
492 __ ld_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
493 __ ld_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
494 __ ld_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
495 __ ld_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
497 __ ld_ptr(V0, SP, V0_off * wordSize / SLOT_PER_WORD);
498 __ ld_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
500 __ ldc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
501 __ ldc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
502 __ ldc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
503 __ ldc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
504 __ ldc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
505 __ ldc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
506 __ ldc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
507 __ ldc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
508 __ ldc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
509 __ ldc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
510 __ ldc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
511 __ ldc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
512 __ ldc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
513 __ ldc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
514 __ ldc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
515 __ ldc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
516 __ ldc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
517 __ ldc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
518 __ ldc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
519 __ ldc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
521 __ addiu(SP, SP, (reg_save_frame_size / SLOT_PER_WORD - 2) * wordSize);
522 }
524 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
525 __ block_comment("restore_live_registers");
526 restore_fpu(sasm, restore_fpu_registers);
527 }
529 static void restore_live_registers_except_V0(StubAssembler* sasm, bool restore_fpu_registers = true) {
530 //static void restore_live_registers(MacroAssembler* sasm) {
531 //FIXME , maybe V1 need to be saved too
532 __ block_comment("restore_live_registers except V0");
533 #ifndef _LP64
534 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
535 __ lw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
536 #else
537 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
538 __ ld(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
539 #endif
540 }
541 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
542 __ ld_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
543 }
544 __ ld_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
545 __ ld_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
547 __ ld_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
548 __ ld_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
549 __ ld_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
550 __ ld_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
551 __ ld_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
552 __ ld_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
554 #if 1
555 __ ldc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
556 __ ldc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
557 __ ldc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
558 __ ldc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
559 __ ldc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
560 __ ldc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
561 __ ldc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
562 __ ldc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
563 __ ldc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
564 __ ldc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
565 __ ldc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
566 __ ldc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
567 __ ldc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
568 __ ldc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
569 __ ldc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
570 __ ldc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
571 __ ldc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
572 __ ldc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
573 __ ldc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
574 __ ldc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
575 #endif
577 __ ld_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
579 __ addiu(SP, SP, (reg_save_frame_size / SLOT_PER_WORD - 2) * wordSize);
580 }
582 void Runtime1::initialize_pd() {
583 // nothing to do
584 }
586 // target: the entry point of the method that creates and posts the exception oop
587 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
588 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
589 // preserve all registers
590 OopMap* oop_map = save_live_registers(sasm, 0);
592 // now all registers are saved and can be used freely
593 // verify that no old value is used accidentally
594 //all reigster are saved , I think mips do not need this
596 // registers used by this stub
597 const Register temp_reg = T3;
598 // load argument for exception that is passed as an argument into the stub
599 if (has_argument) {
600 __ ld_ptr(temp_reg, Address(FP, 2*BytesPerWord));
601 }
602 int call_offset;
603 if (has_argument)
604 call_offset = __ call_RT(noreg, noreg, target, temp_reg);
605 else
606 call_offset = __ call_RT(noreg, noreg, target);
608 OopMapSet* oop_maps = new OopMapSet();
609 oop_maps->add_gc_map(call_offset, oop_map);
611 __ stop("should not reach here");
613 return oop_maps;
614 }
616 //FIXME I do not know which reigster to use.should use T3 as real_return_addr @jerome
617 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
618 __ block_comment("generate_handle_exception");
620 // incoming parameters
621 const Register exception_oop = V0;
622 const Register exception_pc = V1;
623 // other registers used in this stub
624 // const Register real_return_addr = T3;
625 const Register thread = TREG;
626 #ifndef OPT_THREAD
627 __ get_thread(thread);
628 #endif
629 // Save registers, if required.
630 OopMapSet* oop_maps = new OopMapSet();
631 OopMap* oop_map = NULL;
632 switch (id) {
633 case forward_exception_id:
634 // We're handling an exception in the context of a compiled frame.
635 // The registers have been saved in the standard places. Perform
636 // an exception lookup in the caller and dispatch to the handler
637 // if found. Otherwise unwind and dispatch to the callers
638 // exception handler.
639 oop_map = generate_oop_map(sasm, 1 /*thread*/);
641 // load and clear pending exception oop into RAX
642 __ ld_ptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
643 __ st_ptr(R0, Address(thread, Thread::pending_exception_offset()));
645 // load issuing PC (the return address for this stub) into rdx
646 __ ld_ptr(exception_pc, Address(FP, 1*BytesPerWord));
648 // make sure that the vm_results are cleared (may be unnecessary)
649 __ st_ptr(R0, Address(thread, JavaThread::vm_result_offset()));
650 __ st_ptr(R0, Address(thread, JavaThread::vm_result_2_offset()));
651 break;
652 case handle_exception_nofpu_id:
653 case handle_exception_id:
654 // At this point all registers MAY be live.
655 oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
656 break;
657 case handle_exception_from_callee_id: {
658 // At this point all registers except exception oop (RAX) and
659 // exception pc (RDX) are dead.
660 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/);
661 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
662 sasm->set_frame_size(frame_size);
663 break;
664 }
665 default: ShouldNotReachHere();
666 }
668 #ifdef TIERED
669 // C2 can leave the fpu stack dirty
670 __ empty_FPU_stack();
671 #endif // TIERED
673 // verify that only V0 and V1 is valid at this time
674 // verify that V0 contains a valid exception
675 __ verify_not_null_oop(exception_oop);
677 // load address of JavaThread object for thread-local data
678 __ get_thread(thread);
680 #ifdef ASSERT
681 // check that fields in JavaThread for exception oop and issuing pc are
682 // empty before writing to them
683 Label oop_empty;
684 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
685 __ beq(AT, R0, oop_empty);
686 __ delayed()->nop();
687 __ stop("exception oop already set");
688 __ bind(oop_empty);
689 Label pc_empty;
690 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
691 __ beq(AT, R0, pc_empty);
692 __ delayed()->nop();
693 __ stop("exception pc already set");
694 __ bind(pc_empty);
695 #endif
697 // save exception oop and issuing pc into JavaThread
698 // (exception handler will load it from here)
699 __ st_ptr(exception_oop, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
700 __ st_ptr(exception_pc, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
702 // patch throwing pc into return address (has bci & oop map)
703 __ st_ptr(exception_pc, Address(FP, 1*BytesPerWord));
705 // compute the exception handler.
706 // the exception oop and the throwing pc are read from the fields in JavaThread
707 __ block_comment(";; will call_RT exception_handler_for_pc");
708 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
709 oop_maps->add_gc_map(call_offset, oop_map);
710 __ block_comment(";; end of call_RT exception_handler_for_pc");
711 // V0: handler address or NULL if no handler exists
712 // will be the deopt blob if nmethod was deoptimized while we looked up
713 // handler regardless of whether handler existed in the nmethod.
715 // only V0 is valid at this time, all other registers have been destroyed by the
716 // runtime call
718 // patch the return address -> the stub will directly return to the exception handler
719 __ st_ptr(V0, Address(FP, 1 * BytesPerWord));
721 switch (id) {
722 case forward_exception_id:
723 case handle_exception_nofpu_id:
724 case handle_exception_id:
725 // Restore the registers that were saved at the beginning.
726 restore_live_registers(sasm, id != handle_exception_nofpu_id);
727 break;
728 case handle_exception_from_callee_id:
729 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
730 // since we do a leave anyway.
732 // Pop the return address since we are possibly changing SP (restoring from BP).
733 __ leave();
734 // Restore SP from BP if the exception PC is a method handle call site.
735 {
736 Label done;
737 __ ld(AT, Address(thread, JavaThread::is_method_handle_return_offset()));
738 __ beq(AT, R0, done);
739 __ delayed()->nop();
740 __ bind(done);
741 }
742 __ jr(RA); // jump to exception handler
743 __ delayed()->nop();
744 break;
745 default: ShouldNotReachHere();
746 }
748 return oop_maps;
749 }
755 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
756 // incoming parameters
757 const Register exception_oop = V0;
758 // callee-saved copy of exception_oop during runtime call
759 const Register exception_oop_callee_saved = S0;
760 // other registers used in this stub
761 const Register exception_pc = V1;
762 const Register handler_addr = T3;
763 const Register thread = TREG;
765 // verify that only eax is valid at this time
766 // __ invalidate_registers(false, true, true, true, true, true);
768 #ifdef ASSERT
769 // check that fields in JavaThread for exception oop and issuing pc are empty
770 __ get_thread(thread);
771 Label oop_empty;
772 __ ld_ptr(AT, thread, in_bytes(JavaThread::exception_oop_offset()));
773 __ beq(AT, R0, oop_empty);
774 __ delayed()->nop();
775 __ stop("exception oop must be empty");
776 __ bind(oop_empty);
778 Label pc_empty;
779 __ ld_ptr(AT, thread, in_bytes(JavaThread::exception_pc_offset()));
780 __ beq(AT, R0, pc_empty);
781 __ delayed()->nop();
782 __ stop("exception pc must be empty");
783 __ bind(pc_empty);
784 #endif
785 // clear the FPU stack in case any FPU results are left behind
786 __ empty_FPU_stack();
788 // save exception_oop in callee-saved register to preserve it during runtime calls
789 __ verify_not_null_oop(exception_oop);
790 __ move(exception_oop_callee_saved, exception_oop);
792 #ifndef OPT_THREAD
793 __ get_thread(thread);
794 #endif
795 // Get return address (is on top of stack after leave).
796 // store return address (is on top of stack after leave)
798 __ ld_ptr(exception_pc, SP, 0);
800 // search the exception handler address of the caller (using the return address)
801 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
802 // V0: exception handler address of the caller
804 // only eax is valid at this time, all other registers have been destroyed by the call
806 // move result of call into correct register
807 __ move(handler_addr, V0);
809 // Restore exception oop to V0 (required convention of exception handler).
810 __ move(exception_oop, exception_oop_callee_saved);
812 // verify that there is really a valid exception in V0
813 __ verify_oop(exception_oop);
815 // get throwing pc (= return address).
816 // V1 has been destroyed by the call, so it must be set again
817 // the pop is also necessary to simulate the effect of a ret(0)
818 __ super_pop(exception_pc);
820 // continue at exception handler (return address removed)
821 // note: do *not* remove arguments when unwinding the
822 // activation since the caller assumes having
823 // all arguments on the stack when entering the
824 // runtime to determine the exception handler
825 // (GC happens at call site with arguments!)
826 // V0: exception oop
827 // V1: throwing pc
828 // T3: exception handler
829 __ jr(handler_addr);
830 __ delayed()->nop();
831 }
836 //static address deopt_with_exception_entry_for_patch = NULL;
838 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
840 // use the maximum number of runtime-arguments here because it is difficult to
841 // distinguish each RT-Call.
842 // Note: This number affects also the RT-Call in generate_handle_exception because
843 // the oop-map is shared for all calls.
845 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
846 assert(deopt_blob != NULL, "deoptimization blob must have been created");
847 // assert(deopt_with_exception_entry_for_patch != NULL,
848 // "deoptimization blob must have been created");
850 //OopMap* oop_map = save_live_registers(sasm, num_rt_args);
851 OopMap* oop_map = save_live_registers(sasm, 0);
852 const Register thread = T8;
853 // push java thread (becomes first argument of C function)
854 __ get_thread(thread);
855 __ move(A0, thread);
858 /*
859 * NOTE: this frame should be compiled frame, but at this point, the pc in frame-anchor
860 * is contained in interpreter. It should be wrong, and should be cleared but is not.
861 * even if we cleared the wrong pc in anchor, the default way to get caller pc in class frame
862 * is not right. It depends on that the caller pc is stored in *(sp - 1) but it's not the case
863 */
864 __ set_last_Java_frame(thread, NOREG, FP, NULL);
865 NOT_LP64(__ addiu(SP, SP, (-1) * wordSize));
866 __ move(AT, -(StackAlignmentInBytes));
867 __ andr(SP, SP, AT);
868 __ relocate(relocInfo::internal_pc_type);
869 {
870 #ifndef _LP64
871 int save_pc = (int)__ pc() + 12 + NativeCall::return_address_offset;
872 __ lui(AT, Assembler::split_high(save_pc));
873 __ addiu(AT, AT, Assembler::split_low(save_pc));
874 #else
875 uintptr_t save_pc = (uintptr_t)__ pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset_long;
876 __ li48(AT, save_pc);
877 #endif
878 }
879 __ st_ptr(AT, thread, in_bytes(JavaThread::last_Java_pc_offset()));
881 // do the call
882 #ifndef _LP64
883 __ lui(T9, Assembler::split_high((int)target));
884 __ addiu(T9, T9, Assembler::split_low((int)target));
885 #else
886 __ li48(T9, (intptr_t)target);
887 #endif
888 __ jalr(T9);
889 __ delayed()->nop();
890 OopMapSet* oop_maps = new OopMapSet();
891 oop_maps->add_gc_map(__ offset(), oop_map);
893 __ get_thread(thread);
895 __ ld_ptr (SP, thread, in_bytes(JavaThread::last_Java_sp_offset()));
896 __ reset_last_Java_frame(thread, true,true);
897 // discard thread arg
898 // check for pending exceptions
899 {
900 Label L, skip;
901 //Label no_deopt;
902 __ ld_ptr(AT, thread, in_bytes(Thread::pending_exception_offset()));
903 __ beq(AT, R0, L);
904 __ delayed()->nop();
905 // exception pending => remove activation and forward to exception handler
907 __ bne(V0, R0, skip);
908 __ delayed()->nop();
909 __ jmp(Runtime1::entry_for(Runtime1::forward_exception_id),
910 relocInfo::runtime_call_type);
911 __ delayed()->nop();
912 __ bind(skip);
914 // the deopt blob expects exceptions in the special fields of
915 // JavaThread, so copy and clear pending exception.
917 // load and clear pending exception
918 __ ld_ptr(V0, Address(thread,in_bytes(Thread::pending_exception_offset())));
919 __ st_ptr(R0, Address(thread, in_bytes(Thread::pending_exception_offset())));
921 // check that there is really a valid exception
922 __ verify_not_null_oop(V0);
924 // load throwing pc: this is the return address of the stub
925 __ ld_ptr(V1, Address(SP, return_off * BytesPerWord));
928 #ifdef ASSERT
929 // check that fields in JavaThread for exception oop and issuing pc are empty
930 Label oop_empty;
931 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
932 __ beq(AT,R0,oop_empty);
933 __ delayed()->nop();
934 __ stop("exception oop must be empty");
935 __ bind(oop_empty);
937 Label pc_empty;
938 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
939 __ beq(AT,R0,pc_empty);
940 __ delayed()->nop();
941 __ stop("exception pc must be empty");
942 __ bind(pc_empty);
943 #endif
945 // store exception oop and throwing pc to JavaThread
946 __ st_ptr(V0,Address(thread, in_bytes(JavaThread::exception_oop_offset())));
947 __ st_ptr(V1,Address(thread, in_bytes(JavaThread::exception_pc_offset())));
949 restore_live_registers(sasm);
951 __ leave();
953 // Forward the exception directly to deopt blob. We can blow no
954 // registers and must leave throwing pc on the stack. A patch may
955 // have values live in registers so the entry point with the
956 // exception in tls.
957 __ jmp(deopt_blob->unpack_with_exception_in_tls(), relocInfo::runtime_call_type);
958 __ delayed()->nop();
960 __ bind(L);
961 }
963 // Runtime will return true if the nmethod has been deoptimized during
964 // the patching process. In that case we must do a deopt reexecute instead.
966 Label reexecuteEntry, cont;
968 __ beq(V0, R0, cont); // have we deoptimized?
969 __ delayed()->nop();
971 // Will reexecute. Proper return address is already on the stack we just restore
972 // registers, pop all of our frame but the return address and jump to the deopt blob
973 restore_live_registers(sasm);
975 __ leave();
976 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
977 __ delayed()->nop();
979 __ bind(cont);
980 restore_live_registers(sasm);
982 __ leave();
983 __ jr(RA);
984 __ delayed()->nop();
986 return oop_maps;
987 }
990 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
991 // for better readability
992 const bool must_gc_arguments = true;
993 const bool dont_gc_arguments = false;
996 // default value; overwritten for some optimized stubs that are called
997 // from methods that do not use the fpu
998 bool save_fpu_registers = true;
1001 // stub code & info for the different stubs
1002 OopMapSet* oop_maps = NULL;
1004 switch (id) {
1005 case forward_exception_id:
1006 {
1007 oop_maps = generate_handle_exception(id, sasm);
1008 __ leave();
1009 __ jr(RA);
1010 __ delayed()->nop();
1011 }
1012 break;
1014 case new_instance_id:
1015 case fast_new_instance_id:
1016 case fast_new_instance_init_check_id:
1017 {
1018 Register klass = A4; // Incoming
1019 Register obj = V0; // Result
1021 if (id == new_instance_id) {
1022 __ set_info("new_instance", dont_gc_arguments);
1023 } else if (id == fast_new_instance_id) {
1024 __ set_info("fast new_instance", dont_gc_arguments);
1025 } else {
1026 assert(id == fast_new_instance_init_check_id, "bad StubID");
1027 __ set_info("fast new_instance init check", dont_gc_arguments);
1028 }
1030 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id)
1031 && UseTLAB && FastTLABRefill) {
1032 Label slow_path;
1033 Register obj_size = T0;
1034 Register t1 = T2;
1035 Register t2 = T3;
1036 assert_different_registers(klass, obj, obj_size, t1, t2);
1037 if (id == fast_new_instance_init_check_id) {
1038 // make sure the klass is initialized
1039 __ ld_ptr(AT, Address(klass, in_bytes(InstanceKlass::init_state_offset())));
1040 __ move(t1, InstanceKlass::fully_initialized);
1041 __ bne(AT, t1, slow_path);
1042 __ delayed()->nop();
1043 }
1044 #ifdef ASSERT
1045 // assert object can be fast path allocated
1046 {
1047 Label ok, not_ok;
1048 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1049 __ blez(obj_size, not_ok);
1050 __ delayed()->nop();
1051 __ andi(t1 , obj_size, Klass::_lh_instance_slow_path_bit);
1052 __ beq(t1, R0, ok);
1053 __ delayed()->nop();
1054 __ bind(not_ok);
1055 __ stop("assert(can be fast path allocated)");
1056 __ should_not_reach_here();
1057 __ bind(ok);
1058 }
1059 #endif // ASSERT
1060 // if we got here then the TLAB allocation failed, so try
1061 // refilling the TLAB or allocating directly from eden.
1063 Label retry_tlab, try_eden;
1064 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy edx (klass)
1066 __ bind(retry_tlab);
1068 // get the instance size
1069 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1070 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path);
1071 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
1072 __ verify_oop(obj);
1073 __ jr(RA);
1074 __ delayed()->nop();
1076 __ bind(try_eden);
1078 // get the instance size
1079 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1080 __ eden_allocate(obj, obj_size, 0, t1, t2, slow_path);
1081 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
1082 __ verify_oop(obj);
1083 __ jr(RA);
1084 __ delayed()->nop();
1086 __ bind(slow_path);
1087 }
1088 __ enter();
1089 OopMap* map = save_live_registers(sasm, 0);
1090 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1091 oop_maps = new OopMapSet();
1092 oop_maps->add_gc_map(call_offset, map);
1093 restore_live_registers_except_V0(sasm);
1094 __ verify_oop(obj);
1095 __ leave();
1096 __ jr(RA);
1097 __ delayed()->nop();
1099 // V0: new instance
1100 }
1101 break;
1104 #ifdef TIERED
1105 //FIXME, I hava no idea which register to use
1106 case counter_overflow_id:
1107 {
1108 #ifndef _LP64
1109 Register bci = T5;
1110 #else
1111 Register bci = A5;
1112 #endif
1113 Register method = AT;
1114 __ enter();
1115 OopMap* map = save_live_registers(sasm, 0);
1116 // Retrieve bci
1117 __ lw(bci, Address(FP, 2*BytesPerWord));// FIXME:wuhui.ebp==??
1118 __ ld(method, Address(FP, 3*BytesPerWord));
1119 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1120 oop_maps = new OopMapSet();
1121 oop_maps->add_gc_map(call_offset, map);
1122 restore_live_registers(sasm);
1123 __ leave();
1124 __ jr(RA);
1125 __ delayed()->nop();
1126 }
1127 break;
1128 #endif // TIERED
1132 case new_type_array_id:
1133 case new_object_array_id:
1134 {
1135 // i use T2 as length register, T4 as klass register, V0 as result register.
1136 // MUST accord with NewTypeArrayStub::emit_code, NewObjectArrayStub::emit_code
1137 Register length = T2; // Incoming
1138 #ifndef _LP64
1139 Register klass = T4; // Incoming
1140 #else
1141 Register klass = A4; // Incoming
1142 #endif
1143 Register obj = V0; // Result
1145 if (id == new_type_array_id) {
1146 __ set_info("new_type_array", dont_gc_arguments);
1147 } else {
1148 __ set_info("new_object_array", dont_gc_arguments);
1149 }
1151 if (UseTLAB && FastTLABRefill) {
1152 Register arr_size = T0;
1153 Register t1 = T1;
1154 Register t2 = T3;
1155 Label slow_path;
1156 assert_different_registers(length, klass, obj, arr_size, t1, t2);
1158 // check that array length is small enough for fast path
1159 __ move(AT, C1_MacroAssembler::max_array_allocation_length);
1160 __ sltu(AT, AT, length);
1161 __ bne(AT, R0, slow_path);
1162 __ delayed()->nop();
1164 // if we got here then the TLAB allocation failed, so try
1165 // refilling the TLAB or allocating directly from eden.
1166 Label retry_tlab, try_eden;
1167 //T0,T1,T5,T8 have changed!
1168 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves T2 & T4
1170 __ bind(retry_tlab);
1172 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
1173 __ lw(t1, klass, in_bytes(Klass::layout_helper_offset()));
1174 __ andi(AT, t1, 0x1f);
1175 __ sllv(arr_size, length, AT);
1176 __ srl(t1, t1, Klass::_lh_header_size_shift);
1177 __ andi(t1, t1, Klass::_lh_header_size_mask);
1178 __ add(arr_size, t1, arr_size);
1179 __ addi(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up
1180 __ move(AT, ~MinObjAlignmentInBytesMask);
1181 __ andr(arr_size, arr_size, AT);
1184 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
1185 __ initialize_header(obj, klass, length,t1,t2);
1186 __ lbu(t1, Address(klass, in_bytes(Klass::layout_helper_offset())
1187 + (Klass::_lh_header_size_shift / BitsPerByte)));
1188 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1189 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1190 __ andi(t1, t1, Klass::_lh_header_size_mask);
1191 __ sub(arr_size, arr_size, t1); // body length
1192 __ add(t1, t1, obj); // body start
1193 __ initialize_body(t1, arr_size, 0, t2);
1194 __ verify_oop(obj);
1195 __ jr(RA);
1196 __ delayed()->nop();
1198 __ bind(try_eden);
1199 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
1200 __ lw(t1, klass, in_bytes(Klass::layout_helper_offset()));
1201 __ andi(AT, t1, 0x1f);
1202 __ sllv(arr_size, length, AT);
1203 __ srl(t1, t1, Klass::_lh_header_size_shift);
1204 __ andi(t1, t1, Klass::_lh_header_size_mask);
1205 __ add(arr_size, t1, arr_size);
1206 __ addi(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up
1207 __ move(AT, ~MinObjAlignmentInBytesMask);
1208 __ andr(arr_size, arr_size, AT);
1209 __ eden_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
1210 __ initialize_header(obj, klass, length,t1,t2);
1211 __ lbu(t1, Address(klass, in_bytes(Klass::layout_helper_offset())
1212 + (Klass::_lh_header_size_shift / BitsPerByte)));
1213 __ andi(t1, t1, Klass::_lh_header_size_mask);
1214 __ sub(arr_size, arr_size, t1); // body length
1215 __ add(t1, t1, obj); // body start
1217 __ initialize_body(t1, arr_size, 0, t2);
1218 __ verify_oop(obj);
1219 __ jr(RA);
1220 __ delayed()->nop();
1221 __ bind(slow_path);
1222 }
1225 __ enter();
1226 OopMap* map = save_live_registers(sasm, 0);
1227 int call_offset;
1228 if (id == new_type_array_id) {
1229 call_offset = __ call_RT(obj, noreg,
1230 CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1231 } else {
1232 call_offset = __ call_RT(obj, noreg,
1233 CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1234 }
1236 oop_maps = new OopMapSet();
1237 oop_maps->add_gc_map(call_offset, map);
1238 restore_live_registers_except_V0(sasm);
1239 __ verify_oop(obj);
1240 __ leave();
1241 __ jr(RA);
1242 __ delayed()->nop();
1243 }
1244 break;
1246 case new_multi_array_id:
1247 {
1248 StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1249 //refer to c1_LIRGenerate_mips.cpp:do_NewmultiArray
1250 // V0: klass
1251 // T2: rank
1252 // T0: address of 1st dimension
1253 //__ call_RT(V0, noreg, CAST_FROM_FN_PTR(address, new_multi_array), A1, A2, A3);
1254 //OopMap* map = save_live_registers(sasm, 4);
1255 OopMap* map = save_live_registers(sasm, 0);
1256 int call_offset = __ call_RT(V0, noreg, CAST_FROM_FN_PTR(address, new_multi_array),
1257 V0,T2,T0);
1258 oop_maps = new OopMapSet();
1259 oop_maps->add_gc_map(call_offset, map);
1260 //FIXME
1261 restore_live_registers_except_V0(sasm);
1262 // V0: new multi array
1263 __ verify_oop(V0);
1264 }
1265 break;
1268 case register_finalizer_id:
1269 {
1270 __ set_info("register_finalizer", dont_gc_arguments);
1272 // The object is passed on the stack and we haven't pushed a
1273 // frame yet so it's one work away from top of stack.
1274 //reference to LIRGenerator::do_RegisterFinalizer, call_runtime
1275 __ move(V0, A0);
1276 __ verify_oop(V0);
1277 // load the klass and check the has finalizer flag
1278 Label register_finalizer;
1279 #ifndef _LP64
1280 Register t = T5;
1281 #else
1282 Register t = A5;
1283 #endif
1284 //__ ld_ptr(t, Address(V0, oopDesc::klass_offset_in_bytes()));
1285 __ load_klass(t, V0);
1286 __ lw(t, Address(t, Klass::access_flags_offset()));
1287 __ move(AT, JVM_ACC_HAS_FINALIZER);
1288 __ andr(AT, AT, t);
1290 __ bne(AT, R0, register_finalizer);
1291 __ delayed()->nop();
1292 __ jr(RA);
1293 __ delayed()->nop();
1294 __ bind(register_finalizer);
1295 __ enter();
1296 OopMap* map = save_live_registers(sasm, 0 /*num_rt_args */);
1298 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1299 SharedRuntime::register_finalizer), V0);
1300 oop_maps = new OopMapSet();
1301 oop_maps->add_gc_map(call_offset, map);
1303 // Now restore all the live registers
1304 restore_live_registers(sasm);
1306 __ leave();
1307 __ jr(RA);
1308 __ delayed()->nop();
1309 }
1310 break;
1312 // case range_check_failed_id:
1313 case throw_range_check_failed_id:
1314 {
1315 StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1316 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1317 throw_range_check_exception),true);
1318 }
1319 break;
1321 case throw_index_exception_id:
1322 {
1323 // i use A1 as the index register, for this will be the first argument, see call_RT
1324 StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1325 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1326 throw_index_exception), true);
1327 }
1328 break;
1330 case throw_div0_exception_id:
1331 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1332 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1333 throw_div0_exception), false);
1334 }
1335 break;
1337 case throw_null_pointer_exception_id:
1338 {
1339 StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1340 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1341 throw_null_pointer_exception),false);
1342 }
1343 break;
1345 case handle_exception_nofpu_id:
1346 save_fpu_registers = false;
1347 // fall through
1348 case handle_exception_id:
1349 {
1350 StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1351 //OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers);
1352 oop_maps = generate_handle_exception(id, sasm);
1353 }
1354 break;
1355 case handle_exception_from_callee_id:
1356 {
1357 StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1358 oop_maps = generate_handle_exception(id, sasm);
1359 }
1360 break;
1361 case unwind_exception_id:
1362 {
1363 __ set_info("unwind_exception", dont_gc_arguments);
1364 generate_unwind_exception(sasm);
1365 }
1366 break;
1369 case throw_array_store_exception_id:
1370 {
1371 StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1372 // tos + 0: link
1373 // + 1: return address
1374 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1375 throw_array_store_exception), false);
1376 }
1377 break;
1379 case throw_class_cast_exception_id:
1380 {
1381 StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1382 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1383 throw_class_cast_exception), true);
1384 }
1385 break;
1387 case throw_incompatible_class_change_error_id:
1388 {
1389 StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1390 oop_maps = generate_exception_throw(sasm,
1391 CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1392 }
1393 break;
1395 case slow_subtype_check_id:
1396 {
1397 //actually , We do not use it
1398 // A0:klass_RInfo sub
1399 // A1:k->encoding() super
1400 __ set_info("slow_subtype_check", dont_gc_arguments);
1401 __ st_ptr(T0, SP, (-1) * wordSize);
1402 __ st_ptr(T1, SP, (-2) * wordSize);
1403 __ addiu(SP, SP, (-2) * wordSize);
1405 Label miss;
1406 __ check_klass_subtype_slow_path(A0, A1, T0, T1, NULL, &miss);
1408 __ addiu(V0, R0, 1);
1409 __ addiu(SP, SP, 2 * wordSize);
1410 __ ld_ptr(T0, SP, (-1) * wordSize);
1411 __ ld_ptr(T1, SP, (-2) * wordSize);
1412 __ jr(RA);
1413 __ delayed()->nop();
1416 __ bind(miss);
1417 __ move(V0, R0);
1418 __ addiu(SP, SP, 2 * wordSize);
1419 __ ld_ptr(T0, SP, (-1) * wordSize);
1420 __ ld_ptr(T1, SP, (-2) * wordSize);
1421 __ jr(RA);
1422 __ delayed()->nop();
1423 }
1424 break;
1426 case monitorenter_nofpu_id:
1427 save_fpu_registers = false;// fall through
1429 case monitorenter_id:
1430 {
1431 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1432 OopMap* map = save_live_registers(sasm, 0, save_fpu_registers);
1434 f.load_argument(1, V0); // V0: object
1435 #ifndef _LP64
1436 f.load_argument(0, T6); // T6: lock address
1437 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1438 monitorenter), V0, T6);
1439 #else
1440 f.load_argument(0, A6); // A6: lock address
1441 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1442 monitorenter), V0, A6);
1443 #endif
1445 oop_maps = new OopMapSet();
1446 oop_maps->add_gc_map(call_offset, map);
1447 restore_live_registers(sasm, save_fpu_registers);
1448 }
1449 break;
1451 case monitorexit_nofpu_id:
1452 save_fpu_registers = false;
1453 // fall through
1454 case monitorexit_id:
1455 {
1456 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1457 OopMap* map = save_live_registers(sasm, 0, save_fpu_registers);
1459 #ifndef _LP64
1460 f.load_argument(0, T6); // eax: lock address
1461 #else
1462 f.load_argument(0, A6); // A6: lock address
1463 #endif
1464 // note: really a leaf routine but must setup last java sp
1465 // => use call_RT for now (speed can be improved by
1466 // doing last java sp setup manually)
1467 #ifndef _LP64
1468 int call_offset = __ call_RT(noreg, noreg,
1469 CAST_FROM_FN_PTR(address, monitorexit), T6);
1470 #else
1471 int call_offset = __ call_RT(noreg, noreg,
1472 CAST_FROM_FN_PTR(address, monitorexit), A6);
1473 #endif
1474 oop_maps = new OopMapSet();
1475 oop_maps->add_gc_map(call_offset, map);
1476 restore_live_registers(sasm, save_fpu_registers);
1478 }
1479 break;
1480 // case init_check_patching_id:
1481 case access_field_patching_id:
1482 {
1483 StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1484 // we should set up register map
1485 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1487 }
1488 break;
1490 case load_klass_patching_id:
1491 {
1492 StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1493 // we should set up register map
1494 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address,
1495 move_klass_patching));
1496 }
1497 break;
1498 /* case jvmti_exception_throw_id:
1499 {
1500 // V0: exception oop
1501 // V1: exception pc
1502 StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments);
1503 // Preserve all registers across this potentially blocking call
1504 const int num_rt_args = 2; // thread, exception oop
1505 //OopMap* map = save_live_registers(sasm, num_rt_args);
1506 OopMap* map = save_live_registers(sasm, 0);
1507 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1508 Runtime1::post_jvmti_exception_throw), V0);
1509 oop_maps = new OopMapSet();
1510 oop_maps->add_gc_map(call_offset, map);
1511 restore_live_registers(sasm);
1512 }*/
1513 case load_mirror_patching_id:
1514 {
1515 StubFrame f(sasm, "load_mirror_patching" , dont_gc_arguments);
1516 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1517 }
1518 break;
1520 case load_appendix_patching_id:
1521 {
1522 StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1523 // we should set up register map
1524 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1525 }
1526 break;
1528 case dtrace_object_alloc_id:
1529 {
1530 // V0:object
1531 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1532 // we can't gc here so skip the oopmap but make sure that all
1533 // the live registers get saved.
1534 save_live_registers(sasm, 0);
1536 __ push_reg(V0);
1537 __ move(A0, V0);
1538 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
1539 relocInfo::runtime_call_type);
1540 __ delayed()->nop();
1541 __ super_pop(V0);
1543 restore_live_registers(sasm);
1544 }
1545 break;
1547 case fpu2long_stub_id:
1548 {
1549 //FIXME, I hava no idea how to port this
1550 //tty->print_cr("fpu2long_stub_id unimplemented yet!");
1551 }
1552 break;
1554 case deoptimize_id:
1555 {
1556 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1557 const int num_rt_args = 1; // thread
1558 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1559 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize));
1560 oop_maps = new OopMapSet();
1561 oop_maps->add_gc_map(call_offset, oop_map);
1562 restore_live_registers(sasm);
1563 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1564 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1565 __ leave();
1566 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
1567 __ delayed()->nop();
1568 }
1569 break;
1571 case predicate_failed_trap_id:
1572 {
1573 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1575 OopMap* map = save_live_registers(sasm, 1);
1577 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1578 oop_maps = new OopMapSet();
1579 oop_maps->add_gc_map(call_offset, map);
1580 restore_live_registers(sasm);
1581 __ leave();
1582 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1583 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1585 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
1586 __ delayed()->nop();
1587 }
1588 break;
1590 default:
1591 {
1592 StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1593 __ move(A1, (int)id);
1594 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), A1);
1595 __ should_not_reach_here();
1596 }
1597 break;
1598 }
1599 return oop_maps;
1600 }
1602 #undef __
1604 const char *Runtime1::pd_name_for_address(address entry) {
1605 return "<unknown function>";
1606 }
