Mercurial > jdk8-mips64-public > hotspot / file revision
src/cpu/mips/vm/c1_Runtime1_mips.cpp@7ebfb115ed31
src/cpu/mips/vm/c1_Runtime1_mips.cpp
Thu, 21 Jun 2018 14:54:56 +0800
- author
- fujie
- date
- Thu, 21 Jun 2018 14:54:56 +0800
- changeset 9153
- 7ebfb115ed31
- parent 9135
- 69fd39209afe
- child 9161
- 97a8ece254bc
- permissions
- -rw-r--r--
#7209 [C1] C1 runs OK for Preempt
Fix an assert error ==>
# Internal Error (/home/zhaixiang/project/loongson/jdk8-mips-c1/hotspot/src/share/vm/runtime/safepoint.cpp:980), pid=29826, tid=0x000000ffe83771f0
# assert(stub_cb->is_safepoint_stub()) failed: must be a safepoint stub
1 /*
2 * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/assembler.hpp"
28 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "nativeInst_mips.hpp"
33 #include "oops/compiledICHolder.hpp"
34 #include "oops/oop.inline.hpp"
35 #include "prims/jvmtiExport.hpp"
36 #include "register_mips.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/signature.hpp"
39 #include "runtime/vframeArray.hpp"
40 #include "utilities/macros.hpp"
41 #include "vmreg_mips.inline.hpp"
42 #if INCLUDE_ALL_GCS
43 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
44 #endif
47 // Implementation of StubAssembler
48 // this method will preserve the stack space for arguments as indicated by args_size
49 // for stack alignment consideration, you cannot call this with argument in stack.
50 // if you need >3 arguments, you must implement this method yourself.
51 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
52 // i use S7 for edi.
53 // setup registers
54 const Register thread = TREG; // is callee-saved register (Visual C++ calling conventions)
55 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
56 assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
57 assert(args_size >= 0, "illegal args_size");
58 bool align_stack = false;
59 #ifdef _LP64
60 // At a method handle call, the stack may not be properly aligned
61 // when returning with an exception.
62 align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
63 #endif
65 set_num_rt_args(1 + args_size);
68 // push java thread (becomes first argument of C function)
69 get_thread(thread);
70 move(A0, thread);
72 int call_offset;
73 if(!align_stack) {
74 set_last_Java_frame(thread, NOREG, FP, NULL);
75 } else {
76 address the_pc = pc();
77 call_offset = offset();
78 set_last_Java_frame(thread, NOREG, FP, the_pc);
79 move(AT, -(StackAlignmentInBytes));
80 andr(SP, SP, AT);
81 }
83 relocate(relocInfo::internal_pc_type);
84 {
85 #ifndef _LP64
86 int save_pc = (int)pc() + 12 + NativeCall::return_address_offset;
87 lui(AT, Assembler::split_high(save_pc));
88 addiu(AT, AT, Assembler::split_low(save_pc));
89 #else
90 uintptr_t save_pc = (uintptr_t)pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset_long;
91 li48(AT, save_pc);
92 #endif
93 }
94 st_ptr(AT, thread, in_bytes(JavaThread::last_Java_pc_offset()));
96 // do the call
97 #ifndef _LP64
98 lui(T9, Assembler::split_high((int)entry));
99 addiu(T9, T9, Assembler::split_low((int)entry));
100 #else
101 li48(T9, (intptr_t)entry);
102 #endif
103 jalr(T9);
104 delayed()->nop();
105 if (!align_stack) {
106 call_offset = offset();
107 }
109 // verify callee-saved register
110 #ifdef ASSERT
111 guarantee(thread != V0, "change this code");
112 push(V0);
113 {
114 Label L;
115 get_thread(V0);
116 beq(thread, V0, L);
117 delayed()->nop();
118 int3();
119 stop("StubAssembler::call_RT: edi not callee saved?");
120 bind(L);
121 }
122 super_pop(V0);
123 #endif
124 // discard thread and arguments
125 ld_ptr(SP, thread, in_bytes(JavaThread::last_Java_sp_offset())); //by yyq
126 //FIXME , in x86 version , the second parameter is false, why true here? @jerome, 12/31, 06
127 // reset_last_Java_frame(thread, true);
128 reset_last_Java_frame(thread, true, true);
129 // check for pending exceptions
130 {
131 Label L;
132 ld_ptr(AT, thread, in_bytes(Thread::pending_exception_offset()));
133 beq(AT, R0, L);
134 delayed()->nop();
135 // exception pending => remove activation and forward to exception handler
136 // make sure that the vm_results are cleared
137 if (oop_result1->is_valid()) {
138 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_offset()));
139 }
140 if (metadata_result->is_valid()) {
141 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_2_offset()));
142 }
143 // the leave() in x86 just pops ebp and remains the return address on the top
144 // of stack
145 // the return address will be needed by forward_exception_entry()
146 if (frame_size() == no_frame_size) {
147 addiu(SP, FP, wordSize);
148 ld_ptr(FP, SP, (-1) * wordSize);
149 jmp(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
150 delayed()->nop();
151 } else if (_stub_id == Runtime1::forward_exception_id) {
152 should_not_reach_here();
153 } else {
154 jmp(Runtime1::entry_for(Runtime1::forward_exception_id), relocInfo::runtime_call_type);
155 delayed()->nop();
156 }
157 bind(L);
158 }
159 // get oop results if there are any and reset the values in the thread
160 if (oop_result1->is_valid()) {
161 ld_ptr(oop_result1, thread, in_bytes(JavaThread::vm_result_offset()));
162 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_offset()));
163 verify_oop(oop_result1);
164 }
165 if (metadata_result->is_valid()) {
166 ld_ptr(metadata_result, thread, in_bytes(JavaThread::vm_result_2_offset()));
167 st_ptr(R0, thread, in_bytes(JavaThread::vm_result_2_offset()));
168 verify_oop(metadata_result);
169 }
170 return call_offset;
171 }
174 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
175 if (arg1 != A1) move(A1, arg1);
176 return call_RT(oop_result1, metadata_result, entry, 1);
177 }
180 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
181 if (arg1!=A1) move(A1, arg1);
182 if (arg2!=A2) move(A2, arg2); assert(arg2 != A1, "smashed argument");
183 return call_RT(oop_result1, metadata_result, entry, 2);
184 }
187 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
188 if (arg1!=A1) move(A1, arg1);
189 if (arg2!=A2) move(A2, arg2); assert(arg2 != A1, "smashed argument");
190 if (arg3!=A3) move(A3, arg3); assert(arg3 != A1 && arg3 != A2, "smashed argument");
191 return call_RT(oop_result1, metadata_result, entry, 3);
192 }
195 // Implementation of StubFrame
197 class StubFrame: public StackObj {
198 private:
199 StubAssembler* _sasm;
201 public:
202 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
203 void load_argument(int offset_in_words, Register reg);
205 ~StubFrame();
206 };
209 #define __ _sasm->
211 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
212 _sasm = sasm;
213 __ set_info(name, must_gc_arguments);
214 __ enter();
215 }
218 //FIXME, I have no idea the frame architecture of mips
219 // load parameters that were stored with LIR_Assembler::store_parameter
220 // Note: offsets for store_parameter and load_argument must match
221 void StubFrame::load_argument(int offset_in_words, Register reg) {
222 //ebp + 0: link
223 // + 1: return address
224 // + 2: argument with offset 0
225 // + 3: argument with offset 1
226 // + 4: ...
227 __ ld_ptr(reg, Address(FP, (offset_in_words + 2) * BytesPerWord));
228 }
231 StubFrame::~StubFrame() {
232 __ leave();
233 __ jr(RA);
234 __ delayed()->nop();
235 }
237 #undef __
240 // Implementation of Runtime1
242 #define __ sasm->
244 //static OopMap* save_live_registers(MacroAssembler* sasm, int num_rt_args);
245 //static void restore_live_registers(MacroAssembler* sasm);
246 //DeoptimizationBlob* SharedRuntime::_deopt_blob = NULL;
247 /*
248 const int fpu_stack_as_doubles_size_in_words = 16;
249 const int fpu_stack_as_doubles_size = 64;
250 */
251 const int float_regs_as_doubles_size_in_words = 16;
253 //FIXME,
254 // Stack layout for saving/restoring all the registers needed during a runtime
255 // call (this includes deoptimization)
256 // Note: note that users of this frame may well have arguments to some runtime
257 // while these values are on the stack. These positions neglect those arguments
258 // but the code in save_live_registers will take the argument count into
259 // account.
260 //
261 #ifdef _LP64
262 #define SLOT2(x) x,
263 #define SLOT_PER_WORD 2
264 #else
265 #define SLOT2(x)
266 #define SLOT_PER_WORD 1
267 #endif // _LP64
269 enum reg_save_layout {
270 #ifndef _LP64
271 T0_off = 0,
272 S0_off = T0_off + SLOT_PER_WORD * 8,
273 #else
274 A4_off = 0,
275 S0_off = A4_off + SLOT_PER_WORD * 8,
276 #endif
277 FP_off = S0_off + SLOT_PER_WORD * 8, SLOT2(FPH_off)
278 T8_off, SLOT2(T8H_off)
279 T9_off, SLOT2(T9H_off)
280 SP_off, SLOT2(SPH_off)
281 V0_off, SLOT2(V0H_off)
282 V1_off, SLOT2(V1H_off)
283 A0_off, SLOT2(A0H_off)
284 A1_off, SLOT2(A1H_off)
285 A2_off, SLOT2(A2H_off)
286 A3_off, SLOT2(A3H_off)
288 // Float registers
289 /* FIXME: Jin: In MIPS64, F0~23 are all caller-saved registers */
290 F0_off, SLOT2( F0H_off)
291 F1_off, SLOT2( F1H_off)
292 F2_off, SLOT2( F2H_off)
293 F3_off, SLOT2( F3H_off)
294 F4_off, SLOT2( F4H_off)
295 F5_off, SLOT2( F5H_off)
296 F6_off, SLOT2( F6H_off)
297 F7_off, SLOT2( F7H_off)
298 F8_off, SLOT2( F8H_off)
299 F9_off, SLOT2( F9H_off)
300 F10_off, SLOT2( F10H_off)
301 F11_off, SLOT2( F11H_off)
302 F12_off, SLOT2( F12H_off)
303 F13_off, SLOT2( F13H_off)
304 F14_off, SLOT2( F14H_off)
305 F15_off, SLOT2( F15H_off)
306 F16_off, SLOT2( F16H_off)
307 F17_off, SLOT2( F17H_off)
308 F18_off, SLOT2( F18H_off)
309 F19_off, SLOT2( F19H_off)
311 GP_off, SLOT2( GPH_off)
312 //temp_2_off,
313 temp_1_off, SLOT2(temp_1H_off)
314 saved_fp_off, SLOT2(saved_fpH_off)
315 return_off, SLOT2(returnH_off)
317 reg_save_frame_size,
319 // illegal instruction handler
320 continue_dest_off = temp_1_off,
322 // deoptimization equates
323 //deopt_type = temp_2_off, // slot for type of deopt in progress
324 ret_type = temp_1_off // slot for return type
325 };
329 // Save off registers which might be killed by calls into the runtime.
330 // Tries to smart of about FP registers. In particular we separate
331 // saving and describing the FPU registers for deoptimization since we
332 // have to save the FPU registers twice if we describe them and on P4
333 // saving FPU registers which don't contain anything appears
334 // expensive. The deopt blob is the only thing which needs to
335 // describe FPU registers. In all other cases it should be sufficient
336 // to simply save their current value.
337 //FIXME, I have no idea which register should be saved . @jerome
338 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
339 bool save_fpu_registers = true, bool describe_fpu_registers = false) {
341 LP64_ONLY(num_rt_args = 0);
342 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
343 int frame_size_in_slots = reg_save_frame_size + num_rt_args * wordSize / VMRegImpl::slots_per_word; // args + thread
344 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
346 // record saved value locations in an OopMap
347 // locations are offsets from sp after runtime call; num_rt_args is number of arguments
348 // in call, including thread
349 OopMap* map = new OopMap(reg_save_frame_size, 0);
351 map->set_callee_saved(VMRegImpl::stack2reg(V0_off + num_rt_args), V0->as_VMReg());
352 map->set_callee_saved(VMRegImpl::stack2reg(V1_off + num_rt_args), V1->as_VMReg());
353 #ifdef _LP64
354 map->set_callee_saved(VMRegImpl::stack2reg(V0H_off + num_rt_args), V0->as_VMReg()->next());
355 map->set_callee_saved(VMRegImpl::stack2reg(V1H_off + num_rt_args), V1->as_VMReg()->next());
356 #endif
358 int i = 0;
359 #ifndef _LP64
360 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
361 map->set_callee_saved(VMRegImpl::stack2reg(T0_off + num_rt_args + i++), r->as_VMReg());
362 }
363 #else
364 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
365 map->set_callee_saved(VMRegImpl::stack2reg(A4_off + num_rt_args + i++), r->as_VMReg());
366 map->set_callee_saved(VMRegImpl::stack2reg(A4_off + num_rt_args + i++), r->as_VMReg()->next());
367 }
368 #endif
370 i = 0;
371 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
372 map->set_callee_saved(VMRegImpl::stack2reg(S0_off + num_rt_args + i++), r->as_VMReg());
373 #ifdef _LP64
374 map->set_callee_saved(VMRegImpl::stack2reg(S0_off + num_rt_args + i++), r->as_VMReg()->next());
375 #endif
376 }
378 map->set_callee_saved(VMRegImpl::stack2reg(FP_off + num_rt_args), FP->as_VMReg());
379 map->set_callee_saved(VMRegImpl::stack2reg(GP_off + num_rt_args), GP->as_VMReg());
380 map->set_callee_saved(VMRegImpl::stack2reg(T8_off + num_rt_args), T8->as_VMReg());
381 map->set_callee_saved(VMRegImpl::stack2reg(T9_off + num_rt_args), T9->as_VMReg());
382 map->set_callee_saved(VMRegImpl::stack2reg(A0_off + num_rt_args), A0->as_VMReg());
383 map->set_callee_saved(VMRegImpl::stack2reg(A1_off + num_rt_args), A1->as_VMReg());
384 map->set_callee_saved(VMRegImpl::stack2reg(A2_off + num_rt_args), A2->as_VMReg());
385 map->set_callee_saved(VMRegImpl::stack2reg(A3_off + num_rt_args), A3->as_VMReg());
387 map->set_callee_saved(VMRegImpl::stack2reg(F0_off + num_rt_args), F0->as_VMReg());
388 map->set_callee_saved(VMRegImpl::stack2reg(F1_off + num_rt_args), F1->as_VMReg());
389 map->set_callee_saved(VMRegImpl::stack2reg(F2_off + num_rt_args), F2->as_VMReg());
390 map->set_callee_saved(VMRegImpl::stack2reg(F3_off + num_rt_args), F1->as_VMReg());
391 map->set_callee_saved(VMRegImpl::stack2reg(F4_off + num_rt_args), F4->as_VMReg());
392 map->set_callee_saved(VMRegImpl::stack2reg(F5_off + num_rt_args), F4->as_VMReg());
393 map->set_callee_saved(VMRegImpl::stack2reg(F6_off + num_rt_args), F4->as_VMReg());
394 map->set_callee_saved(VMRegImpl::stack2reg(F7_off + num_rt_args), F4->as_VMReg());
395 map->set_callee_saved(VMRegImpl::stack2reg(F8_off + num_rt_args), F4->as_VMReg());
396 map->set_callee_saved(VMRegImpl::stack2reg(F9_off + num_rt_args), F4->as_VMReg());
397 map->set_callee_saved(VMRegImpl::stack2reg(F10_off + num_rt_args), F4->as_VMReg());
398 map->set_callee_saved(VMRegImpl::stack2reg(F11_off + num_rt_args), F4->as_VMReg());
399 map->set_callee_saved(VMRegImpl::stack2reg(F12_off + num_rt_args), F12->as_VMReg());
400 map->set_callee_saved(VMRegImpl::stack2reg(F13_off + num_rt_args), F13->as_VMReg());
401 map->set_callee_saved(VMRegImpl::stack2reg(F14_off + num_rt_args), F14->as_VMReg());
402 map->set_callee_saved(VMRegImpl::stack2reg(F15_off + num_rt_args), F15->as_VMReg());
403 map->set_callee_saved(VMRegImpl::stack2reg(F16_off + num_rt_args), F16->as_VMReg());
404 map->set_callee_saved(VMRegImpl::stack2reg(F17_off + num_rt_args), F17->as_VMReg());
405 map->set_callee_saved(VMRegImpl::stack2reg(F18_off + num_rt_args), F18->as_VMReg());
406 map->set_callee_saved(VMRegImpl::stack2reg(F19_off + num_rt_args), F19->as_VMReg());
408 #ifdef _LP64
409 map->set_callee_saved(VMRegImpl::stack2reg(FPH_off + num_rt_args), FP->as_VMReg()->next());
410 map->set_callee_saved(VMRegImpl::stack2reg(GPH_off + num_rt_args), GP->as_VMReg()->next());
411 map->set_callee_saved(VMRegImpl::stack2reg(T8H_off + num_rt_args), T8->as_VMReg()->next());
412 map->set_callee_saved(VMRegImpl::stack2reg(T9H_off + num_rt_args), T9->as_VMReg()->next());
413 map->set_callee_saved(VMRegImpl::stack2reg(A0H_off + num_rt_args), A0->as_VMReg()->next());
414 map->set_callee_saved(VMRegImpl::stack2reg(A1H_off + num_rt_args), A1->as_VMReg()->next());
415 map->set_callee_saved(VMRegImpl::stack2reg(A2H_off + num_rt_args), A2->as_VMReg()->next());
416 map->set_callee_saved(VMRegImpl::stack2reg(A3H_off + num_rt_args), A3->as_VMReg()->next());
417 #endif
418 return map;
419 }
421 //FIXME, Is it enough to save this registers by yyq
422 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
423 bool save_fpu_registers = true,
424 bool describe_fpu_registers = false) {
425 //const int reg_save_frame_size = return_off + 1 + num_rt_args;
426 __ block_comment("save_live_registers");
428 // save all register state - int, fpu
429 __ addi(SP, SP, -(reg_save_frame_size / SLOT_PER_WORD - 2)* wordSize);
431 #ifndef _LP64
432 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
433 __ sw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
434 #else
435 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
436 __ sd(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
437 #endif
438 }
439 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
440 __ st_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
441 }
442 __ st_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
443 __ st_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
444 __ st_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
445 __ st_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
446 __ st_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
447 __ st_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
448 __ st_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
449 __ st_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
450 __ st_ptr(V0, SP, V0_off * wordSize / SLOT_PER_WORD);
451 __ st_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
453 __ sdc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
454 __ sdc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
455 __ sdc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
456 __ sdc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
457 __ sdc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
458 __ sdc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
459 __ sdc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
460 __ sdc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
461 __ sdc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
462 __ sdc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
463 __ sdc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
464 __ sdc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
465 __ sdc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
466 __ sdc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
467 __ sdc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
468 __ sdc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
469 __ sdc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
470 __ sdc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
471 __ sdc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
472 __ sdc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
474 return generate_oop_map(sasm, num_rt_args, save_fpu_registers, describe_fpu_registers);
475 }
477 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) {
478 //static void restore_live_registers(MacroAssembler* sasm) {
479 #ifndef _LP64
480 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
481 __ lw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
482 #else
483 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
484 __ ld(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
485 #endif
486 }
487 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
488 __ ld_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
489 }
490 __ ld_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
491 __ ld_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
493 __ ld_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
494 __ ld_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
495 __ ld_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
496 __ ld_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
497 __ ld_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
498 __ ld_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
500 __ ld_ptr(V0, SP, V0_off * wordSize / SLOT_PER_WORD);
501 __ ld_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
503 __ ldc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
504 __ ldc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
505 __ ldc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
506 __ ldc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
507 __ ldc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
508 __ ldc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
509 __ ldc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
510 __ ldc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
511 __ ldc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
512 __ ldc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
513 __ ldc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
514 __ ldc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
515 __ ldc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
516 __ ldc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
517 __ ldc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
518 __ ldc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
519 __ ldc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
520 __ ldc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
521 __ ldc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
522 __ ldc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
524 __ addiu(SP, SP, (reg_save_frame_size / SLOT_PER_WORD - 2) * wordSize);
525 }
527 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
528 __ block_comment("restore_live_registers");
529 restore_fpu(sasm, restore_fpu_registers);
530 }
532 static void restore_live_registers_except_V0(StubAssembler* sasm, bool restore_fpu_registers = true) {
533 //static void restore_live_registers(MacroAssembler* sasm) {
534 //FIXME , maybe V1 need to be saved too
535 __ block_comment("restore_live_registers except V0");
536 #ifndef _LP64
537 for (Register r = T0; r != T7->successor(); r = r->successor() ) {
538 __ lw(r, SP, (r->encoding() - T0->encoding() + T0_off / SLOT_PER_WORD) * wordSize);
539 #else
540 for (Register r = A4; r != T3->successor(); r = r->successor() ) {
541 __ ld(r, SP, (r->encoding() - A4->encoding() + A4_off / SLOT_PER_WORD) * wordSize);
542 #endif
543 }
544 for (Register r = S0; r != S7->successor(); r = r->successor() ) {
545 __ ld_ptr(r, SP, (r->encoding() - S0->encoding() + S0_off / SLOT_PER_WORD) * wordSize);
546 }
547 __ ld_ptr(FP, SP, FP_off * wordSize / SLOT_PER_WORD);
548 __ ld_ptr(GP, SP, GP_off * wordSize / SLOT_PER_WORD);
550 __ ld_ptr(T8, SP, T8_off * wordSize / SLOT_PER_WORD);
551 __ ld_ptr(T9, SP, T9_off * wordSize / SLOT_PER_WORD);
552 __ ld_ptr(A0, SP, A0_off * wordSize / SLOT_PER_WORD);
553 __ ld_ptr(A1, SP, A1_off * wordSize / SLOT_PER_WORD);
554 __ ld_ptr(A2, SP, A2_off * wordSize / SLOT_PER_WORD);
555 __ ld_ptr(A3, SP, A3_off * wordSize / SLOT_PER_WORD);
557 #if 1
558 __ ldc1(F0, SP, F0_off * wordSize / SLOT_PER_WORD);
559 __ ldc1(F1, SP, F1_off * wordSize / SLOT_PER_WORD);
560 __ ldc1(F2, SP, F2_off * wordSize / SLOT_PER_WORD);
561 __ ldc1(F3, SP, F3_off * wordSize / SLOT_PER_WORD);
562 __ ldc1(F4, SP, F4_off * wordSize / SLOT_PER_WORD);
563 __ ldc1(F5, SP, F5_off * wordSize / SLOT_PER_WORD);
564 __ ldc1(F6, SP, F6_off * wordSize / SLOT_PER_WORD);
565 __ ldc1(F7, SP, F7_off * wordSize / SLOT_PER_WORD);
566 __ ldc1(F8, SP, F8_off * wordSize / SLOT_PER_WORD);
567 __ ldc1(F9, SP, F9_off * wordSize / SLOT_PER_WORD);
568 __ ldc1(F10, SP, F10_off * wordSize / SLOT_PER_WORD);
569 __ ldc1(F11, SP, F11_off * wordSize / SLOT_PER_WORD);
570 __ ldc1(F12, SP, F12_off * wordSize / SLOT_PER_WORD);
571 __ ldc1(F13, SP, F13_off * wordSize / SLOT_PER_WORD);
572 __ ldc1(F14, SP, F14_off * wordSize / SLOT_PER_WORD);
573 __ ldc1(F15, SP, F15_off * wordSize / SLOT_PER_WORD);
574 __ ldc1(F16, SP, F16_off * wordSize / SLOT_PER_WORD);
575 __ ldc1(F17, SP, F17_off * wordSize / SLOT_PER_WORD);
576 __ ldc1(F18, SP, F18_off * wordSize / SLOT_PER_WORD);
577 __ ldc1(F19, SP, F19_off * wordSize / SLOT_PER_WORD);
578 #endif
580 __ ld_ptr(V1, SP, V1_off * wordSize / SLOT_PER_WORD);
582 __ addiu(SP, SP, (reg_save_frame_size / SLOT_PER_WORD - 2) * wordSize);
583 }
585 void Runtime1::initialize_pd() {
586 // nothing to do
587 }
589 // target: the entry point of the method that creates and posts the exception oop
590 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
591 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
592 // preserve all registers
593 OopMap* oop_map = save_live_registers(sasm, 0);
595 // now all registers are saved and can be used freely
596 // verify that no old value is used accidentally
597 //all reigster are saved , I think mips do not need this
599 // registers used by this stub
600 const Register temp_reg = T3;
601 // load argument for exception that is passed as an argument into the stub
602 if (has_argument) {
603 __ ld_ptr(temp_reg, Address(FP, 2*BytesPerWord));
604 }
605 int call_offset;
606 if (has_argument)
607 call_offset = __ call_RT(noreg, noreg, target, temp_reg);
608 else
609 call_offset = __ call_RT(noreg, noreg, target);
611 OopMapSet* oop_maps = new OopMapSet();
612 oop_maps->add_gc_map(call_offset, oop_map);
614 __ stop("should not reach here");
616 return oop_maps;
617 }
619 //FIXME I do not know which reigster to use.should use T3 as real_return_addr @jerome
620 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
621 __ block_comment("generate_handle_exception");
623 // incoming parameters
624 const Register exception_oop = V0;
625 const Register exception_pc = V1;
626 // other registers used in this stub
627 // const Register real_return_addr = T3;
628 const Register thread = TREG;
629 #ifndef OPT_THREAD
630 __ get_thread(thread);
631 #endif
632 // Save registers, if required.
633 OopMapSet* oop_maps = new OopMapSet();
634 OopMap* oop_map = NULL;
635 switch (id) {
636 case forward_exception_id:
637 // We're handling an exception in the context of a compiled frame.
638 // The registers have been saved in the standard places. Perform
639 // an exception lookup in the caller and dispatch to the handler
640 // if found. Otherwise unwind and dispatch to the callers
641 // exception handler.
642 oop_map = generate_oop_map(sasm, 1 /*thread*/);
644 // load and clear pending exception oop into RAX
645 __ ld_ptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
646 __ st_ptr(R0, Address(thread, Thread::pending_exception_offset()));
648 // load issuing PC (the return address for this stub) into rdx
649 __ ld_ptr(exception_pc, Address(FP, 1*BytesPerWord));
651 // make sure that the vm_results are cleared (may be unnecessary)
652 __ st_ptr(R0, Address(thread, JavaThread::vm_result_offset()));
653 __ st_ptr(R0, Address(thread, JavaThread::vm_result_2_offset()));
654 break;
655 case handle_exception_nofpu_id:
656 case handle_exception_id:
657 // At this point all registers MAY be live.
658 oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
659 break;
660 case handle_exception_from_callee_id: {
661 // At this point all registers except exception oop (RAX) and
662 // exception pc (RDX) are dead.
663 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/);
664 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
665 sasm->set_frame_size(frame_size);
666 break;
667 }
668 default: ShouldNotReachHere();
669 }
671 #ifdef TIERED
672 // C2 can leave the fpu stack dirty
673 __ empty_FPU_stack();
674 #endif // TIERED
676 // verify that only V0 and V1 is valid at this time
677 // verify that V0 contains a valid exception
678 __ verify_not_null_oop(exception_oop);
680 // load address of JavaThread object for thread-local data
681 __ get_thread(thread);
683 #ifdef ASSERT
684 // check that fields in JavaThread for exception oop and issuing pc are
685 // empty before writing to them
686 Label oop_empty;
687 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
688 __ beq(AT, R0, oop_empty);
689 __ delayed()->nop();
690 __ stop("exception oop already set");
691 __ bind(oop_empty);
692 Label pc_empty;
693 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
694 __ beq(AT, R0, pc_empty);
695 __ delayed()->nop();
696 __ stop("exception pc already set");
697 __ bind(pc_empty);
698 #endif
700 // save exception oop and issuing pc into JavaThread
701 // (exception handler will load it from here)
702 __ st_ptr(exception_oop, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
703 __ st_ptr(exception_pc, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
705 // patch throwing pc into return address (has bci & oop map)
706 __ st_ptr(exception_pc, Address(FP, 1*BytesPerWord));
708 // compute the exception handler.
709 // the exception oop and the throwing pc are read from the fields in JavaThread
710 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
711 oop_maps->add_gc_map(call_offset, oop_map);
712 // V0: handler address or NULL if no handler exists
713 // will be the deopt blob if nmethod was deoptimized while we looked up
714 // handler regardless of whether handler existed in the nmethod.
716 // only V0 is valid at this time, all other registers have been destroyed by the
717 // runtime call
719 // patch the return address -> the stub will directly return to the exception handler
720 __ st_ptr(V0, Address(FP, 1 * BytesPerWord));
722 switch (id) {
723 case forward_exception_id:
724 case handle_exception_nofpu_id:
725 case handle_exception_id:
726 // Restore the registers that were saved at the beginning.
727 restore_live_registers(sasm, id != handle_exception_nofpu_id);
728 break;
729 case handle_exception_from_callee_id:
730 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
731 // since we do a leave anyway.
733 // Pop the return address since we are possibly changing SP (restoring from BP).
734 __ leave();
735 // Restore SP from BP if the exception PC is a method handle call site.
736 {
737 Label done;
738 __ ld(AT, Address(thread, JavaThread::is_method_handle_return_offset()));
739 __ beq(AT, R0, done);
740 __ delayed()->nop();
741 __ bind(done);
742 }
743 __ jr(RA); // jump to exception handler
744 __ delayed()->nop();
745 break;
746 default: ShouldNotReachHere();
747 }
749 return oop_maps;
750 }
756 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
757 // incoming parameters
758 const Register exception_oop = V0;
759 // callee-saved copy of exception_oop during runtime call
760 const Register exception_oop_callee_saved = S0;
761 // other registers used in this stub
762 const Register exception_pc = V1;
763 const Register handler_addr = T3;
764 const Register thread = TREG;
766 // verify that only eax is valid at this time
767 // __ invalidate_registers(false, true, true, true, true, true);
769 #ifdef ASSERT
770 // check that fields in JavaThread for exception oop and issuing pc are empty
771 __ get_thread(thread);
772 Label oop_empty;
773 __ ld_ptr(AT, thread, in_bytes(JavaThread::exception_oop_offset()));
774 __ beq(AT, R0, oop_empty);
775 __ delayed()->nop();
776 __ stop("exception oop must be empty");
777 __ bind(oop_empty);
779 Label pc_empty;
780 __ ld_ptr(AT, thread, in_bytes(JavaThread::exception_pc_offset()));
781 __ beq(AT, R0, pc_empty);
782 __ delayed()->nop();
783 __ stop("exception pc must be empty");
784 __ bind(pc_empty);
785 #endif
786 // clear the FPU stack in case any FPU results are left behind
787 __ empty_FPU_stack();
789 // save exception_oop in callee-saved register to preserve it during runtime calls
790 __ verify_not_null_oop(exception_oop);
791 __ move(exception_oop_callee_saved, exception_oop);
793 #ifndef OPT_THREAD
794 __ get_thread(thread);
795 #endif
796 // Get return address (is on top of stack after leave).
797 // store return address (is on top of stack after leave)
799 __ ld_ptr(exception_pc, SP, 0);
801 // search the exception handler address of the caller (using the return address)
802 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
803 // V0: exception handler address of the caller
805 // only eax is valid at this time, all other registers have been destroyed by the call
807 // move result of call into correct register
808 __ move(handler_addr, V0);
810 // Restore exception oop to V0 (required convention of exception handler).
811 __ move(exception_oop, exception_oop_callee_saved);
813 // verify that there is really a valid exception in V0
814 __ verify_oop(exception_oop);
816 // get throwing pc (= return address).
817 // V1 has been destroyed by the call, so it must be set again
818 // the pop is also necessary to simulate the effect of a ret(0)
819 __ super_pop(exception_pc);
821 // continue at exception handler (return address removed)
822 // note: do *not* remove arguments when unwinding the
823 // activation since the caller assumes having
824 // all arguments on the stack when entering the
825 // runtime to determine the exception handler
826 // (GC happens at call site with arguments!)
827 // V0: exception oop
828 // V1: throwing pc
829 // T3: exception handler
830 __ jr(handler_addr);
831 __ delayed()->nop();
832 }
837 //static address deopt_with_exception_entry_for_patch = NULL;
839 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
841 // use the maximum number of runtime-arguments here because it is difficult to
842 // distinguish each RT-Call.
843 // Note: This number affects also the RT-Call in generate_handle_exception because
844 // the oop-map is shared for all calls.
846 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
847 assert(deopt_blob != NULL, "deoptimization blob must have been created");
848 // assert(deopt_with_exception_entry_for_patch != NULL,
849 // "deoptimization blob must have been created");
851 //OopMap* oop_map = save_live_registers(sasm, num_rt_args);
852 OopMap* oop_map = save_live_registers(sasm, 0);
853 const Register thread = T8;
854 // push java thread (becomes first argument of C function)
855 __ get_thread(thread);
856 __ move(A0, thread);
859 /*
860 * NOTE: this frame should be compiled frame, but at this point, the pc in frame-anchor
861 * is contained in interpreter. It should be wrong, and should be cleared but is not.
862 * even if we cleared the wrong pc in anchor, the default way to get caller pc in class frame
863 * is not right. It depends on that the caller pc is stored in *(sp - 1) but it's not the case
864 */
865 __ set_last_Java_frame(thread, NOREG, FP, NULL);
866 NOT_LP64(__ addiu(SP, SP, (-1) * wordSize));
867 __ move(AT, -(StackAlignmentInBytes));
868 __ andr(SP, SP, AT);
869 __ relocate(relocInfo::internal_pc_type);
870 {
871 #ifndef _LP64
872 int save_pc = (int)__ pc() + 12 + NativeCall::return_address_offset;
873 __ lui(AT, Assembler::split_high(save_pc));
874 __ addiu(AT, AT, Assembler::split_low(save_pc));
875 #else
876 uintptr_t save_pc = (uintptr_t)__ pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset_long;
877 __ li48(AT, save_pc);
878 #endif
879 }
880 __ st_ptr(AT, thread, in_bytes(JavaThread::last_Java_pc_offset()));
882 // do the call
883 #ifndef _LP64
884 __ lui(T9, Assembler::split_high((int)target));
885 __ addiu(T9, T9, Assembler::split_low((int)target));
886 #else
887 __ li48(T9, (intptr_t)target);
888 #endif
889 __ jalr(T9);
890 __ delayed()->nop();
891 OopMapSet* oop_maps = new OopMapSet();
892 oop_maps->add_gc_map(__ offset(), oop_map);
894 __ get_thread(thread);
896 __ ld_ptr (SP, thread, in_bytes(JavaThread::last_Java_sp_offset()));
897 __ reset_last_Java_frame(thread, true,true);
898 // discard thread arg
899 // check for pending exceptions
900 {
901 Label L, skip;
902 //Label no_deopt;
903 __ ld_ptr(AT, thread, in_bytes(Thread::pending_exception_offset()));
904 __ beq(AT, R0, L);
905 __ delayed()->nop();
906 // exception pending => remove activation and forward to exception handler
908 __ bne(V0, R0, skip);
909 __ delayed()->nop();
910 __ jmp(Runtime1::entry_for(Runtime1::forward_exception_id),
911 relocInfo::runtime_call_type);
912 __ delayed()->nop();
913 __ bind(skip);
915 // the deopt blob expects exceptions in the special fields of
916 // JavaThread, so copy and clear pending exception.
918 // load and clear pending exception
919 __ ld_ptr(V0, Address(thread,in_bytes(Thread::pending_exception_offset())));
920 __ st_ptr(R0, Address(thread, in_bytes(Thread::pending_exception_offset())));
922 // check that there is really a valid exception
923 __ verify_not_null_oop(V0);
925 // load throwing pc: this is the return address of the stub
926 __ ld_ptr(V1, Address(SP, return_off * BytesPerWord));
929 #ifdef ASSERT
930 // check that fields in JavaThread for exception oop and issuing pc are empty
931 Label oop_empty;
932 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_oop_offset())));
933 __ beq(AT,R0,oop_empty);
934 __ delayed()->nop();
935 __ stop("exception oop must be empty");
936 __ bind(oop_empty);
938 Label pc_empty;
939 __ ld_ptr(AT, Address(thread, in_bytes(JavaThread::exception_pc_offset())));
940 __ beq(AT,R0,pc_empty);
941 __ delayed()->nop();
942 __ stop("exception pc must be empty");
943 __ bind(pc_empty);
944 #endif
946 // store exception oop and throwing pc to JavaThread
947 __ st_ptr(V0,Address(thread, in_bytes(JavaThread::exception_oop_offset())));
948 __ st_ptr(V1,Address(thread, in_bytes(JavaThread::exception_pc_offset())));
950 restore_live_registers(sasm);
952 __ leave();
954 // Forward the exception directly to deopt blob. We can blow no
955 // registers and must leave throwing pc on the stack. A patch may
956 // have values live in registers so the entry point with the
957 // exception in tls.
958 __ jmp(deopt_blob->unpack_with_exception_in_tls(), relocInfo::runtime_call_type);
959 __ delayed()->nop();
961 __ bind(L);
962 }
964 // Runtime will return true if the nmethod has been deoptimized during
965 // the patching process. In that case we must do a deopt reexecute instead.
967 Label reexecuteEntry, cont;
969 __ beq(V0, R0, cont); // have we deoptimized?
970 __ delayed()->nop();
972 // Will reexecute. Proper return address is already on the stack we just restore
973 // registers, pop all of our frame but the return address and jump to the deopt blob
974 restore_live_registers(sasm);
976 __ leave();
977 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
978 __ delayed()->nop();
980 __ bind(cont);
981 restore_live_registers(sasm);
983 __ leave();
984 __ jr(RA);
985 __ delayed()->nop();
987 return oop_maps;
988 }
991 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
992 // for better readability
993 const bool must_gc_arguments = true;
994 const bool dont_gc_arguments = false;
997 // default value; overwritten for some optimized stubs that are called
998 // from methods that do not use the fpu
999 bool save_fpu_registers = true;
1002 // stub code & info for the different stubs
1003 OopMapSet* oop_maps = NULL;
1005 switch (id) {
1006 case forward_exception_id:
1007 {
1008 oop_maps = generate_handle_exception(id, sasm);
1009 __ leave();
1010 __ jr(RA);
1011 __ delayed()->nop();
1012 }
1013 break;
1015 case new_instance_id:
1016 case fast_new_instance_id:
1017 case fast_new_instance_init_check_id:
1018 {
1019 Register klass = A4; // Incoming
1020 Register obj = V0; // Result
1022 if (id == new_instance_id) {
1023 __ set_info("new_instance", dont_gc_arguments);
1024 } else if (id == fast_new_instance_id) {
1025 __ set_info("fast new_instance", dont_gc_arguments);
1026 } else {
1027 assert(id == fast_new_instance_init_check_id, "bad StubID");
1028 __ set_info("fast new_instance init check", dont_gc_arguments);
1029 }
1031 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id)
1032 && UseTLAB && FastTLABRefill) {
1033 Label slow_path;
1034 Register obj_size = T0;
1035 Register t1 = T2;
1036 Register t2 = T3;
1037 assert_different_registers(klass, obj, obj_size, t1, t2);
1038 if (id == fast_new_instance_init_check_id) {
1039 // make sure the klass is initialized
1040 __ ld_ptr(AT, Address(klass, in_bytes(InstanceKlass::init_state_offset())));
1041 __ move(t1, InstanceKlass::fully_initialized);
1042 __ bne(AT, t1, slow_path);
1043 __ delayed()->nop();
1044 }
1045 #ifdef ASSERT
1046 // assert object can be fast path allocated
1047 {
1048 Label ok, not_ok;
1049 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1050 __ blez(obj_size, not_ok);
1051 __ delayed()->nop();
1052 __ andi(t1 , obj_size, Klass::_lh_instance_slow_path_bit);
1053 __ beq(t1, R0, ok);
1054 __ delayed()->nop();
1055 __ bind(not_ok);
1056 __ stop("assert(can be fast path allocated)");
1057 __ should_not_reach_here();
1058 __ bind(ok);
1059 }
1060 #endif // ASSERT
1061 // if we got here then the TLAB allocation failed, so try
1062 // refilling the TLAB or allocating directly from eden.
1064 Label retry_tlab, try_eden;
1065 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy edx (klass)
1067 __ bind(retry_tlab);
1069 // get the instance size
1070 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1071 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path);
1072 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
1073 __ verify_oop(obj);
1074 __ jr(RA);
1075 __ delayed()->nop();
1077 __ bind(try_eden);
1079 // get the instance size
1080 __ lw(obj_size, klass, in_bytes(Klass::layout_helper_offset()));
1081 __ eden_allocate(obj, obj_size, 0, t1, t2, slow_path);
1082 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
1083 __ verify_oop(obj);
1084 __ jr(RA);
1085 __ delayed()->nop();
1087 __ bind(slow_path);
1088 }
1089 __ enter();
1090 OopMap* map = save_live_registers(sasm, 0);
1091 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1092 oop_maps = new OopMapSet();
1093 oop_maps->add_gc_map(call_offset, map);
1094 restore_live_registers_except_V0(sasm);
1095 __ verify_oop(obj);
1096 __ leave();
1097 __ jr(RA);
1098 __ delayed()->nop();
1100 // V0: new instance
1101 }
1102 break;
1105 #ifdef TIERED
1106 //FIXME, I hava no idea which register to use
1107 case counter_overflow_id:
1108 {
1109 #ifndef _LP64
1110 Register bci = T5;
1111 #else
1112 Register bci = A5;
1113 #endif
1114 Register method = AT;
1115 __ enter();
1116 OopMap* map = save_live_registers(sasm, 0);
1117 // Retrieve bci
1118 __ lw(bci, Address(FP, 2*BytesPerWord));// FIXME:wuhui.ebp==??
1119 __ ld(method, Address(FP, 3*BytesPerWord));
1120 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1121 oop_maps = new OopMapSet();
1122 oop_maps->add_gc_map(call_offset, map);
1123 restore_live_registers(sasm);
1124 __ leave();
1125 __ jr(RA);
1126 __ delayed()->nop();
1127 }
1128 break;
1129 #endif // TIERED
1133 case new_type_array_id:
1134 case new_object_array_id:
1135 {
1136 // i use T2 as length register, T4 as klass register, V0 as result register.
1137 // MUST accord with NewTypeArrayStub::emit_code, NewObjectArrayStub::emit_code
1138 Register length = T2; // Incoming
1139 #ifndef _LP64
1140 Register klass = T4; // Incoming
1141 #else
1142 Register klass = A4; // Incoming
1143 #endif
1144 Register obj = V0; // Result
1146 if (id == new_type_array_id) {
1147 __ set_info("new_type_array", dont_gc_arguments);
1148 } else {
1149 __ set_info("new_object_array", dont_gc_arguments);
1150 }
1152 if (UseTLAB && FastTLABRefill) {
1153 Register arr_size = T0;
1154 Register t1 = T1;
1155 Register t2 = T3;
1156 Label slow_path;
1157 assert_different_registers(length, klass, obj, arr_size, t1, t2);
1159 // check that array length is small enough for fast path
1160 __ move(AT, C1_MacroAssembler::max_array_allocation_length);
1161 __ sltu(AT, AT, length);
1162 __ bne(AT, R0, slow_path);
1163 __ delayed()->nop();
1165 // if we got here then the TLAB allocation failed, so try
1166 // refilling the TLAB or allocating directly from eden.
1167 Label retry_tlab, try_eden;
1168 //T0,T1,T5,T8 have changed!
1169 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves T2 & T4
1171 __ bind(retry_tlab);
1173 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
1174 __ lw(t1, klass, in_bytes(Klass::layout_helper_offset()));
1175 __ andi(AT, t1, 0x1f);
1176 __ sllv(arr_size, length, AT);
1177 __ srl(t1, t1, Klass::_lh_header_size_shift);
1178 __ andi(t1, t1, Klass::_lh_header_size_mask);
1179 __ add(arr_size, t1, arr_size);
1180 __ addi(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up
1181 __ move(AT, ~MinObjAlignmentInBytesMask);
1182 __ andr(arr_size, arr_size, AT);
1185 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
1186 __ initialize_header(obj, klass, length,t1,t2);
1187 __ lbu(t1, Address(klass, in_bytes(Klass::layout_helper_offset())
1188 + (Klass::_lh_header_size_shift / BitsPerByte)));
1189 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1190 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1191 __ andi(t1, t1, Klass::_lh_header_size_mask);
1192 __ sub(arr_size, arr_size, t1); // body length
1193 __ add(t1, t1, obj); // body start
1194 __ initialize_body(t1, arr_size, 0, t2);
1195 __ verify_oop(obj);
1196 __ jr(RA);
1197 __ delayed()->nop();
1199 __ bind(try_eden);
1200 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
1201 __ lw(t1, klass, in_bytes(Klass::layout_helper_offset()));
1202 __ andi(AT, t1, 0x1f);
1203 __ sllv(arr_size, length, AT);
1204 __ srl(t1, t1, Klass::_lh_header_size_shift);
1205 __ andi(t1, t1, Klass::_lh_header_size_mask);
1206 __ add(arr_size, t1, arr_size);
1207 __ addi(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up
1208 __ move(AT, ~MinObjAlignmentInBytesMask);
1209 __ andr(arr_size, arr_size, AT);
1210 __ eden_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
1211 __ initialize_header(obj, klass, length,t1,t2);
1212 __ lbu(t1, Address(klass, in_bytes(Klass::layout_helper_offset())
1213 + (Klass::_lh_header_size_shift / BitsPerByte)));
1214 __ andi(t1, t1, Klass::_lh_header_size_mask);
1215 __ sub(arr_size, arr_size, t1); // body length
1216 __ add(t1, t1, obj); // body start
1218 __ initialize_body(t1, arr_size, 0, t2);
1219 __ verify_oop(obj);
1220 __ jr(RA);
1221 __ delayed()->nop();
1222 __ bind(slow_path);
1223 }
1226 __ enter();
1227 OopMap* map = save_live_registers(sasm, 0);
1228 int call_offset;
1229 if (id == new_type_array_id) {
1230 call_offset = __ call_RT(obj, noreg,
1231 CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1232 } else {
1233 call_offset = __ call_RT(obj, noreg,
1234 CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1235 }
1237 oop_maps = new OopMapSet();
1238 oop_maps->add_gc_map(call_offset, map);
1239 restore_live_registers_except_V0(sasm);
1240 __ verify_oop(obj);
1241 __ leave();
1242 __ jr(RA);
1243 __ delayed()->nop();
1244 }
1245 break;
1247 case new_multi_array_id:
1248 {
1249 StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1250 //refer to c1_LIRGenerate_mips.cpp:do_NewmultiArray
1251 // V0: klass
1252 // T2: rank
1253 // T0: address of 1st dimension
1254 //__ call_RT(V0, noreg, CAST_FROM_FN_PTR(address, new_multi_array), A1, A2, A3);
1255 //OopMap* map = save_live_registers(sasm, 4);
1256 OopMap* map = save_live_registers(sasm, 0);
1257 int call_offset = __ call_RT(V0, noreg, CAST_FROM_FN_PTR(address, new_multi_array),
1258 V0,T2,T0);
1259 oop_maps = new OopMapSet();
1260 oop_maps->add_gc_map(call_offset, map);
1261 //FIXME
1262 restore_live_registers_except_V0(sasm);
1263 // V0: new multi array
1264 __ verify_oop(V0);
1265 }
1266 break;
1269 case register_finalizer_id:
1270 {
1271 __ set_info("register_finalizer", dont_gc_arguments);
1273 // The object is passed on the stack and we haven't pushed a
1274 // frame yet so it's one work away from top of stack.
1275 //reference to LIRGenerator::do_RegisterFinalizer, call_runtime
1276 __ move(V0, A0);
1277 __ verify_oop(V0);
1278 // load the klass and check the has finalizer flag
1279 Label register_finalizer;
1280 #ifndef _LP64
1281 Register t = T5;
1282 #else
1283 Register t = A5;
1284 #endif
1285 //__ ld_ptr(t, Address(V0, oopDesc::klass_offset_in_bytes()));
1286 __ load_klass(t, V0);
1287 __ lw(t, Address(t, Klass::access_flags_offset()));
1288 __ move(AT, JVM_ACC_HAS_FINALIZER);
1289 __ andr(AT, AT, t);
1291 __ bne(AT, R0, register_finalizer);
1292 __ delayed()->nop();
1293 __ jr(RA);
1294 __ delayed()->nop();
1295 __ bind(register_finalizer);
1296 __ enter();
1297 OopMap* map = save_live_registers(sasm, 0 /*num_rt_args */);
1299 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1300 SharedRuntime::register_finalizer), V0);
1301 oop_maps = new OopMapSet();
1302 oop_maps->add_gc_map(call_offset, map);
1304 // Now restore all the live registers
1305 restore_live_registers(sasm);
1307 __ leave();
1308 __ jr(RA);
1309 __ delayed()->nop();
1310 }
1311 break;
1313 // case range_check_failed_id:
1314 case throw_range_check_failed_id:
1315 {
1316 StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1317 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1318 throw_range_check_exception),true);
1319 }
1320 break;
1322 case throw_index_exception_id:
1323 {
1324 // i use A1 as the index register, for this will be the first argument, see call_RT
1325 StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1326 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1327 throw_index_exception), true);
1328 }
1329 break;
1331 case throw_div0_exception_id:
1332 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1333 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1334 throw_div0_exception), false);
1335 }
1336 break;
1338 case throw_null_pointer_exception_id:
1339 {
1340 StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1341 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1342 throw_null_pointer_exception),false);
1343 }
1344 break;
1346 case handle_exception_nofpu_id:
1347 save_fpu_registers = false;
1348 // fall through
1349 case handle_exception_id:
1350 {
1351 StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1352 //OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers);
1353 oop_maps = generate_handle_exception(id, sasm);
1354 }
1355 break;
1356 case handle_exception_from_callee_id:
1357 {
1358 StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1359 oop_maps = generate_handle_exception(id, sasm);
1360 }
1361 break;
1362 case unwind_exception_id:
1363 {
1364 __ set_info("unwind_exception", dont_gc_arguments);
1365 generate_unwind_exception(sasm);
1366 }
1367 break;
1370 case throw_array_store_exception_id:
1371 {
1372 StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1373 // tos + 0: link
1374 // + 1: return address
1375 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1376 throw_array_store_exception), false);
1377 }
1378 break;
1380 case throw_class_cast_exception_id:
1381 {
1382 StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1383 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address,
1384 throw_class_cast_exception), true);
1385 }
1386 break;
1388 case throw_incompatible_class_change_error_id:
1389 {
1390 StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1391 oop_maps = generate_exception_throw(sasm,
1392 CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1393 }
1394 break;
1396 case slow_subtype_check_id:
1397 {
1398 //actually , We do not use it
1399 // A0:klass_RInfo sub
1400 // A1:k->encoding() super
1401 __ set_info("slow_subtype_check", dont_gc_arguments);
1402 __ st_ptr(T0, SP, (-1) * wordSize);
1403 __ st_ptr(T1, SP, (-2) * wordSize);
1404 __ addiu(SP, SP, (-2) * wordSize);
1406 Label miss;
1407 __ check_klass_subtype_slow_path(A0, A1, T0, T1, NULL, &miss);
1409 __ addiu(V0, R0, 1);
1410 __ addiu(SP, SP, 2 * wordSize);
1411 __ ld_ptr(T0, SP, (-1) * wordSize);
1412 __ ld_ptr(T1, SP, (-2) * wordSize);
1413 __ jr(RA);
1414 __ delayed()->nop();
1417 __ bind(miss);
1418 __ move(V0, R0);
1419 __ addiu(SP, SP, 2 * wordSize);
1420 __ ld_ptr(T0, SP, (-1) * wordSize);
1421 __ ld_ptr(T1, SP, (-2) * wordSize);
1422 __ jr(RA);
1423 __ delayed()->nop();
1424 }
1425 break;
1427 case monitorenter_nofpu_id:
1428 save_fpu_registers = false;// fall through
1430 case monitorenter_id:
1431 {
1432 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1433 OopMap* map = save_live_registers(sasm, 0, save_fpu_registers);
1435 f.load_argument(1, V0); // V0: object
1436 #ifndef _LP64
1437 f.load_argument(0, T6); // T6: lock address
1438 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1439 monitorenter), V0, T6);
1440 #else
1441 f.load_argument(0, A6); // A6: lock address
1442 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1443 monitorenter), V0, A6);
1444 #endif
1446 oop_maps = new OopMapSet();
1447 oop_maps->add_gc_map(call_offset, map);
1448 restore_live_registers(sasm, save_fpu_registers);
1449 }
1450 break;
1452 case monitorexit_nofpu_id:
1453 save_fpu_registers = false;
1454 // fall through
1455 case monitorexit_id:
1456 {
1457 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1458 OopMap* map = save_live_registers(sasm, 0, save_fpu_registers);
1460 #ifndef _LP64
1461 f.load_argument(0, T6); // eax: lock address
1462 #else
1463 f.load_argument(0, A6); // A6: lock address
1464 #endif
1465 // note: really a leaf routine but must setup last java sp
1466 // => use call_RT for now (speed can be improved by
1467 // doing last java sp setup manually)
1468 #ifndef _LP64
1469 int call_offset = __ call_RT(noreg, noreg,
1470 CAST_FROM_FN_PTR(address, monitorexit), T6);
1471 #else
1472 int call_offset = __ call_RT(noreg, noreg,
1473 CAST_FROM_FN_PTR(address, monitorexit), A6);
1474 #endif
1475 oop_maps = new OopMapSet();
1476 oop_maps->add_gc_map(call_offset, map);
1477 restore_live_registers(sasm, save_fpu_registers);
1479 }
1480 break;
1481 // case init_check_patching_id:
1482 case access_field_patching_id:
1483 {
1484 StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1485 // we should set up register map
1486 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1488 }
1489 break;
1491 case load_klass_patching_id:
1492 {
1493 StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1494 // we should set up register map
1495 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address,
1496 move_klass_patching));
1497 }
1498 break;
1499 /* case jvmti_exception_throw_id:
1500 {
1501 // V0: exception oop
1502 // V1: exception pc
1503 StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments);
1504 // Preserve all registers across this potentially blocking call
1505 const int num_rt_args = 2; // thread, exception oop
1506 //OopMap* map = save_live_registers(sasm, num_rt_args);
1507 OopMap* map = save_live_registers(sasm, 0);
1508 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address,
1509 Runtime1::post_jvmti_exception_throw), V0);
1510 oop_maps = new OopMapSet();
1511 oop_maps->add_gc_map(call_offset, map);
1512 restore_live_registers(sasm);
1513 }*/
1514 case load_mirror_patching_id:
1515 {
1516 StubFrame f(sasm, "load_mirror_patching" , dont_gc_arguments);
1517 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1518 }
1519 break;
1521 case load_appendix_patching_id:
1522 {
1523 StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1524 // we should set up register map
1525 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1526 }
1527 break;
1529 case dtrace_object_alloc_id:
1530 {
1531 // V0:object
1532 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1533 // we can't gc here so skip the oopmap but make sure that all
1534 // the live registers get saved.
1535 save_live_registers(sasm, 0);
1537 __ push_reg(V0);
1538 __ move(A0, V0);
1539 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
1540 relocInfo::runtime_call_type);
1541 __ delayed()->nop();
1542 __ super_pop(V0);
1544 restore_live_registers(sasm);
1545 }
1546 break;
1548 case fpu2long_stub_id:
1549 {
1550 //FIXME, I hava no idea how to port this
1551 //tty->print_cr("fpu2long_stub_id unimplemented yet!");
1552 }
1553 break;
1555 case deoptimize_id:
1556 {
1557 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1558 const int num_rt_args = 1; // thread
1559 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1560 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize));
1561 oop_maps = new OopMapSet();
1562 oop_maps->add_gc_map(call_offset, oop_map);
1563 restore_live_registers(sasm);
1564 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1565 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1566 __ leave();
1567 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
1568 __ delayed()->nop();
1569 }
1570 break;
1572 case predicate_failed_trap_id:
1573 {
1574 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1576 OopMap* map = save_live_registers(sasm, 1);
1578 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1579 oop_maps = new OopMapSet();
1580 oop_maps->add_gc_map(call_offset, map);
1581 restore_live_registers(sasm);
1582 __ leave();
1583 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1584 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1586 __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
1587 __ delayed()->nop();
1588 }
1589 break;
1591 default:
1592 {
1593 StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1594 __ move(A1, (int)id);
1595 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), A1);
1596 __ should_not_reach_here();
1597 }
1598 break;
1599 }
1600 return oop_maps;
1601 }
1603 #undef __
1605 const char *Runtime1::pd_name_for_address(address entry) {
1606 return "<unknown function>";
1607 }
