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src/cpu/ppc/vm/vm_version_ppc.cpp@95a08233f46c
src/cpu/ppc/vm/vm_version_ppc.cpp
Mon, 28 May 2018 10:33:52 +0800
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- aoqi
- date
- Mon, 28 May 2018 10:33:52 +0800
- changeset 9041
- 95a08233f46c
- parent 8903
- 9575483cce09
- parent 8856
- ac27a9c85bea
- child 9572
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Merge
1 /*
2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2014 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "compiler/disassembler.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "runtime/java.hpp"
32 #include "runtime/stubCodeGenerator.hpp"
33 #include "utilities/defaultStream.hpp"
34 #include "vm_version_ppc.hpp"
35 #ifdef TARGET_OS_FAMILY_aix
36 # include "os_aix.inline.hpp"
37 #endif
38 #ifdef TARGET_OS_FAMILY_linux
39 # include "os_linux.inline.hpp"
40 #endif
42 # include <sys/sysinfo.h>
44 int VM_Version::_features = VM_Version::unknown_m;
45 int VM_Version::_measured_cache_line_size = 128; // default value
46 const char* VM_Version::_features_str = "";
47 bool VM_Version::_is_determine_features_test_running = false;
50 #define MSG(flag) \
51 if (flag && !FLAG_IS_DEFAULT(flag)) \
52 jio_fprintf(defaultStream::error_stream(), \
53 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \
54 " -XX:+" #flag " will be disabled!\n");
56 void VM_Version::initialize() {
58 // Test which instructions are supported and measure cache line size.
59 determine_features();
61 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features.
62 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) {
63 if (VM_Version::has_popcntw()) {
64 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7);
65 } else if (VM_Version::has_cmpb()) {
66 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6);
67 } else if (VM_Version::has_popcntb()) {
68 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5);
69 } else {
70 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0);
71 }
72 }
73 guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 ||
74 PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7,
75 "PowerArchitecturePPC64 should be 0, 5, 6 or 7");
77 if (!UseSIGTRAP) {
78 MSG(TrapBasedICMissChecks);
79 MSG(TrapBasedNotEntrantChecks);
80 MSG(TrapBasedNullChecks);
81 FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false);
82 FLAG_SET_ERGO(bool, TrapBasedNullChecks, false);
83 FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false);
84 }
86 #ifdef COMPILER2
87 if (!UseSIGTRAP) {
88 MSG(TrapBasedRangeChecks);
89 FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false);
90 }
92 // On Power6 test for section size.
93 if (PowerArchitecturePPC64 == 6) {
94 determine_section_size();
95 // TODO: PPC port } else {
96 // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
97 }
99 MaxVectorSize = 8;
100 #endif
102 // Create and print feature-string.
103 char buf[(num_features+1) * 16]; // Max 16 chars per feature.
104 jio_snprintf(buf, sizeof(buf),
105 "ppc64%s%s%s%s%s%s%s%s%s",
106 (has_fsqrt() ? " fsqrt" : ""),
107 (has_isel() ? " isel" : ""),
108 (has_lxarxeh() ? " lxarxeh" : ""),
109 (has_cmpb() ? " cmpb" : ""),
110 //(has_mftgpr()? " mftgpr" : ""),
111 (has_popcntb() ? " popcntb" : ""),
112 (has_popcntw() ? " popcntw" : ""),
113 (has_fcfids() ? " fcfids" : ""),
114 (has_vand() ? " vand" : ""),
115 (has_vcipher() ? " aes" : "")
116 // Make sure number of %s matches num_features!
117 );
118 _features_str = strdup(buf);
119 NOT_PRODUCT(if (Verbose) print_features(););
121 // PPC64 supports 8-byte compare-exchange operations (see
122 // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
123 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
124 _supports_cx8 = true;
126 UseSSE = 0; // Only on x86 and x64
128 intx cache_line_size = _measured_cache_line_size;
130 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1;
132 if (AllocatePrefetchStyle == 4) {
133 AllocatePrefetchStepSize = cache_line_size; // Need exact value.
134 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default.
135 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined?
136 } else {
137 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size;
138 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value.
139 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined?
140 }
142 assert(AllocatePrefetchLines > 0, "invalid value");
143 if (AllocatePrefetchLines < 1) { // Set valid value in product VM.
144 AllocatePrefetchLines = 1; // Conservative value.
145 }
147 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) {
148 AllocatePrefetchStyle = 1; // Fall back if inappropriate.
149 }
151 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
153 if (UseCRC32Intrinsics) {
154 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
155 warning("CRC32 intrinsics are not available on this CPU");
156 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
157 }
159 // The AES intrinsic stubs require AES instruction support.
160 #if defined(VM_LITTLE_ENDIAN)
161 if (has_vcipher()) {
162 if (FLAG_IS_DEFAULT(UseAES)) {
163 UseAES = true;
164 }
165 } else if (UseAES) {
166 if (!FLAG_IS_DEFAULT(UseAES))
167 warning("AES instructions are not available on this CPU");
168 FLAG_SET_DEFAULT(UseAES, false);
169 }
171 if (UseAES && has_vcipher()) {
172 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
173 UseAESIntrinsics = true;
174 }
175 } else if (UseAESIntrinsics) {
176 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
177 warning("AES intrinsics are not available on this CPU");
178 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
179 }
181 #else
182 if (UseAES) {
183 warning("AES instructions are not available on this CPU");
184 FLAG_SET_DEFAULT(UseAES, false);
185 }
186 if (UseAESIntrinsics) {
187 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
188 warning("AES intrinsics are not available on this CPU");
189 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
190 }
191 #endif
193 if (UseSHA) {
194 warning("SHA instructions are not available on this CPU");
195 FLAG_SET_DEFAULT(UseSHA, false);
196 }
197 if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
198 warning("SHA intrinsics are not available on this CPU");
199 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
200 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
201 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
202 }
204 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
205 UseMontgomeryMultiplyIntrinsic = true;
206 }
207 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
208 UseMontgomerySquareIntrinsic = true;
209 }
210 }
212 void VM_Version::print_features() {
213 tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), (int) get_cache_line_size());
214 }
216 #ifdef COMPILER2
217 // Determine section size on power6: If section size is 8 instructions,
218 // there should be a difference between the two testloops of ~15 %. If
219 // no difference is detected the section is assumed to be 32 instructions.
220 void VM_Version::determine_section_size() {
222 int unroll = 80;
224 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord;
226 // Allocate space for the code.
227 ResourceMark rm;
228 CodeBuffer cb("detect_section_size", code_size, 0);
229 MacroAssembler* a = new MacroAssembler(&cb);
231 uint32_t *code = (uint32_t *)a->pc();
232 // Emit code.
233 void (*test1)() = (void(*)())(void *)a->function_entry();
235 Label l1;
237 a->li(R4, 1);
238 a->sldi(R4, R4, 28);
239 a->b(l1);
240 a->align(CodeEntryAlignment);
242 a->bind(l1);
244 for (int i = 0; i < unroll; i++) {
245 // Schleife 1
246 // ------- sector 0 ------------
247 // ;; 0
248 a->nop(); // 1
249 a->fpnop0(); // 2
250 a->fpnop1(); // 3
251 a->addi(R4,R4, -1); // 4
253 // ;; 1
254 a->nop(); // 5
255 a->fmr(F6, F6); // 6
256 a->fmr(F7, F7); // 7
257 a->endgroup(); // 8
258 // ------- sector 8 ------------
260 // ;; 2
261 a->nop(); // 9
262 a->nop(); // 10
263 a->fmr(F8, F8); // 11
264 a->fmr(F9, F9); // 12
266 // ;; 3
267 a->nop(); // 13
268 a->fmr(F10, F10); // 14
269 a->fmr(F11, F11); // 15
270 a->endgroup(); // 16
271 // -------- sector 16 -------------
273 // ;; 4
274 a->nop(); // 17
275 a->nop(); // 18
276 a->fmr(F15, F15); // 19
277 a->fmr(F16, F16); // 20
279 // ;; 5
280 a->nop(); // 21
281 a->fmr(F17, F17); // 22
282 a->fmr(F18, F18); // 23
283 a->endgroup(); // 24
284 // ------- sector 24 ------------
286 // ;; 6
287 a->nop(); // 25
288 a->nop(); // 26
289 a->fmr(F19, F19); // 27
290 a->fmr(F20, F20); // 28
292 // ;; 7
293 a->nop(); // 29
294 a->fmr(F21, F21); // 30
295 a->fmr(F22, F22); // 31
296 a->brnop0(); // 32
298 // ------- sector 32 ------------
299 }
301 // ;; 8
302 a->cmpdi(CCR0, R4, unroll); // 33
303 a->bge(CCR0, l1); // 34
304 a->blr();
306 // Emit code.
307 void (*test2)() = (void(*)())(void *)a->function_entry();
308 // uint32_t *code = (uint32_t *)a->pc();
310 Label l2;
312 a->li(R4, 1);
313 a->sldi(R4, R4, 28);
314 a->b(l2);
315 a->align(CodeEntryAlignment);
317 a->bind(l2);
319 for (int i = 0; i < unroll; i++) {
320 // Schleife 2
321 // ------- sector 0 ------------
322 // ;; 0
323 a->brnop0(); // 1
324 a->nop(); // 2
325 //a->cmpdi(CCR0, R4, unroll);
326 a->fpnop0(); // 3
327 a->fpnop1(); // 4
328 a->addi(R4,R4, -1); // 5
330 // ;; 1
332 a->nop(); // 6
333 a->fmr(F6, F6); // 7
334 a->fmr(F7, F7); // 8
335 // ------- sector 8 ---------------
337 // ;; 2
338 a->endgroup(); // 9
340 // ;; 3
341 a->nop(); // 10
342 a->nop(); // 11
343 a->fmr(F8, F8); // 12
345 // ;; 4
346 a->fmr(F9, F9); // 13
347 a->nop(); // 14
348 a->fmr(F10, F10); // 15
350 // ;; 5
351 a->fmr(F11, F11); // 16
352 // -------- sector 16 -------------
354 // ;; 6
355 a->endgroup(); // 17
357 // ;; 7
358 a->nop(); // 18
359 a->nop(); // 19
360 a->fmr(F15, F15); // 20
362 // ;; 8
363 a->fmr(F16, F16); // 21
364 a->nop(); // 22
365 a->fmr(F17, F17); // 23
367 // ;; 9
368 a->fmr(F18, F18); // 24
369 // -------- sector 24 -------------
371 // ;; 10
372 a->endgroup(); // 25
374 // ;; 11
375 a->nop(); // 26
376 a->nop(); // 27
377 a->fmr(F19, F19); // 28
379 // ;; 12
380 a->fmr(F20, F20); // 29
381 a->nop(); // 30
382 a->fmr(F21, F21); // 31
384 // ;; 13
385 a->fmr(F22, F22); // 32
386 }
388 // -------- sector 32 -------------
389 // ;; 14
390 a->cmpdi(CCR0, R4, unroll); // 33
391 a->bge(CCR0, l2); // 34
393 a->blr();
394 uint32_t *code_end = (uint32_t *)a->pc();
395 a->flush();
397 double loop1_seconds,loop2_seconds, rel_diff;
398 uint64_t start1, stop1;
400 start1 = os::current_thread_cpu_time(false);
401 (*test1)();
402 stop1 = os::current_thread_cpu_time(false);
403 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0);
406 start1 = os::current_thread_cpu_time(false);
407 (*test2)();
408 stop1 = os::current_thread_cpu_time(false);
410 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0);
412 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100;
414 if (PrintAssembly) {
415 ttyLocker ttyl;
416 tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
417 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
418 tty->print_cr("Time loop1 :%f", loop1_seconds);
419 tty->print_cr("Time loop2 :%f", loop2_seconds);
420 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff);
422 if (rel_diff > 12.0) {
423 tty->print_cr("Section Size 8 Instructions");
424 } else{
425 tty->print_cr("Section Size 32 Instructions or Power5");
426 }
427 }
429 #if 0 // TODO: PPC port
430 // Set sector size (if not set explicitly).
431 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) {
432 if (rel_diff > 12.0) {
433 PdScheduling::power6SectorSize = 0x20;
434 } else {
435 PdScheduling::power6SectorSize = 0x80;
436 }
437 } else if (Power6SectorSize128PPC64) {
438 PdScheduling::power6SectorSize = 0x80;
439 } else {
440 PdScheduling::power6SectorSize = 0x20;
441 }
442 #endif
443 if (UsePower6SchedulerPPC64) Unimplemented();
444 }
445 #endif // COMPILER2
447 void VM_Version::determine_features() {
448 #if defined(ABI_ELFv2)
449 const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect.
450 #else
451 // 7 InstWords for each call (function descriptor + blr instruction).
452 const int code_size = (num_features+1+2*7)*BytesPerInstWord;
453 #endif
454 int features = 0;
456 // create test area
457 enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size).
458 char test_area[BUFFER_SIZE];
459 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1];
461 // Allocate space for the code.
462 ResourceMark rm;
463 CodeBuffer cb("detect_cpu_features", code_size, 0);
464 MacroAssembler* a = new MacroAssembler(&cb);
466 // Must be set to true so we can generate the test code.
467 _features = VM_Version::all_features_m;
469 // Emit code.
470 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry();
471 uint32_t *code = (uint32_t *)a->pc();
472 // Don't use R0 in ldarx.
473 // Keep R3_ARG1 unmodified, it contains &field (see below).
474 // Keep R4_ARG2 unmodified, it contains offset = 0 (see below).
475 a->fsqrt(F3, F4); // code[0] -> fsqrt_m
476 a->fsqrts(F3, F4); // code[1] -> fsqrts_m
477 a->isel(R7, R5, R6, 0); // code[2] -> isel_m
478 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m
479 a->cmpb(R7, R5, R6); // code[4] -> bcmp
480 //a->mftgpr(R7, F3); // code[5] -> mftgpr
481 a->popcntb(R7, R5); // code[6] -> popcntb
482 a->popcntw(R7, R5); // code[7] -> popcntw
483 a->fcfids(F3, F4); // code[8] -> fcfids
484 a->vand(VR0, VR0, VR0); // code[9] -> vand
485 a->vcipher(VR0, VR1, VR2); // code[10] -> vcipher
486 a->blr();
488 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
489 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
490 a->dcbz(R3_ARG1); // R3_ARG1 = addr
491 a->blr();
493 uint32_t *code_end = (uint32_t *)a->pc();
494 a->flush();
495 _features = VM_Version::unknown_m;
497 // Print the detection code.
498 if (PrintAssembly) {
499 ttyLocker ttyl;
500 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
501 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
502 }
504 // Measure cache line size.
505 memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF.
506 (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle.
507 int count = 0; // count zeroed bytes
508 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++;
509 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2");
510 _measured_cache_line_size = count;
512 // Execute code. Illegal instructions will be replaced by 0 in the signal handler.
513 VM_Version::_is_determine_features_test_running = true;
514 (*test)((address)mid_of_test_area, (uint64_t)0);
515 VM_Version::_is_determine_features_test_running = false;
517 // determine which instructions are legal.
518 int feature_cntr = 0;
519 if (code[feature_cntr++]) features |= fsqrt_m;
520 if (code[feature_cntr++]) features |= fsqrts_m;
521 if (code[feature_cntr++]) features |= isel_m;
522 if (code[feature_cntr++]) features |= lxarxeh_m;
523 if (code[feature_cntr++]) features |= cmpb_m;
524 //if(code[feature_cntr++])features |= mftgpr_m;
525 if (code[feature_cntr++]) features |= popcntb_m;
526 if (code[feature_cntr++]) features |= popcntw_m;
527 if (code[feature_cntr++]) features |= fcfids_m;
528 if (code[feature_cntr++]) features |= vand_m;
529 if (code[feature_cntr++]) features |= vcipher_m;
531 // Print the detection code.
532 if (PrintAssembly) {
533 ttyLocker ttyl;
534 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));
535 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
536 }
538 _features = features;
539 }
542 static int saved_features = 0;
544 void VM_Version::allow_all() {
545 saved_features = _features;
546 _features = all_features_m;
547 }
549 void VM_Version::revert() {
550 _features = saved_features;
551 }
