Thu, 04 Apr 2019 17:56:29 +0800
Merge
1 /*
2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2014 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "compiler/disassembler.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "runtime/java.hpp"
32 #include "runtime/stubCodeGenerator.hpp"
33 #include "utilities/defaultStream.hpp"
34 #include "vm_version_ppc.hpp"
35 #ifdef TARGET_OS_FAMILY_aix
36 # include "os_aix.inline.hpp"
37 #endif
38 #ifdef TARGET_OS_FAMILY_linux
39 # include "os_linux.inline.hpp"
40 #endif
42 # include <sys/sysinfo.h>
44 int VM_Version::_features = VM_Version::unknown_m;
45 int VM_Version::_measured_cache_line_size = 128; // default value
46 const char* VM_Version::_features_str = "";
47 bool VM_Version::_is_determine_features_test_running = false;
50 #define MSG(flag) \
51 if (flag && !FLAG_IS_DEFAULT(flag)) \
52 jio_fprintf(defaultStream::error_stream(), \
53 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \
54 " -XX:+" #flag " will be disabled!\n");
56 void VM_Version::initialize() {
58 // Test which instructions are supported and measure cache line size.
59 determine_features();
61 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features.
62 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) {
63 if (VM_Version::has_popcntw()) {
64 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7);
65 } else if (VM_Version::has_cmpb()) {
66 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6);
67 } else if (VM_Version::has_popcntb()) {
68 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5);
69 } else {
70 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0);
71 }
72 }
73 guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 ||
74 PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7,
75 "PowerArchitecturePPC64 should be 0, 5, 6 or 7");
77 if (!UseSIGTRAP) {
78 MSG(TrapBasedICMissChecks);
79 MSG(TrapBasedNotEntrantChecks);
80 MSG(TrapBasedNullChecks);
81 FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false);
82 FLAG_SET_ERGO(bool, TrapBasedNullChecks, false);
83 FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false);
84 }
86 #ifdef COMPILER2
87 if (!UseSIGTRAP) {
88 MSG(TrapBasedRangeChecks);
89 FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false);
90 }
92 // On Power6 test for section size.
93 if (PowerArchitecturePPC64 == 6) {
94 determine_section_size();
95 // TODO: PPC port } else {
96 // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
97 }
99 MaxVectorSize = 8;
100 #endif
102 // Create and print feature-string.
103 char buf[(num_features+1) * 16]; // Max 16 chars per feature.
104 jio_snprintf(buf, sizeof(buf),
105 "ppc64%s%s%s%s%s%s%s%s%s%s",
106 (has_fsqrt() ? " fsqrt" : ""),
107 (has_isel() ? " isel" : ""),
108 (has_lxarxeh() ? " lxarxeh" : ""),
109 (has_cmpb() ? " cmpb" : ""),
110 //(has_mftgpr()? " mftgpr" : ""),
111 (has_popcntb() ? " popcntb" : ""),
112 (has_popcntw() ? " popcntw" : ""),
113 (has_fcfids() ? " fcfids" : ""),
114 (has_vand() ? " vand" : ""),
115 (has_vcipher() ? " aes" : ""),
116 (has_vpmsumb() ? " vpmsumb" : "")
117 // Make sure number of %s matches num_features!
118 );
119 _features_str = strdup(buf);
120 NOT_PRODUCT(if (Verbose) print_features(););
122 // PPC64 supports 8-byte compare-exchange operations (see
123 // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
124 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
125 _supports_cx8 = true;
127 UseSSE = 0; // Only on x86 and x64
129 intx cache_line_size = _measured_cache_line_size;
131 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1;
133 if (AllocatePrefetchStyle == 4) {
134 AllocatePrefetchStepSize = cache_line_size; // Need exact value.
135 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default.
136 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined?
137 } else {
138 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size;
139 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value.
140 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined?
141 }
143 assert(AllocatePrefetchLines > 0, "invalid value");
144 if (AllocatePrefetchLines < 1) { // Set valid value in product VM.
145 AllocatePrefetchLines = 1; // Conservative value.
146 }
148 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) {
149 AllocatePrefetchStyle = 1; // Fall back if inappropriate.
150 }
152 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
154 // Implementation does not use any of the vector instructions
155 // available with Power8. Their exploitation is still pending.
156 if (!UseCRC32Intrinsics) {
157 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
158 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
159 }
160 }
162 // The AES intrinsic stubs require AES instruction support.
163 #if defined(VM_LITTLE_ENDIAN)
164 if (has_vcipher()) {
165 if (FLAG_IS_DEFAULT(UseAES)) {
166 UseAES = true;
167 }
168 } else if (UseAES) {
169 if (!FLAG_IS_DEFAULT(UseAES))
170 warning("AES instructions are not available on this CPU");
171 FLAG_SET_DEFAULT(UseAES, false);
172 }
174 if (UseAES && has_vcipher()) {
175 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
176 UseAESIntrinsics = true;
177 }
178 } else if (UseAESIntrinsics) {
179 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
180 warning("AES intrinsics are not available on this CPU");
181 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
182 }
184 #else
185 if (UseAES) {
186 warning("AES instructions are not available on this CPU");
187 FLAG_SET_DEFAULT(UseAES, false);
188 }
189 if (UseAESIntrinsics) {
190 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
191 warning("AES intrinsics are not available on this CPU");
192 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
193 }
194 #endif
196 if (UseSHA) {
197 warning("SHA instructions are not available on this CPU");
198 FLAG_SET_DEFAULT(UseSHA, false);
199 }
200 if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
201 warning("SHA intrinsics are not available on this CPU");
202 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
203 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
204 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
205 }
207 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
208 UseMontgomeryMultiplyIntrinsic = true;
209 }
210 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
211 UseMontgomerySquareIntrinsic = true;
212 }
213 }
215 void VM_Version::print_features() {
216 tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), (int) get_cache_line_size());
217 }
219 #ifdef COMPILER2
220 // Determine section size on power6: If section size is 8 instructions,
221 // there should be a difference between the two testloops of ~15 %. If
222 // no difference is detected the section is assumed to be 32 instructions.
223 void VM_Version::determine_section_size() {
225 int unroll = 80;
227 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord;
229 // Allocate space for the code.
230 ResourceMark rm;
231 CodeBuffer cb("detect_section_size", code_size, 0);
232 MacroAssembler* a = new MacroAssembler(&cb);
234 uint32_t *code = (uint32_t *)a->pc();
235 // Emit code.
236 void (*test1)() = (void(*)())(void *)a->function_entry();
238 Label l1;
240 a->li(R4, 1);
241 a->sldi(R4, R4, 28);
242 a->b(l1);
243 a->align(CodeEntryAlignment);
245 a->bind(l1);
247 for (int i = 0; i < unroll; i++) {
248 // Schleife 1
249 // ------- sector 0 ------------
250 // ;; 0
251 a->nop(); // 1
252 a->fpnop0(); // 2
253 a->fpnop1(); // 3
254 a->addi(R4,R4, -1); // 4
256 // ;; 1
257 a->nop(); // 5
258 a->fmr(F6, F6); // 6
259 a->fmr(F7, F7); // 7
260 a->endgroup(); // 8
261 // ------- sector 8 ------------
263 // ;; 2
264 a->nop(); // 9
265 a->nop(); // 10
266 a->fmr(F8, F8); // 11
267 a->fmr(F9, F9); // 12
269 // ;; 3
270 a->nop(); // 13
271 a->fmr(F10, F10); // 14
272 a->fmr(F11, F11); // 15
273 a->endgroup(); // 16
274 // -------- sector 16 -------------
276 // ;; 4
277 a->nop(); // 17
278 a->nop(); // 18
279 a->fmr(F15, F15); // 19
280 a->fmr(F16, F16); // 20
282 // ;; 5
283 a->nop(); // 21
284 a->fmr(F17, F17); // 22
285 a->fmr(F18, F18); // 23
286 a->endgroup(); // 24
287 // ------- sector 24 ------------
289 // ;; 6
290 a->nop(); // 25
291 a->nop(); // 26
292 a->fmr(F19, F19); // 27
293 a->fmr(F20, F20); // 28
295 // ;; 7
296 a->nop(); // 29
297 a->fmr(F21, F21); // 30
298 a->fmr(F22, F22); // 31
299 a->brnop0(); // 32
301 // ------- sector 32 ------------
302 }
304 // ;; 8
305 a->cmpdi(CCR0, R4, unroll); // 33
306 a->bge(CCR0, l1); // 34
307 a->blr();
309 // Emit code.
310 void (*test2)() = (void(*)())(void *)a->function_entry();
311 // uint32_t *code = (uint32_t *)a->pc();
313 Label l2;
315 a->li(R4, 1);
316 a->sldi(R4, R4, 28);
317 a->b(l2);
318 a->align(CodeEntryAlignment);
320 a->bind(l2);
322 for (int i = 0; i < unroll; i++) {
323 // Schleife 2
324 // ------- sector 0 ------------
325 // ;; 0
326 a->brnop0(); // 1
327 a->nop(); // 2
328 //a->cmpdi(CCR0, R4, unroll);
329 a->fpnop0(); // 3
330 a->fpnop1(); // 4
331 a->addi(R4,R4, -1); // 5
333 // ;; 1
335 a->nop(); // 6
336 a->fmr(F6, F6); // 7
337 a->fmr(F7, F7); // 8
338 // ------- sector 8 ---------------
340 // ;; 2
341 a->endgroup(); // 9
343 // ;; 3
344 a->nop(); // 10
345 a->nop(); // 11
346 a->fmr(F8, F8); // 12
348 // ;; 4
349 a->fmr(F9, F9); // 13
350 a->nop(); // 14
351 a->fmr(F10, F10); // 15
353 // ;; 5
354 a->fmr(F11, F11); // 16
355 // -------- sector 16 -------------
357 // ;; 6
358 a->endgroup(); // 17
360 // ;; 7
361 a->nop(); // 18
362 a->nop(); // 19
363 a->fmr(F15, F15); // 20
365 // ;; 8
366 a->fmr(F16, F16); // 21
367 a->nop(); // 22
368 a->fmr(F17, F17); // 23
370 // ;; 9
371 a->fmr(F18, F18); // 24
372 // -------- sector 24 -------------
374 // ;; 10
375 a->endgroup(); // 25
377 // ;; 11
378 a->nop(); // 26
379 a->nop(); // 27
380 a->fmr(F19, F19); // 28
382 // ;; 12
383 a->fmr(F20, F20); // 29
384 a->nop(); // 30
385 a->fmr(F21, F21); // 31
387 // ;; 13
388 a->fmr(F22, F22); // 32
389 }
391 // -------- sector 32 -------------
392 // ;; 14
393 a->cmpdi(CCR0, R4, unroll); // 33
394 a->bge(CCR0, l2); // 34
396 a->blr();
397 uint32_t *code_end = (uint32_t *)a->pc();
398 a->flush();
400 double loop1_seconds,loop2_seconds, rel_diff;
401 uint64_t start1, stop1;
403 start1 = os::current_thread_cpu_time(false);
404 (*test1)();
405 stop1 = os::current_thread_cpu_time(false);
406 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0);
409 start1 = os::current_thread_cpu_time(false);
410 (*test2)();
411 stop1 = os::current_thread_cpu_time(false);
413 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0);
415 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100;
417 if (PrintAssembly) {
418 ttyLocker ttyl;
419 tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
420 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
421 tty->print_cr("Time loop1 :%f", loop1_seconds);
422 tty->print_cr("Time loop2 :%f", loop2_seconds);
423 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff);
425 if (rel_diff > 12.0) {
426 tty->print_cr("Section Size 8 Instructions");
427 } else{
428 tty->print_cr("Section Size 32 Instructions or Power5");
429 }
430 }
432 #if 0 // TODO: PPC port
433 // Set sector size (if not set explicitly).
434 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) {
435 if (rel_diff > 12.0) {
436 PdScheduling::power6SectorSize = 0x20;
437 } else {
438 PdScheduling::power6SectorSize = 0x80;
439 }
440 } else if (Power6SectorSize128PPC64) {
441 PdScheduling::power6SectorSize = 0x80;
442 } else {
443 PdScheduling::power6SectorSize = 0x20;
444 }
445 #endif
446 if (UsePower6SchedulerPPC64) Unimplemented();
447 }
448 #endif // COMPILER2
450 void VM_Version::determine_features() {
451 #if defined(ABI_ELFv2)
452 const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect.
453 #else
454 // 7 InstWords for each call (function descriptor + blr instruction).
455 const int code_size = (num_features+1+2*7)*BytesPerInstWord;
456 #endif
457 int features = 0;
459 // create test area
460 enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size).
461 char test_area[BUFFER_SIZE];
462 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1];
464 // Allocate space for the code.
465 ResourceMark rm;
466 CodeBuffer cb("detect_cpu_features", code_size, 0);
467 MacroAssembler* a = new MacroAssembler(&cb);
469 // Must be set to true so we can generate the test code.
470 _features = VM_Version::all_features_m;
472 // Emit code.
473 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry();
474 uint32_t *code = (uint32_t *)a->pc();
475 // Don't use R0 in ldarx.
476 // Keep R3_ARG1 unmodified, it contains &field (see below).
477 // Keep R4_ARG2 unmodified, it contains offset = 0 (see below).
478 a->fsqrt(F3, F4); // code[0] -> fsqrt_m
479 a->fsqrts(F3, F4); // code[1] -> fsqrts_m
480 a->isel(R7, R5, R6, 0); // code[2] -> isel_m
481 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m
482 a->cmpb(R7, R5, R6); // code[4] -> bcmp
483 //a->mftgpr(R7, F3); // code[5] -> mftgpr
484 a->popcntb(R7, R5); // code[6] -> popcntb
485 a->popcntw(R7, R5); // code[7] -> popcntw
486 a->fcfids(F3, F4); // code[8] -> fcfids
487 a->vand(VR0, VR0, VR0); // code[9] -> vand
488 a->vcipher(VR0, VR1, VR2); // code[10] -> vcipher
489 a->vpmsumb(VR0, VR1, VR2); // code[11] -> vpmsumb
490 a->blr();
492 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
493 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
494 a->dcbz(R3_ARG1); // R3_ARG1 = addr
495 a->blr();
497 uint32_t *code_end = (uint32_t *)a->pc();
498 a->flush();
499 _features = VM_Version::unknown_m;
501 // Print the detection code.
502 if (PrintAssembly) {
503 ttyLocker ttyl;
504 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
505 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
506 }
508 // Measure cache line size.
509 memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF.
510 (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle.
511 int count = 0; // count zeroed bytes
512 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++;
513 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2");
514 _measured_cache_line_size = count;
516 // Execute code. Illegal instructions will be replaced by 0 in the signal handler.
517 VM_Version::_is_determine_features_test_running = true;
518 (*test)((address)mid_of_test_area, (uint64_t)0);
519 VM_Version::_is_determine_features_test_running = false;
521 // determine which instructions are legal.
522 int feature_cntr = 0;
523 if (code[feature_cntr++]) features |= fsqrt_m;
524 if (code[feature_cntr++]) features |= fsqrts_m;
525 if (code[feature_cntr++]) features |= isel_m;
526 if (code[feature_cntr++]) features |= lxarxeh_m;
527 if (code[feature_cntr++]) features |= cmpb_m;
528 //if(code[feature_cntr++])features |= mftgpr_m;
529 if (code[feature_cntr++]) features |= popcntb_m;
530 if (code[feature_cntr++]) features |= popcntw_m;
531 if (code[feature_cntr++]) features |= fcfids_m;
532 if (code[feature_cntr++]) features |= vand_m;
533 if (code[feature_cntr++]) features |= vcipher_m;
534 if (code[feature_cntr++]) features |= vpmsumb_m;
536 // Print the detection code.
537 if (PrintAssembly) {
538 ttyLocker ttyl;
539 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));
540 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
541 }
543 _features = features;
544 }
547 static int saved_features = 0;
549 void VM_Version::allow_all() {
550 saved_features = _features;
551 _features = all_features_m;
552 }
554 void VM_Version::revert() {
555 _features = saved_features;
556 }