src/cpu/ppc/vm/vm_version_ppc.cpp

Thu, 20 Mar 2014 11:03:06 +0100

author
goetz
date
Thu, 20 Mar 2014 11:03:06 +0100
changeset 6515
71a71b0bc844
parent 6511
31e80afe3fed
child 6680
78bbf4d43a14
permissions
-rw-r--r--

8037915: PPC64/AIX: Several smaller fixes
Reviewed-by: kvn

     1 /*
     2  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
     3  * Copyright 2012, 2014 SAP AG. All rights reserved.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     5  *
     6  * This code is free software; you can redistribute it and/or modify it
     7  * under the terms of the GNU General Public License version 2 only, as
     8  * published by the Free Software Foundation.
     9  *
    10  * This code is distributed in the hope that it will be useful, but WITHOUT
    11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    13  * version 2 for more details (a copy is included in the LICENSE file that
    14  * accompanied this code).
    15  *
    16  * You should have received a copy of the GNU General Public License version
    17  * 2 along with this work; if not, write to the Free Software Foundation,
    18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    19  *
    20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    21  * or visit www.oracle.com if you need additional information or have any
    22  * questions.
    23  *
    24  */
    26 #include "precompiled.hpp"
    27 #include "asm/assembler.inline.hpp"
    28 #include "asm/macroAssembler.inline.hpp"
    29 #include "compiler/disassembler.hpp"
    30 #include "memory/resourceArea.hpp"
    31 #include "runtime/java.hpp"
    32 #include "runtime/stubCodeGenerator.hpp"
    33 #include "utilities/defaultStream.hpp"
    34 #include "vm_version_ppc.hpp"
    35 #ifdef TARGET_OS_FAMILY_aix
    36 # include "os_aix.inline.hpp"
    37 #endif
    38 #ifdef TARGET_OS_FAMILY_linux
    39 # include "os_linux.inline.hpp"
    40 #endif
    42 # include <sys/sysinfo.h>
    44 int VM_Version::_features = VM_Version::unknown_m;
    45 int VM_Version::_measured_cache_line_size = 128; // default value
    46 const char* VM_Version::_features_str = "";
    47 bool VM_Version::_is_determine_features_test_running = false;
    50 #define MSG(flag)   \
    51   if (flag && !FLAG_IS_DEFAULT(flag))                                  \
    52       jio_fprintf(defaultStream::error_stream(),                       \
    53                   "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \
    54                   "         -XX:+" #flag " will be disabled!\n");
    56 void VM_Version::initialize() {
    58   // Test which instructions are supported and measure cache line size.
    59   determine_features();
    61   // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features.
    62   if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) {
    63     if (VM_Version::has_popcntw()) {
    64       FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7);
    65     } else if (VM_Version::has_cmpb()) {
    66       FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6);
    67     } else if (VM_Version::has_popcntb()) {
    68       FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5);
    69     } else {
    70       FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0);
    71     }
    72   }
    73   guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 ||
    74             PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7,
    75             "PowerArchitecturePPC64 should be 0, 5, 6 or 7");
    77   if (!UseSIGTRAP) {
    78     MSG(TrapBasedICMissChecks);
    79     MSG(TrapBasedNotEntrantChecks);
    80     MSG(TrapBasedNullChecks);
    81     FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false);
    82     FLAG_SET_ERGO(bool, TrapBasedNullChecks,       false);
    83     FLAG_SET_ERGO(bool, TrapBasedICMissChecks,     false);
    84   }
    86 #ifdef COMPILER2
    87   if (!UseSIGTRAP) {
    88     MSG(TrapBasedRangeChecks);
    89     FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false);
    90   }
    92   // On Power6 test for section size.
    93   if (PowerArchitecturePPC64 == 6) {
    94     determine_section_size();
    95   // TODO: PPC port } else {
    96   // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
    97   }
    99   MaxVectorSize = 8;
   100 #endif
   102   // Create and print feature-string.
   103   char buf[(num_features+1) * 16]; // Max 16 chars per feature.
   104   jio_snprintf(buf, sizeof(buf),
   105                "ppc64%s%s%s%s%s%s%s%s",
   106                (has_fsqrt()   ? " fsqrt"   : ""),
   107                (has_isel()    ? " isel"    : ""),
   108                (has_lxarxeh() ? " lxarxeh" : ""),
   109                (has_cmpb()    ? " cmpb"    : ""),
   110                //(has_mftgpr()? " mftgpr"  : ""),
   111                (has_popcntb() ? " popcntb" : ""),
   112                (has_popcntw() ? " popcntw" : ""),
   113                (has_fcfids()  ? " fcfids"  : ""),
   114                (has_vand()    ? " vand"    : "")
   115                // Make sure number of %s matches num_features!
   116               );
   117   _features_str = strdup(buf);
   118   NOT_PRODUCT(if (Verbose) print_features(););
   120   // PPC64 supports 8-byte compare-exchange operations (see
   121   // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
   122   // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
   123   _supports_cx8 = true;
   125   UseSSE = 0; // Only on x86 and x64
   127   intx cache_line_size = _measured_cache_line_size;
   129   if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1;
   131   if (AllocatePrefetchStyle == 4) {
   132     AllocatePrefetchStepSize = cache_line_size; // Need exact value.
   133     if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default.
   134     if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined?
   135   } else {
   136     if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size;
   137     if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value.
   138     if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined?
   139   }
   141   assert(AllocatePrefetchLines > 0, "invalid value");
   142   if (AllocatePrefetchLines < 1) // Set valid value in product VM.
   143     AllocatePrefetchLines = 1; // Conservative value.
   145   if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size)
   146     AllocatePrefetchStyle = 1; // Fall back if inappropriate.
   148   assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
   149 }
   151 void VM_Version::print_features() {
   152   tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), get_cache_line_size());
   153 }
   155 #ifdef COMPILER2
   156 // Determine section size on power6: If section size is 8 instructions,
   157 // there should be a difference between the two testloops of ~15 %. If
   158 // no difference is detected the section is assumed to be 32 instructions.
   159 void VM_Version::determine_section_size() {
   161   int unroll = 80;
   163   const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord;
   165   // Allocate space for the code.
   166   ResourceMark rm;
   167   CodeBuffer cb("detect_section_size", code_size, 0);
   168   MacroAssembler* a = new MacroAssembler(&cb);
   170   uint32_t *code = (uint32_t *)a->pc();
   171   // Emit code.
   172   void (*test1)() = (void(*)())(void *)a->function_entry();
   174   Label l1;
   176   a->li(R4, 1);
   177   a->sldi(R4, R4, 28);
   178   a->b(l1);
   179   a->align(CodeEntryAlignment);
   181   a->bind(l1);
   183   for (int i = 0; i < unroll; i++) {
   184     // Schleife 1
   185     // ------- sector 0 ------------
   186     // ;; 0
   187     a->nop();                   // 1
   188     a->fpnop0();                // 2
   189     a->fpnop1();                // 3
   190     a->addi(R4,R4, -1); // 4
   192     // ;;  1
   193     a->nop();                   // 5
   194     a->fmr(F6, F6);             // 6
   195     a->fmr(F7, F7);             // 7
   196     a->endgroup();              // 8
   197     // ------- sector 8 ------------
   199     // ;;  2
   200     a->nop();                   // 9
   201     a->nop();                   // 10
   202     a->fmr(F8, F8);             // 11
   203     a->fmr(F9, F9);             // 12
   205     // ;;  3
   206     a->nop();                   // 13
   207     a->fmr(F10, F10);           // 14
   208     a->fmr(F11, F11);           // 15
   209     a->endgroup();              // 16
   210     // -------- sector 16 -------------
   212     // ;;  4
   213     a->nop();                   // 17
   214     a->nop();                   // 18
   215     a->fmr(F15, F15);           // 19
   216     a->fmr(F16, F16);           // 20
   218     // ;;  5
   219     a->nop();                   // 21
   220     a->fmr(F17, F17);           // 22
   221     a->fmr(F18, F18);           // 23
   222     a->endgroup();              // 24
   223     // ------- sector 24  ------------
   225     // ;;  6
   226     a->nop();                   // 25
   227     a->nop();                   // 26
   228     a->fmr(F19, F19);           // 27
   229     a->fmr(F20, F20);           // 28
   231     // ;;  7
   232     a->nop();                   // 29
   233     a->fmr(F21, F21);           // 30
   234     a->fmr(F22, F22);           // 31
   235     a->brnop0();                // 32
   237     // ------- sector 32 ------------
   238   }
   240   // ;; 8
   241   a->cmpdi(CCR0, R4, unroll);   // 33
   242   a->bge(CCR0, l1);             // 34
   243   a->blr();
   245   // Emit code.
   246   void (*test2)() = (void(*)())(void *)a->function_entry();
   247   // uint32_t *code = (uint32_t *)a->pc();
   249   Label l2;
   251   a->li(R4, 1);
   252   a->sldi(R4, R4, 28);
   253   a->b(l2);
   254   a->align(CodeEntryAlignment);
   256   a->bind(l2);
   258   for (int i = 0; i < unroll; i++) {
   259     // Schleife 2
   260     // ------- sector 0 ------------
   261     // ;; 0
   262     a->brnop0();                  // 1
   263     a->nop();                     // 2
   264     //a->cmpdi(CCR0, R4, unroll);
   265     a->fpnop0();                  // 3
   266     a->fpnop1();                  // 4
   267     a->addi(R4,R4, -1);           // 5
   269     // ;; 1
   271     a->nop();                     // 6
   272     a->fmr(F6, F6);               // 7
   273     a->fmr(F7, F7);               // 8
   274     // ------- sector 8 ---------------
   276     // ;; 2
   277     a->endgroup();                // 9
   279     // ;; 3
   280     a->nop();                     // 10
   281     a->nop();                     // 11
   282     a->fmr(F8, F8);               // 12
   284     // ;; 4
   285     a->fmr(F9, F9);               // 13
   286     a->nop();                     // 14
   287     a->fmr(F10, F10);             // 15
   289     // ;; 5
   290     a->fmr(F11, F11);             // 16
   291     // -------- sector 16 -------------
   293     // ;; 6
   294     a->endgroup();                // 17
   296     // ;; 7
   297     a->nop();                     // 18
   298     a->nop();                     // 19
   299     a->fmr(F15, F15);             // 20
   301     // ;; 8
   302     a->fmr(F16, F16);             // 21
   303     a->nop();                     // 22
   304     a->fmr(F17, F17);             // 23
   306     // ;; 9
   307     a->fmr(F18, F18);             // 24
   308     // -------- sector 24 -------------
   310     // ;; 10
   311     a->endgroup();                // 25
   313     // ;; 11
   314     a->nop();                     // 26
   315     a->nop();                     // 27
   316     a->fmr(F19, F19);             // 28
   318     // ;; 12
   319     a->fmr(F20, F20);             // 29
   320     a->nop();                     // 30
   321     a->fmr(F21, F21);             // 31
   323     // ;; 13
   324     a->fmr(F22, F22);             // 32
   325   }
   327   // -------- sector 32 -------------
   328   // ;; 14
   329   a->cmpdi(CCR0, R4, unroll); // 33
   330   a->bge(CCR0, l2);           // 34
   332   a->blr();
   333   uint32_t *code_end = (uint32_t *)a->pc();
   334   a->flush();
   336   double loop1_seconds,loop2_seconds, rel_diff;
   337   uint64_t start1, stop1;
   339   start1 = os::current_thread_cpu_time(false);
   340   (*test1)();
   341   stop1 = os::current_thread_cpu_time(false);
   342   loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0);
   345   start1 = os::current_thread_cpu_time(false);
   346   (*test2)();
   347   stop1 = os::current_thread_cpu_time(false);
   349   loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0);
   351   rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100;
   353   if (PrintAssembly) {
   354     ttyLocker ttyl;
   355     tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", code);
   356     Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
   357     tty->print_cr("Time loop1 :%f", loop1_seconds);
   358     tty->print_cr("Time loop2 :%f", loop2_seconds);
   359     tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff);
   361     if (rel_diff > 12.0) {
   362       tty->print_cr("Section Size 8 Instructions");
   363     } else{
   364       tty->print_cr("Section Size 32 Instructions or Power5");
   365     }
   366   }
   368 #if 0 // TODO: PPC port
   369   // Set sector size (if not set explicitly).
   370   if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) {
   371     if (rel_diff > 12.0) {
   372       PdScheduling::power6SectorSize = 0x20;
   373     } else {
   374       PdScheduling::power6SectorSize = 0x80;
   375     }
   376   } else if (Power6SectorSize128PPC64) {
   377     PdScheduling::power6SectorSize = 0x80;
   378   } else {
   379     PdScheduling::power6SectorSize = 0x20;
   380   }
   381 #endif
   382   if (UsePower6SchedulerPPC64) Unimplemented();
   383 }
   384 #endif // COMPILER2
   386 void VM_Version::determine_features() {
   387 #if defined(ABI_ELFv2)
   388   const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect.
   389 #else
   390   // 7 InstWords for each call (function descriptor + blr instruction).
   391   const int code_size = (num_features+1+2*7)*BytesPerInstWord;
   392 #endif
   393   int features = 0;
   395   // create test area
   396   enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size).
   397   char test_area[BUFFER_SIZE];
   398   char *mid_of_test_area = &test_area[BUFFER_SIZE>>1];
   400   // Allocate space for the code.
   401   ResourceMark rm;
   402   CodeBuffer cb("detect_cpu_features", code_size, 0);
   403   MacroAssembler* a = new MacroAssembler(&cb);
   405   // Must be set to true so we can generate the test code.
   406   _features = VM_Version::all_features_m;
   408   // Emit code.
   409   void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry();
   410   uint32_t *code = (uint32_t *)a->pc();
   411   // Don't use R0 in ldarx.
   412   // Keep R3_ARG1 unmodified, it contains &field (see below).
   413   // Keep R4_ARG2 unmodified, it contains offset = 0 (see below).
   414   a->fsqrt(F3, F4);                            // code[0] -> fsqrt_m
   415   a->fsqrts(F3, F4);                           // code[1] -> fsqrts_m
   416   a->isel(R7, R5, R6, 0);                      // code[2] -> isel_m
   417   a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m
   418   a->cmpb(R7, R5, R6);                         // code[4] -> bcmp
   419   //a->mftgpr(R7, F3);                         // code[5] -> mftgpr
   420   a->popcntb(R7, R5);                          // code[6] -> popcntb
   421   a->popcntw(R7, R5);                          // code[7] -> popcntw
   422   a->fcfids(F3, F4);                           // code[8] -> fcfids
   423   a->vand(VR0, VR0, VR0);                      // code[9] -> vand
   424   a->blr();
   426   // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
   427   void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
   428   a->dcbz(R3_ARG1); // R3_ARG1 = addr
   429   a->blr();
   431   uint32_t *code_end = (uint32_t *)a->pc();
   432   a->flush();
   433   _features = VM_Version::unknown_m;
   435   // Print the detection code.
   436   if (PrintAssembly) {
   437     ttyLocker ttyl;
   438     tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", code);
   439     Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
   440   }
   442   // Measure cache line size.
   443   memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF.
   444   (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle.
   445   int count = 0; // count zeroed bytes
   446   for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++;
   447   guarantee(is_power_of_2(count), "cache line size needs to be a power of 2");
   448   _measured_cache_line_size = count;
   450   // Execute code. Illegal instructions will be replaced by 0 in the signal handler.
   451   VM_Version::_is_determine_features_test_running = true;
   452   (*test)((address)mid_of_test_area, (uint64_t)0);
   453   VM_Version::_is_determine_features_test_running = false;
   455   // determine which instructions are legal.
   456   int feature_cntr = 0;
   457   if (code[feature_cntr++]) features |= fsqrt_m;
   458   if (code[feature_cntr++]) features |= fsqrts_m;
   459   if (code[feature_cntr++]) features |= isel_m;
   460   if (code[feature_cntr++]) features |= lxarxeh_m;
   461   if (code[feature_cntr++]) features |= cmpb_m;
   462   //if(code[feature_cntr++])features |= mftgpr_m;
   463   if (code[feature_cntr++]) features |= popcntb_m;
   464   if (code[feature_cntr++]) features |= popcntw_m;
   465   if (code[feature_cntr++]) features |= fcfids_m;
   466   if (code[feature_cntr++]) features |= vand_m;
   468   // Print the detection code.
   469   if (PrintAssembly) {
   470     ttyLocker ttyl;
   471     tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", code);
   472     Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
   473   }
   475   _features = features;
   476 }
   479 static int saved_features = 0;
   481 void VM_Version::allow_all() {
   482   saved_features = _features;
   483   _features      = all_features_m;
   484 }
   486 void VM_Version::revert() {
   487   _features = saved_features;
   488 }

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