Mon, 06 Jan 2014 11:02:21 +0100
8031188: Fix for 8029015: PPC64 (part 216): opto: trap based null and range checks
Summary: Swap the Projs in the block list so that the new block is added behind the proper node.
Reviewed-by: kvn
1 /*
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
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25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
26 #define SHARE_VM_OPTO_MACHNODE_HPP
28 #include "opto/callnode.hpp"
29 #include "opto/matcher.hpp"
30 #include "opto/multnode.hpp"
31 #include "opto/node.hpp"
32 #include "opto/regmask.hpp"
34 class BiasedLockingCounters;
35 class BufferBlob;
36 class CodeBuffer;
37 class JVMState;
38 class MachCallDynamicJavaNode;
39 class MachCallJavaNode;
40 class MachCallLeafNode;
41 class MachCallNode;
42 class MachCallRuntimeNode;
43 class MachCallStaticJavaNode;
44 class MachEpilogNode;
45 class MachIfNode;
46 class MachNullCheckNode;
47 class MachOper;
48 class MachProjNode;
49 class MachPrologNode;
50 class MachReturnNode;
51 class MachSafePointNode;
52 class MachSpillCopyNode;
53 class Matcher;
54 class PhaseRegAlloc;
55 class RegMask;
56 class State;
58 //---------------------------MachOper------------------------------------------
59 class MachOper : public ResourceObj {
60 public:
61 // Allocate right next to the MachNodes in the same arena
62 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); }
64 // Opcode
65 virtual uint opcode() const = 0;
67 // Number of input edges.
68 // Generally at least 1
69 virtual uint num_edges() const { return 1; }
70 // Array of Register masks
71 virtual const RegMask *in_RegMask(int index) const;
73 // Methods to output the encoding of the operand
75 // Negate conditional branches. Error for non-branch Nodes
76 virtual void negate();
78 // Return the value requested
79 // result register lookup, corresponding to int_format
80 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
81 // input register lookup, corresponding to ext_format
82 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
84 // helpers for MacroAssembler generation from ADLC
85 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
86 return ::as_Register(reg(ra_, node));
87 }
88 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
89 return ::as_Register(reg(ra_, node, idx));
90 }
91 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
92 return ::as_FloatRegister(reg(ra_, node));
93 }
94 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
95 return ::as_FloatRegister(reg(ra_, node, idx));
96 }
98 #if defined(IA32) || defined(AMD64)
99 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
100 return ::as_XMMRegister(reg(ra_, node));
101 }
102 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
103 return ::as_XMMRegister(reg(ra_, node, idx));
104 }
105 #endif
106 // CondRegister reg converter
107 #if defined(PPC64)
108 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
109 return ::as_ConditionRegister(reg(ra_, node));
110 }
111 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
112 return ::as_ConditionRegister(reg(ra_, node, idx));
113 }
114 #endif
116 virtual intptr_t constant() const;
117 virtual relocInfo::relocType constant_reloc() const;
118 virtual jdouble constantD() const;
119 virtual jfloat constantF() const;
120 virtual jlong constantL() const;
121 virtual TypeOopPtr *oop() const;
122 virtual int ccode() const;
123 // A zero, default, indicates this value is not needed.
124 // May need to lookup the base register, as done in int_ and ext_format
125 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
126 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
127 virtual int scale() const;
128 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
129 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
130 // Check for PC-Relative displacement
131 virtual relocInfo::relocType disp_reloc() const;
132 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
133 virtual int base_position() const; // base edge position, or -1
134 virtual int index_position() const; // index edge position, or -1
136 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
137 // Only returns non-null value for i486.ad's indOffset32X
138 virtual const TypePtr *disp_as_type() const { return NULL; }
140 // Return the label
141 virtual Label *label() const;
143 // Return the method's address
144 virtual intptr_t method() const;
146 // Hash and compare over operands are currently identical
147 virtual uint hash() const;
148 virtual uint cmp( const MachOper &oper ) const;
150 // Virtual clone, since I do not know how big the MachOper is.
151 virtual MachOper *clone(Compile* C) const = 0;
153 // Return ideal Type from simple operands. Fail for complex operands.
154 virtual const Type *type() const;
156 // Set an integer offset if we have one, or error otherwise
157 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
159 #ifndef PRODUCT
160 // Return name of operand
161 virtual const char *Name() const { return "???";}
163 // Methods to output the text version of the operand
164 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
165 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
167 virtual void dump_spec(outputStream *st) const; // Print per-operand info
169 // Check whether o is a valid oper.
170 static bool notAnOper(const MachOper *o) {
171 if (o == NULL) return true;
172 if (((intptr_t)o & 1) != 0) return true;
173 if (*(address*)o == badAddress) return true; // kill by Node::destruct
174 return false;
175 }
176 #endif // !PRODUCT
177 };
179 //------------------------------MachNode---------------------------------------
180 // Base type for all machine specific nodes. All node classes generated by the
181 // ADLC inherit from this class.
182 class MachNode : public Node {
183 public:
184 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
185 init_class_id(Class_Mach);
186 }
187 // Required boilerplate
188 virtual uint size_of() const { return sizeof(MachNode); }
189 virtual int Opcode() const; // Always equal to MachNode
190 virtual uint rule() const = 0; // Machine-specific opcode
191 // Number of inputs which come before the first operand.
192 // Generally at least 1, to skip the Control input
193 virtual uint oper_input_base() const { return 1; }
194 // Position of constant base node in node's inputs. -1 if
195 // no constant base node input.
196 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
198 // Copy inputs and operands to new node of instruction.
199 // Called from cisc_version() and short_branch_version().
200 // !!!! The method's body is defined in ad_<arch>.cpp file.
201 void fill_new_machnode(MachNode *n, Compile* C) const;
203 // Return an equivalent instruction using memory for cisc_operand position
204 virtual MachNode *cisc_version(int offset, Compile* C);
205 // Modify this instruction's register mask to use stack version for cisc_operand
206 virtual void use_cisc_RegMask();
208 // Support for short branches
209 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
211 // Avoid back to back some instructions on some CPUs.
212 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }
214 // instruction implemented with a call
215 bool has_call() const { return (flags() & Flag_has_call) != 0; }
217 // First index in _in[] corresponding to operand, or -1 if there is none
218 int operand_index(uint operand) const;
219 int operand_index(const MachOper *oper) const;
221 // Register class input is expected in
222 virtual const RegMask &in_RegMask(uint) const;
224 // cisc-spillable instructions redefine for use by in_RegMask
225 virtual const RegMask *cisc_RegMask() const { return NULL; }
227 // If this instruction is a 2-address instruction, then return the
228 // index of the input which must match the output. Not nessecary
229 // for instructions which bind the input and output register to the
230 // same singleton regiser (e.g., Intel IDIV which binds AX to be
231 // both an input and an output). It is nessecary when the input and
232 // output have choices - but they must use the same choice.
233 virtual uint two_adr( ) const { return 0; }
235 // Array of complex operand pointers. Each corresponds to zero or
236 // more leafs. Must be set by MachNode constructor to point to an
237 // internal array of MachOpers. The MachOper array is sized by
238 // specific MachNodes described in the ADL.
239 uint _num_opnds;
240 MachOper **_opnds;
241 uint num_opnds() const { return _num_opnds; }
243 // Emit bytes into cbuf
244 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
245 // Expand node after register allocation.
246 // Node is replaced by several nodes in the postalloc expand phase.
247 // Corresponding methods are generated for nodes if they specify
248 // postalloc_expand. See block.cpp for more documentation.
249 virtual bool requires_postalloc_expand() const { return false; }
250 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
251 // Size of instruction in bytes
252 virtual uint size(PhaseRegAlloc *ra_) const;
253 // Helper function that computes size by emitting code
254 virtual uint emit_size(PhaseRegAlloc *ra_) const;
256 // Return the alignment required (in units of relocInfo::addr_unit())
257 // for this instruction (must be a power of 2)
258 virtual int alignment_required() const { return 1; }
260 // Return the padding (in bytes) to be emitted before this
261 // instruction to properly align it.
262 virtual int compute_padding(int current_offset) const { return 0; }
264 // Return number of relocatable values contained in this instruction
265 virtual int reloc() const { return 0; }
267 // Return number of words used for double constants in this instruction
268 virtual int ins_num_consts() const { return 0; }
270 // Hash and compare over operands. Used to do GVN on machine Nodes.
271 virtual uint hash() const;
272 virtual uint cmp( const Node &n ) const;
274 // Expand method for MachNode, replaces nodes representing pseudo
275 // instructions with a set of nodes which represent real machine
276 // instructions and compute the same value.
277 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
279 // Bottom_type call; value comes from operand0
280 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
281 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
283 // If this is a memory op, return the base pointer and fixed offset.
284 // If there are no such, return NULL. If there are multiple addresses
285 // or the address is indeterminate (rare cases) then return (Node*)-1,
286 // which serves as node bottom.
287 // If the offset is not statically determined, set it to Type::OffsetBot.
288 // This method is free to ignore stack slots if that helps.
289 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
290 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
291 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
293 // Helper for get_base_and_disp: find the base and index input nodes.
294 // Returns the MachOper as determined by memory_operand(), for use, if
295 // needed by the caller. If (MachOper *)-1 is returned, base and index
296 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
297 // index are set to NULL.
298 const MachOper* memory_inputs(Node* &base, Node* &index) const;
300 // Helper for memory_inputs: Which operand carries the necessary info?
301 // By default, returns NULL, which means there is no such operand.
302 // If it returns (MachOper*)-1, this means there are multiple memories.
303 virtual const MachOper* memory_operand() const { return NULL; }
305 // Call "get_base_and_disp" to decide which category of memory is used here.
306 virtual const class TypePtr *adr_type() const;
308 // Apply peephole rule(s) to this instruction
309 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
311 // Top-level ideal Opcode matched
312 virtual int ideal_Opcode() const { return Op_Node; }
314 // Adds the label for the case
315 virtual void add_case_label( int switch_val, Label* blockLabel);
317 // Set the absolute address for methods
318 virtual void method_set( intptr_t addr );
320 // Should we clone rather than spill this instruction?
321 bool rematerialize() const;
323 // Get the pipeline info
324 static const Pipeline *pipeline_class();
325 virtual const Pipeline *pipeline() const;
327 // Returns true if this node is a check that can be implemented with a trap.
328 virtual bool is_TrapBasedCheckNode() const { return false; }
330 #ifndef PRODUCT
331 virtual const char *Name() const = 0; // Machine-specific name
332 virtual void dump_spec(outputStream *st) const; // Print per-node info
333 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
334 #endif
335 };
337 //------------------------------MachIdealNode----------------------------
338 // Machine specific versions of nodes that must be defined by user.
339 // These are not converted by matcher from ideal nodes to machine nodes
340 // but are inserted into the code by the compiler.
341 class MachIdealNode : public MachNode {
342 public:
343 MachIdealNode( ) {}
345 // Define the following defaults for non-matched machine nodes
346 virtual uint oper_input_base() const { return 0; }
347 virtual uint rule() const { return 9999999; }
348 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
349 };
351 //------------------------------MachTypeNode----------------------------
352 // Machine Nodes that need to retain a known Type.
353 class MachTypeNode : public MachNode {
354 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
355 public:
356 MachTypeNode( ) {}
357 const Type *_bottom_type;
359 virtual const class Type *bottom_type() const { return _bottom_type; }
360 #ifndef PRODUCT
361 virtual void dump_spec(outputStream *st) const;
362 #endif
363 };
365 //------------------------------MachBreakpointNode----------------------------
366 // Machine breakpoint or interrupt Node
367 class MachBreakpointNode : public MachIdealNode {
368 public:
369 MachBreakpointNode( ) {}
370 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
371 virtual uint size(PhaseRegAlloc *ra_) const;
373 #ifndef PRODUCT
374 virtual const char *Name() const { return "Breakpoint"; }
375 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
376 #endif
377 };
379 //------------------------------MachConstantBaseNode--------------------------
380 // Machine node that represents the base address of the constant table.
381 class MachConstantBaseNode : public MachIdealNode {
382 public:
383 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
385 public:
386 MachConstantBaseNode() : MachIdealNode() {
387 init_class_id(Class_MachConstantBase);
388 }
389 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
390 virtual uint ideal_reg() const { return Op_RegP; }
391 virtual uint oper_input_base() const { return 1; }
393 virtual bool requires_postalloc_expand() const;
394 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
396 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
397 virtual uint size(PhaseRegAlloc* ra_) const;
398 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
400 static const RegMask& static_out_RegMask() { return _out_RegMask; }
401 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
403 #ifndef PRODUCT
404 virtual const char* Name() const { return "MachConstantBaseNode"; }
405 virtual void format(PhaseRegAlloc*, outputStream* st) const;
406 #endif
407 };
409 //------------------------------MachConstantNode-------------------------------
410 // Machine node that holds a constant which is stored in the constant table.
411 class MachConstantNode : public MachTypeNode {
412 protected:
413 Compile::Constant _constant; // This node's constant.
415 public:
416 MachConstantNode() : MachTypeNode() {
417 init_class_id(Class_MachConstant);
418 }
420 virtual void eval_constant(Compile* C) {
421 #ifdef ASSERT
422 tty->print("missing MachConstantNode eval_constant function: ");
423 dump();
424 #endif
425 ShouldNotCallThis();
426 }
428 virtual const RegMask &in_RegMask(uint idx) const {
429 if (idx == mach_constant_base_node_input())
430 return MachConstantBaseNode::static_out_RegMask();
431 return MachNode::in_RegMask(idx);
432 }
434 // Input edge of MachConstantBaseNode.
435 virtual uint mach_constant_base_node_input() const { return req() - 1; }
437 int constant_offset();
438 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
439 // Unchecked version to avoid assertions in debug output.
440 int constant_offset_unchecked() const;
441 };
443 //------------------------------MachUEPNode-----------------------------------
444 // Machine Unvalidated Entry Point Node
445 class MachUEPNode : public MachIdealNode {
446 public:
447 MachUEPNode( ) {}
448 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
449 virtual uint size(PhaseRegAlloc *ra_) const;
451 #ifndef PRODUCT
452 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
453 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
454 #endif
455 };
457 //------------------------------MachPrologNode--------------------------------
458 // Machine function Prolog Node
459 class MachPrologNode : public MachIdealNode {
460 public:
461 MachPrologNode( ) {}
462 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
463 virtual uint size(PhaseRegAlloc *ra_) const;
464 virtual int reloc() const;
466 #ifndef PRODUCT
467 virtual const char *Name() const { return "Prolog"; }
468 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
469 #endif
470 };
472 //------------------------------MachEpilogNode--------------------------------
473 // Machine function Epilog Node
474 class MachEpilogNode : public MachIdealNode {
475 public:
476 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
477 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
478 virtual uint size(PhaseRegAlloc *ra_) const;
479 virtual int reloc() const;
480 virtual const Pipeline *pipeline() const;
482 private:
483 bool _do_polling;
485 public:
486 bool do_polling() const { return _do_polling; }
488 // Offset of safepoint from the beginning of the node
489 int safepoint_offset() const;
491 #ifndef PRODUCT
492 virtual const char *Name() const { return "Epilog"; }
493 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
494 #endif
495 };
497 //------------------------------MachNopNode-----------------------------------
498 // Machine function Nop Node
499 class MachNopNode : public MachIdealNode {
500 private:
501 int _count;
502 public:
503 MachNopNode( ) : _count(1) {}
504 MachNopNode( int count ) : _count(count) {}
505 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
506 virtual uint size(PhaseRegAlloc *ra_) const;
508 virtual const class Type *bottom_type() const { return Type::CONTROL; }
510 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
511 virtual const Pipeline *pipeline() const;
512 #ifndef PRODUCT
513 virtual const char *Name() const { return "Nop"; }
514 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
515 virtual void dump_spec(outputStream *st) const { } // No per-operand info
516 #endif
517 };
519 //------------------------------MachSpillCopyNode------------------------------
520 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
521 // location (stack or register).
522 class MachSpillCopyNode : public MachIdealNode {
523 const RegMask *_in; // RegMask for input
524 const RegMask *_out; // RegMask for output
525 const Type *_type;
526 public:
527 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
528 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
529 init_class_id(Class_MachSpillCopy);
530 init_flags(Flag_is_Copy);
531 add_req(NULL);
532 add_req(n);
533 }
534 virtual uint size_of() const { return sizeof(*this); }
535 void set_out_RegMask(const RegMask &out) { _out = &out; }
536 void set_in_RegMask(const RegMask &in) { _in = ∈ }
537 virtual const RegMask &out_RegMask() const { return *_out; }
538 virtual const RegMask &in_RegMask(uint) const { return *_in; }
539 virtual const class Type *bottom_type() const { return _type; }
540 virtual uint ideal_reg() const { return _type->ideal_reg(); }
541 virtual uint oper_input_base() const { return 1; }
542 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
544 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
545 virtual uint size(PhaseRegAlloc *ra_) const;
547 #ifndef PRODUCT
548 virtual const char *Name() const { return "MachSpillCopy"; }
549 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
550 #endif
551 };
553 //------------------------------MachBranchNode--------------------------------
554 // Abstract machine branch Node
555 class MachBranchNode : public MachIdealNode {
556 public:
557 MachBranchNode() : MachIdealNode() {
558 init_class_id(Class_MachBranch);
559 }
560 virtual void label_set(Label* label, uint block_num) = 0;
561 virtual void save_label(Label** label, uint* block_num) = 0;
563 // Support for short branches
564 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
566 virtual bool pinned() const { return true; };
567 };
569 //------------------------------MachNullChkNode--------------------------------
570 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
571 // also some kind of memory op. Turns the indicated MachNode into a
572 // conditional branch with good latency on the ptr-not-null path and awful
573 // latency on the pointer-is-null path.
575 class MachNullCheckNode : public MachBranchNode {
576 public:
577 const uint _vidx; // Index of memop being tested
578 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
579 init_class_id(Class_MachNullCheck);
580 add_req(ctrl);
581 add_req(memop);
582 }
583 virtual uint size_of() const { return sizeof(*this); }
585 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
586 virtual void label_set(Label* label, uint block_num);
587 virtual void save_label(Label** label, uint* block_num);
588 virtual void negate() { }
589 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
590 virtual uint ideal_reg() const { return NotAMachineReg; }
591 virtual const RegMask &in_RegMask(uint) const;
592 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
593 #ifndef PRODUCT
594 virtual const char *Name() const { return "NullCheck"; }
595 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
596 #endif
597 };
599 //------------------------------MachProjNode----------------------------------
600 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
601 // just MachNodes made by the Ideal world that replicate simple projections
602 // but with machine-dependent input & output register masks. Generally
603 // produced as part of calling conventions. Normally I make MachNodes as part
604 // of the Matcher process, but the Matcher is ill suited to issues involving
605 // frame handling, so frame handling is all done in the Ideal world with
606 // occasional callbacks to the machine model for important info.
607 class MachProjNode : public ProjNode {
608 public:
609 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
610 init_class_id(Class_MachProj);
611 }
612 RegMask _rout;
613 const uint _ideal_reg;
614 enum projType {
615 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
616 fat_proj = 999 // Projs killing many regs, defined by _rout
617 };
618 virtual int Opcode() const;
619 virtual const Type *bottom_type() const;
620 virtual const TypePtr *adr_type() const;
621 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
622 virtual const RegMask &out_RegMask() const { return _rout; }
623 virtual uint ideal_reg() const { return _ideal_reg; }
624 // Need size_of() for virtual ProjNode::clone()
625 virtual uint size_of() const { return sizeof(MachProjNode); }
626 #ifndef PRODUCT
627 virtual void dump_spec(outputStream *st) const;
628 #endif
629 };
631 //------------------------------MachIfNode-------------------------------------
632 // Machine-specific versions of IfNodes
633 class MachIfNode : public MachBranchNode {
634 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
635 public:
636 float _prob; // Probability branch goes either way
637 float _fcnt; // Frequency counter
638 MachIfNode() : MachBranchNode() {
639 init_class_id(Class_MachIf);
640 }
641 // Negate conditional branches.
642 virtual void negate() = 0;
643 #ifndef PRODUCT
644 virtual void dump_spec(outputStream *st) const;
645 #endif
646 };
648 //------------------------------MachGotoNode-----------------------------------
649 // Machine-specific versions of GotoNodes
650 class MachGotoNode : public MachBranchNode {
651 public:
652 MachGotoNode() : MachBranchNode() {
653 init_class_id(Class_MachGoto);
654 }
655 };
657 //------------------------------MachFastLockNode-------------------------------------
658 // Machine-specific versions of FastLockNodes
659 class MachFastLockNode : public MachNode {
660 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
661 public:
662 BiasedLockingCounters* _counters;
664 MachFastLockNode() : MachNode() {}
665 };
667 //------------------------------MachReturnNode--------------------------------
668 // Machine-specific versions of subroutine returns
669 class MachReturnNode : public MachNode {
670 virtual uint size_of() const; // Size is bigger
671 public:
672 RegMask *_in_rms; // Input register masks, set during allocation
673 ReallocMark _nesting; // assertion check for reallocations
674 const TypePtr* _adr_type; // memory effects of call or return
675 MachReturnNode() : MachNode() {
676 init_class_id(Class_MachReturn);
677 _adr_type = TypePtr::BOTTOM; // the default: all of memory
678 }
680 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
682 virtual const RegMask &in_RegMask(uint) const;
683 virtual bool pinned() const { return true; };
684 virtual const TypePtr *adr_type() const;
685 };
687 //------------------------------MachSafePointNode-----------------------------
688 // Machine-specific versions of safepoints
689 class MachSafePointNode : public MachReturnNode {
690 public:
691 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
692 JVMState* _jvms; // Pointer to list of JVM State Objects
693 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
694 OopMap* oop_map() const { return _oop_map; }
695 void set_oop_map(OopMap* om) { _oop_map = om; }
697 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
698 init_class_id(Class_MachSafePoint);
699 }
701 virtual JVMState* jvms() const { return _jvms; }
702 void set_jvms(JVMState* s) {
703 _jvms = s;
704 }
705 virtual const Type *bottom_type() const;
707 virtual const RegMask &in_RegMask(uint) const;
709 // Functionality from old debug nodes
710 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
711 Node *frameptr () const { return in(TypeFunc::FramePtr); }
713 Node *local(const JVMState* jvms, uint idx) const {
714 assert(verify_jvms(jvms), "jvms must match");
715 return in(_jvmadj + jvms->locoff() + idx);
716 }
717 Node *stack(const JVMState* jvms, uint idx) const {
718 assert(verify_jvms(jvms), "jvms must match");
719 return in(_jvmadj + jvms->stkoff() + idx);
720 }
721 Node *monitor_obj(const JVMState* jvms, uint idx) const {
722 assert(verify_jvms(jvms), "jvms must match");
723 return in(_jvmadj + jvms->monitor_obj_offset(idx));
724 }
725 Node *monitor_box(const JVMState* jvms, uint idx) const {
726 assert(verify_jvms(jvms), "jvms must match");
727 return in(_jvmadj + jvms->monitor_box_offset(idx));
728 }
729 void set_local(const JVMState* jvms, uint idx, Node *c) {
730 assert(verify_jvms(jvms), "jvms must match");
731 set_req(_jvmadj + jvms->locoff() + idx, c);
732 }
733 void set_stack(const JVMState* jvms, uint idx, Node *c) {
734 assert(verify_jvms(jvms), "jvms must match");
735 set_req(_jvmadj + jvms->stkoff() + idx, c);
736 }
737 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
738 assert(verify_jvms(jvms), "jvms must match");
739 set_req(_jvmadj + jvms->monoff() + idx, c);
740 }
741 };
743 //------------------------------MachCallNode----------------------------------
744 // Machine-specific versions of subroutine calls
745 class MachCallNode : public MachSafePointNode {
746 protected:
747 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
748 virtual uint cmp( const Node &n ) const;
749 virtual uint size_of() const = 0; // Size is bigger
750 public:
751 const TypeFunc *_tf; // Function type
752 address _entry_point; // Address of the method being called
753 float _cnt; // Estimate of number of times called
754 uint _argsize; // Size of argument block on stack
756 const TypeFunc* tf() const { return _tf; }
757 const address entry_point() const { return _entry_point; }
758 const float cnt() const { return _cnt; }
759 uint argsize() const { return _argsize; }
761 void set_tf(const TypeFunc* tf) { _tf = tf; }
762 void set_entry_point(address p) { _entry_point = p; }
763 void set_cnt(float c) { _cnt = c; }
764 void set_argsize(int s) { _argsize = s; }
766 MachCallNode() : MachSafePointNode() {
767 init_class_id(Class_MachCall);
768 }
770 virtual const Type *bottom_type() const;
771 virtual bool pinned() const { return false; }
772 virtual const Type *Value( PhaseTransform *phase ) const;
773 virtual const RegMask &in_RegMask(uint) const;
774 virtual int ret_addr_offset() { return 0; }
776 bool returns_long() const { return tf()->return_type() == T_LONG; }
777 bool return_value_is_used() const;
778 #ifndef PRODUCT
779 virtual void dump_spec(outputStream *st) const;
780 #endif
781 };
783 //------------------------------MachCallJavaNode------------------------------
784 // "Base" class for machine-specific versions of subroutine calls
785 class MachCallJavaNode : public MachCallNode {
786 protected:
787 virtual uint cmp( const Node &n ) const;
788 virtual uint size_of() const; // Size is bigger
789 public:
790 ciMethod* _method; // Method being direct called
791 int _bci; // Byte Code index of call byte code
792 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
793 bool _method_handle_invoke; // Tells if the call has to preserve SP
794 MachCallJavaNode() : MachCallNode() {
795 init_class_id(Class_MachCallJava);
796 }
798 virtual const RegMask &in_RegMask(uint) const;
800 #ifndef PRODUCT
801 virtual void dump_spec(outputStream *st) const;
802 #endif
803 };
805 //------------------------------MachCallStaticJavaNode------------------------
806 // Machine-specific versions of monomorphic subroutine calls
807 class MachCallStaticJavaNode : public MachCallJavaNode {
808 virtual uint cmp( const Node &n ) const;
809 virtual uint size_of() const; // Size is bigger
810 public:
811 const char *_name; // Runtime wrapper name
812 MachCallStaticJavaNode() : MachCallJavaNode() {
813 init_class_id(Class_MachCallStaticJava);
814 }
816 // If this is an uncommon trap, return the request code, else zero.
817 int uncommon_trap_request() const;
819 virtual int ret_addr_offset();
820 #ifndef PRODUCT
821 virtual void dump_spec(outputStream *st) const;
822 void dump_trap_args(outputStream *st) const;
823 #endif
824 };
826 //------------------------------MachCallDynamicJavaNode------------------------
827 // Machine-specific versions of possibly megamorphic subroutine calls
828 class MachCallDynamicJavaNode : public MachCallJavaNode {
829 public:
830 int _vtable_index;
831 MachCallDynamicJavaNode() : MachCallJavaNode() {
832 init_class_id(Class_MachCallDynamicJava);
833 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
834 }
835 virtual int ret_addr_offset();
836 #ifndef PRODUCT
837 virtual void dump_spec(outputStream *st) const;
838 #endif
839 };
841 //------------------------------MachCallRuntimeNode----------------------------
842 // Machine-specific versions of subroutine calls
843 class MachCallRuntimeNode : public MachCallNode {
844 virtual uint cmp( const Node &n ) const;
845 virtual uint size_of() const; // Size is bigger
846 public:
847 const char *_name; // Printable name, if _method is NULL
848 MachCallRuntimeNode() : MachCallNode() {
849 init_class_id(Class_MachCallRuntime);
850 }
851 virtual int ret_addr_offset();
852 #ifndef PRODUCT
853 virtual void dump_spec(outputStream *st) const;
854 #endif
855 };
857 class MachCallLeafNode: public MachCallRuntimeNode {
858 public:
859 MachCallLeafNode() : MachCallRuntimeNode() {
860 init_class_id(Class_MachCallLeaf);
861 }
862 };
864 //------------------------------MachHaltNode-----------------------------------
865 // Machine-specific versions of halt nodes
866 class MachHaltNode : public MachReturnNode {
867 public:
868 virtual JVMState* jvms() const;
869 };
872 //------------------------------MachTempNode-----------------------------------
873 // Node used by the adlc to construct inputs to represent temporary registers
874 class MachTempNode : public MachNode {
875 private:
876 MachOper *_opnd_array[1];
878 public:
879 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
880 virtual uint rule() const { return 9999999; }
881 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
883 MachTempNode(MachOper* oper) {
884 init_class_id(Class_MachTemp);
885 _num_opnds = 1;
886 _opnds = _opnd_array;
887 add_req(NULL);
888 _opnds[0] = oper;
889 }
890 virtual uint size_of() const { return sizeof(MachTempNode); }
892 #ifndef PRODUCT
893 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
894 virtual const char *Name() const { return "MachTemp";}
895 #endif
896 };
900 //------------------------------labelOper--------------------------------------
901 // Machine-independent version of label operand
902 class labelOper : public MachOper {
903 private:
904 virtual uint num_edges() const { return 0; }
905 public:
906 // Supported for fixed size branches
907 Label* _label; // Label for branch(es)
909 uint _block_num;
911 labelOper() : _block_num(0), _label(0) {}
913 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
915 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
917 virtual MachOper *clone(Compile* C) const;
919 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
921 virtual uint opcode() const;
923 virtual uint hash() const;
924 virtual uint cmp( const MachOper &oper ) const;
925 #ifndef PRODUCT
926 virtual const char *Name() const { return "Label";}
928 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
929 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
930 #endif
931 };
934 //------------------------------methodOper--------------------------------------
935 // Machine-independent version of method operand
936 class methodOper : public MachOper {
937 private:
938 virtual uint num_edges() const { return 0; }
939 public:
940 intptr_t _method; // Address of method
941 methodOper() : _method(0) {}
942 methodOper(intptr_t method) : _method(method) {}
944 virtual MachOper *clone(Compile* C) const;
946 virtual intptr_t method() const { return _method; }
948 virtual uint opcode() const;
950 virtual uint hash() const;
951 virtual uint cmp( const MachOper &oper ) const;
952 #ifndef PRODUCT
953 virtual const char *Name() const { return "Method";}
955 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
956 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
957 #endif
958 };
960 #endif // SHARE_VM_OPTO_MACHNODE_HPP