Tue, 25 Mar 2014 17:07:36 -0700
Merge
1 /*
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
26 #define SHARE_VM_OPTO_MACHNODE_HPP
28 #include "opto/callnode.hpp"
29 #include "opto/matcher.hpp"
30 #include "opto/multnode.hpp"
31 #include "opto/node.hpp"
32 #include "opto/regmask.hpp"
34 class BiasedLockingCounters;
35 class BufferBlob;
36 class CodeBuffer;
37 class JVMState;
38 class MachCallDynamicJavaNode;
39 class MachCallJavaNode;
40 class MachCallLeafNode;
41 class MachCallNode;
42 class MachCallRuntimeNode;
43 class MachCallStaticJavaNode;
44 class MachEpilogNode;
45 class MachIfNode;
46 class MachNullCheckNode;
47 class MachOper;
48 class MachProjNode;
49 class MachPrologNode;
50 class MachReturnNode;
51 class MachSafePointNode;
52 class MachSpillCopyNode;
53 class Matcher;
54 class PhaseRegAlloc;
55 class RegMask;
56 class RTMLockingCounters;
57 class State;
59 //---------------------------MachOper------------------------------------------
60 class MachOper : public ResourceObj {
61 public:
62 // Allocate right next to the MachNodes in the same arena
63 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); }
65 // Opcode
66 virtual uint opcode() const = 0;
68 // Number of input edges.
69 // Generally at least 1
70 virtual uint num_edges() const { return 1; }
71 // Array of Register masks
72 virtual const RegMask *in_RegMask(int index) const;
74 // Methods to output the encoding of the operand
76 // Negate conditional branches. Error for non-branch Nodes
77 virtual void negate();
79 // Return the value requested
80 // result register lookup, corresponding to int_format
81 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
82 // input register lookup, corresponding to ext_format
83 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
85 // helpers for MacroAssembler generation from ADLC
86 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
87 return ::as_Register(reg(ra_, node));
88 }
89 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
90 return ::as_Register(reg(ra_, node, idx));
91 }
92 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
93 return ::as_FloatRegister(reg(ra_, node));
94 }
95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
96 return ::as_FloatRegister(reg(ra_, node, idx));
97 }
99 #if defined(IA32) || defined(AMD64)
100 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
101 return ::as_XMMRegister(reg(ra_, node));
102 }
103 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
104 return ::as_XMMRegister(reg(ra_, node, idx));
105 }
106 #endif
107 // CondRegister reg converter
108 #if defined(PPC64)
109 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
110 return ::as_ConditionRegister(reg(ra_, node));
111 }
112 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
113 return ::as_ConditionRegister(reg(ra_, node, idx));
114 }
115 #endif
117 virtual intptr_t constant() const;
118 virtual relocInfo::relocType constant_reloc() const;
119 virtual jdouble constantD() const;
120 virtual jfloat constantF() const;
121 virtual jlong constantL() const;
122 virtual TypeOopPtr *oop() const;
123 virtual int ccode() const;
124 // A zero, default, indicates this value is not needed.
125 // May need to lookup the base register, as done in int_ and ext_format
126 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
127 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
128 virtual int scale() const;
129 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
130 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
131 // Check for PC-Relative displacement
132 virtual relocInfo::relocType disp_reloc() const;
133 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
134 virtual int base_position() const; // base edge position, or -1
135 virtual int index_position() const; // index edge position, or -1
137 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
138 // Only returns non-null value for i486.ad's indOffset32X
139 virtual const TypePtr *disp_as_type() const { return NULL; }
141 // Return the label
142 virtual Label *label() const;
144 // Return the method's address
145 virtual intptr_t method() const;
147 // Hash and compare over operands are currently identical
148 virtual uint hash() const;
149 virtual uint cmp( const MachOper &oper ) const;
151 // Virtual clone, since I do not know how big the MachOper is.
152 virtual MachOper *clone(Compile* C) const = 0;
154 // Return ideal Type from simple operands. Fail for complex operands.
155 virtual const Type *type() const;
157 // Set an integer offset if we have one, or error otherwise
158 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
160 #ifndef PRODUCT
161 // Return name of operand
162 virtual const char *Name() const { return "???";}
164 // Methods to output the text version of the operand
165 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
166 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
168 virtual void dump_spec(outputStream *st) const; // Print per-operand info
170 // Check whether o is a valid oper.
171 static bool notAnOper(const MachOper *o) {
172 if (o == NULL) return true;
173 if (((intptr_t)o & 1) != 0) return true;
174 if (*(address*)o == badAddress) return true; // kill by Node::destruct
175 return false;
176 }
177 #endif // !PRODUCT
178 };
180 //------------------------------MachNode---------------------------------------
181 // Base type for all machine specific nodes. All node classes generated by the
182 // ADLC inherit from this class.
183 class MachNode : public Node {
184 public:
185 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
186 init_class_id(Class_Mach);
187 }
188 // Required boilerplate
189 virtual uint size_of() const { return sizeof(MachNode); }
190 virtual int Opcode() const; // Always equal to MachNode
191 virtual uint rule() const = 0; // Machine-specific opcode
192 // Number of inputs which come before the first operand.
193 // Generally at least 1, to skip the Control input
194 virtual uint oper_input_base() const { return 1; }
195 // Position of constant base node in node's inputs. -1 if
196 // no constant base node input.
197 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
199 // Copy inputs and operands to new node of instruction.
200 // Called from cisc_version() and short_branch_version().
201 // !!!! The method's body is defined in ad_<arch>.cpp file.
202 void fill_new_machnode(MachNode *n, Compile* C) const;
204 // Return an equivalent instruction using memory for cisc_operand position
205 virtual MachNode *cisc_version(int offset, Compile* C);
206 // Modify this instruction's register mask to use stack version for cisc_operand
207 virtual void use_cisc_RegMask();
209 // Support for short branches
210 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
212 // Avoid back to back some instructions on some CPUs.
213 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }
215 // instruction implemented with a call
216 bool has_call() const { return (flags() & Flag_has_call) != 0; }
218 // First index in _in[] corresponding to operand, or -1 if there is none
219 int operand_index(uint operand) const;
220 int operand_index(const MachOper *oper) const;
222 // Register class input is expected in
223 virtual const RegMask &in_RegMask(uint) const;
225 // cisc-spillable instructions redefine for use by in_RegMask
226 virtual const RegMask *cisc_RegMask() const { return NULL; }
228 // If this instruction is a 2-address instruction, then return the
229 // index of the input which must match the output. Not nessecary
230 // for instructions which bind the input and output register to the
231 // same singleton regiser (e.g., Intel IDIV which binds AX to be
232 // both an input and an output). It is nessecary when the input and
233 // output have choices - but they must use the same choice.
234 virtual uint two_adr( ) const { return 0; }
236 // Array of complex operand pointers. Each corresponds to zero or
237 // more leafs. Must be set by MachNode constructor to point to an
238 // internal array of MachOpers. The MachOper array is sized by
239 // specific MachNodes described in the ADL.
240 uint _num_opnds;
241 MachOper **_opnds;
242 uint num_opnds() const { return _num_opnds; }
244 // Emit bytes into cbuf
245 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
246 // Expand node after register allocation.
247 // Node is replaced by several nodes in the postalloc expand phase.
248 // Corresponding methods are generated for nodes if they specify
249 // postalloc_expand. See block.cpp for more documentation.
250 virtual bool requires_postalloc_expand() const { return false; }
251 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
252 // Size of instruction in bytes
253 virtual uint size(PhaseRegAlloc *ra_) const;
254 // Helper function that computes size by emitting code
255 virtual uint emit_size(PhaseRegAlloc *ra_) const;
257 // Return the alignment required (in units of relocInfo::addr_unit())
258 // for this instruction (must be a power of 2)
259 virtual int alignment_required() const { return 1; }
261 // Return the padding (in bytes) to be emitted before this
262 // instruction to properly align it.
263 virtual int compute_padding(int current_offset) const { return 0; }
265 // Return number of relocatable values contained in this instruction
266 virtual int reloc() const { return 0; }
268 // Return number of words used for double constants in this instruction
269 virtual int ins_num_consts() const { return 0; }
271 // Hash and compare over operands. Used to do GVN on machine Nodes.
272 virtual uint hash() const;
273 virtual uint cmp( const Node &n ) const;
275 // Expand method for MachNode, replaces nodes representing pseudo
276 // instructions with a set of nodes which represent real machine
277 // instructions and compute the same value.
278 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
280 // Bottom_type call; value comes from operand0
281 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
282 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
284 // If this is a memory op, return the base pointer and fixed offset.
285 // If there are no such, return NULL. If there are multiple addresses
286 // or the address is indeterminate (rare cases) then return (Node*)-1,
287 // which serves as node bottom.
288 // If the offset is not statically determined, set it to Type::OffsetBot.
289 // This method is free to ignore stack slots if that helps.
290 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
291 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
292 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
294 // Helper for get_base_and_disp: find the base and index input nodes.
295 // Returns the MachOper as determined by memory_operand(), for use, if
296 // needed by the caller. If (MachOper *)-1 is returned, base and index
297 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
298 // index are set to NULL.
299 const MachOper* memory_inputs(Node* &base, Node* &index) const;
301 // Helper for memory_inputs: Which operand carries the necessary info?
302 // By default, returns NULL, which means there is no such operand.
303 // If it returns (MachOper*)-1, this means there are multiple memories.
304 virtual const MachOper* memory_operand() const { return NULL; }
306 // Call "get_base_and_disp" to decide which category of memory is used here.
307 virtual const class TypePtr *adr_type() const;
309 // Apply peephole rule(s) to this instruction
310 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
312 // Top-level ideal Opcode matched
313 virtual int ideal_Opcode() const { return Op_Node; }
315 // Adds the label for the case
316 virtual void add_case_label( int switch_val, Label* blockLabel);
318 // Set the absolute address for methods
319 virtual void method_set( intptr_t addr );
321 // Should we clone rather than spill this instruction?
322 bool rematerialize() const;
324 // Get the pipeline info
325 static const Pipeline *pipeline_class();
326 virtual const Pipeline *pipeline() const;
328 // Returns true if this node is a check that can be implemented with a trap.
329 virtual bool is_TrapBasedCheckNode() const { return false; }
331 #ifndef PRODUCT
332 virtual const char *Name() const = 0; // Machine-specific name
333 virtual void dump_spec(outputStream *st) const; // Print per-node info
334 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
335 #endif
336 };
338 //------------------------------MachIdealNode----------------------------
339 // Machine specific versions of nodes that must be defined by user.
340 // These are not converted by matcher from ideal nodes to machine nodes
341 // but are inserted into the code by the compiler.
342 class MachIdealNode : public MachNode {
343 public:
344 MachIdealNode( ) {}
346 // Define the following defaults for non-matched machine nodes
347 virtual uint oper_input_base() const { return 0; }
348 virtual uint rule() const { return 9999999; }
349 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
350 };
352 //------------------------------MachTypeNode----------------------------
353 // Machine Nodes that need to retain a known Type.
354 class MachTypeNode : public MachNode {
355 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
356 public:
357 MachTypeNode( ) {}
358 const Type *_bottom_type;
360 virtual const class Type *bottom_type() const { return _bottom_type; }
361 #ifndef PRODUCT
362 virtual void dump_spec(outputStream *st) const;
363 #endif
364 };
366 //------------------------------MachBreakpointNode----------------------------
367 // Machine breakpoint or interrupt Node
368 class MachBreakpointNode : public MachIdealNode {
369 public:
370 MachBreakpointNode( ) {}
371 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
372 virtual uint size(PhaseRegAlloc *ra_) const;
374 #ifndef PRODUCT
375 virtual const char *Name() const { return "Breakpoint"; }
376 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
377 #endif
378 };
380 //------------------------------MachConstantBaseNode--------------------------
381 // Machine node that represents the base address of the constant table.
382 class MachConstantBaseNode : public MachIdealNode {
383 public:
384 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
386 public:
387 MachConstantBaseNode() : MachIdealNode() {
388 init_class_id(Class_MachConstantBase);
389 }
390 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
391 virtual uint ideal_reg() const { return Op_RegP; }
392 virtual uint oper_input_base() const { return 1; }
394 virtual bool requires_postalloc_expand() const;
395 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
397 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
398 virtual uint size(PhaseRegAlloc* ra_) const;
399 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
401 static const RegMask& static_out_RegMask() { return _out_RegMask; }
402 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
404 #ifndef PRODUCT
405 virtual const char* Name() const { return "MachConstantBaseNode"; }
406 virtual void format(PhaseRegAlloc*, outputStream* st) const;
407 #endif
408 };
410 //------------------------------MachConstantNode-------------------------------
411 // Machine node that holds a constant which is stored in the constant table.
412 class MachConstantNode : public MachTypeNode {
413 protected:
414 Compile::Constant _constant; // This node's constant.
416 public:
417 MachConstantNode() : MachTypeNode() {
418 init_class_id(Class_MachConstant);
419 }
421 virtual void eval_constant(Compile* C) {
422 #ifdef ASSERT
423 tty->print("missing MachConstantNode eval_constant function: ");
424 dump();
425 #endif
426 ShouldNotCallThis();
427 }
429 virtual const RegMask &in_RegMask(uint idx) const {
430 if (idx == mach_constant_base_node_input())
431 return MachConstantBaseNode::static_out_RegMask();
432 return MachNode::in_RegMask(idx);
433 }
435 // Input edge of MachConstantBaseNode.
436 virtual uint mach_constant_base_node_input() const { return req() - 1; }
438 int constant_offset();
439 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
440 // Unchecked version to avoid assertions in debug output.
441 int constant_offset_unchecked() const;
442 };
444 //------------------------------MachUEPNode-----------------------------------
445 // Machine Unvalidated Entry Point Node
446 class MachUEPNode : public MachIdealNode {
447 public:
448 MachUEPNode( ) {}
449 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
450 virtual uint size(PhaseRegAlloc *ra_) const;
452 #ifndef PRODUCT
453 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
454 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
455 #endif
456 };
458 //------------------------------MachPrologNode--------------------------------
459 // Machine function Prolog Node
460 class MachPrologNode : public MachIdealNode {
461 public:
462 MachPrologNode( ) {}
463 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
464 virtual uint size(PhaseRegAlloc *ra_) const;
465 virtual int reloc() const;
467 #ifndef PRODUCT
468 virtual const char *Name() const { return "Prolog"; }
469 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
470 #endif
471 };
473 //------------------------------MachEpilogNode--------------------------------
474 // Machine function Epilog Node
475 class MachEpilogNode : public MachIdealNode {
476 public:
477 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
478 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
479 virtual uint size(PhaseRegAlloc *ra_) const;
480 virtual int reloc() const;
481 virtual const Pipeline *pipeline() const;
483 private:
484 bool _do_polling;
486 public:
487 bool do_polling() const { return _do_polling; }
489 // Offset of safepoint from the beginning of the node
490 int safepoint_offset() const;
492 #ifndef PRODUCT
493 virtual const char *Name() const { return "Epilog"; }
494 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
495 #endif
496 };
498 //------------------------------MachNopNode-----------------------------------
499 // Machine function Nop Node
500 class MachNopNode : public MachIdealNode {
501 private:
502 int _count;
503 public:
504 MachNopNode( ) : _count(1) {}
505 MachNopNode( int count ) : _count(count) {}
506 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
507 virtual uint size(PhaseRegAlloc *ra_) const;
509 virtual const class Type *bottom_type() const { return Type::CONTROL; }
511 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
512 virtual const Pipeline *pipeline() const;
513 #ifndef PRODUCT
514 virtual const char *Name() const { return "Nop"; }
515 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
516 virtual void dump_spec(outputStream *st) const { } // No per-operand info
517 #endif
518 };
520 //------------------------------MachSpillCopyNode------------------------------
521 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
522 // location (stack or register).
523 class MachSpillCopyNode : public MachIdealNode {
524 const RegMask *_in; // RegMask for input
525 const RegMask *_out; // RegMask for output
526 const Type *_type;
527 public:
528 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
529 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
530 init_class_id(Class_MachSpillCopy);
531 init_flags(Flag_is_Copy);
532 add_req(NULL);
533 add_req(n);
534 }
535 virtual uint size_of() const { return sizeof(*this); }
536 void set_out_RegMask(const RegMask &out) { _out = &out; }
537 void set_in_RegMask(const RegMask &in) { _in = ∈ }
538 virtual const RegMask &out_RegMask() const { return *_out; }
539 virtual const RegMask &in_RegMask(uint) const { return *_in; }
540 virtual const class Type *bottom_type() const { return _type; }
541 virtual uint ideal_reg() const { return _type->ideal_reg(); }
542 virtual uint oper_input_base() const { return 1; }
543 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
545 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
546 virtual uint size(PhaseRegAlloc *ra_) const;
548 #ifndef PRODUCT
549 virtual const char *Name() const { return "MachSpillCopy"; }
550 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
551 #endif
552 };
554 //------------------------------MachBranchNode--------------------------------
555 // Abstract machine branch Node
556 class MachBranchNode : public MachIdealNode {
557 public:
558 MachBranchNode() : MachIdealNode() {
559 init_class_id(Class_MachBranch);
560 }
561 virtual void label_set(Label* label, uint block_num) = 0;
562 virtual void save_label(Label** label, uint* block_num) = 0;
564 // Support for short branches
565 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
567 virtual bool pinned() const { return true; };
568 };
570 //------------------------------MachNullChkNode--------------------------------
571 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
572 // also some kind of memory op. Turns the indicated MachNode into a
573 // conditional branch with good latency on the ptr-not-null path and awful
574 // latency on the pointer-is-null path.
576 class MachNullCheckNode : public MachBranchNode {
577 public:
578 const uint _vidx; // Index of memop being tested
579 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
580 init_class_id(Class_MachNullCheck);
581 add_req(ctrl);
582 add_req(memop);
583 }
584 virtual uint size_of() const { return sizeof(*this); }
586 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
587 virtual void label_set(Label* label, uint block_num);
588 virtual void save_label(Label** label, uint* block_num);
589 virtual void negate() { }
590 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
591 virtual uint ideal_reg() const { return NotAMachineReg; }
592 virtual const RegMask &in_RegMask(uint) const;
593 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
594 #ifndef PRODUCT
595 virtual const char *Name() const { return "NullCheck"; }
596 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
597 #endif
598 };
600 //------------------------------MachProjNode----------------------------------
601 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
602 // just MachNodes made by the Ideal world that replicate simple projections
603 // but with machine-dependent input & output register masks. Generally
604 // produced as part of calling conventions. Normally I make MachNodes as part
605 // of the Matcher process, but the Matcher is ill suited to issues involving
606 // frame handling, so frame handling is all done in the Ideal world with
607 // occasional callbacks to the machine model for important info.
608 class MachProjNode : public ProjNode {
609 public:
610 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
611 init_class_id(Class_MachProj);
612 }
613 RegMask _rout;
614 const uint _ideal_reg;
615 enum projType {
616 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
617 fat_proj = 999 // Projs killing many regs, defined by _rout
618 };
619 virtual int Opcode() const;
620 virtual const Type *bottom_type() const;
621 virtual const TypePtr *adr_type() const;
622 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
623 virtual const RegMask &out_RegMask() const { return _rout; }
624 virtual uint ideal_reg() const { return _ideal_reg; }
625 // Need size_of() for virtual ProjNode::clone()
626 virtual uint size_of() const { return sizeof(MachProjNode); }
627 #ifndef PRODUCT
628 virtual void dump_spec(outputStream *st) const;
629 #endif
630 };
632 //------------------------------MachIfNode-------------------------------------
633 // Machine-specific versions of IfNodes
634 class MachIfNode : public MachBranchNode {
635 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
636 public:
637 float _prob; // Probability branch goes either way
638 float _fcnt; // Frequency counter
639 MachIfNode() : MachBranchNode() {
640 init_class_id(Class_MachIf);
641 }
642 // Negate conditional branches.
643 virtual void negate() = 0;
644 #ifndef PRODUCT
645 virtual void dump_spec(outputStream *st) const;
646 #endif
647 };
649 //------------------------------MachGotoNode-----------------------------------
650 // Machine-specific versions of GotoNodes
651 class MachGotoNode : public MachBranchNode {
652 public:
653 MachGotoNode() : MachBranchNode() {
654 init_class_id(Class_MachGoto);
655 }
656 };
658 //------------------------------MachFastLockNode-------------------------------------
659 // Machine-specific versions of FastLockNodes
660 class MachFastLockNode : public MachNode {
661 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
662 public:
663 BiasedLockingCounters* _counters;
664 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks
665 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks
666 MachFastLockNode() : MachNode() {}
667 };
669 //------------------------------MachReturnNode--------------------------------
670 // Machine-specific versions of subroutine returns
671 class MachReturnNode : public MachNode {
672 virtual uint size_of() const; // Size is bigger
673 public:
674 RegMask *_in_rms; // Input register masks, set during allocation
675 ReallocMark _nesting; // assertion check for reallocations
676 const TypePtr* _adr_type; // memory effects of call or return
677 MachReturnNode() : MachNode() {
678 init_class_id(Class_MachReturn);
679 _adr_type = TypePtr::BOTTOM; // the default: all of memory
680 }
682 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
684 virtual const RegMask &in_RegMask(uint) const;
685 virtual bool pinned() const { return true; };
686 virtual const TypePtr *adr_type() const;
687 };
689 //------------------------------MachSafePointNode-----------------------------
690 // Machine-specific versions of safepoints
691 class MachSafePointNode : public MachReturnNode {
692 public:
693 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
694 JVMState* _jvms; // Pointer to list of JVM State Objects
695 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
696 OopMap* oop_map() const { return _oop_map; }
697 void set_oop_map(OopMap* om) { _oop_map = om; }
699 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
700 init_class_id(Class_MachSafePoint);
701 }
703 virtual JVMState* jvms() const { return _jvms; }
704 void set_jvms(JVMState* s) {
705 _jvms = s;
706 }
707 virtual const Type *bottom_type() const;
709 virtual const RegMask &in_RegMask(uint) const;
711 // Functionality from old debug nodes
712 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
713 Node *frameptr () const { return in(TypeFunc::FramePtr); }
715 Node *local(const JVMState* jvms, uint idx) const {
716 assert(verify_jvms(jvms), "jvms must match");
717 return in(_jvmadj + jvms->locoff() + idx);
718 }
719 Node *stack(const JVMState* jvms, uint idx) const {
720 assert(verify_jvms(jvms), "jvms must match");
721 return in(_jvmadj + jvms->stkoff() + idx);
722 }
723 Node *monitor_obj(const JVMState* jvms, uint idx) const {
724 assert(verify_jvms(jvms), "jvms must match");
725 return in(_jvmadj + jvms->monitor_obj_offset(idx));
726 }
727 Node *monitor_box(const JVMState* jvms, uint idx) const {
728 assert(verify_jvms(jvms), "jvms must match");
729 return in(_jvmadj + jvms->monitor_box_offset(idx));
730 }
731 void set_local(const JVMState* jvms, uint idx, Node *c) {
732 assert(verify_jvms(jvms), "jvms must match");
733 set_req(_jvmadj + jvms->locoff() + idx, c);
734 }
735 void set_stack(const JVMState* jvms, uint idx, Node *c) {
736 assert(verify_jvms(jvms), "jvms must match");
737 set_req(_jvmadj + jvms->stkoff() + idx, c);
738 }
739 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
740 assert(verify_jvms(jvms), "jvms must match");
741 set_req(_jvmadj + jvms->monoff() + idx, c);
742 }
743 };
745 //------------------------------MachCallNode----------------------------------
746 // Machine-specific versions of subroutine calls
747 class MachCallNode : public MachSafePointNode {
748 protected:
749 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
750 virtual uint cmp( const Node &n ) const;
751 virtual uint size_of() const = 0; // Size is bigger
752 public:
753 const TypeFunc *_tf; // Function type
754 address _entry_point; // Address of the method being called
755 float _cnt; // Estimate of number of times called
756 uint _argsize; // Size of argument block on stack
758 const TypeFunc* tf() const { return _tf; }
759 const address entry_point() const { return _entry_point; }
760 const float cnt() const { return _cnt; }
761 uint argsize() const { return _argsize; }
763 void set_tf(const TypeFunc* tf) { _tf = tf; }
764 void set_entry_point(address p) { _entry_point = p; }
765 void set_cnt(float c) { _cnt = c; }
766 void set_argsize(int s) { _argsize = s; }
768 MachCallNode() : MachSafePointNode() {
769 init_class_id(Class_MachCall);
770 }
772 virtual const Type *bottom_type() const;
773 virtual bool pinned() const { return false; }
774 virtual const Type *Value( PhaseTransform *phase ) const;
775 virtual const RegMask &in_RegMask(uint) const;
776 virtual int ret_addr_offset() { return 0; }
778 bool returns_long() const { return tf()->return_type() == T_LONG; }
779 bool return_value_is_used() const;
780 #ifndef PRODUCT
781 virtual void dump_spec(outputStream *st) const;
782 #endif
783 };
785 //------------------------------MachCallJavaNode------------------------------
786 // "Base" class for machine-specific versions of subroutine calls
787 class MachCallJavaNode : public MachCallNode {
788 protected:
789 virtual uint cmp( const Node &n ) const;
790 virtual uint size_of() const; // Size is bigger
791 public:
792 ciMethod* _method; // Method being direct called
793 int _bci; // Byte Code index of call byte code
794 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
795 bool _method_handle_invoke; // Tells if the call has to preserve SP
796 MachCallJavaNode() : MachCallNode() {
797 init_class_id(Class_MachCallJava);
798 }
800 virtual const RegMask &in_RegMask(uint) const;
802 #ifndef PRODUCT
803 virtual void dump_spec(outputStream *st) const;
804 #endif
805 };
807 //------------------------------MachCallStaticJavaNode------------------------
808 // Machine-specific versions of monomorphic subroutine calls
809 class MachCallStaticJavaNode : public MachCallJavaNode {
810 virtual uint cmp( const Node &n ) const;
811 virtual uint size_of() const; // Size is bigger
812 public:
813 const char *_name; // Runtime wrapper name
814 MachCallStaticJavaNode() : MachCallJavaNode() {
815 init_class_id(Class_MachCallStaticJava);
816 }
818 // If this is an uncommon trap, return the request code, else zero.
819 int uncommon_trap_request() const;
821 virtual int ret_addr_offset();
822 #ifndef PRODUCT
823 virtual void dump_spec(outputStream *st) const;
824 void dump_trap_args(outputStream *st) const;
825 #endif
826 };
828 //------------------------------MachCallDynamicJavaNode------------------------
829 // Machine-specific versions of possibly megamorphic subroutine calls
830 class MachCallDynamicJavaNode : public MachCallJavaNode {
831 public:
832 int _vtable_index;
833 MachCallDynamicJavaNode() : MachCallJavaNode() {
834 init_class_id(Class_MachCallDynamicJava);
835 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
836 }
837 virtual int ret_addr_offset();
838 #ifndef PRODUCT
839 virtual void dump_spec(outputStream *st) const;
840 #endif
841 };
843 //------------------------------MachCallRuntimeNode----------------------------
844 // Machine-specific versions of subroutine calls
845 class MachCallRuntimeNode : public MachCallNode {
846 virtual uint cmp( const Node &n ) const;
847 virtual uint size_of() const; // Size is bigger
848 public:
849 const char *_name; // Printable name, if _method is NULL
850 MachCallRuntimeNode() : MachCallNode() {
851 init_class_id(Class_MachCallRuntime);
852 }
853 virtual int ret_addr_offset();
854 #ifndef PRODUCT
855 virtual void dump_spec(outputStream *st) const;
856 #endif
857 };
859 class MachCallLeafNode: public MachCallRuntimeNode {
860 public:
861 MachCallLeafNode() : MachCallRuntimeNode() {
862 init_class_id(Class_MachCallLeaf);
863 }
864 };
866 //------------------------------MachHaltNode-----------------------------------
867 // Machine-specific versions of halt nodes
868 class MachHaltNode : public MachReturnNode {
869 public:
870 virtual JVMState* jvms() const;
871 };
874 //------------------------------MachTempNode-----------------------------------
875 // Node used by the adlc to construct inputs to represent temporary registers
876 class MachTempNode : public MachNode {
877 private:
878 MachOper *_opnd_array[1];
880 public:
881 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
882 virtual uint rule() const { return 9999999; }
883 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
885 MachTempNode(MachOper* oper) {
886 init_class_id(Class_MachTemp);
887 _num_opnds = 1;
888 _opnds = _opnd_array;
889 add_req(NULL);
890 _opnds[0] = oper;
891 }
892 virtual uint size_of() const { return sizeof(MachTempNode); }
894 #ifndef PRODUCT
895 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
896 virtual const char *Name() const { return "MachTemp";}
897 #endif
898 };
902 //------------------------------labelOper--------------------------------------
903 // Machine-independent version of label operand
904 class labelOper : public MachOper {
905 private:
906 virtual uint num_edges() const { return 0; }
907 public:
908 // Supported for fixed size branches
909 Label* _label; // Label for branch(es)
911 uint _block_num;
913 labelOper() : _block_num(0), _label(0) {}
915 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
917 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
919 virtual MachOper *clone(Compile* C) const;
921 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
923 virtual uint opcode() const;
925 virtual uint hash() const;
926 virtual uint cmp( const MachOper &oper ) const;
927 #ifndef PRODUCT
928 virtual const char *Name() const { return "Label";}
930 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
931 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
932 #endif
933 };
936 //------------------------------methodOper--------------------------------------
937 // Machine-independent version of method operand
938 class methodOper : public MachOper {
939 private:
940 virtual uint num_edges() const { return 0; }
941 public:
942 intptr_t _method; // Address of method
943 methodOper() : _method(0) {}
944 methodOper(intptr_t method) : _method(method) {}
946 virtual MachOper *clone(Compile* C) const;
948 virtual intptr_t method() const { return _method; }
950 virtual uint opcode() const;
952 virtual uint hash() const;
953 virtual uint cmp( const MachOper &oper ) const;
954 #ifndef PRODUCT
955 virtual const char *Name() const { return "Method";}
957 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
958 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
959 #endif
960 };
962 #endif // SHARE_VM_OPTO_MACHNODE_HPP