src/cpu/mips/vm/icBuffer_mips.cpp

Fri, 29 Apr 2016 00:06:10 +0800

author
aoqi
date
Fri, 29 Apr 2016 00:06:10 +0800
changeset 1
2d8a650513c2
child 368
11ec15adb6c4
permissions
-rw-r--r--

Added MIPS 64-bit port.

     1 /*
     2  * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
     3  * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     5  *
     6  * This code is free software; you can redistribute it and/or modify it
     7  * under the terms of the GNU General Public License version 2 only, as
     8  * published by the Free Software Foundation.
     9  *
    10  * This code is distributed in the hope that it will be useful, but WITHOUT
    11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    13  * version 2 for more details (a copy is included in the LICENSE file that
    14  * accompanied this code).
    15  *
    16  * You should have received a copy of the GNU General Public License version
    17  * 2 along with this work; if not, write to the Free Software Foundation,
    18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    19  *
    20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    21  * or visit www.oracle.com if you need additional information or have any
    22  * questions.
    23  *
    24  */
    26 #include "precompiled.hpp"
    27 #include "asm/macroAssembler.hpp"
    28 #include "asm/macroAssembler.inline.hpp"
    29 #include "code/icBuffer.hpp"
    30 #include "gc_interface/collectedHeap.inline.hpp"
    31 #include "interpreter/bytecodes.hpp"
    32 #include "memory/resourceArea.hpp"
    33 #include "nativeInst_mips.hpp"
    34 #include "oops/oop.inline.hpp"
    35 #include "oops/oop.inline2.hpp"
    37 int InlineCacheBuffer::ic_stub_code_size() {
    38   return NativeMovConstReg::instruction_size +
    39          NativeGeneralJump::instruction_size +
    40          1;
    41   // so that code_end can be set in CodeBuffer
    42   // 64bit 15 = 6 + 8 bytes + 1 byte
    43   // 32bit 7 = 2 + 4 bytes + 1 byte
    44 }
    47 // we use T1 as cached oop(klass) now. this is the target of virtual call,
    48 // when reach here, the receiver in T0
    49 // refer to shareRuntime_mips.cpp,gen_i2c2i_adapters 
    50 void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
    51   ResourceMark rm;
    52   CodeBuffer      code(code_begin, ic_stub_code_size());
    53   MacroAssembler* masm            = new MacroAssembler(&code);
    54   // note: even though the code contains an embedded oop, we do not need reloc info
    55   // because
    56   // (1) the oop is old (i.e., doesn't matter for scavenges)
    57   // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
    58 //  assert(cached_oop == NULL || cached_oop->is_perm(), "must be perm oop");
    59 #define __ masm->
    60 #ifndef _LP64
    61   __ lui(T1, Assembler::split_high((int)cached_value));
    62   __ addiu(T1, T1, Assembler::split_low((int)cached_value));
    64   __ lui(T9, Assembler::split_high((int)entry_point));
    65   __ addiu(T9, T9, Assembler::split_low((int)entry_point));
    66 #else
    67   __ li48(T1, (long)cached_value);
    69   __ li48(T9, (long)entry_point);
    70 #endif
    71   __ jr(T9);
    72   __ delayed()->nop();
    73   __ flush();
    74 #undef __ 
    75 }
    78 address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
    79   NativeMovConstReg* move = nativeMovConstReg_at(code_begin);   // creation also verifies the object
    80   //NativeJump*        jump = nativeJump_at(move->next_instruction_address());
    81   NativeGeneralJump*        jump = nativeGeneralJump_at(move->next_instruction_address());
    82   return jump->jump_destination();
    83 }
    85 void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
    86   // creation also verifies the object
    87   NativeMovConstReg* move = nativeMovConstReg_at(code_begin);
    88   // Verifies the jump
    89   //NativeJump*        jump = nativeJump_at(move->next_instruction_address());
    90   NativeGeneralJump*        jump = nativeGeneralJump_at(move->next_instruction_address());
    91   void* o= (void*)move->data();  
    92   return o;
    93 }

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