1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/mips/vm/icBuffer_mips.cpp Fri Apr 29 00:06:10 2016 +0800
1.3 @@ -0,0 +1,93 @@
1.4 +/*
1.5 + * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
1.6 + * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
1.7 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 + *
1.9 + * This code is free software; you can redistribute it and/or modify it
1.10 + * under the terms of the GNU General Public License version 2 only, as
1.11 + * published by the Free Software Foundation.
1.12 + *
1.13 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.14 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.15 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.16 + * version 2 for more details (a copy is included in the LICENSE file that
1.17 + * accompanied this code).
1.18 + *
1.19 + * You should have received a copy of the GNU General Public License version
1.20 + * 2 along with this work; if not, write to the Free Software Foundation,
1.21 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.22 + *
1.23 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1.24 + * or visit www.oracle.com if you need additional information or have any
1.25 + * questions.
1.26 + *
1.27 + */
1.28 +
1.29 +#include "precompiled.hpp"
1.30 +#include "asm/macroAssembler.hpp"
1.31 +#include "asm/macroAssembler.inline.hpp"
1.32 +#include "code/icBuffer.hpp"
1.33 +#include "gc_interface/collectedHeap.inline.hpp"
1.34 +#include "interpreter/bytecodes.hpp"
1.35 +#include "memory/resourceArea.hpp"
1.36 +#include "nativeInst_mips.hpp"
1.37 +#include "oops/oop.inline.hpp"
1.38 +#include "oops/oop.inline2.hpp"
1.39 +
1.40 +int InlineCacheBuffer::ic_stub_code_size() {
1.41 + return NativeMovConstReg::instruction_size +
1.42 + NativeGeneralJump::instruction_size +
1.43 + 1;
1.44 + // so that code_end can be set in CodeBuffer
1.45 + // 64bit 15 = 6 + 8 bytes + 1 byte
1.46 + // 32bit 7 = 2 + 4 bytes + 1 byte
1.47 +}
1.48 +
1.49 +
1.50 +// we use T1 as cached oop(klass) now. this is the target of virtual call,
1.51 +// when reach here, the receiver in T0
1.52 +// refer to shareRuntime_mips.cpp,gen_i2c2i_adapters
1.53 +void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
1.54 + ResourceMark rm;
1.55 + CodeBuffer code(code_begin, ic_stub_code_size());
1.56 + MacroAssembler* masm = new MacroAssembler(&code);
1.57 + // note: even though the code contains an embedded oop, we do not need reloc info
1.58 + // because
1.59 + // (1) the oop is old (i.e., doesn't matter for scavenges)
1.60 + // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
1.61 +// assert(cached_oop == NULL || cached_oop->is_perm(), "must be perm oop");
1.62 +#define __ masm->
1.63 +#ifndef _LP64
1.64 + __ lui(T1, Assembler::split_high((int)cached_value));
1.65 + __ addiu(T1, T1, Assembler::split_low((int)cached_value));
1.66 +
1.67 + __ lui(T9, Assembler::split_high((int)entry_point));
1.68 + __ addiu(T9, T9, Assembler::split_low((int)entry_point));
1.69 +#else
1.70 + __ li48(T1, (long)cached_value);
1.71 +
1.72 + __ li48(T9, (long)entry_point);
1.73 +#endif
1.74 + __ jr(T9);
1.75 + __ delayed()->nop();
1.76 + __ flush();
1.77 +#undef __
1.78 +}
1.79 +
1.80 +
1.81 +address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
1.82 + NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
1.83 + //NativeJump* jump = nativeJump_at(move->next_instruction_address());
1.84 + NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address());
1.85 + return jump->jump_destination();
1.86 +}
1.87 +
1.88 +void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
1.89 + // creation also verifies the object
1.90 + NativeMovConstReg* move = nativeMovConstReg_at(code_begin);
1.91 + // Verifies the jump
1.92 + //NativeJump* jump = nativeJump_at(move->next_instruction_address());
1.93 + NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address());
1.94 + void* o= (void*)move->data();
1.95 + return o;
1.96 +}
