src/os_cpu/solaris_x86/vm/threadLS_solaris_x86.hpp

Thu, 21 Oct 2010 11:55:10 -0700

author
never
date
Thu, 21 Oct 2010 11:55:10 -0700
changeset 2262
1e9a9d2e6509
parent 1907
c18cbe5936b8
child 2314
f95d63e2154a
permissions
-rw-r--r--

6970683: improvements to hs_err output
Reviewed-by: kvn, jrose, dholmes, coleenp

     1 /*
     2  * Copyright (c) 1998, 2007, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     8  *
     9  * This code is distributed in the hope that it will be useful, but WITHOUT
    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    12  * version 2 for more details (a copy is included in the LICENSE file that
    13  * accompanied this code).
    14  *
    15  * You should have received a copy of the GNU General Public License version
    16  * 2 along with this work; if not, write to the Free Software Foundation,
    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    18  *
    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    20  * or visit www.oracle.com if you need additional information or have any
    21  * questions.
    22  *
    23  */
    25 // Processor dependent parts of ThreadLocalStorage
    27 private:
    28   static Thread* _get_thread_cache[];  // index by [(raw_id>>9)^(raw_id>>20) % _pd_cache_size]
    29   static Thread* get_thread_via_cache_slowly(uintptr_t raw_id, int index);
    31   NOT_PRODUCT(static int _tcacheHit;)
    32   NOT_PRODUCT(static int _tcacheMiss;)
    34 public:
    35   // Cache hit/miss statistics
    36   static void print_statistics() PRODUCT_RETURN;
    38   enum Constants {
    39 #ifdef AMD64
    40     _pd_cache_size         =  256*2   // projected typical # of threads * 2
    41 #else
    42     _pd_cache_size         =  128*2   // projected typical # of threads * 2
    43 #endif // AMD64
    44   };
    46   enum pd_tlsAccessMode {
    47      pd_tlsAccessUndefined      = -1,
    48      pd_tlsAccessSlow           = 0,
    49      pd_tlsAccessIndirect       = 1,
    50      pd_tlsAccessDirect         = 2
    51   } ;
    53   static void set_thread_in_slot (Thread *) ;
    55   static pd_tlsAccessMode pd_getTlsAccessMode () ;
    56   static ptrdiff_t pd_getTlsOffset () ;
    58   static uintptr_t pd_raw_thread_id() {
    59 #ifdef _GNU_SOURCE
    60 #ifdef AMD64
    61     uintptr_t rv;
    62     __asm__ __volatile__ ("movq %%fs:0, %0" : "=r"(rv));
    63     return rv;
    64 #else
    65     return gs_thread();
    66 #endif // AMD64
    67 #else  //_GNU_SOURCE
    68     return _raw_thread_id();
    69 #endif //_GNU_SOURCE
    70   }
    72   static int pd_cache_index(uintptr_t raw_id) {
    73     // Copied from the sparc version. Dave said it should also work fine
    74     // for solx86.
    75     int ix = (int) (((raw_id >> 9) ^ (raw_id >> 20)) % _pd_cache_size);
    76     return ix;
    77   }
    79   // Java Thread
    80   static inline Thread* thread();

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