Mercurial > jdk8-mips64-public > hotspot / changeset
changeset
6970683: improvements to hs_err output
Thu, 21 Oct 2010 11:55:10 -0700
- author
- never
- date
- Thu, 21 Oct 2010 11:55:10 -0700
- changeset 2262
- 1e9a9d2e6509
- parent 2261
- f8aaf8522a6b
- child 2263
- f195c4737aca
6970683: improvements to hs_err output
Reviewed-by: kvn, jrose, dholmes, coleenp
1.1 --- a/src/os_cpu/linux_sparc/vm/os_linux_sparc.cpp Wed Oct 20 13:18:17 2010 -0700 1.2 +++ b/src/os_cpu/linux_sparc/vm/os_linux_sparc.cpp Thu Oct 21 11:55:10 2010 -0700 1.3 @@ -1,5 +1,5 @@ 1.4 /* 1.5 - * Copyright (c) 1999, 2008, Oracle and/or its affiliates. All rights reserved. 1.6 + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. 1.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 1.8 * 1.9 * This code is free software; you can redistribute it and/or modify it 1.10 @@ -200,6 +200,18 @@ 1.11 sigcontext* sc = (sigcontext*)context; 1.12 st->print_cr("Registers:"); 1.13 1.14 + st->print_cr(" G1=" INTPTR_FORMAT " G2=" INTPTR_FORMAT 1.15 + " G3=" INTPTR_FORMAT " G4=" INTPTR_FORMAT, 1.16 + SIG_REGS(sc).u_regs[CON_G1], 1.17 + SIG_REGS(sc).u_regs[CON_G2], 1.18 + SIG_REGS(sc).u_regs[CON_G3], 1.19 + SIG_REGS(sc).u_regs[CON_G4]); 1.20 + st->print_cr(" G5=" INTPTR_FORMAT " G6=" INTPTR_FORMAT 1.21 + " G7=" INTPTR_FORMAT " Y=" INTPTR_FORMAT, 1.22 + SIG_REGS(sc).u_regs[CON_G5], 1.23 + SIG_REGS(sc).u_regs[CON_G6], 1.24 + SIG_REGS(sc).u_regs[CON_G7], 1.25 + SIG_REGS(sc).y); 1.26 st->print_cr(" O0=" INTPTR_FORMAT " O1=" INTPTR_FORMAT 1.27 " O2=" INTPTR_FORMAT " O3=" INTPTR_FORMAT, 1.28 SIG_REGS(sc).u_regs[CON_O0], 1.29 @@ -213,18 +225,32 @@ 1.30 SIG_REGS(sc).u_regs[CON_O6], 1.31 SIG_REGS(sc).u_regs[CON_O7]); 1.32 1.33 - st->print_cr(" G1=" INTPTR_FORMAT " G2=" INTPTR_FORMAT 1.34 - " G3=" INTPTR_FORMAT " G4=" INTPTR_FORMAT, 1.35 - SIG_REGS(sc).u_regs[CON_G1], 1.36 - SIG_REGS(sc).u_regs[CON_G2], 1.37 - SIG_REGS(sc).u_regs[CON_G3], 1.38 - SIG_REGS(sc).u_regs[CON_G4]); 1.39 - st->print_cr(" G5=" INTPTR_FORMAT " G6=" INTPTR_FORMAT 1.40 - " G7=" INTPTR_FORMAT " Y=" INTPTR_FORMAT, 1.41 - SIG_REGS(sc).u_regs[CON_G5], 1.42 - SIG_REGS(sc).u_regs[CON_G6], 1.43 - SIG_REGS(sc).u_regs[CON_G7], 1.44 - SIG_REGS(sc).y); 1.45 + 1.46 + intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc); 1.47 + st->print_cr(" L0=" INTPTR_FORMAT " L1=" INTPTR_FORMAT 1.48 + " L2=" INTPTR_FORMAT " L3=" INTPTR_FORMAT, 1.49 + sp[L0->sp_offset_in_saved_window()], 1.50 + sp[L1->sp_offset_in_saved_window()], 1.51 + sp[L2->sp_offset_in_saved_window()], 1.52 + sp[L3->sp_offset_in_saved_window()]); 1.53 + st->print_cr(" L4=" INTPTR_FORMAT " L5=" INTPTR_FORMAT 1.54 + " L6=" INTPTR_FORMAT " L7=" INTPTR_FORMAT, 1.55 + sp[L4->sp_offset_in_saved_window()], 1.56 + sp[L5->sp_offset_in_saved_window()], 1.57 + sp[L6->sp_offset_in_saved_window()], 1.58 + sp[L7->sp_offset_in_saved_window()]); 1.59 + st->print_cr(" I0=" INTPTR_FORMAT " I1=" INTPTR_FORMAT 1.60 + " I2=" INTPTR_FORMAT " I3=" INTPTR_FORMAT, 1.61 + sp[I0->sp_offset_in_saved_window()], 1.62 + sp[I1->sp_offset_in_saved_window()], 1.63 + sp[I2->sp_offset_in_saved_window()], 1.64 + sp[I3->sp_offset_in_saved_window()]); 1.65 + st->print_cr(" I4=" INTPTR_FORMAT " I5=" INTPTR_FORMAT 1.66 + " I6=" INTPTR_FORMAT " I7=" INTPTR_FORMAT, 1.67 + sp[I4->sp_offset_in_saved_window()], 1.68 + sp[I5->sp_offset_in_saved_window()], 1.69 + sp[I6->sp_offset_in_saved_window()], 1.70 + sp[I7->sp_offset_in_saved_window()]); 1.71 1.72 st->print_cr(" PC=" INTPTR_FORMAT " nPC=" INTPTR_FORMAT, 1.73 SIG_PC(sc), 1.74 @@ -232,7 +258,6 @@ 1.75 st->cr(); 1.76 st->cr(); 1.77 1.78 - intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc); 1.79 st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", sp); 1.80 print_hex_dump(st, (address)sp, (address)(sp + 32), sizeof(intptr_t)); 1.81 st->cr(); 1.82 @@ -242,7 +267,58 @@ 1.83 // this at the end, and hope for the best. 1.84 address pc = os::Linux::ucontext_get_pc(uc); 1.85 st->print_cr("Instructions: (pc=" PTR_FORMAT ")", pc); 1.86 - print_hex_dump(st, pc - 16, pc + 16, sizeof(char)); 1.87 + print_hex_dump(st, pc - 32, pc + 32, sizeof(char)); 1.88 +} 1.89 + 1.90 + 1.91 +void os::print_register_info(outputStream *st, void *context) { 1.92 + if (context == NULL) return; 1.93 + 1.94 + ucontext_t *uc = (ucontext_t*)context; 1.95 + intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc); 1.96 + 1.97 + st->print_cr("Register to memory mapping:"); 1.98 + st->cr(); 1.99 + 1.100 + // this is only for the "general purpose" registers 1.101 + st->print("G1="); print_location(st, SIG_REGS(sc).u_regs[CON__G1]); 1.102 + st->print("G2="); print_location(st, SIG_REGS(sc).u_regs[CON__G2]); 1.103 + st->print("G3="); print_location(st, SIG_REGS(sc).u_regs[CON__G3]); 1.104 + st->print("G4="); print_location(st, SIG_REGS(sc).u_regs[CON__G4]); 1.105 + st->print("G5="); print_location(st, SIG_REGS(sc).u_regs[CON__G5]); 1.106 + st->print("G6="); print_location(st, SIG_REGS(sc).u_regs[CON__G6]); 1.107 + st->print("G7="); print_location(st, SIG_REGS(sc).u_regs[CON__G7]); 1.108 + st->cr(); 1.109 + 1.110 + st->print("O0="); print_location(st, SIG_REGS(sc).u_regs[CON__O0]); 1.111 + st->print("O1="); print_location(st, SIG_REGS(sc).u_regs[CON__O1]); 1.112 + st->print("O2="); print_location(st, SIG_REGS(sc).u_regs[CON__O2]); 1.113 + st->print("O3="); print_location(st, SIG_REGS(sc).u_regs[CON__O3]); 1.114 + st->print("O4="); print_location(st, SIG_REGS(sc).u_regs[CON__O4]); 1.115 + st->print("O5="); print_location(st, SIG_REGS(sc).u_regs[CON__O5]); 1.116 + st->print("O6="); print_location(st, SIG_REGS(sc).u_regs[CON__O6]); 1.117 + st->print("O7="); print_location(st, SIG_REGS(sc).u_regs[CON__O7]); 1.118 + st->cr(); 1.119 + 1.120 + st->print("L0="); print_location(st, sp[L0->sp_offset_in_saved_window()]); 1.121 + st->print("L1="); print_location(st, sp[L1->sp_offset_in_saved_window()]); 1.122 + st->print("L2="); print_location(st, sp[L2->sp_offset_in_saved_window()]); 1.123 + st->print("L3="); print_location(st, sp[L3->sp_offset_in_saved_window()]); 1.124 + st->print("L4="); print_location(st, sp[L4->sp_offset_in_saved_window()]); 1.125 + st->print("L5="); print_location(st, sp[L5->sp_offset_in_saved_window()]); 1.126 + st->print("L6="); print_location(st, sp[L6->sp_offset_in_saved_window()]); 1.127 + st->print("L7="); print_location(st, sp[L7->sp_offset_in_saved_window()]); 1.128 + st->cr(); 1.129 + 1.130 + st->print("I0="); print_location(st, sp[I0->sp_offset_in_saved_window()]); 1.131 + st->print("I1="); print_location(st, sp[I1->sp_offset_in_saved_window()]); 1.132 + st->print("I2="); print_location(st, sp[I2->sp_offset_in_saved_window()]); 1.133 + st->print("I3="); print_location(st, sp[I3->sp_offset_in_saved_window()]); 1.134 + st->print("I4="); print_location(st, sp[I4->sp_offset_in_saved_window()]); 1.135 + st->print("I5="); print_location(st, sp[I5->sp_offset_in_saved_window()]); 1.136 + st->print("I6="); print_location(st, sp[I6->sp_offset_in_saved_window()]); 1.137 + st->print("I7="); print_location(st, sp[I7->sp_offset_in_saved_window()]); 1.138 + st->cr(); 1.139 } 1.140 1.141
2.1 --- a/src/os_cpu/linux_x86/vm/os_linux_x86.cpp Wed Oct 20 13:18:17 2010 -0700 2.2 +++ b/src/os_cpu/linux_x86/vm/os_linux_x86.cpp Thu Oct 21 11:55:10 2010 -0700 2.3 @@ -1,5 +1,5 @@ 2.4 /* 2.5 - * Copyright (c) 1999, 2009, Oracle and/or its affiliates. All rights reserved. 2.6 + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. 2.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 2.8 * 2.9 * This code is free software; you can redistribute it and/or modify it 2.10 @@ -718,11 +718,6 @@ 2.11 2.12 ucontext_t *uc = (ucontext_t*)context; 2.13 st->print_cr("Registers:"); 2.14 - 2.15 - // this is horrendously verbose but the layout of the registers in the 2.16 - // context does not match how we defined our abstract Register set, so 2.17 - // we can't just iterate through the gregs area 2.18 - 2.19 #ifdef AMD64 2.20 st->print( "RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]); 2.21 st->print(", RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]); 2.22 @@ -745,68 +740,11 @@ 2.23 st->print(", R15=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R15]); 2.24 st->cr(); 2.25 st->print( "RIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RIP]); 2.26 - st->print(", EFL=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EFL]); 2.27 + st->print(", EFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EFL]); 2.28 st->print(", CSGSFS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_CSGSFS]); 2.29 st->print(", ERR=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ERR]); 2.30 st->cr(); 2.31 st->print(" TRAPNO=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_TRAPNO]); 2.32 - 2.33 - st->cr(); 2.34 - st->cr(); 2.35 - 2.36 - st->print_cr("Register to memory mapping:"); 2.37 - st->cr(); 2.38 - 2.39 - // this is only for the "general purpose" registers 2.40 - 2.41 - st->print_cr("RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]); 2.42 - print_location(st, uc->uc_mcontext.gregs[REG_RAX]); 2.43 - st->cr(); 2.44 - st->print_cr("RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]); 2.45 - print_location(st, uc->uc_mcontext.gregs[REG_RBX]); 2.46 - st->cr(); 2.47 - st->print_cr("RCX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RCX]); 2.48 - print_location(st, uc->uc_mcontext.gregs[REG_RCX]); 2.49 - st->cr(); 2.50 - st->print_cr("RDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDX]); 2.51 - print_location(st, uc->uc_mcontext.gregs[REG_RDX]); 2.52 - st->cr(); 2.53 - st->print_cr("RSP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSP]); 2.54 - print_location(st, uc->uc_mcontext.gregs[REG_RSP]); 2.55 - st->cr(); 2.56 - st->print_cr("RBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBP]); 2.57 - print_location(st, uc->uc_mcontext.gregs[REG_RBP]); 2.58 - st->cr(); 2.59 - st->print_cr("RSI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSI]); 2.60 - print_location(st, uc->uc_mcontext.gregs[REG_RSI]); 2.61 - st->cr(); 2.62 - st->print_cr("RDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDI]); 2.63 - print_location(st, uc->uc_mcontext.gregs[REG_RDI]); 2.64 - st->cr(); 2.65 - st->print_cr("R8 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]); 2.66 - print_location(st, uc->uc_mcontext.gregs[REG_R8]); 2.67 - st->cr(); 2.68 - st->print_cr("R9 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]); 2.69 - print_location(st, uc->uc_mcontext.gregs[REG_R9]); 2.70 - st->cr(); 2.71 - st->print_cr("R10=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R10]); 2.72 - print_location(st, uc->uc_mcontext.gregs[REG_R10]); 2.73 - st->cr(); 2.74 - st->print_cr("R11=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R11]); 2.75 - print_location(st, uc->uc_mcontext.gregs[REG_R11]); 2.76 - st->cr(); 2.77 - st->print_cr("R12=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R12]); 2.78 - print_location(st, uc->uc_mcontext.gregs[REG_R12]); 2.79 - st->cr(); 2.80 - st->print_cr("R13=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R13]); 2.81 - print_location(st, uc->uc_mcontext.gregs[REG_R13]); 2.82 - st->cr(); 2.83 - st->print_cr("R14=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R14]); 2.84 - print_location(st, uc->uc_mcontext.gregs[REG_R14]); 2.85 - st->cr(); 2.86 - st->print_cr("R15=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R15]); 2.87 - print_location(st, uc->uc_mcontext.gregs[REG_R15]); 2.88 - 2.89 #else 2.90 st->print( "EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EAX]); 2.91 st->print(", EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EBX]); 2.92 @@ -819,41 +757,8 @@ 2.93 st->print(", EDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EDI]); 2.94 st->cr(); 2.95 st->print( "EIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EIP]); 2.96 + st->print(", EFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EFL]); 2.97 st->print(", CR2=" INTPTR_FORMAT, uc->uc_mcontext.cr2); 2.98 - st->print(", EFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EFL]); 2.99 - 2.100 - st->cr(); 2.101 - st->cr(); 2.102 - 2.103 - st->print_cr("Register to memory mapping:"); 2.104 - st->cr(); 2.105 - 2.106 - // this is only for the "general purpose" registers 2.107 - 2.108 - st->print_cr("EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EAX]); 2.109 - print_location(st, uc->uc_mcontext.gregs[REG_EAX]); 2.110 - st->cr(); 2.111 - st->print_cr("EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EBX]); 2.112 - print_location(st, uc->uc_mcontext.gregs[REG_EBX]); 2.113 - st->cr(); 2.114 - st->print_cr("ECX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ECX]); 2.115 - print_location(st, uc->uc_mcontext.gregs[REG_ECX]); 2.116 - st->cr(); 2.117 - st->print_cr("EDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EDX]); 2.118 - print_location(st, uc->uc_mcontext.gregs[REG_EDX]); 2.119 - st->cr(); 2.120 - st->print_cr("ESP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ESP]); 2.121 - print_location(st, uc->uc_mcontext.gregs[REG_ESP]); 2.122 - st->cr(); 2.123 - st->print_cr("EBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EBP]); 2.124 - print_location(st, uc->uc_mcontext.gregs[REG_EBP]); 2.125 - st->cr(); 2.126 - st->print_cr("ESI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ESI]); 2.127 - print_location(st, uc->uc_mcontext.gregs[REG_ESI]); 2.128 - st->cr(); 2.129 - st->print_cr("EDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EDI]); 2.130 - print_location(st, uc->uc_mcontext.gregs[REG_EDI]); 2.131 - 2.132 #endif // AMD64 2.133 st->cr(); 2.134 st->cr(); 2.135 @@ -868,7 +773,52 @@ 2.136 // this at the end, and hope for the best. 2.137 address pc = os::Linux::ucontext_get_pc(uc); 2.138 st->print_cr("Instructions: (pc=" PTR_FORMAT ")", pc); 2.139 - print_hex_dump(st, pc - 16, pc + 16, sizeof(char)); 2.140 + print_hex_dump(st, pc - 32, pc + 32, sizeof(char)); 2.141 +} 2.142 + 2.143 +void os::print_register_info(outputStream *st, void *context) { 2.144 + if (context == NULL) return; 2.145 + 2.146 + ucontext_t *uc = (ucontext_t*)context; 2.147 + 2.148 + st->print_cr("Register to memory mapping:"); 2.149 + st->cr(); 2.150 + 2.151 + // this is horrendously verbose but the layout of the registers in the 2.152 + // context does not match how we defined our abstract Register set, so 2.153 + // we can't just iterate through the gregs area 2.154 + 2.155 + // this is only for the "general purpose" registers 2.156 + 2.157 +#ifdef AMD64 2.158 + st->print("RAX="); print_location(st, uc->uc_mcontext.gregs[REG_RAX]); 2.159 + st->print("RBX="); print_location(st, uc->uc_mcontext.gregs[REG_RBX]); 2.160 + st->print("RCX="); print_location(st, uc->uc_mcontext.gregs[REG_RCX]); 2.161 + st->print("RDX="); print_location(st, uc->uc_mcontext.gregs[REG_RDX]); 2.162 + st->print("RSP="); print_location(st, uc->uc_mcontext.gregs[REG_RSP]); 2.163 + st->print("RBP="); print_location(st, uc->uc_mcontext.gregs[REG_RBP]); 2.164 + st->print("RSI="); print_location(st, uc->uc_mcontext.gregs[REG_RSI]); 2.165 + st->print("RDI="); print_location(st, uc->uc_mcontext.gregs[REG_RDI]); 2.166 + st->print("R8 ="); print_location(st, uc->uc_mcontext.gregs[REG_R8]); 2.167 + st->print("R9 ="); print_location(st, uc->uc_mcontext.gregs[REG_R9]); 2.168 + st->print("R10="); print_location(st, uc->uc_mcontext.gregs[REG_R10]); 2.169 + st->print("R11="); print_location(st, uc->uc_mcontext.gregs[REG_R11]); 2.170 + st->print("R12="); print_location(st, uc->uc_mcontext.gregs[REG_R12]); 2.171 + st->print("R13="); print_location(st, uc->uc_mcontext.gregs[REG_R13]); 2.172 + st->print("R14="); print_location(st, uc->uc_mcontext.gregs[REG_R14]); 2.173 + st->print("R15="); print_location(st, uc->uc_mcontext.gregs[REG_R15]); 2.174 +#else 2.175 + st->print("EAX="); print_location(st, uc->uc_mcontext.gregs[REG_EAX]); 2.176 + st->print("EBX="); print_location(st, uc->uc_mcontext.gregs[REG_EBX]); 2.177 + st->print("ECX="); print_location(st, uc->uc_mcontext.gregs[REG_ECX]); 2.178 + st->print("EDX="); print_location(st, uc->uc_mcontext.gregs[REG_EDX]); 2.179 + st->print("ESP="); print_location(st, uc->uc_mcontext.gregs[REG_ESP]); 2.180 + st->print("EBP="); print_location(st, uc->uc_mcontext.gregs[REG_EBP]); 2.181 + st->print("ESI="); print_location(st, uc->uc_mcontext.gregs[REG_ESI]); 2.182 + st->print("EDI="); print_location(st, uc->uc_mcontext.gregs[REG_EDI]); 2.183 +#endif // AMD64 2.184 + 2.185 + st->cr(); 2.186 } 2.187 2.188 void os::setup_fpu() {
3.1 --- a/src/os_cpu/solaris_sparc/vm/os_solaris_sparc.cpp Wed Oct 20 13:18:17 2010 -0700 3.2 +++ b/src/os_cpu/solaris_sparc/vm/os_solaris_sparc.cpp Thu Oct 21 11:55:10 2010 -0700 3.3 @@ -1,5 +1,5 @@ 3.4 /* 3.5 - * Copyright (c) 1999, 2009, Oracle and/or its affiliates. All rights reserved. 3.6 + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. 3.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3.8 * 3.9 * This code is free software; you can redistribute it and/or modify it 3.10 @@ -540,6 +540,11 @@ 3.11 pc = (address) uc->uc_mcontext.gregs[REG_PC]; 3.12 } 3.13 3.14 + // Sometimes the register windows are not properly flushed. 3.15 + if(uc->uc_mcontext.gwins != NULL) { 3.16 + ::handle_unflushed_register_windows(uc->uc_mcontext.gwins); 3.17 + } 3.18 + 3.19 // unmask current signal 3.20 sigset_t newset; 3.21 sigemptyset(&newset); 3.22 @@ -558,6 +563,18 @@ 3.23 ucontext_t *uc = (ucontext_t*)context; 3.24 st->print_cr("Registers:"); 3.25 3.26 + st->print_cr(" G1=" INTPTR_FORMAT " G2=" INTPTR_FORMAT 3.27 + " G3=" INTPTR_FORMAT " G4=" INTPTR_FORMAT, 3.28 + uc->uc_mcontext.gregs[REG_G1], 3.29 + uc->uc_mcontext.gregs[REG_G2], 3.30 + uc->uc_mcontext.gregs[REG_G3], 3.31 + uc->uc_mcontext.gregs[REG_G4]); 3.32 + st->print_cr(" G5=" INTPTR_FORMAT " G6=" INTPTR_FORMAT 3.33 + " G7=" INTPTR_FORMAT " Y=" INTPTR_FORMAT, 3.34 + uc->uc_mcontext.gregs[REG_G5], 3.35 + uc->uc_mcontext.gregs[REG_G6], 3.36 + uc->uc_mcontext.gregs[REG_G7], 3.37 + uc->uc_mcontext.gregs[REG_Y]); 3.38 st->print_cr(" O0=" INTPTR_FORMAT " O1=" INTPTR_FORMAT 3.39 " O2=" INTPTR_FORMAT " O3=" INTPTR_FORMAT, 3.40 uc->uc_mcontext.gregs[REG_O0], 3.41 @@ -571,81 +588,39 @@ 3.42 uc->uc_mcontext.gregs[REG_O6], 3.43 uc->uc_mcontext.gregs[REG_O7]); 3.44 3.45 - st->print_cr(" G1=" INTPTR_FORMAT " G2=" INTPTR_FORMAT 3.46 - " G3=" INTPTR_FORMAT " G4=" INTPTR_FORMAT, 3.47 - uc->uc_mcontext.gregs[REG_G1], 3.48 - uc->uc_mcontext.gregs[REG_G2], 3.49 - uc->uc_mcontext.gregs[REG_G3], 3.50 - uc->uc_mcontext.gregs[REG_G4]); 3.51 - st->print_cr(" G5=" INTPTR_FORMAT " G6=" INTPTR_FORMAT 3.52 - " G7=" INTPTR_FORMAT " Y=" INTPTR_FORMAT, 3.53 - uc->uc_mcontext.gregs[REG_G5], 3.54 - uc->uc_mcontext.gregs[REG_G6], 3.55 - uc->uc_mcontext.gregs[REG_G7], 3.56 - uc->uc_mcontext.gregs[REG_Y]); 3.57 + 3.58 + intptr_t *sp = (intptr_t *)os::Solaris::ucontext_get_sp(uc); 3.59 + st->print_cr(" L0=" INTPTR_FORMAT " L1=" INTPTR_FORMAT 3.60 + " L2=" INTPTR_FORMAT " L3=" INTPTR_FORMAT, 3.61 + sp[L0->sp_offset_in_saved_window()], 3.62 + sp[L1->sp_offset_in_saved_window()], 3.63 + sp[L2->sp_offset_in_saved_window()], 3.64 + sp[L3->sp_offset_in_saved_window()]); 3.65 + st->print_cr(" L4=" INTPTR_FORMAT " L5=" INTPTR_FORMAT 3.66 + " L6=" INTPTR_FORMAT " L7=" INTPTR_FORMAT, 3.67 + sp[L4->sp_offset_in_saved_window()], 3.68 + sp[L5->sp_offset_in_saved_window()], 3.69 + sp[L6->sp_offset_in_saved_window()], 3.70 + sp[L7->sp_offset_in_saved_window()]); 3.71 + st->print_cr(" I0=" INTPTR_FORMAT " I1=" INTPTR_FORMAT 3.72 + " I2=" INTPTR_FORMAT " I3=" INTPTR_FORMAT, 3.73 + sp[I0->sp_offset_in_saved_window()], 3.74 + sp[I1->sp_offset_in_saved_window()], 3.75 + sp[I2->sp_offset_in_saved_window()], 3.76 + sp[I3->sp_offset_in_saved_window()]); 3.77 + st->print_cr(" I4=" INTPTR_FORMAT " I5=" INTPTR_FORMAT 3.78 + " I6=" INTPTR_FORMAT " I7=" INTPTR_FORMAT, 3.79 + sp[I4->sp_offset_in_saved_window()], 3.80 + sp[I5->sp_offset_in_saved_window()], 3.81 + sp[I6->sp_offset_in_saved_window()], 3.82 + sp[I7->sp_offset_in_saved_window()]); 3.83 3.84 st->print_cr(" PC=" INTPTR_FORMAT " nPC=" INTPTR_FORMAT, 3.85 uc->uc_mcontext.gregs[REG_PC], 3.86 uc->uc_mcontext.gregs[REG_nPC]); 3.87 - 3.88 st->cr(); 3.89 st->cr(); 3.90 3.91 - st->print_cr("Register to memory mapping:"); 3.92 - st->cr(); 3.93 - 3.94 - // this is only for the "general purpose" registers 3.95 - 3.96 - st->print_cr("O0=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_O0]); 3.97 - print_location(st, uc->uc_mcontext.gregs[REG_O0]); 3.98 - st->cr(); 3.99 - st->print_cr("O1=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_O1]); 3.100 - print_location(st, uc->uc_mcontext.gregs[REG_O1]); 3.101 - st->cr(); 3.102 - st->print_cr("O2=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_O2]); 3.103 - print_location(st, uc->uc_mcontext.gregs[REG_O2]); 3.104 - st->cr(); 3.105 - st->print_cr("O3=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_O3]); 3.106 - print_location(st, uc->uc_mcontext.gregs[REG_O3]); 3.107 - st->cr(); 3.108 - st->print_cr("O4=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_O4]); 3.109 - print_location(st, uc->uc_mcontext.gregs[REG_O4]); 3.110 - st->cr(); 3.111 - st->print_cr("O5=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_O5]); 3.112 - print_location(st, uc->uc_mcontext.gregs[REG_O5]); 3.113 - st->cr(); 3.114 - st->print_cr("O6=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_O6]); 3.115 - print_location(st, uc->uc_mcontext.gregs[REG_O6]); 3.116 - st->cr(); 3.117 - st->print_cr("O7=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_O7]); 3.118 - print_location(st, uc->uc_mcontext.gregs[REG_O7]); 3.119 - st->cr(); 3.120 - 3.121 - st->print_cr("G1=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_G1]); 3.122 - print_location(st, uc->uc_mcontext.gregs[REG_G1]); 3.123 - st->cr(); 3.124 - st->print_cr("G2=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_G2]); 3.125 - print_location(st, uc->uc_mcontext.gregs[REG_G2]); 3.126 - st->cr(); 3.127 - st->print_cr("G3=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_G3]); 3.128 - print_location(st, uc->uc_mcontext.gregs[REG_G3]); 3.129 - st->cr(); 3.130 - st->print_cr("G4=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_G4]); 3.131 - print_location(st, uc->uc_mcontext.gregs[REG_G4]); 3.132 - st->cr(); 3.133 - st->print_cr("G5=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_G5]); 3.134 - print_location(st, uc->uc_mcontext.gregs[REG_G5]); 3.135 - st->cr(); 3.136 - st->print_cr("G6=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_G6]); 3.137 - print_location(st, uc->uc_mcontext.gregs[REG_G6]); 3.138 - st->cr(); 3.139 - st->print_cr("G7=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_G7]); 3.140 - print_location(st, uc->uc_mcontext.gregs[REG_G7]); 3.141 - 3.142 - st->cr(); 3.143 - st->cr(); 3.144 - 3.145 - intptr_t *sp = (intptr_t *)os::Solaris::ucontext_get_sp(uc); 3.146 st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", sp); 3.147 print_hex_dump(st, (address)sp, (address)(sp + 32), sizeof(intptr_t)); 3.148 st->cr(); 3.149 @@ -656,7 +631,57 @@ 3.150 ExtendedPC epc = os::Solaris::ucontext_get_ExtendedPC(uc); 3.151 address pc = epc.pc(); 3.152 st->print_cr("Instructions: (pc=" PTR_FORMAT ")", pc); 3.153 - print_hex_dump(st, pc - 16, pc + 16, sizeof(char)); 3.154 + print_hex_dump(st, pc - 32, pc + 32, sizeof(char)); 3.155 +} 3.156 + 3.157 +void os::print_register_info(outputStream *st, void *context) { 3.158 + if (context == NULL) return; 3.159 + 3.160 + ucontext_t *uc = (ucontext_t*)context; 3.161 + intptr_t *sp = (intptr_t *)os::Solaris::ucontext_get_sp(uc); 3.162 + 3.163 + st->print_cr("Register to memory mapping:"); 3.164 + st->cr(); 3.165 + 3.166 + // this is only for the "general purpose" registers 3.167 + st->print("G1="); print_location(st, uc->uc_mcontext.gregs[REG_G1]); 3.168 + st->print("G2="); print_location(st, uc->uc_mcontext.gregs[REG_G2]); 3.169 + st->print("G3="); print_location(st, uc->uc_mcontext.gregs[REG_G3]); 3.170 + st->print("G4="); print_location(st, uc->uc_mcontext.gregs[REG_G4]); 3.171 + st->print("G5="); print_location(st, uc->uc_mcontext.gregs[REG_G5]); 3.172 + st->print("G6="); print_location(st, uc->uc_mcontext.gregs[REG_G6]); 3.173 + st->print("G7="); print_location(st, uc->uc_mcontext.gregs[REG_G7]); 3.174 + st->cr(); 3.175 + 3.176 + st->print("O0="); print_location(st, uc->uc_mcontext.gregs[REG_O0]); 3.177 + st->print("O1="); print_location(st, uc->uc_mcontext.gregs[REG_O1]); 3.178 + st->print("O2="); print_location(st, uc->uc_mcontext.gregs[REG_O2]); 3.179 + st->print("O3="); print_location(st, uc->uc_mcontext.gregs[REG_O3]); 3.180 + st->print("O4="); print_location(st, uc->uc_mcontext.gregs[REG_O4]); 3.181 + st->print("O5="); print_location(st, uc->uc_mcontext.gregs[REG_O5]); 3.182 + st->print("O6="); print_location(st, uc->uc_mcontext.gregs[REG_O6]); 3.183 + st->print("O7="); print_location(st, uc->uc_mcontext.gregs[REG_O7]); 3.184 + st->cr(); 3.185 + 3.186 + st->print("L0="); print_location(st, sp[L0->sp_offset_in_saved_window()]); 3.187 + st->print("L1="); print_location(st, sp[L1->sp_offset_in_saved_window()]); 3.188 + st->print("L2="); print_location(st, sp[L2->sp_offset_in_saved_window()]); 3.189 + st->print("L3="); print_location(st, sp[L3->sp_offset_in_saved_window()]); 3.190 + st->print("L4="); print_location(st, sp[L4->sp_offset_in_saved_window()]); 3.191 + st->print("L5="); print_location(st, sp[L5->sp_offset_in_saved_window()]); 3.192 + st->print("L6="); print_location(st, sp[L6->sp_offset_in_saved_window()]); 3.193 + st->print("L7="); print_location(st, sp[L7->sp_offset_in_saved_window()]); 3.194 + st->cr(); 3.195 + 3.196 + st->print("I0="); print_location(st, sp[I0->sp_offset_in_saved_window()]); 3.197 + st->print("I1="); print_location(st, sp[I1->sp_offset_in_saved_window()]); 3.198 + st->print("I2="); print_location(st, sp[I2->sp_offset_in_saved_window()]); 3.199 + st->print("I3="); print_location(st, sp[I3->sp_offset_in_saved_window()]); 3.200 + st->print("I4="); print_location(st, sp[I4->sp_offset_in_saved_window()]); 3.201 + st->print("I5="); print_location(st, sp[I5->sp_offset_in_saved_window()]); 3.202 + st->print("I6="); print_location(st, sp[I6->sp_offset_in_saved_window()]); 3.203 + st->print("I7="); print_location(st, sp[I7->sp_offset_in_saved_window()]); 3.204 + st->cr(); 3.205 } 3.206 3.207 void os::Solaris::init_thread_fpu_state(void) {
4.1 --- a/src/os_cpu/solaris_x86/vm/os_solaris_x86.cpp Wed Oct 20 13:18:17 2010 -0700 4.2 +++ b/src/os_cpu/solaris_x86/vm/os_solaris_x86.cpp Thu Oct 21 11:55:10 2010 -0700 4.3 @@ -719,11 +719,6 @@ 4.4 4.5 ucontext_t *uc = (ucontext_t*)context; 4.6 st->print_cr("Registers:"); 4.7 - 4.8 - // this is horrendously verbose but the layout of the registers in the 4.9 - // context does not match how we defined our abstract Register set, so 4.10 - // we can't just iterate through the gregs area 4.11 - 4.12 #ifdef AMD64 4.13 st->print( "RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]); 4.14 st->print(", RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]); 4.15 @@ -735,8 +730,8 @@ 4.16 st->print(", RSI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSI]); 4.17 st->print(", RDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDI]); 4.18 st->cr(); 4.19 - st->print( "R8=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]); 4.20 - st->print(", R9=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]); 4.21 + st->print( "R8 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]); 4.22 + st->print(", R9 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]); 4.23 st->print(", R10=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R10]); 4.24 st->print(", R11=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R11]); 4.25 st->cr(); 4.26 @@ -747,63 +742,6 @@ 4.27 st->cr(); 4.28 st->print( "RIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RIP]); 4.29 st->print(", RFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RFL]); 4.30 - 4.31 - st->cr(); 4.32 - st->cr(); 4.33 - 4.34 - st->print_cr("Register to memory mapping:"); 4.35 - st->cr(); 4.36 - 4.37 - // this is only for the "general purpose" registers 4.38 - 4.39 - st->print_cr("RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]); 4.40 - print_location(st, uc->uc_mcontext.gregs[REG_RAX]); 4.41 - st->cr(); 4.42 - st->print_cr("RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]); 4.43 - print_location(st, uc->uc_mcontext.gregs[REG_RBX]); 4.44 - st->cr(); 4.45 - st->print_cr("RCX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RCX]); 4.46 - print_location(st, uc->uc_mcontext.gregs[REG_RCX]); 4.47 - st->cr(); 4.48 - st->print_cr("RDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDX]); 4.49 - print_location(st, uc->uc_mcontext.gregs[REG_RDX]); 4.50 - st->cr(); 4.51 - st->print_cr("RSP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSP]); 4.52 - print_location(st, uc->uc_mcontext.gregs[REG_RSP]); 4.53 - st->cr(); 4.54 - st->print_cr("RBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBP]); 4.55 - print_location(st, uc->uc_mcontext.gregs[REG_RSP]); 4.56 - st->cr(); 4.57 - st->print_cr("RSI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSI]); 4.58 - print_location(st, uc->uc_mcontext.gregs[REG_RSI]); 4.59 - st->cr(); 4.60 - st->print_cr("RDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDI]); 4.61 - print_location(st, uc->uc_mcontext.gregs[REG_RDI]); 4.62 - st->cr(); 4.63 - st->print_cr("R8 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]); 4.64 - print_location(st, uc->uc_mcontext.gregs[REG_R8]); 4.65 - st->cr(); 4.66 - st->print_cr("R9 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]); 4.67 - print_location(st, uc->uc_mcontext.gregs[REG_R9]); 4.68 - st->cr(); 4.69 - st->print_cr("R10=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R10]); 4.70 - print_location(st, uc->uc_mcontext.gregs[REG_R10]); 4.71 - st->cr(); 4.72 - st->print_cr("R11=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R11]); 4.73 - print_location(st, uc->uc_mcontext.gregs[REG_R11]); 4.74 - st->cr(); 4.75 - st->print_cr("R12=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R12]); 4.76 - print_location(st, uc->uc_mcontext.gregs[REG_R12]); 4.77 - st->cr(); 4.78 - st->print_cr("R13=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R13]); 4.79 - print_location(st, uc->uc_mcontext.gregs[REG_R13]); 4.80 - st->cr(); 4.81 - st->print_cr("R14=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R14]); 4.82 - print_location(st, uc->uc_mcontext.gregs[REG_R14]); 4.83 - st->cr(); 4.84 - st->print_cr("R15=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R15]); 4.85 - print_location(st, uc->uc_mcontext.gregs[REG_R15]); 4.86 - 4.87 #else 4.88 st->print( "EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EAX]); 4.89 st->print(", EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EBX]); 4.90 @@ -817,39 +755,6 @@ 4.91 st->cr(); 4.92 st->print( "EIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EIP]); 4.93 st->print(", EFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EFL]); 4.94 - 4.95 - st->cr(); 4.96 - st->cr(); 4.97 - 4.98 - st->print_cr("Register to memory mapping:"); 4.99 - st->cr(); 4.100 - 4.101 - // this is only for the "general purpose" registers 4.102 - 4.103 - st->print_cr("EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EAX]); 4.104 - print_location(st, uc->uc_mcontext.gregs[EAX]); 4.105 - st->cr(); 4.106 - st->print_cr("EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EBX]); 4.107 - print_location(st, uc->uc_mcontext.gregs[EBX]); 4.108 - st->cr(); 4.109 - st->print_cr("ECX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[ECX]); 4.110 - print_location(st, uc->uc_mcontext.gregs[ECX]); 4.111 - st->cr(); 4.112 - st->print_cr("EDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EDX]); 4.113 - print_location(st, uc->uc_mcontext.gregs[EDX]); 4.114 - st->cr(); 4.115 - st->print_cr("ESP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[UESP]); 4.116 - print_location(st, uc->uc_mcontext.gregs[UESP]); 4.117 - st->cr(); 4.118 - st->print_cr("EBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EBP]); 4.119 - print_location(st, uc->uc_mcontext.gregs[EBP]); 4.120 - st->cr(); 4.121 - st->print_cr("ESI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[ESI]); 4.122 - print_location(st, uc->uc_mcontext.gregs[ESI]); 4.123 - st->cr(); 4.124 - st->print_cr("EDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EDI]); 4.125 - print_location(st, uc->uc_mcontext.gregs[EDI]); 4.126 - 4.127 #endif // AMD64 4.128 st->cr(); 4.129 st->cr(); 4.130 @@ -865,7 +770,52 @@ 4.131 ExtendedPC epc = os::Solaris::ucontext_get_ExtendedPC(uc); 4.132 address pc = epc.pc(); 4.133 st->print_cr("Instructions: (pc=" PTR_FORMAT ")", pc); 4.134 - print_hex_dump(st, pc - 16, pc + 16, sizeof(char)); 4.135 + print_hex_dump(st, pc - 32, pc + 32, sizeof(char)); 4.136 +} 4.137 + 4.138 +void os::print_register_info(outputStream *st, void *context) { 4.139 + if (context == NULL) return; 4.140 + 4.141 + ucontext_t *uc = (ucontext_t*)context; 4.142 + 4.143 + st->print_cr("Register to memory mapping:"); 4.144 + st->cr(); 4.145 + 4.146 + // this is horrendously verbose but the layout of the registers in the 4.147 + // context does not match how we defined our abstract Register set, so 4.148 + // we can't just iterate through the gregs area 4.149 + 4.150 + // this is only for the "general purpose" registers 4.151 + 4.152 +#ifdef AMD64 4.153 + st->print("RAX="); print_location(st, uc->uc_mcontext.gregs[REG_RAX]); 4.154 + st->print("RBX="); print_location(st, uc->uc_mcontext.gregs[REG_RBX]); 4.155 + st->print("RCX="); print_location(st, uc->uc_mcontext.gregs[REG_RCX]); 4.156 + st->print("RDX="); print_location(st, uc->uc_mcontext.gregs[REG_RDX]); 4.157 + st->print("RSP="); print_location(st, uc->uc_mcontext.gregs[REG_RSP]); 4.158 + st->print("RBP="); print_location(st, uc->uc_mcontext.gregs[REG_RBP]); 4.159 + st->print("RSI="); print_location(st, uc->uc_mcontext.gregs[REG_RSI]); 4.160 + st->print("RDI="); print_location(st, uc->uc_mcontext.gregs[REG_RDI]); 4.161 + st->print("R8 ="); print_location(st, uc->uc_mcontext.gregs[REG_R8]); 4.162 + st->print("R9 ="); print_location(st, uc->uc_mcontext.gregs[REG_R9]); 4.163 + st->print("R10="); print_location(st, uc->uc_mcontext.gregs[REG_R10]); 4.164 + st->print("R11="); print_location(st, uc->uc_mcontext.gregs[REG_R11]); 4.165 + st->print("R12="); print_location(st, uc->uc_mcontext.gregs[REG_R12]); 4.166 + st->print("R13="); print_location(st, uc->uc_mcontext.gregs[REG_R13]); 4.167 + st->print("R14="); print_location(st, uc->uc_mcontext.gregs[REG_R14]); 4.168 + st->print("R15="); print_location(st, uc->uc_mcontext.gregs[REG_R15]); 4.169 +#else 4.170 + st->print("EAX="); print_location(st, uc->uc_mcontext.gregs[EAX]); 4.171 + st->print("EBX="); print_location(st, uc->uc_mcontext.gregs[EBX]); 4.172 + st->print("ECX="); print_location(st, uc->uc_mcontext.gregs[ECX]); 4.173 + st->print("EDX="); print_location(st, uc->uc_mcontext.gregs[EDX]); 4.174 + st->print("ESP="); print_location(st, uc->uc_mcontext.gregs[UESP]); 4.175 + st->print("EBP="); print_location(st, uc->uc_mcontext.gregs[EBP]); 4.176 + st->print("ESI="); print_location(st, uc->uc_mcontext.gregs[ESI]); 4.177 + st->print("EDI="); print_location(st, uc->uc_mcontext.gregs[EDI]); 4.178 +#endif 4.179 + 4.180 + st->cr(); 4.181 } 4.182 4.183
5.1 --- a/src/os_cpu/windows_x86/vm/os_windows_x86.cpp Wed Oct 20 13:18:17 2010 -0700 5.2 +++ b/src/os_cpu/windows_x86/vm/os_windows_x86.cpp Thu Oct 21 11:55:10 2010 -0700 5.3 @@ -387,8 +387,8 @@ 5.4 st->print(", RSI=" INTPTR_FORMAT, uc->Rsi); 5.5 st->print(", RDI=" INTPTR_FORMAT, uc->Rdi); 5.6 st->cr(); 5.7 - st->print( "R8=" INTPTR_FORMAT, uc->R8); 5.8 - st->print(", R9=" INTPTR_FORMAT, uc->R9); 5.9 + st->print( "R8 =" INTPTR_FORMAT, uc->R8); 5.10 + st->print(", R9 =" INTPTR_FORMAT, uc->R9); 5.11 st->print(", R10=" INTPTR_FORMAT, uc->R10); 5.12 st->print(", R11=" INTPTR_FORMAT, uc->R11); 5.13 st->cr(); 5.14 @@ -399,62 +399,6 @@ 5.15 st->cr(); 5.16 st->print( "RIP=" INTPTR_FORMAT, uc->Rip); 5.17 st->print(", EFLAGS=" INTPTR_FORMAT, uc->EFlags); 5.18 - 5.19 - st->cr(); 5.20 - st->cr(); 5.21 - 5.22 - st->print_cr("Register to memory mapping:"); 5.23 - st->cr(); 5.24 - 5.25 - // this is only for the "general purpose" registers 5.26 - 5.27 - st->print_cr("RAX=" INTPTR_FORMAT, uc->Rax); 5.28 - print_location(st, uc->Rax); 5.29 - st->cr(); 5.30 - st->print_cr("RBX=" INTPTR_FORMAT, uc->Rbx); 5.31 - print_location(st, uc->Rbx); 5.32 - st->cr(); 5.33 - st->print_cr("RCX=" INTPTR_FORMAT, uc->Rcx); 5.34 - print_location(st, uc->Rcx); 5.35 - st->cr(); 5.36 - st->print_cr("RDX=" INTPTR_FORMAT, uc->Rdx); 5.37 - print_location(st, uc->Rdx); 5.38 - st->cr(); 5.39 - st->print_cr("RSP=" INTPTR_FORMAT, uc->Rsp); 5.40 - print_location(st, uc->Rsp); 5.41 - st->cr(); 5.42 - st->print_cr("RBP=" INTPTR_FORMAT, uc->Rbp); 5.43 - print_location(st, uc->Rbp); 5.44 - st->cr(); 5.45 - st->print_cr("RSI=" INTPTR_FORMAT, uc->Rsi); 5.46 - print_location(st, uc->Rsi); 5.47 - st->cr(); 5.48 - st->print_cr("RDI=" INTPTR_FORMAT, uc->Rdi); 5.49 - print_location(st, uc->Rdi); 5.50 - st->cr(); 5.51 - st->print_cr("R8 =" INTPTR_FORMAT, uc->R8); 5.52 - print_location(st, uc->R8); 5.53 - st->cr(); 5.54 - st->print_cr("R9 =" INTPTR_FORMAT, uc->R9); 5.55 - print_location(st, uc->R9); 5.56 - st->cr(); 5.57 - st->print_cr("R10=" INTPTR_FORMAT, uc->R10); 5.58 - print_location(st, uc->R10); 5.59 - st->cr(); 5.60 - st->print_cr("R11=" INTPTR_FORMAT, uc->R11); 5.61 - print_location(st, uc->R11); 5.62 - st->cr(); 5.63 - st->print_cr("R12=" INTPTR_FORMAT, uc->R12); 5.64 - print_location(st, uc->R12); 5.65 - st->cr(); 5.66 - st->print_cr("R13=" INTPTR_FORMAT, uc->R13); 5.67 - print_location(st, uc->R13); 5.68 - st->cr(); 5.69 - st->print_cr("R14=" INTPTR_FORMAT, uc->R14); 5.70 - print_location(st, uc->R14); 5.71 - st->cr(); 5.72 - st->print_cr("R15=" INTPTR_FORMAT, uc->R15); 5.73 - print_location(st, uc->R15); 5.74 #else 5.75 st->print( "EAX=" INTPTR_FORMAT, uc->Eax); 5.76 st->print(", EBX=" INTPTR_FORMAT, uc->Ebx); 5.77 @@ -468,38 +412,6 @@ 5.78 st->cr(); 5.79 st->print( "EIP=" INTPTR_FORMAT, uc->Eip); 5.80 st->print(", EFLAGS=" INTPTR_FORMAT, uc->EFlags); 5.81 - 5.82 - st->cr(); 5.83 - st->cr(); 5.84 - 5.85 - st->print_cr("Register to memory mapping:"); 5.86 - st->cr(); 5.87 - 5.88 - // this is only for the "general purpose" registers 5.89 - 5.90 - st->print_cr("EAX=" INTPTR_FORMAT, uc->Eax); 5.91 - print_location(st, uc->Eax); 5.92 - st->cr(); 5.93 - st->print_cr("EBX=" INTPTR_FORMAT, uc->Ebx); 5.94 - print_location(st, uc->Ebx); 5.95 - st->cr(); 5.96 - st->print_cr("ECX=" INTPTR_FORMAT, uc->Ecx); 5.97 - print_location(st, uc->Ecx); 5.98 - st->cr(); 5.99 - st->print_cr("EDX=" INTPTR_FORMAT, uc->Edx); 5.100 - print_location(st, uc->Edx); 5.101 - st->cr(); 5.102 - st->print_cr("ESP=" INTPTR_FORMAT, uc->Esp); 5.103 - print_location(st, uc->Esp); 5.104 - st->cr(); 5.105 - st->print_cr("EBP=" INTPTR_FORMAT, uc->Ebp); 5.106 - print_location(st, uc->Ebp); 5.107 - st->cr(); 5.108 - st->print_cr("ESI=" INTPTR_FORMAT, uc->Esi); 5.109 - print_location(st, uc->Esi); 5.110 - st->cr(); 5.111 - st->print_cr("EDI=" INTPTR_FORMAT, uc->Edi); 5.112 - print_location(st, uc->Edi); 5.113 #endif // AMD64 5.114 st->cr(); 5.115 st->cr(); 5.116 @@ -514,7 +426,49 @@ 5.117 // this at the end, and hope for the best. 5.118 address pc = (address)uc->REG_PC; 5.119 st->print_cr("Instructions: (pc=" PTR_FORMAT ")", pc); 5.120 - print_hex_dump(st, pc - 16, pc + 16, sizeof(char)); 5.121 + print_hex_dump(st, pc - 32, pc + 32, sizeof(char)); 5.122 + st->cr(); 5.123 +} 5.124 + 5.125 + 5.126 +void os::print_register_info(outputStream *st, void *context) { 5.127 + if (context == NULL) return; 5.128 + 5.129 + CONTEXT* uc = (CONTEXT*)context; 5.130 + 5.131 + st->print_cr("Register to memory mapping:"); 5.132 + st->cr(); 5.133 + 5.134 + // this is only for the "general purpose" registers 5.135 + 5.136 +#ifdef AMD64 5.137 + st->print("RAX="); print_location(st, uc->Rax); 5.138 + st->print("RBX="); print_location(st, uc->Rbx); 5.139 + st->print("RCX="); print_location(st, uc->Rcx); 5.140 + st->print("RDX="); print_location(st, uc->Rdx); 5.141 + st->print("RSP="); print_location(st, uc->Rsp); 5.142 + st->print("RBP="); print_location(st, uc->Rbp); 5.143 + st->print("RSI="); print_location(st, uc->Rsi); 5.144 + st->print("RDI="); print_location(st, uc->Rdi); 5.145 + st->print("R8 ="); print_location(st, uc->R8); 5.146 + st->print("R9 ="); print_location(st, uc->R9); 5.147 + st->print("R10="); print_location(st, uc->R10); 5.148 + st->print("R11="); print_location(st, uc->R11); 5.149 + st->print("R12="); print_location(st, uc->R12); 5.150 + st->print("R13="); print_location(st, uc->R13); 5.151 + st->print("R14="); print_location(st, uc->R14); 5.152 + st->print("R15="); print_location(st, uc->R15); 5.153 +#else 5.154 + st->print("EAX="); print_location(st, uc->Eax); 5.155 + st->print("EBX="); print_location(st, uc->Ebx); 5.156 + st->print("ECX="); print_location(st, uc->Ecx); 5.157 + st->print("EDX="); print_location(st, uc->Edx); 5.158 + st->print("ESP="); print_location(st, uc->Esp); 5.159 + st->print("EBP="); print_location(st, uc->Ebp); 5.160 + st->print("ESI="); print_location(st, uc->Esi); 5.161 + st->print("EDI="); print_location(st, uc->Edi); 5.162 +#endif 5.163 + 5.164 st->cr(); 5.165 } 5.166
6.1 --- a/src/share/vm/code/codeCache.cpp Wed Oct 20 13:18:17 2010 -0700 6.2 +++ b/src/share/vm/code/codeCache.cpp Thu Oct 21 11:55:10 2010 -0700 6.3 @@ -914,3 +914,14 @@ 6.4 } 6.5 6.6 #endif // PRODUCT 6.7 + 6.8 +void CodeCache::print_bounds(outputStream* st) { 6.9 + st->print_cr("Code Cache [" INTPTR_FORMAT ", " INTPTR_FORMAT ", " INTPTR_FORMAT ")", 6.10 + _heap->low_boundary(), 6.11 + _heap->high(), 6.12 + _heap->high_boundary()); 6.13 + st->print_cr(" total_blobs=" UINT32_FORMAT " nmethods=" UINT32_FORMAT 6.14 + " adapters=" UINT32_FORMAT " free_code_cache=" SIZE_FORMAT, 6.15 + CodeCache::nof_blobs(), CodeCache::nof_nmethods(), 6.16 + CodeCache::nof_adapters(), CodeCache::unallocated_capacity()); 6.17 +}
7.1 --- a/src/share/vm/code/codeCache.hpp Wed Oct 20 13:18:17 2010 -0700 7.2 +++ b/src/share/vm/code/codeCache.hpp Thu Oct 21 11:55:10 2010 -0700 7.3 @@ -137,6 +137,7 @@ 7.4 static void print_internals(); 7.5 static void verify(); // verifies the code cache 7.6 static void print_trace(const char* event, CodeBlob* cb, int size = 0) PRODUCT_RETURN; 7.7 + static void print_bounds(outputStream* st); // Prints a summary of the bounds of the code cache 7.8 7.9 // The full limits of the codeCache 7.10 static address low_bound() { return (address) _heap->low_boundary(); }
8.1 --- a/src/share/vm/gc_implementation/includeDB_gc_parallelScavenge Wed Oct 20 13:18:17 2010 -0700 8.2 +++ b/src/share/vm/gc_implementation/includeDB_gc_parallelScavenge Thu Oct 21 11:55:10 2010 -0700 8.3 @@ -133,6 +133,7 @@ 8.4 parallelScavengeHeap.cpp psParallelCompact.hpp 8.5 parallelScavengeHeap.cpp psPromotionManager.hpp 8.6 parallelScavengeHeap.cpp psScavenge.hpp 8.7 +parallelScavengeHeap.cpp vmError.hpp 8.8 parallelScavengeHeap.cpp vmThread.hpp 8.9 parallelScavengeHeap.cpp vmPSOperations.hpp 8.10
9.1 --- a/src/share/vm/gc_implementation/parallelScavenge/parallelScavengeHeap.cpp Wed Oct 20 13:18:17 2010 -0700 9.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/parallelScavengeHeap.cpp Thu Oct 21 11:55:10 2010 -0700 9.3 @@ -805,7 +805,8 @@ 9.4 if (young_gen()->is_in_reserved(addr)) { 9.5 assert(young_gen()->is_in(addr), 9.6 "addr should be in allocated part of young gen"); 9.7 - if (Debugging) return NULL; // called from find() in debug.cpp 9.8 + // called from os::print_location by find or VMError 9.9 + if (Debugging || VMError::fatal_error_in_progress()) return NULL; 9.10 Unimplemented(); 9.11 } else if (old_gen()->is_in_reserved(addr)) { 9.12 assert(old_gen()->is_in(addr),
10.1 --- a/src/share/vm/memory/heap.hpp Wed Oct 20 13:18:17 2010 -0700 10.2 +++ b/src/share/vm/memory/heap.hpp Thu Oct 21 11:55:10 2010 -0700 10.3 @@ -1,5 +1,5 @@ 10.4 /* 10.5 - * Copyright (c) 1997, 2006, Oracle and/or its affiliates. All rights reserved. 10.6 + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. 10.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 10.8 * 10.9 * This code is free software; you can redistribute it and/or modify it 10.10 @@ -140,6 +140,7 @@ 10.11 10.12 // Returns reserved area high and low addresses 10.13 char *low_boundary() const { return _memory.low_boundary (); } 10.14 + char *high() const { return _memory.high(); } 10.15 char *high_boundary() const { return _memory.high_boundary(); } 10.16 10.17 // Iteration
11.1 --- a/src/share/vm/runtime/os.cpp Wed Oct 20 13:18:17 2010 -0700 11.2 +++ b/src/share/vm/runtime/os.cpp Thu Oct 21 11:55:10 2010 -0700 11.3 @@ -1,5 +1,5 @@ 11.4 /* 11.5 - * Copyright (c) 1997, 2009, Oracle and/or its affiliates. All rights reserved. 11.6 + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. 11.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 11.8 * 11.9 * This code is free software; you can redistribute it and/or modify it 11.10 @@ -736,8 +736,8 @@ 11.11 } 11.12 11.13 // moved from debug.cpp (used to be find()) but still called from there 11.14 -// The print_pc parameter is only set by the debug code in one case 11.15 -void os::print_location(outputStream* st, intptr_t x, bool print_pc) { 11.16 +// The verbose parameter is only set by the debug code in one case 11.17 +void os::print_location(outputStream* st, intptr_t x, bool verbose) { 11.18 address addr = (address)x; 11.19 CodeBlob* b = CodeCache::find_blob_unsafe(addr); 11.20 if (b != NULL) { 11.21 @@ -745,6 +745,7 @@ 11.22 // the interpreter is generated into a buffer blob 11.23 InterpreterCodelet* i = Interpreter::codelet_containing(addr); 11.24 if (i != NULL) { 11.25 + st->print_cr(INTPTR_FORMAT " is an Interpreter codelet", addr); 11.26 i->print_on(st); 11.27 return; 11.28 } 11.29 @@ -755,14 +756,14 @@ 11.30 } 11.31 // 11.32 if (AdapterHandlerLibrary::contains(b)) { 11.33 - st->print_cr("Printing AdapterHandler"); 11.34 + st->print_cr(INTPTR_FORMAT " is an AdapterHandler", addr); 11.35 AdapterHandlerLibrary::print_handler_on(st, b); 11.36 } 11.37 // the stubroutines are generated into a buffer blob 11.38 StubCodeDesc* d = StubCodeDesc::desc_for(addr); 11.39 if (d != NULL) { 11.40 d->print_on(st); 11.41 - if (print_pc) st->cr(); 11.42 + if (verbose) st->cr(); 11.43 return; 11.44 } 11.45 if (StubRoutines::contains(addr)) { 11.46 @@ -781,7 +782,7 @@ 11.47 return; 11.48 } 11.49 } 11.50 - if (print_pc && b->is_nmethod()) { 11.51 + if (verbose && b->is_nmethod()) { 11.52 ResourceMark rm; 11.53 st->print("%#p: Compiled ", addr); 11.54 ((nmethod*)b)->method()->print_value_on(st); 11.55 @@ -789,11 +790,12 @@ 11.56 st->cr(); 11.57 return; 11.58 } 11.59 + st->print(INTPTR_FORMAT " ", b); 11.60 if ( b->is_nmethod()) { 11.61 if (b->is_zombie()) { 11.62 - st->print_cr(INTPTR_FORMAT " is zombie nmethod", b); 11.63 + st->print_cr("is zombie nmethod"); 11.64 } else if (b->is_not_entrant()) { 11.65 - st->print_cr(INTPTR_FORMAT " is non-entrant nmethod", b); 11.66 + st->print_cr("is non-entrant nmethod"); 11.67 } 11.68 } 11.69 b->print_on(st); 11.70 @@ -812,6 +814,7 @@ 11.71 print = true; 11.72 } 11.73 if (print) { 11.74 + st->print_cr(INTPTR_FORMAT " is an oop", addr); 11.75 oop(p)->print_on(st); 11.76 if (p != (HeapWord*)x && oop(p)->is_constMethod() && 11.77 constMethodOop(p)->contains(addr)) { 11.78 @@ -855,12 +858,16 @@ 11.79 thread->privileged_stack_top()->contains(addr)) { 11.80 st->print_cr(INTPTR_FORMAT " is pointing into the privilege stack " 11.81 "for thread: " INTPTR_FORMAT, addr, thread); 11.82 - thread->print_on(st); 11.83 + if (verbose) thread->print_on(st); 11.84 return; 11.85 } 11.86 // If the addr is a java thread print information about that. 11.87 if (addr == (address)thread) { 11.88 - thread->print_on(st); 11.89 + if (verbose) { 11.90 + thread->print_on(st); 11.91 + } else { 11.92 + st->print_cr(INTPTR_FORMAT " is a thread", addr); 11.93 + } 11.94 return; 11.95 } 11.96 // If the addr is in the stack region for this thread then report that 11.97 @@ -869,7 +876,7 @@ 11.98 addr > (thread->stack_base() - thread->stack_size())) { 11.99 st->print_cr(INTPTR_FORMAT " is pointing into the stack for thread: " 11.100 INTPTR_FORMAT, addr, thread); 11.101 - thread->print_on(st); 11.102 + if (verbose) thread->print_on(st); 11.103 return; 11.104 } 11.105 11.106 @@ -879,7 +886,7 @@ 11.107 return; 11.108 } 11.109 11.110 - st->print_cr(INTPTR_FORMAT " is pointing to unknown location", addr); 11.111 + st->print_cr(INTPTR_FORMAT " is an unknown value", addr); 11.112 } 11.113 11.114 // Looks like all platforms except IA64 can use the same function to check
12.1 --- a/src/share/vm/runtime/os.hpp Wed Oct 20 13:18:17 2010 -0700 12.2 +++ b/src/share/vm/runtime/os.hpp Thu Oct 21 11:55:10 2010 -0700 12.3 @@ -450,11 +450,12 @@ 12.4 static void print_dll_info(outputStream* st); 12.5 static void print_environment_variables(outputStream* st, const char** env_list, char* buffer, int len); 12.6 static void print_context(outputStream* st, void* context); 12.7 + static void print_register_info(outputStream* st, void* context); 12.8 static void print_siginfo(outputStream* st, void* siginfo); 12.9 static void print_signal_handlers(outputStream* st, char* buf, size_t buflen); 12.10 static void print_date_and_time(outputStream* st); 12.11 12.12 - static void print_location(outputStream* st, intptr_t x, bool print_pc = false); 12.13 + static void print_location(outputStream* st, intptr_t x, bool verbose = false); 12.14 12.15 // The following two functions are used by fatal error handler to trace 12.16 // native (C) frames. They are not part of frame.hpp/frame.cpp because
13.1 --- a/src/share/vm/utilities/vmError.cpp Wed Oct 20 13:18:17 2010 -0700 13.2 +++ b/src/share/vm/utilities/vmError.cpp Thu Oct 21 11:55:10 2010 -0700 13.3 @@ -455,6 +455,14 @@ 13.4 st->cr(); 13.5 } 13.6 13.7 + STEP(105, "(printing register info)") 13.8 + 13.9 + // decode register contents if possible 13.10 + if (_verbose && _context && Universe::is_fully_initialized()) { 13.11 + os::print_register_info(st, _context); 13.12 + st->cr(); 13.13 + } 13.14 + 13.15 STEP(110, "(printing stack bounds)" ) 13.16 13.17 if (_verbose) { 13.18 @@ -522,7 +530,7 @@ 13.19 STEP(135, "(printing target Java thread stack)" ) 13.20 13.21 // printing Java thread stack trace if it is involved in GC crash 13.22 - if (_verbose && (_thread->is_Named_thread())) { 13.23 + if (_verbose && _thread && (_thread->is_Named_thread())) { 13.24 JavaThread* jt = ((NamedThread *)_thread)->processed_thread(); 13.25 if (jt != NULL) { 13.26 st->print_cr("JavaThread " PTR_FORMAT " (nid = " UINTX_FORMAT ") was being processed", jt, jt->osthread()->thread_id()); 13.27 @@ -608,6 +616,14 @@ 13.28 st->cr(); 13.29 } 13.30 13.31 + STEP(195, "(printing code cache information)" ) 13.32 + 13.33 + if (_verbose && Universe::is_fully_initialized()) { 13.34 + // print code cache information before vm abort 13.35 + CodeCache::print_bounds(st); 13.36 + st->cr(); 13.37 + } 13.38 + 13.39 STEP(200, "(printing dynamic libraries)" ) 13.40 13.41 if (_verbose) {
